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Author SHA1 Message Date
Bill Wendling
1c44d869cd Split out the updating of PHI nodes after splitting the BB into a separate 
function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137979 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 20:51:04 +00:00
Bill Wendling
9210e840dd Use this fantzy ArrayRef thing to pass in the list of predecessors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137978 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 20:39:32 +00:00
Akira Hatanaka
dbe9a31683 Make IsShiftedMask a static function rather than defining it in an 
anonymous namespace.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137975 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 20:07:42 +00:00
Nick Lewycky
58e2cdfabd The edge from DISubprogram to DICompileUnit has been removed in recent versions 
of debug info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137972 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 19:07:42 +00:00
Jim Grosbach
0d1511c022 Thumb assembly parsing and encoding for CMP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137963 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 18:08:29 +00:00
Bill Wendling
d4770144d4 Use static instead of anonymous namespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137959 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 17:57:57 +00:00
Jim Grosbach
11cca7a2ea Thumb instructions CBZ and CBNZ are Thumb2, not THumb1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137956 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 17:51:36 +00:00
Chris Lattner
489fee1b64 Rip out the old StructType APIs as warned about on llvmdev last week. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137953 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 17:39:28 +00:00
Jim Grosbach
90b5a08e1f ARM Thumb blx instruction fixup has same data range as bl. 
These fixups are handled poorly in general, and should have a single
contiguous range of bits per fixup type, but that's not how they're
currently organized, so for now in complex ones like for blx, we just tell the
emitter it's OK for the fixup to munge any bit it wants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137947 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 16:57:50 +00:00
Jim Grosbach
5f687decc8 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137946 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 16:50:45 +00:00
Bruno Cardoso Lopes
44d12eb998 Clenup and fix encoding for Mips ins and ext instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137943 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 16:30:49 +00:00
Jim Grosbach
3ce23d3d87 Add missing 'break'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137941 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 16:08:39 +00:00
Richard Osborne
c4dcf323cc Add intrinsics for SETEV, GETED, GETET. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137938 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 13:00:48 +00:00
Duncan Sands
10077194ec Remove unused variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137933 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 08:13:18 +00:00
Bill Wendling
a644b33e8b Split out the analysis updating code into a helper function. No intended 
functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137926 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 05:25:23 +00:00
Bruno Cardoso Lopes
24b90e2287 Cleanup vector logical ops in AVX and add use int versions for simple 
v2i64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137919 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 02:11:34 +00:00
Devang Patel
f56ea610ed Dramatically speedup codegen prepare by a) avoiding use of dominator tree and b) doing a separate pass over dbg.value instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137908 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 00:50:51 +00:00
Jim Grosbach
2f815c0b50 Remove extraneous newline from operand print method. PR10569. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137900 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 23:23:07 +00:00
Jim Grosbach
421993f428 Clean up patterns for Thumb1 system instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137897 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 23:08:57 +00:00
Akira Hatanaka
667645f814 Changed definition of EXT and INS per Bruno's comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137892 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:59:46 +00:00
Jim Grosbach
395b453bed Thumb assembly parsing and encoding for B. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137891 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:57:40 +00:00
Devang Patel
f6d3a4c7c4 Do not use DebugInfoFinder. Extract debug info directly from llvm.dbg.cu named mdnode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137890 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:49:38 +00:00
Jim Grosbach
00f5d98205 Thumb assembly parsing and encoding for ASR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137889 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:49:09 +00:00
Eli Friedman
56efe24431 Atomic load/store handling for the passes using memdep (GVN, DSE, memcpyopt). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137888 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:22:24 +00:00
Bruno Cardoso Lopes
0dd80b0d69 Fix PR10688. Add support for spliting 256-bit vector shifts when the 
shift amount is variable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137885 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:12:20 +00:00
Jim Grosbach
c40578250d Tidy up. 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137881 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 21:58:18 +00:00
Bill Wendling
2ac0e6be05 Add the support in code-gen for the landingpad instruction lowering. 
The landingpad instruction is lowered into the EXCEPTIONADDR and EHSELECTION
SDNodes. The information from the landingpad instruction is harvested by the
'AddLandingPadInfo' function. The new EH uses the current EH scheme in the
back-end. This will change once we switch over to the new scheme. (Reviewed by
Jakob!)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137880 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 21:56:44 +00:00
Jim Grosbach
70939ee141 ARM clean up the imm_sr operand class representation. 
Represent the operand value as it will be encoded in the instruction. This
allows removing the specialized encoder and decoder methods entirely. Add
an assembler match class while we're at it to lay groundwork for parsing the
thumb shift instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137879 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 21:51:27 +00:00
Bill Wendling
795cf5efba Disable PRE for landing pads. 
PRE needs the landing pads to have their critical edges split. Doing this for a
landing pad is non-trivial. Abandon the attempt to perform PRE when we come
across a landing pad. (Reviewed by Owen!)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137876 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 21:32:02 +00:00
Bill Wendling
a65a3bc1a1 Revert patch. Forgot a dependent commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137875 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 21:28:05 +00:00
Bill Wendling
4eb2062143 Add the body of 'visitLandingPad'. 
This generates the SDNodes for the new exception handling scheme. It takes the
two values coming from the landingpad instruction and assigns them to the
EXCEPTIONADDR and EHSELECTION nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137873 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 21:25:14 +00:00
Bill Wendling
ab82fd9ff6 Increment the insertion iterator to beyond the landingpad instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137872 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 21:21:31 +00:00
Bill Wendling
0906a7c46c Don't optimize the landing pad exit block. 
One way to exit the loop is through an unwind edge. However, that may involve
splitting the critical edge of the landing pad, which is non-trivial. Prevent
the transformation from rewriting the landing pad exit loop block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137871 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 21:20:43 +00:00
Bill Wendling
490606e613 Assert that we aren't trying to split the critical edge of a landing pad. Doing 
so requires more care than this generic algorithm should handle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137866 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 21:04:05 +00:00
Jim Grosbach
ef3bf64bf8 Fix predicate for imm1_32 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137865 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 21:01:11 +00:00
Jim Grosbach
5a1cd045cd Thumb assembly parsing and encoding for ADR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137864 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 20:37:40 +00:00
Bill Wendling
c9b2a987a2 Revert r137655. There is some question about whether the 'landingpad' 
instruction should be marked as potentially reading and/or writing memory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137863 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 20:36:44 +00:00
Jim Grosbach
4372ca6fe4 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137857 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 19:55:51 +00:00
Jim Grosbach
8884148b8e Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137856 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 19:53:53 +00:00
Bill Wendling
35adbb3e48 Modify for the new EH scheme. 
Things are much saner now. We no longer need to modify the laning pads, because
of the invariants we impose upon them. The only thing DwarfEHPrepare needs to do
is convert the 'resume' instruction into a call to '_Unwind_Resume'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137855 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 19:48:49 +00:00
Eli Friedman
f23d4adbfa Revert r137781; I agree with Duncan's comment that the situation in question is clearly impossible given the current structure of the code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137853 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 19:31:49 +00:00
Akira Hatanaka
511961a44c Add support for half-word unaligned loads and stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137848 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 18:49:18 +00:00
Jordy Rose
008a5f515a Static fields require an out-of-line definition. Fix DynamicLibrary for real. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137844 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 18:38:42 +00:00
Owen Anderson
0aa38ab1fb Be more careful in the Thumb decoder hooks to avoid walking off the end of the OpInfo array. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137838 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 18:14:48 +00:00
Eli Friedman
447f95202a Silly mistake from r137777; restore significant isStructTy() checks. While here, be a bit more defensive 
with unknown instructions.

Fixes PR10687.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137836 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 18:10:43 +00:00
Akira Hatanaka
77b85b6474 Move pattern matching for EXT and INS to post-legalization DAGCombine per Bruno's comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137831 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 17:45:08 +00:00
Owen Anderson
83e3f67fb6 Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment. 
Patch by James Molloy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137830 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 17:44:15 +00:00
Bruno Cardoso Lopes
0e6d230abd Introduce matching patterns for vbroadcast AVX instruction. The idea is to 
match splats in the form (splat (scalar_to_vector (load ...))) whenever
the load can be folded. All the logic and instruction emission is
working but because of PR8156, there are no ways to match loads, cause
they can never be folded for splats. Thus, the tests are XFAILed, but
I've tested and exercised all the logic using a relaxed version for
checking the foldable loads, as if the bug was already fixed. This
should work out of the box once PR8156 gets fixed since MayFoldLoad will
work as expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137810 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 02:29:19 +00:00
Bruno Cardoso Lopes
8a5b262e80 Update comments about vector splat handling in x86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137808 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 02:29:13 +00:00
Bruno Cardoso Lopes
fc0a702128 Now that we have a canonical way to handle 256-bit splats: 
vinsertf128 $1 + vpermilps $0, remove the old code that used to first
do the splat in a 128-bit vector and then insert it into a larger one.
This is better because the handling code gets simpler and also makes a
better room for the upcoming vbroadcast!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137807 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 02:29:10 +00:00
Akira Hatanaka
bb15e117d3 Add support for ext and ins. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137804 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 02:05:42 +00:00
Jordy Rose
f0813ceeaf Unbork Windows build. Thanks, Francois. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137798 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 00:59:50 +00:00
Jordy Rose
0bce85fbfa Use DynamicLibrary instances as a way to get symbols from a specific library. Preparation for upcoming (preliminary) support for plugins for the static analyzer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137791 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 00:29:32 +00:00
Jim Grosbach
89e2aa6afd Thumb ADD(immediate) parsing support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137788 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 23:57:34 +00:00
Owen Anderson
16280308ac Separate out Thumb1 instructions that need an S bit operand from those that do not, for the purposes of decoding them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137787 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 23:45:44 +00:00
Eli Friedman
207634263c Extend the undef ^ undef idiom once more. No testcase: I can't figure out how to actually trigger the codepath in question at the moment, but it might get exposed in the future. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137781 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 22:38:34 +00:00
Jim Grosbach
194bd89829 Thumb parsing diagnostics for low-reg requirements on ADD and MOV. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137779 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 22:20:01 +00:00
Devang Patel
94c7ddb6f5 Until now all debug info MDNodes referred to a root MDNode, a compile unit. This simplified handling of these needs in dwarf writer. However, one side effect of this is that during link time optimization all these MDNodes are _not_ uniqued. In other words there will be N number of MDNodes describing "int", "char" and all other types, which would suddenly grow when each object file starts using libraries like STL. 
MDNodes graph structure such that compiler unit keeps track of important MDNodes and update dwarf writer to process mdnodes top-down instead of bottom up.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137778 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 22:09:43 +00:00
Eli Friedman
054ddf799b A bunch of misc fixes to SCCPSolver::ResolvedUndefsIn, including a fix to stop 
making random bad assumptions about instructions which are not explicitly listed.  

Includes fix for rdar://9956541, a version of "undef ^ undef should return
0 because it's easier than arguing with users".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137777 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 22:06:31 +00:00
Jim Grosbach
00c9a51888 Add missing exit for 'case'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137774 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 21:42:31 +00:00
Jim Grosbach
3912b73c74 Thumb assembly parsing and encoding for ADD(register) instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137759 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 21:34:08 +00:00
Bill Wendling
55fdb4eec0 The resume instruction may throw. Return 'true' in this case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137757 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 21:15:50 +00:00
Jim Grosbach
d54b4e612a Move some logic into a helper function and expand the commentary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137756 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 21:12:37 +00:00
Eli Friedman
1fc291f0d3 Minor bug in SCCP found by inspection. (I don't think it's possible to hit this with a normal pass pipeline, but fixing for completeness.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137755 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 21:12:35 +00:00
Jim Grosbach
47a0d52b69 ARM thumb assembly parsing for arithmetic flag setting instructions. 
Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137746 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 20:45:50 +00:00
Bill Wendling
5b6f42f57e Use the getFirstInsertionPt() method instead of getFirstNonPHI + an 'isa<>' 
check for a LandingPadInst.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137745 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 20:45:24 +00:00
Bill Wendling
d2e103daf8 Add getFirstInsertionPt() method. 
getFirstInsertionPt() returns an iterator to the first insertion point in a
basic block. This is after all PHIs and any other instruction which is required
to be at the top of the basic block (like LandingPadInst).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137744 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 20:42:52 +00:00
Bill Wendling
23b49ba6d5 I think there was some confusion about what I meant. :-) Replacing the comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137743 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 20:41:17 +00:00
Jim Grosbach
1b84cce77f Remove unused Target argument from AsmParser construction methods. 
The argument is unused, and is a layering violation in any case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137735 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 18:33:49 +00:00
Bruno Cardoso Lopes
3b86598cfa Instead of always leaving the work to the generic legalizer when 
there is no support for native 256-bit shuffles, be more smart in some
cases, for example, when you can extract specific 128-bit parts and use
regular 128-bit shuffles for them. Example:

For this shuffle:
  shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32>
                <i32 1, i32 0, i32 7, i32 6>

This was expanded to:
  vextractf128  $1, %ymm1, %xmm2
  vpextrq $0, %xmm2, %rax
  vmovd %rax, %xmm1
  vpextrq $1, %xmm2, %rax
  vmovd %rax, %xmm2
  vpunpcklqdq %xmm1, %xmm2, %xmm1
  vpextrq $0, %xmm0, %rax
  vmovd %rax, %xmm2
  vpextrq $1, %xmm0, %rax
  vmovd %rax, %xmm0
  vpunpcklqdq %xmm2, %xmm0, %xmm0
  vinsertf128 $1, %xmm1, %ymm0, %ymm0
  ret

Now we get:
  vshufpd $1, %xmm0, %xmm0, %xmm0
  vextractf128  $1, %ymm1, %xmm1
  vshufpd $1, %xmm1, %xmm1, %xmm1
  vinsertf128 $1, %xmm1, %ymm0, %ymm0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137733 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 18:21:54 +00:00
Devang Patel
e26a135248 Remove unnecessary version check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137728 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 17:41:41 +00:00
Jim Grosbach
d0d3f7e01f ARM .align NOP padding uses different encoding pre-ARMv6. 
Patch by Kristof Beyls and James Malloy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137723 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 17:06:20 +00:00
Nadav Rotem
6d1f5d951b Revert r137562 because it caused PR10674 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137719 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 14:34:29 +00:00
David Chisnall
7a817eae6c Add a mechanism for optimisation plugins to register passes that all front ends can use without needing to be aware of the plugin (or the plugin be aware of the front end). 
Before 3.0, I'd like to add a mechanism for automatically loading a set of plugins from a config file.  API suggestions welcome...



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137717 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 13:58:41 +00:00
Bill Wendling
05d0023a95 A few places where we want to skip the landingpad instruction for insertion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137712 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 04:52:55 +00:00
Akira Hatanaka
614051a1c5 Fix handling of double precision loads and stores when Mips1 is targeted. 
Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This 
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.

Without the changes made in this patch, llc produces code that has the same 
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137711 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 03:51:51 +00:00
Akira Hatanaka
8957481e6a Define function MipsMCInstLower::LowerOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 02:21:03 +00:00
Akira Hatanaka
78d1b11aa5 Add parameter Offset to MipsMCInstLower::LowerSymbolOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137706 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 02:15:03 +00:00
Eli Friedman
2199dfb0e6 Revert a bit of r137667; the logic in question can safely handle atomic load/store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137702 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 01:28:22 +00:00
Eli Friedman
6437f2c2e2 After talking with Bill, it seems like the LandingPad handling here is likely 
to be wrong (or at least somewhat suspect).  Leave a FIXME for Bill.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137694 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 00:41:37 +00:00
Eli Friedman
33cb445fb6 Minor comment fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137693 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 00:20:11 +00:00
Eli Friedman
8176388d65 Update SimplifyCFG for atomic operations. 
This commit includes a mention of the landingpad instruction, but it's not
changing the behavior around it.  I think the current behavior is correct,
though.  Bill, can you double-check that?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137691 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:59:28 +00:00
Eli Friedman
fd06b3cfa1 Add comments and test for atomic load/store and mem2reg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137690 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:55:52 +00:00
Devang Patel
02e603f87a Refactor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137689 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:47:24 +00:00
Owen Anderson
ef2865a8ea Specify a necessary fixed bit for VLD3DUP, and otherwise rearrange the Thumb2 NEON decoding hooks to bring us closer to correctness. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137686 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:38:54 +00:00
Bruno Cardoso Lopes
8400bfe9fa While I'm here, remove the "_alt" hacks to a series of INSERT_SUBREG and 
also add the AVX versions of the 128-bit patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137685 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:36:51 +00:00
Bruno Cardoso Lopes
1deddbbd56 Reorder declarations of vmovmskp* and also put the necessary AVX 
predicate and TB encoding fields. This fix the encoding for the
attached testcase. This fixes PR10625.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137684 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:36:45 +00:00
Devang Patel
3655a21b15 Continue to hoist uses of getCompileUnit() up. The goal is to get rid of uses of getCompileUnit(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137683 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:36:40 +00:00
Bill Wendling
5e38c473a4 In places where it's using "getFirstNonPHI", skip the landingpad instruction if necessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137679 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:19:54 +00:00
Jim Grosbach
19cb7f491f MCTargetAsmParser target match predicate support. 
Allow a target assembly parser to do context sensitive constraint checking
on a potential instruction match. This will be used, for example, to handle
Thumb2 IT block parsing.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137675 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:03:29 +00:00
Devang Patel
6326a4238d Add a finalize() hook, that'll let DIBuilder construct compile unit lazily. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137673 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:00:00 +00:00
Bill Wendling
6456a62178 Don't sink the instruction to before a landingpad instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137672 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 22:53:05 +00:00
Devang Patel
d30243402b This is somewhat déjà-vu, but avoid using getCompileUnit() as much as possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137668 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 22:24:32 +00:00
Eli Friedman
3d30b435e2 Update inter-procedural optimizations for atomic load/store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137667 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 22:16:46 +00:00
Eli Friedman
cc4a0435b7 Update instcombine for atomic load/store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137664 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 22:09:40 +00:00
Devang Patel
d0b5a5ece4 Refactor. Variables are part of compile unit so let CompileUnit create new variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137663 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 22:04:40 +00:00
Eli Friedman
c869b4397a Add some comments here because the lack of a check for volatile/atomic here is a bit unusual. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137662 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 21:56:39 +00:00
Bruno Cardoso Lopes
50b37c7920 Fix PR10656. It's only profitable to use 128-bit inserts and extracts 
when AVX mode is one. Otherwise is just more work for the type
legalizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137661 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 21:45:54 +00:00
Devang Patel
7a328270be There is no need to maintain a set to keep track of variables that use location expressions. In such cases, AT_location attribute's value will be a label. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137659 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 21:43:21 +00:00
Devang Patel
c890b19226 Fix warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137658 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 21:35:16 +00:00
Devang Patel
ff9dd0ac55 Simplify. Let DbgVariable keep track of variable's DBG_VALUE machine instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137656 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 21:24:36 +00:00
Bill Wendling
9d6070f161 Duncan pointed out that the LandingPadInst might read memory. (It might also 
write to memory.) Marking it as such makes some checks for immobility go away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137655 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 21:14:31 +00:00
Eli Friedman
0455bb89cd Fix llvm::CloneModule to correctly clone globals. Patch per bug report by Simon Moll on llvmdev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137654 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 21:05:06 +00:00
Eli Friedman
e5e771263a Fix predicates methods on Instruction to handle atomic load/store correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137652 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 21:00:18 +00:00
Eli Friedman
667ccf231b Misc analysis passes that need to be aware of atomic load/store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137650 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:54:19 +00:00
Eli Friedman
97671565ff Atomic load/store support in LICM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137648 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:52:09 +00:00
Owen Anderson
c537f3be0c Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM mode. Update tests to reflect this fact. 
Patch by James Molloy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137647 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:51:32 +00:00
Owen Anderson
92be8ab6a4 Remove dead classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137643 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:11:11 +00:00
Bill Wendling
187b1924a4 The "landingpad" instruction will never be "trivially" dead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137642 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:10:51 +00:00
Owen Anderson
5df7ef6cdb Fix incorrect encoding of UMAAL and friends. Patch by James Molloy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137641 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:08:25 +00:00
Devang Patel
5a1a67cd3f Simplify mapping to variable from its abstract variable info. 
When a variable is inlined multiple places, abstract variable keeps name, location, type etc.. info and all other concreate instances of the variable directly refers to abstract variable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137637 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 19:01:20 +00:00
Owen Anderson
305e046e53 Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch by James Molloy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137636 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 19:00:06 +00:00
Owen Anderson
7a2e1770ea Fix problems decoding the to/from-lane NEON memory instructions, and add a comprehensive NEON decoding testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137635 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 18:44:44 +00:00
Devang Patel
a098c506a2 Refactor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137632 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 18:40:16 +00:00
Devang Patel
59bc4093d5 Refactor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137631 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 18:35:42 +00:00
Bill Wendling
06f20ebfcf Don't try to sink the landingpad instruction. It's immobile. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137629 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 18:23:40 +00:00
Bill Wendling
da005e7d20 The landingpad instruction isn't loop-invariant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137628 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 18:22:49 +00:00
Bill Wendling
bc4fcbbc7b Mark the SCC as "might unwind" if we run into a 'resume' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137627 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 18:22:00 +00:00
Bill Wendling
1178fb4701 Skip the insertion iterator past the landingpad instruction if there. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137626 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 18:21:07 +00:00
Devang Patel
6f9d8ffe5e Refactor. Global variables are part of compile unit so let CompileUnit create new global variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137621 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 17:57:41 +00:00
Devang Patel
dbc64af76d Refactor. A subprogram is part of compile unit so let CompileUnit construct new subprogram. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137618 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 17:24:54 +00:00
Jim Grosbach
8757a4c6ab Update comment to reflect MC target machine refactor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137615 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 16:52:24 +00:00
Bill Wendling
fe7a071a19 Add inlining for the new EH scheme. 
This builds off of the current scheme, but instead of llvm.eh.exception and
llvm.eh.selector, it uses the landingpad instruction. And instead of
llvm.eh.resume, it uses the resume instruction.

Because of the invariants in the landing pad instruction, a lot of code that's
currently needed to find the appropriate intrinsic calls for an invoke
instruction won't be needed once we go to the new EH scheme. The "FIXME"s tell
us what to remove after we switch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137576 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-14 08:01:36 +00:00
Nick Lewycky
28b84ff4ce This transform is not safe. Thanks to Eli for pointing that out! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137575 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-14 04:51:49 +00:00
Nick Lewycky
7f0170c197 Don't attempt to add 'nsw' when intermediate instructions had no such guarantee. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137572 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-14 03:41:33 +00:00
Nick Lewycky
daf27ea899 Teach instcombine to preserve the nsw bit by doing an after-the-fact analysis 
when combining add and sub instructions. Patch by Pranav Bhandarkar!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137570 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-14 01:45:19 +00:00
NAKAMURA Takumi
2ed7464c09 EE: Provide the symbol "lseek64" explicitly with <unistd.h> on Linux glibc. 
With libcxx, it seems <unistd.h> would not be provided. Thanks to Ryuta Suzuki.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137567 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-14 00:34:04 +00:00
Nadav Rotem
5cbba01671 Fix PR 10635. When generating integer constants, the constant element type may 
be illegal, even if the requested vector type is legal. Testcase is one of the
disabled ARM tests in the vector-select patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137562 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-13 20:31:45 +00:00
Bob Wilson
7dcd04abe0 Expand VMOVQQQQ pseudo instructions. 
Apparently we never added code to expand these pseudo instructions, and in
over a year, no one has noticed.  Our register allocator must be awesome!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137551 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-13 05:14:55 +00:00
Nick Lewycky
53b2b73643 Remove the last improper use of getGlobalContext() from LLVM. 
This caused a race condition where a thread calls ~LLVMContextImpl which calls
Module::dropAllReferences which calls begin() on an empty ilist that would
create the sentinel, which racily accesses the global context.

This can not be fixed by locking inside createSentinel because the lock would
need to be shared with all users of the global context, including those that
reside outside LLVM's own code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137546 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-13 01:04:44 +00:00
Eli Friedman
f03bb260c9 Move "atomic" and "volatile" designations on instructions after the opcode 
of the instruction.

Note that this change affects the existing non-atomic load and store
instructions; the parser now accepts both forms, and the change is noted
in the release notes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137527 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 22:50:01 +00:00
Jim Grosbach
10342123ad ARM STR_POST_IMM offset encoding fix in load/store optimizer. 
Tidy up the code a bit and push the definition of the value next to the uses
to try to minimize this sort of issue from arising again while I'm at it.

rdar://9945172


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137525 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 22:20:41 +00:00
Bruno Cardoso Lopes
4002d7e1e6 Fix comment! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137521 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 21:54:42 +00:00
Bruno Cardoso Lopes
53cae1362d The VPERM2F128 is a AVX instruction which permutes between two 256-bit 
vectors. It operates on 128-bit elements instead of regular scalar
types. Recognize shuffles that are suitable for VPERM2F128 and teach
the x86 legalizer how to handle them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137519 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 21:48:26 +00:00
Bruno Cardoso Lopes
fa2f4fd9a2 Move code around and add comments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137518 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 21:48:22 +00:00
Akira Hatanaka
5c21c9e78e Define unaligned load and store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137515 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 21:30:06 +00:00
Jim Grosbach
4dfe220ad5 ARM expansion of pre-indexed store pseudos should maintain memoperands. 
Partial fix for rdar://9945172.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137513 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 21:02:34 +00:00
Bill Wendling
746c882538 Add checks for the landingpad instruction's clause values to make sure that 
they're the correct type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137511 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 20:52:25 +00:00
Owen Anderson
0d09499cf3 Fix some remaining issues with decoding ARM-mode memory instructions, and add another batch of tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137502 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 20:36:11 +00:00
Bill Wendling
e6e8826870 Initial commit of the 'landingpad' instruction. 
This implements the 'landingpad' instruction. It's used to indicate that a basic
block is a landing pad. There are several restrictions on its use (see
LangRef.html for more detail). These restrictions allow the exception handling
code to gather the information it needs in a much more sane way.

This patch has the definition, implementation, C interface, parsing, and bitcode
support in it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137501 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 20:24:12 +00:00
Owen Anderson
79628e92e1 Fix decoding of ARM-mode STRH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137499 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 20:02:50 +00:00
Owen Anderson
6368119c25 Specify fixed bit in the LDRBT encoding, which allows us to distinguish it from certain USAT16 encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137494 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 19:41:29 +00:00
Owen Anderson
7cdbf086e4 Fix decoding of pre-indexed stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137487 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 18:12:39 +00:00
Devang Patel
cd9f6c53de Use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137485 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 18:10:19 +00:00
Akira Hatanaka
0285e7d1c1 When constant double 0.0 is lowered, make sure 0 is copied directly from an 
integer register to a floating point register. It is not valid to interpret
the value of a floating pointer register as part of a double precision
floating point value after a single precision floating point computational
or move instruction stores its result to the register.

- In the test case, the following code is generated before this patch is
  applied:
mtc1  $zero, $f2    ; unformatted copy to $f2
mov.s $f0, $f2      ; $f0 is in single format
sdc1  $f12, 0($sp)
mov.s $f1, $f2      ; $f1 is in single format
c.eq.d  $f12, $f0   ; $f0 cannot be interpreted as double

- The following code is generated after this patch is applied:
mtc1  $zero, $f0    ; unformatted copy to $f0
mtc1  $zero, $f1    ; unformatted copy to $f1
c.eq.d  $f12, $f0   ; $f0 can be interpreted as double

Bhanu Chetlapalli and Chris Dearman at MIPS technologies reported this bug and
provided the test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137484 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 18:09:59 +00:00
Chris Lattner
d95f8f6ada add ifdef's to let people easily remove these dead api for testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137483 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 18:08:19 +00:00
Chris Lattner
1bcbf8582e switch to the new struct api. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137482 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 18:07:26 +00:00
Chris Lattner
c4d0e9fbdd switch to the new struct apis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137481 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 18:07:07 +00:00
Chris Lattner
3ebb64946b switch to use the new api for structtypes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137480 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 18:06:37 +00:00
Chris Lattner
8dcfc74af4 forward to the correct constructor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137479 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 18:03:30 +00:00
Devang Patel
2e85b1bfa7 Provide fast path as Jakob suggested. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137478 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 18:01:34 +00:00
Owen Anderson
3f3570a38b Separate decoding for STREXD and LDREXD to make each work better. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137476 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 17:58:32 +00:00
Chris Lattner
f4bbcaabeb add two missing function impls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137470 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 17:43:05 +00:00
Chris Lattner
2c38d65fd9 add new accessors to reflect new terminology in struct types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137468 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 17:31:02 +00:00
Nadav Rotem
c796ae1d68 Revert r137310 because it does not optimize any code on ToT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137466 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 17:15:04 +00:00
Chad Rosier
0871221c25 Whitespace and formatting. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137463 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 16:45:18 +00:00
Duncan Sands
1f6a329f79 Silence a bunch (but not all) "variable written but not read" warnings 
when building with assertions disabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137460 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 14:54:45 +00:00
Benjamin Kramer
0d46ccfc5c MachOWriter: Don't crash on fixups with arithmetic, emit a relocation instead. This matches what as does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137414 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 01:51:29 +00:00
Andrew Trick
32a183c84a findDeadCallerSavedReg fix: Missing NULL terminator in register arrays. 
Fix by Ivan Baev. Sorry I don't have a unit test, but the fix is obvious so I don't want to delay it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137404 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 00:49:19 +00:00
Dan Gohman
126a54f1fa Don't convert objc_autoreleaseReturnValue to objc_autorelease if the result 
is returned through a bitcast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137402 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 00:36:31 +00:00
Dan Gohman
a7f7db2ebd Don't let arbitrary calls disrupt nested retain+release pairs if 
the retains and releases all use the same SSA pointer value.

Also, don't let CFG hazards disrupt nested retain+release pair
optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137399 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 00:26:31 +00:00
Dan Gohman
d8e48c4821 Use an actual reverse-CFG reverse-postorder for the bottom-up traversal, 
rather than plain postorder, so that CFG constructs like single-exit loops
are reliably visited in a sensible order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137398 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 00:24:29 +00:00
Jakob Stoklund Olesen
9b7ff12dd1 Simplify the interference checking code a bit. 
This is possible now that we now longer provide an interface to iterate
the interference overlaps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137397 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 00:22:04 +00:00
Jim Grosbach
857e1a7b3f ARM vector compare to zero instruction assembly parsing support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137389 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 23:51:13 +00:00
Andrew Trick
b1831c6640 Allow loop unrolling to get known trip counts from ScalarEvolution. 
SCEV unrolling can unroll loops with arbitrary induction variables. It
is a prerequisite for -disable-iv-rewrite performance. It is also
easily handles loops of arbitrary structure including multiple exits
and is generally more robust.

This is under a temporary option to avoid affecting default
behavior for the next couple of weeks. It is needed so that I can
checkin unit tests for updateUnloop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137384 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 23:36:16 +00:00
Jakob Stoklund Olesen
8facc7def8 Remove the InterferenceResult class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137381 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:46:06 +00:00
Jakob Stoklund Olesen
fe026e1829 Eliminate the last use of InterferenceResult. 
The Query class now holds two iterators instead of an InterferenceResult
instance. The iterators are used as bookmarks for repeated
collectInterferingVRegs calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137380 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:46:04 +00:00
Akira Hatanaka
9029cf20e1 Enclose directive .cprestore with .set macro and nomacro to silence assembler 
warning. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137378 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:42:31 +00:00
Jim Grosbach
d30970fb6c Remove no-longer-true comments. These are for the assembler, also. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137375 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:30:30 +00:00
Jim Grosbach
342ebd5f38 ARM STRT assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137372 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:18:00 +00:00
Owen Anderson
41ff834e91 Make the USAT16 operand decoder auto-generate-able. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137371 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:10:11 +00:00
Owen Anderson
adf2b094cb Add another accidentally omitted predicate operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137370 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:08:38 +00:00
Owen Anderson
1fb6673bc2 Add missing predicate operand on SMLA and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137368 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:05:38 +00:00
Jim Grosbach
dd32ba337a ARM load shifted register pre-index fix shift value asm parser encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137367 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:05:09 +00:00
Owen Anderson
796d6b7602 Handle new register classes in Thumb2 mode. Should fix the ARM buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137364 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:52:38 +00:00
Owen Anderson
05b0c9f41e Making SEL decodings auto-generate-able. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137363 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:50:56 +00:00
Bruno Cardoso Lopes
ef8d6999f3 Add a dag combine to xform 256-bit shuffles into simple vector 
inserts and extracts. This simple combine makes us generate only 1
instruction instead of 11 in the v8 case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137362 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:50:44 +00:00
Jim Grosbach
89958d50c3 Tidy up comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137359 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:41:59 +00:00
Owen Anderson
cbfc044acd Fix decoding support for STREXD and LDREXD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137356 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:34:58 +00:00
Jakob Stoklund Olesen
9942ba9c0e Remove more dead code. 
collectInterferingVRegs will be the primary function for interference
checks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137354 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:18:34 +00:00
Jim Grosbach
7b8f46cf9e ARM STRH assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137353 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:17:22 +00:00
Dan Gohman
fa7eed1f8e Fix typos in comments, and delete an unused function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137352 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:06:32 +00:00
Akira Hatanaka
1f8d822023 Add isIndirectBranch flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137351 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:05:37 +00:00
Jakob Stoklund Olesen
98985f959c Privatize an unused part of the LiveIntervalUnion::Query interface. 
No clients are iterating over interference overlaps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137350 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:00:42 +00:00
Owen Anderson
508e1d3db5 Fix decoding for indexed STRB and LDRB. Fixes <rdar://problem/9926161>. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137347 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:47:56 +00:00
Jakob Stoklund Olesen
bb688cec09 Remove some dead code. 
The InterferenceResult iterator turned out to be less important than we
thought it would be.  LiveIntervalUnion clients want higher level
information, like the list of interfering virtual registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137346 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:41:41 +00:00
Jim Grosbach
45251b3707 Tidy up. Remove unused template parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137345 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:41:13 +00:00
Owen Anderson
9fe72bcd37 Improve operand validation for Thumb2 addressing modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137344 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:40:40 +00:00
Jim Grosbach
14605d1a67 ARM STRD assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137342 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:28:23 +00:00
Andrew Trick
c12d9b9dfb Fix for LoopInfo::updateUnloop. Remove subloop blocks from former 
ancestor loops.

I have a unit test that depends on scev-unroll, which unfortunately
isn't checked in. But I will check it in when I can.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137341 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:27:32 +00:00
Owen Anderson
26d2f0ac91 Continue to tighten decoding by performing more operand validation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137340 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:21:46 +00:00
Jim Grosbach
ade7d00f5a Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137339 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:13:35 +00:00
Jim Grosbach
10348e70d5 ARM STRBT assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137337 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:04:56 +00:00
Jim Grosbach
548340c4bf ARM STR(immediate) assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137331 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 19:22:40 +00:00
Owen Anderson
71156a6e00 Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137325 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 19:00:18 +00:00
Bruno Cardoso Lopes
59353b436a Fix PR10492 by teaching MOVHLPS and MOVLPS mask matching to be more strict. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137324 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:59:13 +00:00
Owen Anderson
2b7b238e84 Tighten operand decoding of addrmode2 instruction. The offset register cannot be PC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137323 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:55:42 +00:00
Owen Anderson
3dac0bec7e Correct immediate range for shifter operands. Patch by James Molloy, with additional encoding fixes added by me. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137322 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:41:59 +00:00
Benjamin Kramer
0fa5e053a9 Plug a memory leak. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137321 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:39:28 +00:00
Owen Anderson
ae0bc5deaa Improve error checking in the new ARM disassembler. Patch by James Molloy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137320 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:24:51 +00:00
Jim Grosbach
f6713916fb ARM push of a single register encodes as pre-indexed STR. 
Per the ARM ARM, a 'push' of a single register encodes as an STR,
not an STM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:07:11 +00:00
Andrew Trick
5c1ff1f2f2 Cleanup. Another thorough review by Nick! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137317 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 17:54:58 +00:00
Jim Grosbach
f8fce711e8 ARM pop of a single register encodes as post-indexed LDR. 
Per the ARM ARM, a 'pop' of a single register encodes as an LDR,
not an LDM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137316 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 17:35:48 +00:00
Nadav Rotem
6236f7f2b6 Add a comment, per Bruno's CR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137313 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 17:05:47 +00:00
Nadav Rotem
f80a894bf0 [AVX] When joining two XMM registers into a YMM register, make sure that the 
lower XMM register gets in first. This will allow the SUBREG pattern to
elliminate the first vector insertion. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137310 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 16:49:36 +00:00
Nadav Rotem
5e742a3e1b [AVX] If the data which is going to be saved is already in two XMM registers 
(for example, after integer operation), do not pack the registers into a YMM
before saving. Its better to save as two XMM registers.

Before:
                vinsertf128         $1, %xmm3, %ymm0, %ymm3
                vinsertf128         $0, %xmm1, %ymm3, %ymm1
                vmovaps              %ymm1, 416(%rsp)

After:
                vmovaps              %xmm3, 416+16(%rsp)
                vmovaps              %xmm1, 416(%rsp)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137308 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 16:41:21 +00:00
Chris Lattner
f4ea68fa5a fix PR10605 / rdar://9930964 by adding a pretty scary missed check. 
It's somewhat surprising anything works without this.  Before we would
compile the testcase into:

test:                                   # @test
	movl	$4, 8(%rdi)
	movl	8(%rdi), %eax
	orl	%esi, %eax
	cmpl	$32, %edx
	movl	%eax, -4(%rsp)          # 4-byte Spill
	je	.LBB0_2

now we produce:

test:                                   # @test
	movl	8(%rdi), %eax
	movl	$4, 8(%rdi)
	orl	%esi, %eax
	cmpl	$32, %edx
	movl	%eax, -4(%rsp)          # 4-byte Spill
	je	.LBB0_2



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137303 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 06:26:54 +00:00
Bruno Cardoso Lopes
b02c0ace20 Cleanup: Remove Int_ CVTSS2SI* forms 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137297 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 02:52:36 +00:00
Bruno Cardoso Lopes
5f1d8abf75 Splats for v8i32/v8f32 can be handled by VPERMILPSY. This was causing 
infinite recursive calls in legalize. Fix PR10562

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137296 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 02:49:44 +00:00
Bruno Cardoso Lopes
a5134a0ea3 Use the splat index to generate the desired shuffle. Otherwise we 
could only get undefs and the vector shuffle becomes an undef,
generating wrong code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137295 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 02:49:41 +00:00
Eli Friedman
586272d67c Fix X86TargetLowering::LowerExternalSymbol so that it actually works in non-trivial cases. This hasn't been an issue before because the function isn't normally called (but apparently is used to generate a tail-call to sin() on ELF x86-32 with PIC and SSE2). 
Fixes PR9693.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137292 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 01:48:05 +00:00
Devang Patel
5bc942cc3c Stay within 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137283 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 23:58:09 +00:00
Jim Grosbach
59999264e6 ARM LDRT assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137282 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 23:43:54 +00:00
Jim Grosbach
e15defc56c Tidy up. 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137277 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 23:23:47 +00:00
Andrew Trick
fb62b8deb3 Reapplying r136844. 
An algorithm for incrementally updating LoopInfo within a
LoopPassManager. The incremental update should be extremely cheap in
most cases and can be used in places where it's not feasible to
regenerate the entire loop forest.

- "Unloop" is a node in the loop tree whose last backedge has been removed.
- Perform reverse dataflow on the block inside Unloop to propagate the
  nearest loop from the block's successors.
- For reducible CFG, each block in unloop is visited exactly
  once. This is because unloop no longer has a backedge and blocks
  within subloops don't change parents.
- Immediate subloops are summarized by the nearest loop reachable from
  their exits or exits within nested subloops.
- At completion the unloop blocks each have a new parent loop, and
  each immediate subloop has a new parent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137276 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 23:22:57 +00:00
Jim Grosbach
623a454b0f ARM LDRH(immediate) assembly parsing and encoding support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137260 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 22:42:16 +00:00
Jim Grosbach
251bf25e7e ARM LDRD(register) assembly parsing and encoding. 
Add support for literal encoding of #-0 along the way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137254 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 21:56:18 +00:00
Devang Patel
b549bcfe6c Distinguish between two copies of one inlined variable. Take 2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137253 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 21:50:54 +00:00
Devang Patel
c722c3d5ff While extending definition range of a debug variable, consult lexical scopes also. There is no point extending debug variable out side its lexical block. This provides 6x compile time speedup in some cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137250 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 21:25:34 +00:00
Devang Patel
9ce256421a Revert unintentional parts of previous check-in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137249 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 21:16:49 +00:00
Devang Patel
bf47fdb91c Start using LexicalScopes utility. No intetional functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137246 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 20:55:27 +00:00
Jim Grosbach
53642c5335 Fix typo. Not quite sure how that slipped in there. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137245 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 20:49:18 +00:00
Jim Grosbach
2fd2b87ded ARM LDRD(immediate) assembly parsing and encoding support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137244 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 20:29:19 +00:00
Nadav Rotem
614061bfb4 When performing a truncating store, it is sometimes possible to rearrange the 
data in-register prior to saving to memory.  When we reorder the data in memory
we prevent the need to save multiple scalars to memory, making a single regular
store.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137238 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 19:30:14 +00:00
Devang Patel
103b8e653c Provide utility to extract and use lexical scoping information from machine instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137237 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 19:04:06 +00:00
Owen Anderson
8533ebad6f Add initial support for decoding NEON instructions in Thumb2 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137236 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 19:01:10 +00:00
Andrew Trick
7cb3dcb927 Comments. Thanks for the spell check Nick! 
Also, my apologies for spoiling the autocomplete on SimplifyInstructions.cpp. I couldn't think of a better filename.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137229 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 18:07:05 +00:00
Bruno Cardoso Lopes
6ad251358e The following X86 pattern is incorrect: 
def : Pat<(X86Movss VR128:$src1,
                   (bc_v4i32 (v2i64 (load addr:$src2)))),
          (MOVLPSrm VR128:$src1, addr:$src2)>;
This matches a MOVSS dag with a MOVLPS instruction. However, MOVSS will replace only the low 32 bits of the register, while the MOVLPS instruction will replace the low 64 bits. A testcase is added and illustrates the bug and also modified the one that was already present. Patch by Tanya Lattner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137227 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 17:45:17 +00:00
Eli Friedman
1cc5e38830 Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137226 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 17:39:11 +00:00
Owen Anderson
fd9085dca3 Tabs --> spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137225 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 17:38:05 +00:00
Owen Anderson
10cbaab7b7 Cleanups based on Nick Lewycky's feedback. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137224 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 17:36:48 +00:00
Owen Anderson
e66ef2d5f5 Rewrite some ARM InstrInfo functions to be most accepting of arbitrary register subclasses. Hopefully this fixes some buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137223 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 17:21:20 +00:00
Rafael Espindola
f5ade5d39a Add support for the R and Q constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137217 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 16:26:42 +00:00
Bob Wilson
21ab6c066d Clarify a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137204 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 05:02:22 +00:00
Andrew Trick
39f40299a6 Invoke SimplifyIndVar when we partially unroll a loop. Fixes PR10534. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137203 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 04:29:49 +00:00
Andrew Trick
bddb7f8210 Cleanup. Make ScalarEvolution an explicit argument of the 
SimplifyIndVar utility since it is required.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137202 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 04:22:26 +00:00
Andrew Trick
ea23daa446 SimplifyIndVar: make foldIVUser iterative to fold a chain of operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137199 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 04:01:31 +00:00
Benjamin Kramer
4a1a5eb95b Update CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137198 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 03:51:58 +00:00
Andrew Trick
4b4bb71bcd Added a SimplifyIndVar utility to simplify induction variable users 
based on ScalarEvolution without changing the induction variable phis.

This utility is the main tool of IndVarSimplifyPass, but the pass also
restructures induction variables in strange ways that are sensitive to
pass ordering. This provides a way for other loop passes to simplify
new uses of induction variables created during transformation. The
utility may be used by any pass that preserves ScalarEvolution. Soon
LoopUnroll will use it.

The net effect in this checkin is to cleanup the IndVarSimplify pass
by factoring out the SimplifyIndVar algorithm into a standalone utility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137197 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 03:46:27 +00:00
Andrew Trick
2d31ae3d9d Cleanup. Added LoopBlocksDFS::perform for simple clients. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137195 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 01:59:05 +00:00
Bruno Cardoso Lopes
155a92a491 Fix a bug in vpermilps mask checking. Fix PR10560 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137194 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 01:54:17 +00:00
Andrew Trick
b1eede1281 Fix the LoopUnroller to handle nontrivial loops and partial unrolling. 
These are not individual bug fixes. I had to rewrite a good chunk of
the unroller to make it sane. I think it was getting lucky on trivial
completely unrolled loops with no early exits. I included some fairly
simple unit tests for partial unrolling. I didn't do much stress
testing, so it may not be perfect, but should be usable now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137190 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 00:28:10 +00:00
Owen Anderson
33e57515b1 Push GPRnopc through a large number of instruction definitions to tighten operand decoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137189 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-10 00:03:03 +00:00
Jakob Stoklund Olesen
c66d36028b Trim an unneeded header. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137184 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-09 23:49:21 +00:00
Jakob Stoklund Olesen
c70c2cafe1 Promote VMOVS to VMOVD when possible. 
On Cortex-A8, we use the NEON v2f32 instructions for f32 arithmetic. For
better latency, we also send D-register copies down the NEON pipeline by
translating them to vorr instructions.

This patch promotes even S-register copies to D-register copies when
possible so they can also go down the NEON pipeline.  Example:

        vldr.32 s0, LCPI0_0
    loop:
        vorr    d1, d0, d0
    loop2:
        ...
        vadd.f32        d1, d1, d16

The vorr instruction looked like this after regalloc:

    %S2<def> = COPY %S0, %D1<imp-def>

Copies involving odd S-registers, and copies that don't define the full
D-register are left alone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137182 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-09 23:41:44 +00:00
Owen Anderson
de317f40f7 Tighten operand checking of register-shifted-register operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137180 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-09 23:33:27 +00:00
Bruno Cardoso Lopes
d40aa24ebf Add 256-bit support for v8i32, v4i64 and v4f64 ISD::SELECT. Fix PR10556 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137179 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-09 23:27:13 +00:00
Owen Anderson
c36481c474 Tighten operand checking on memory barrier instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137176 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-09 23:25:42 +00:00
NAKAMURA Takumi
77c714027c VMCore/BasicBlock.cpp: Don't assume BasicBlock::iterator might end with a non-PHInode Instruction in successors. 
Frontends(eg. clang) might pass incomplete form of IR, to step off the way beyond iterator end. In the case I had met, it took infinite loop due to meeting bogus PHInode.

Thanks to Jay Foad and John McCall.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137175 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-09 23:13:05 +00:00
NAKAMURA Takumi
8fc9b3db53 Fix whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137174 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-09 23:12:56 +00:00