Eric Christopher
3091719b90
Add test for pinsrd and pinsrb instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76840 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 01:58:04 +00:00
Dan Gohman
608ad24ac3
Revert r75663 (and r76805), as it is causing regressions on powerpc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76823 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 00:09:46 +00:00
Dan Gohman
41d0b9d952
x86 isel tweak: use lea (%reg,%reg) instead of lea (,%reg,2).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 23:26:55 +00:00
Dan Gohman
1c88efff02
Add -march=ppc32 lines so that this test doesn't ever default to ppc64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76805 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 22:08:31 +00:00
Evan Cheng
eadf04992a
Use getTargetConstant instead of getConstant since it's meant as an constant operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76803 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 22:03:29 +00:00
Dan Gohman
784025039f
Make the grep line in this test more specific, to avoid
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unintended matches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76802 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 22:02:42 +00:00
Evan Cheng
1e0c1588b1
Ignore undef uses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76799 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 21:51:42 +00:00
Duncan Sands
ed4b2dc313
Revert commit 76707, it was breaking the llvm-gcc build
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on linux platforms. The binutils assembler does not
recognize the "s" flag, see for example
http://sourceware.org/binutils/docs/as/Section.html
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2009-07-22 10:35:05 +00:00
Chris Lattner
828f704c10
set the ELF "small" flag on objects that end up in .rodata.cst4 consistently,
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updating a mips testcase to expect it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:41:56 +00:00
Evan Cheng
47b1e2afd0
Remove a big test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76669 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 22:52:04 +00:00
Evan Cheng
3ecadc816d
Do not select tSXTB / tSXTH in thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 18:15:26 +00:00
Chris Lattner
74625023a8
convert this test to filecheck format, which is faster and avoids false matches of "st" -> "stdin"
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76591 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:36:24 +00:00
Chris Lattner
99bd8bf8a2
add a testcase for the pic16 section handling stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76579 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 16:48:20 +00:00
Evan Cheng
5d885023fe
Another rewriter bug exposed by recent coalescer changes. ReuseInfo::GetRegForReload() should make sure the "switched" register is in the desired register class. I'm surprised this hasn't caused more failures in the past.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 09:15:00 +00:00
Chris Lattner
634d61b135
remove a very large testcase for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76537 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 06:28:36 +00:00
Evan Cheng
d101a72d79
Fix a dagga combiner bug: avoid creating illegal constant.
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Is this really a winning transformation?
fold (shl (srl x, c1), c2) -> (shl (and x, (shl -1, c1)), (sub c2, c1)) or
(srl (and x, (shl -1, c1)), (sub c1, c2))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76535 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 05:40:15 +00:00
Evan Cheng
af9e7a7c20
Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 00:31:12 +00:00
Evan Cheng
c95be59371
Cross RC coalescing is now on by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76519 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 00:22:59 +00:00
David Greene
76081c4ef7
Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes
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next.
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2009-07-20 22:02:59 +00:00
Evan Cheng
87faa1fc67
Forgot this test earlier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 21:46:42 +00:00
Evan Cheng
33d0474bf5
Use TII->findCommutedOpIndices to find the commute operands (rather than guessing).
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2009-07-20 21:16:08 +00:00
Evan Cheng
753480ad20
Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76458 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 19:47:55 +00:00
Dan Gohman
f241174421
Revert the addition of hasNoPointerOverflow to GEPOperator.
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Getelementptrs that are defined to wrap are virtually useless to
optimization, and getelementptrs that are undefined on any kind
of overflow are too restrictive -- it's difficult to ensure that
all intermediate addresses are within bounds. I'm going to take
a different approach.
Remove a few optimizations that depended on this flag.
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2009-07-20 17:43:30 +00:00
Chris Lattner
401e10c4fb
implement a new magic global "llvm.compiler.used" which is like llvm.used, but
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doesn't cause ".no_dead_strip" to be emitted on darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76399 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 06:14:25 +00:00
Evan Cheng
ba8dc03935
Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb.
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2009-07-20 06:10:07 +00:00
Jakob Stoklund Olesen
45d34fe358
Fix http://llvm.org/bugs/show_bug.cgi?id=4583
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Inline asm instructions may have additional <imp-def,kill> register operands.
These operands are not marked with a flag like the normal asm operands, so we
must not assert that there is a flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76373 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 19:09:59 +00:00
Evan Cheng
438d9900c0
Catch more coalescing opportunities.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76282 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 04:52:23 +00:00
Evan Cheng
5248468473
Enable cross register class coalescing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76281 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 02:10:10 +00:00
Evan Cheng
59959cd966
Fix pr4552. Stack slot coloring with register must take care not to generate illegal ams.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76258 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 22:42:51 +00:00
Evan Cheng
47e9fab158
Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense.
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2009-07-17 22:13:25 +00:00
Chris Lattner
a9af7e626c
rename test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76197 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 18:05:55 +00:00
Eli Friedman
a64eb92fe3
Make promotion in operation legalization for SETCC work correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76153 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 05:16:04 +00:00
Anton Korobeynikov
b8e9ac834a
Emit cross regclass register moves for thumb2.
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Minor code duplication cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 23:26:06 +00:00
Dale Johannesen
423ccfe51d
Assume an inline asm might be a call, so we get
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stack alignment right when it is. This is not
ideal but conservatively correct. Adjust a test
to compensate for changed stack offset value.
gcc.apple/asm-block-57.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76120 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 22:34:45 +00:00
Jakob Stoklund Olesen
57e599a46b
Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.
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The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 20:58:34 +00:00
Evan Cheng
5f15992b77
Changed my mind. We now allow remat of instructions whose defs have subreg indices.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76100 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 20:15:00 +00:00
Evan Cheng
2b48ab947c
With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 18:44:05 +00:00
Anton Korobeynikov
ebfe2b2722
Make xfail proper
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:53:47 +00:00
Anton Korobeynikov
c975180624
Temporary disable 16 bit bswap
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76063 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:35:57 +00:00
Anton Korobeynikov
6ff3f2c710
Add bswap patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:34:52 +00:00
Anton Korobeynikov
54681eca69
Fix logic inversion for RI-mode address selection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:31:14 +00:00
Anton Korobeynikov
9419a0d13d
Unbreak the test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:30:49 +00:00
Anton Korobeynikov
bb8a04806d
Expand 32-bit bitconverts via memory
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:30:29 +00:00
Anton Korobeynikov
f2fd8ea1c9
Fix incomin arg stack frame offset in case we need to generate stack frame
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:29:57 +00:00
Anton Korobeynikov
5dd38de2c2
Revert the commit, it just hides the real bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:28:26 +00:00
Anton Korobeynikov
75eef89ddb
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:41 +00:00
Anton Korobeynikov
8bd0db7615
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:18:17 +00:00
Anton Korobeynikov
6fe326c713
Implement 'large' PIC model
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:16:05 +00:00
Anton Korobeynikov
48e8b3cc58
Implement shifts properly (hopefilly - finally!)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76005 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:15:24 +00:00
Anton Korobeynikov
0a42d2b437
Properly handle divides. As a bonus - implement memory versions of them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76003 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:14:33 +00:00
Anton Korobeynikov
014d4639d8
32 bit shifts have only 12 bit displacements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76000 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:13:24 +00:00
Anton Korobeynikov
1ed1e3ecd4
Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75990 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:10:17 +00:00
Anton Korobeynikov
720e3b00b8
Add support for 12 bit displacements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:09:35 +00:00
Anton Korobeynikov
980d5503c3
Emit proper lowering of load from arg stack slot
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:08:42 +00:00
Anton Korobeynikov
c772c4408e
Implement dynamic allocas
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75985 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:08:15 +00:00
Anton Korobeynikov
c16cdc5de7
Add jump tables
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:07:50 +00:00
Anton Korobeynikov
759205d1ac
Add rotates
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2009-07-16 14:06:49 +00:00
Anton Korobeynikov
cfca8b1f62
Add patterns for integer negate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:27 +00:00
Anton Korobeynikov
8c993e1632
Provide proper patterns for and with imm instructions. Tune the tests accordingly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:00 +00:00
Anton Korobeynikov
25af73303f
Add 32 bit and reg-imm and disable invalid patterns for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:05:32 +00:00
Anton Korobeynikov
747052c1a5
Add z9 and z10 target processors. Mark z10-only instructions as such.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75977 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:05:00 +00:00
Anton Korobeynikov
22836d1b31
Proper lower 'small' results
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:58:24 +00:00
Anton Korobeynikov
eb68f1c661
Completel forgot about unconditional branches
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75961 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:57:52 +00:00
Anton Korobeynikov
bad769f11a
Lower addresses of globals
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75960 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:57:27 +00:00
Anton Korobeynikov
ed1a6d4cad
Test (incomplete) for easy muls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75959 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:57:03 +00:00
Anton Korobeynikov
8d1837d9be
Provide "wide" muls and divs/rems
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75958 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:56:42 +00:00
Anton Korobeynikov
ecf22d5bdc
Tests for cmp / br_cc / select_cc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75949 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:53:15 +00:00
Anton Korobeynikov
ef5decab53
Emit callee-saved regs spills / restores
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2009-07-16 13:51:12 +00:00
Anton Korobeynikov
ba249e41f3
Some preliminary call lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75941 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:50:21 +00:00
Anton Korobeynikov
3c98c616c5
Prologue / epilogue emission
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:49:49 +00:00
Anton Korobeynikov
51f613fb2b
Add simple frame index elimination
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2009-07-16 13:49:25 +00:00
Anton Korobeynikov
81c0325cdf
Provide proper test :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75938 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:48:59 +00:00
Anton Korobeynikov
711d5b68e0
Add address computation stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75935 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:47:59 +00:00
Anton Korobeynikov
c8301d17a8
Add mem-imm stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75933 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:47:14 +00:00
Anton Korobeynikov
961bb6f430
Add stores and truncstores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75931 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:45:00 +00:00
Anton Korobeynikov
dc28955b3f
Add patterns for various extloads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75930 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:44:30 +00:00
Anton Korobeynikov
9e4816e09f
Add shifts and reg-imm address matching
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75927 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:43:18 +00:00
Anton Korobeynikov
a51752cbea
Add bunch of 32-bit patterns... Uffff :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75926 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:42:31 +00:00
Anton Korobeynikov
da308c9a67
Add bunch of reg-imm movs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75921 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:34:50 +00:00
Anton Korobeynikov
89edcd0927
Provide masked reg-imm 'or' and 'and'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:33:57 +00:00
Anton Korobeynikov
c79629536a
Fix test running lines
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75918 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:33:21 +00:00
Anton Korobeynikov
e6220fb230
Add reg-reg and pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:32:49 +00:00
Anton Korobeynikov
bdc9081693
Add sub reg-reg pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75916 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:32:16 +00:00
Anton Korobeynikov
b573f99ab7
Add xor reg-reg pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75915 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:31:28 +00:00
Anton Korobeynikov
26ba0b1ec5
Add or reg-reg pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75914 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:30:53 +00:00
Anton Korobeynikov
0676d2887a
Add add reg-reg and reg-imm patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75913 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:30:15 +00:00
Anton Korobeynikov
1cc9dc7267
Add simple reg-reg and reg-imm moves
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75912 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:29:38 +00:00
Anton Korobeynikov
87a24e3ee4
Minimal lowering for formal_arguments / ret
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75911 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:28:59 +00:00
Anton Korobeynikov
b24f97dd74
Add testsuite dir for systemz stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75910 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:28:22 +00:00
Richard Osborne
db9e697725
Combine an unaligned store of unaligned load into a memmove.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75908 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 12:50:48 +00:00
Richard Osborne
ccb7e96ef0
Expand unaligned 32 bit loads from an address which is a constant
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offset from a 32 bit aligned base as follows:
ldw low, base[offset >> 2]
ldw high, base[(offset >> 2) + 1]
shr low_shifted, low, (offset & 0x3) * 8
shl high_shifted, high, 32 - (offset & 0x3) * 8
or result, low_shifted, high_shifted
Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75902 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 10:42:35 +00:00
Richard Osborne
7f47ce9662
Custom lower unaligned 32 bit stores and loads into libcalls. This is
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a big code size win since before they were expanding to upto 16
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75901 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 10:21:18 +00:00
Evan Cheng
378445303b
Let callers decide the sub-register index on the def operand of rematerialized instructions.
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Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 09:20:10 +00:00
Evan Cheng
a499effd3b
ShortenDeadCopySrcLiveRange needs to be more conservative in multi-kill situations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75838 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 21:39:50 +00:00
Richard Osborne
1d05b237a5
Fix pattern for LD16S_3r, add basic tests to check load / store instructions
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are being properly selected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75797 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 17:06:59 +00:00
Richard Osborne
3af282f16a
Fix XCoreTargetLowering::isLegalAddressingMode to handle non simple VTs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75788 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 15:46:56 +00:00
Chris Lattner
4fb63d088b
fix an arm codegen bug (the same as PR4482 on ppc) where available_externally
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symbols were not getting stubs. While I'm at it, add a big testcase for
stub generation to make sure I don't break anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 04:12:33 +00:00
Chris Lattner
392db3e11d
get the PPC stub temporary label from the mangler instead of
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using horrible string hacking. This gives us a different label,
but it's just an assembler temporary, so the name doesn't matter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75733 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 02:56:53 +00:00
Chris Lattner
a9aa3523bf
convert this to filecheck style and make it a test of darwin/PPC's
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extremely elaborate pic/nopic stubs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75726 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 01:43:31 +00:00
Chris Lattner
0bc26723c5
simplify this test to test the esentials.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75725 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 01:32:33 +00:00