Chris Lattner
42edd31209
Initial checkin of the 32-bit PPC relocation types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18141 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:57:38 +00:00
Chris Lattner
e4fce6f19c
Move JITInfo from PPCTM to PPC32TM
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18140 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:56:40 +00:00
Chris Lattner
942d7b5a68
Do not provide the non-specialized PowerPCJITInfo object, it is pretty useless.
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Instead, let derived classes provide specialized ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18139 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:55:38 +00:00
Chris Lattner
6540c6c344
LA is really addi. Be consistent with operand ordering to avoid confusing the code emitter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18138 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:54:25 +00:00
Chris Lattner
f2190b39d0
Remove some dead code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18136 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-22 23:07:22 +00:00
Chris Lattner
dd99885da3
Comment out a couple of unused instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18135 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-22 23:07:01 +00:00
Chris Lattner
213c969c92
Disable this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18130 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-22 21:51:40 +00:00
Chris Lattner
99b394db15
This chunk of code needs to be rewritten
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18127 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-22 21:45:54 +00:00
Nate Begeman
486ebfd704
Fix Shootout-C++/wc, which was broken by my recent changes to emit fewer
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reg-reg copies. The necessary conditions for this bug are a GEP that is
used outside the basic block in which it is defined, whose components
other than the pointer are all constant zero, and where the use is
selected before the definition (backwards branch to successsor block).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18084 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-21 05:14:06 +00:00
Chris Lattner
cdc79e3763
ignore generated files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18072 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-21 00:00:54 +00:00
Chris Lattner
1deb74d7ee
Remove this method, it's not clear how it could be implemented indep of 32 or 64-bit mode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18038 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 04:17:17 +00:00
Chris Lattner
a8b0fa5172
getJITStubForFunction is optional and unimplemented, just remove it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18036 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 04:14:44 +00:00
Nate Begeman
bc3a5378d0
Eliminate another 6k register copies that the register allocator would just
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coalesce out of hbd. Speeds up compilation by 2% (0.6s)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17987 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-19 08:01:16 +00:00
Nate Begeman
8531f6f42a
Generate fewer reg-reg copies for the register allocator to deal with.
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This eliminates over 2000 in hbd alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17973 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-19 02:06:40 +00:00
Nate Begeman
db869aad8c
Eliminate another common source of moves that the register allocator
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shouldn't be forced to coalesce for us: folded GEP operations. This too
fires thousands of times across the testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17947 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-18 07:22:46 +00:00
Nate Begeman
1f5308e5b5
When accessing the base register for global variables, use the register
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directly rather than making a copy for the register allocator to coalesce.
This kills thousands of live intervals across the testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17946 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-18 06:51:29 +00:00
Nate Begeman
0113638073
Clean up and fix cast codegen by removing cases that are handled elsewhere,
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and properly emitting signed short to unsigned int. This fixes the last
regression vs. the CBE, MultiSource/Applications/hbd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17942 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-18 04:56:53 +00:00
Chris Lattner
eea9b134fc
Simplify namespaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17870 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-16 04:47:33 +00:00
Misha Brukman
145a5a3746
Add BCTR and LWZU instruction opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17851 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-15 21:20:09 +00:00
Misha Brukman
3a8a42a9b4
Handle GhostLinkage (should not ever reach the assembly printing stage!)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17749 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-14 21:03:30 +00:00
Misha Brukman
fc256599b3
Fix build on Linux/PowerPC64 using SuSE GCC (#undef PPC)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17744 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-14 20:34:01 +00:00
Nate Begeman
a591457857
Allow hbd to be bugpointable on darwin by fixing common and linkonce codegen
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17637 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-09 04:01:18 +00:00
Nate Begeman
676dee6ae9
Put int the getReg cast optimization from x86 so that we generate fewer
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move instructions for the register allocator to coalesce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17608 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-08 02:25:40 +00:00
Nate Begeman
075cdc655e
Disable bogus cast elimination when the cast is used by a setcc instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17583 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-07 20:23:42 +00:00
Nate Begeman
28dd2fc240
Thanks to sabre for pointing out that we were incorrectly codegen'ing
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int test(int x) { return 32768 - x; }
Fixed by teaching the function that checks a constant's validity to be used
as an immediate argument about subtract-from instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17476 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-04 19:43:18 +00:00
Reid Spencer
6cb21d443e
Change Library Names Not To Conflict With Others When Installed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17286 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-27 23:18:45 +00:00
Nate Begeman
17304c393e
Remove file that is no longer used, and move include of MRegisterInfo.h
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from PowerPCFrameInfo.h to PowerPCAsmPrinter.cpp where it is actually
needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17244 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26 06:02:38 +00:00
Nate Begeman
dfd0e7bc34
Eliminate usage of MRegisterInfo::getRegClass(physreg)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17240 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26 05:40:45 +00:00
Nate Begeman
4a0de07e78
Update to-do list
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17235 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26 04:10:53 +00:00
Nate Begeman
9b508c3619
Fix treecc. Also fix a latent bug in emitBinaryConstOperation that would
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allow and const, 0 to be incorrectly codegen'd into a rlwinm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17234 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26 03:48:25 +00:00
Chris Lattner
097714b319
Disable the JIT until it can sorta kinda work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17230 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-25 20:53:41 +00:00
Nate Begeman
905a29152f
Implement more complete and correct codegen for bitfield inserts, as tested
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by the recently committed rlwimi.ll test file. Also commit initial code
for bitfield extract, although it is turned off until fully debugged.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17207 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-24 10:33:30 +00:00
Misha Brukman
d4b4a99587
* Correctly handle the MovePCtoLR pseudo-instr with a bl to next instr
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* Stop the confusion of using rv and Addr for global addresses: just use rv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17195 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 23:47:34 +00:00
Misha Brukman
40a55e1e29
Add BA, BL, and BLA opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17193 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 20:29:24 +00:00
Misha Brukman
a4df350ba1
* Do not emit IMPLICIT_DEF pseudo-instructions
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* Convert register numbers from their opcode value to the real value, e.g.
PPC::R1 => 1 and PPC::F1 => 1
* Add correct handling of loading of global values which are PC-relative --
implement ha16() and lo16()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17190 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 18:28:01 +00:00
Misha Brukman
bd7780bc60
DForm_1, particularly used by store instructions, needs the immediate operand to
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be listed second as that is how the instructions are usually created (and is the
correct asm syntax) so that it's assembled correctly from its constituents
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17183 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 06:08:38 +00:00
Misha Brukman
da8d96d1a1
Fix the SPR field for MTLR, MFLR, MTCTR, and MFCTR instructions.
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The decimal value given in the manual (8 or 9) really needs to be multiplied by
a factor of 32 because of the group of 5 zero bits after the register code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17182 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 06:05:49 +00:00
Misha Brukman
15f74b3f4f
The value of the XO field for MFLR and MFCTR is 339, not 399
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17181 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 05:38:55 +00:00
Misha Brukman
bb48249414
Remove extraneous blank line
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17180 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 04:59:22 +00:00
Misha Brukman
3a060e5279
Align function arguments in function headers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17178 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 04:58:32 +00:00
Nate Begeman
31dfc52b81
Kill casts from integer types to unsigned byte, when the cast was only used
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as the shift amount operand to a shift instruction. This was causing us to
emit unnecessary clear operations for code such as:
int foo(int x) { return 1 << x; }
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17175 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 00:50:23 +00:00
Reid Spencer
8c2c3152d6
Adjust to changes in Makefile.rules
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17167 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-22 21:02:08 +00:00
Reid Spencer
cac731ecbe
We won't use automake
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17155 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-22 03:35:04 +00:00
Misha Brukman
9691a898c7
Remove debug code emitter from the JIT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17151 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-21 03:07:38 +00:00
Alkis Evlogimenos
4f9a6c30a2
Make this compile.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17150 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-21 02:44:16 +00:00
Misha Brukman
3070e2ff79
* Added basic support for JITing functions, basic blocks, instruction encoding,
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including registers, constants, and partial support for global addresses
* The JIT is disabled by default to allow building llvm-gcc, which wants to test
running programs during configure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17149 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-21 01:42:02 +00:00
Nate Begeman
0797d4905a
Don't clear or sign extend bool->int. This fires a few dozen times on the test suite
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17147 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-20 21:55:41 +00:00
Reid Spencer
86d341b204
Initial automake generated Makefile template
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17136 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-18 23:55:41 +00:00
Nate Begeman
fcf4a42cdf
Generate correct stubs for weak-linked symbols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17101 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 23:01:34 +00:00
Reid Spencer
761920301d
PPC32GenCodeEmitter instead of PowerPCGenCodeEmitter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17087 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 14:59:38 +00:00
Nate Begeman
1b75022cd3
Implement bitfield insert by recognizing the following pattern:
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1. optional shift left
2. and x, immX
3. and y, immY
4. or z, x, y
==> rlwimi z, x, y, shift, mask begin, mask end
where immX == ~immY and immX is a run of set bits. This transformation
fires 32 times on voronoi, once on espresso, and probably several
dozen times on external benchmarks such as gcc.
To put this in terms of actual code generated for
struct B { unsigned a : 3; unsigned b : 2; };
void storeA (struct B *b, int v) { b->a = v;}
void storeB (struct B *b, int v) { b->b = v;}
Old:
_storeA:
rlwinm r2, r4, 0, 29, 31
lwz r4, 0(r3)
rlwinm r4, r4, 0, 0, 28
or r2, r4, r2
stw r2, 0(r3)
blr
_storeB:
rlwinm r2, r4, 3, 0, 28
rlwinm r2, r2, 0, 27, 28
lwz r4, 0(r3)
rlwinm r4, r4, 0, 29, 26
or r2, r2, r4
stw r2, 0(r3)
blr
New:
_storeA:
lwz r2, 0(r3)
rlwimi r2, r4, 0, 29, 31
stw r2, 0(r3)
blr
_storeB:
lwz r2, 0(r3)
rlwimi r2, r4, 3, 27, 28
stw r2, 0(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17078 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 05:19:20 +00:00
Nate Begeman
2d4c98d79b
Finally fix one of the oldest FIXMEs in the PowerPC backend: correctly
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flag rotate left word immediate then mask insert (rlwimi) as a two-address
instruction, and update the ISel usage of the instruction accordingly.
This will allow us to properly schedule rlwimi, and use it to efficiently
codegen bitfield operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17068 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-16 20:43:38 +00:00
Chris Lattner
289a49ab7d
ADd support for undef and unreachable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17050 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-16 18:13:47 +00:00
Nate Begeman
e0c83a86b0
Better codegen of binary integer ops with 32 bit immediate operands.
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This transformation fires a few dozen times across the testsuite.
For example, int test2(int X) { return X ^ 0x0FF00FF0; }
Old:
_test2:
lis r2, 4080
ori r2, r2, 4080
xor r3, r3, r2
blr
New:
_test2:
xoris r3, r3, 4080
xori r3, r3, 4080
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17004 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 00:50:19 +00:00
Misha Brukman
c982cfad87
* Claim to support machine code emission - return false from
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addPassesToEmitMachineCode()
* Add support for registers and constants in getMachineOpValue()
This enables running "int main() { ret 0 }" via the PowerPC JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16983 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 06:39:56 +00:00
Misha Brukman
d37faba5b4
* Include the real (generated) version of getBinaryCodeForInstr()
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* Add implementation of getMachineOpValue() for generated code emitter
* Convert assert()s in unimplemented functions to abort()s so that non-debug
builds fail predictably
* Add file header comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16981 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 06:07:25 +00:00
Misha Brukman
bab2adf496
* Make a PPC32-specific code emitter because we have separate classes for 32-
...
and 64-bit code emitters that cannot share code unless we use virtual
functions
* Identify components being built by tablegen with more detail by assigning them
to PowerPC, PPC32, or PPC64 more specifically; also avoids seeing 'building
PowerPC XYZ' messages twice, where one is for PPC32 and one for PPC64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16980 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 06:04:56 +00:00
Misha Brukman
a671f3b1d4
There is only one field in an instruction, and that is `Inst', the final view of
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the instruction binary format, all others are simply operands and should not
have the `field' label
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16978 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 05:55:37 +00:00
Misha Brukman
315d3341fd
PowerPC instruction definitions use LittleEndian-style encoding [0..31]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16977 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 05:54:38 +00:00
Reid Spencer
d96cb6eaa0
Update to reflect changes in Makefile rules.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16950 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-13 11:46:52 +00:00
Reid Spencer
81f76b324e
Initial version of automake Makefile.am file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16893 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-10 22:20:40 +00:00
Chris Lattner
cbb9812d0d
bling bling!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16873 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-10 16:26:13 +00:00
Nate Begeman
bdf69847a9
Implement logical and with an immediate that consists of a contiguous block
...
of one or more 1 bits (may wrap from least significant bit to most
significant bit) as the rlwinm rather than andi., andis., or some longer
instructons sequence.
int andn4(int z) { return z & -4; }
int clearhi(int z) { return z & 0x0000FFFF; }
int clearlo(int z) { return z & 0xFFFF0000; }
int clearmid(int z) { return z & 0x00FFFF00; }
int clearwrap(int z) { return z & 0xFF0000FF; }
_andn4:
rlwinm r3, r3, 0, 0, 29
blr
_clearhi:
rlwinm r3, r3, 0, 16, 31
blr
_clearlo:
rlwinm r3, r3, 0, 0, 15
blr
_clearmid:
rlwinm r3, r3, 0, 8, 23
blr
_clearwrap:
rlwinm r3, r3, 0, 24, 7
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16832 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-08 02:49:24 +00:00
Nate Begeman
b816f0298d
Several fixes and enhancements to the PPC32 backend.
...
1. Fix an illegal argument to getClassB when deciding whether or not to
sign extend a byte load.
2. Initial addition of isLoad and isStore flags to the instruction .td file
for eventual use in a scheduler.
3. Rewrite of how constants are handled in emitSimpleBinaryOperation so
that we can emit the PowerPC shifted immediate instructions far more
often. This allows us to emit the following code:
int foo(int x) { return x | 0x00F0000; }
_foo:
.LBB_foo_0: ; entry
; IMPLICIT_DEF
oris r3, r3, 15
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16826 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-07 22:30:03 +00:00
Nate Begeman
cb90de37a7
Add ori reg, reg, 0 as a move instruction. This can be generated from
...
loading a 32bit constant into a register whose low halfword is all zeroes.
We now omit the ori after the lis for the following C code:
int bar(int y) { return y * 0x00F0000; }
_bar:
.LBB_bar_0: ; entry
; IMPLICIT_DEF
lis r2, 15
mullw r3, r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16825 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-07 22:26:12 +00:00
Nate Begeman
5a181c848b
Remove unnecessary header include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16824 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-07 22:24:32 +00:00
Chris Lattner
7c348e1c9f
Correct some typeos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16770 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 16:28:24 +00:00
Nate Begeman
35b020df39
Turning on fsel code gen now that we can do so would be good.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16765 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 11:03:30 +00:00
Nate Begeman
087d5d92f1
Implement floating point select for lt, gt, le, ge using the powerpc fsel
...
instruction.
Now, rather than emitting the following loop out of bisect:
.LBB_main_19: ; no_exit.0.i
rlwinm r3, r2, 3, 0, 28
lfdx f1, r3, r27
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
fsub f2, f2, f1
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
fcmpu cr0, f1, f4
bge .LBB_main_64 ; no_exit.0.i
.LBB_main_63: ; no_exit.0.i
b .LBB_main_65 ; no_exit.0.i
.LBB_main_64: ; no_exit.0.i
fmr f2, f1
.LBB_main_65: ; no_exit.0.i
addi r3, r2, 1
rlwinm r3, r3, 3, 0, 28
lfdx f1, r3, r27
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
fsub f4, f4, f1
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f5, lo16(.CPI_main_1-"L00000$pb")(r3)
fcmpu cr0, f1, f5
bge .LBB_main_67 ; no_exit.0.i
.LBB_main_66: ; no_exit.0.i
b .LBB_main_68 ; no_exit.0.i
.LBB_main_67: ; no_exit.0.i
fmr f4, f1
.LBB_main_68: ; no_exit.0.i
fadd f1, f2, f4
addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
fmul f1, f1, f2
rlwinm r3, r2, 3, 0, 28
lfdx f2, r3, r28
fadd f4, f2, f1
fcmpu cr0, f4, f0
bgt .LBB_main_70 ; no_exit.0.i
.LBB_main_69: ; no_exit.0.i
b .LBB_main_71 ; no_exit.0.i
.LBB_main_70: ; no_exit.0.i
fmr f0, f4
.LBB_main_71: ; no_exit.0.i
fsub f1, f2, f1
addi r2, r2, -1
fcmpu cr0, f1, f3
blt .LBB_main_73 ; no_exit.0.i
.LBB_main_72: ; no_exit.0.i
b .LBB_main_74 ; no_exit.0.i
.LBB_main_73: ; no_exit.0.i
fmr f3, f1
.LBB_main_74: ; no_exit.0.i
cmpwi cr0, r2, -1
fmr f16, f0
fmr f17, f3
bgt .LBB_main_19 ; no_exit.0.i
We emit this instead:
.LBB_main_19: ; no_exit.0.i
rlwinm r3, r2, 3, 0, 28
lfdx f1, r3, r27
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
fsub f2, f2, f1
fsel f1, f1, f1, f2
addi r3, r2, 1
rlwinm r3, r3, 3, 0, 28
lfdx f2, r3, r27
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
fsub f4, f4, f2
fsel f2, f2, f2, f4
fadd f1, f1, f2
addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
fmul f1, f1, f2
rlwinm r3, r2, 3, 0, 28
lfdx f2, r3, r28
fadd f4, f2, f1
fsub f5, f0, f4
fsel f0, f5, f0, f4
fsub f1, f2, f1
addi r2, r2, -1
fsub f2, f1, f3
fsel f3, f2, f3, f1
cmpwi cr0, r2, -1
fmr f16, f0
fmr f17, f3
bgt .LBB_main_19 ; no_exit.0.i
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16764 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 09:53:04 +00:00
Nate Begeman
1f49e868aa
Generate better code by being far less clever when it comes to the select instruction. Don't create overlapping register lifetimes
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16580 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-29 05:00:31 +00:00
Nate Begeman
1b99fd3e8a
improve Type::BoolTy codegen by eliminating unnecessary clears and sign extends
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16578 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-29 03:45:33 +00:00
Nate Begeman
a41fc77ae4
To go along with sabre's improved InstCombining, improve recognition of
...
integers that we can use as immediate values in instructions.
Example from yacr2:
- lis r10, -1
- ori r10, r10, 65535
- add r28, r28, r10
+ addi r28, r28, -1
addi r7, r7, 1
addi r9, r9, 1
b .LBB_main_9 ; loopentry.1.i214
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16566 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-29 02:35:05 +00:00
Nate Begeman
da721e74f8
Correct some BuildMI arguments for the upcoming simple scheduler
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16519 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-27 05:08:17 +00:00
Nate Begeman
645495d2e6
Fix the last of the major PPC GEP folding deficiencies. This will allow
...
the ISel to use indexed and non-zero immediate offsets for GEPs that have
more than one use. This is common for instruction sequences such as a load
followed by a modify and store to the same address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16493 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-23 05:31:33 +00:00
Nate Begeman
a2de102a5b
add optimized code sequences for setcc x, 0
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16478 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-22 04:40:25 +00:00
Misha Brukman
540c82a700
s/ISel/PPC64ISel/ to have unique class names for debugging via gdb because the
...
C++ front-end in gcc does not mangle classes in anonymous namespaces correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16471 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-21 18:22:33 +00:00
Misha Brukman
a1dca55a3a
s/ISel/PPC32ISel/ to have unique class names for debugging via gdb because the
...
C++ front-end in gcc does not mangle classes in anonymous namespaces correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16470 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-21 18:22:19 +00:00
Chris Lattner
b228657acc
Revamp the Register class, and allow the use of the RegisterGroup class to
...
specify aliases directly in register definitions.
Patch contributed by Jason Eckhardt!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16330 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-14 04:17:02 +00:00
Nate Begeman
20136a21ba
Add 64 bit divide instructions, and use them
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16198 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-06 18:46:59 +00:00
Misha Brukman
3e0b51ab3b
* Change PPC32AsmPrinter => PowerPCAsmPrinter since it is now shared between
...
Darwin and AIX and is not 32- or 64-bit specific
* Bring back PowerPC.td as a result, to make it use the `PowerPC' class name
* Adjust Makefile accordingly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16174 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-05 02:42:44 +00:00
Misha Brukman
b986b7de50
Renamed PPC32AsmPrinter.cpp => PowerPCAsmPrinter.cpp as the Darwin and AIX asm
...
printers are now unified into one file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16173 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-05 02:27:37 +00:00
Nate Begeman
a11c2e8fb9
Include MathExtras.h to fix build breakage, thanks to Vladimir
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16164 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-04 14:51:26 +00:00
Nate Begeman
ed42853be1
All PPC instructions are now auto-printed
...
32 and 64 bit AsmWriters unified
Darwin and AIX specific features of AsmWriter split out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16163 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-04 05:00:00 +00:00
Nate Begeman
b7a8f2cdaa
Convert remaining X-Form and Pseudo instructions over to asm writer
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16142 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-02 08:13:00 +00:00
Reid Spencer
551ccae044
Changes For Bug 352
...
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-01 22:55:40 +00:00
Nate Begeman
cc8bd9ca7c
convert M and MD form instructions to generated asm writer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16121 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-31 02:28:08 +00:00
Nate Begeman
07aada8b0f
Move yet more instructions over to being printed by the generated asm writer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16112 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-30 02:28:06 +00:00
Nate Begeman
6b3dc55ef8
Convert A-Form instructions to auto-generated asm writer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16107 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-29 22:45:13 +00:00
Nate Begeman
d332fd54f5
Improvements to int->float cast code for PPC-64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16105 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-29 22:02:43 +00:00
Nate Begeman
f2f0781a10
Implement the following missing functionality in the PPC backend:
...
cast fp->bool
cast ulong->fp
algebraic right shift long by non-constant value
These changes tested across most of the test suite. Fixes Regression/casts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16081 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-29 08:19:32 +00:00
Nate Begeman
5709998993
Register sizes are in bits, not bytes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16070 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-27 04:28:10 +00:00
Nate Begeman
0e5e5f56bd
Kill a majority of unnecessary sign extensions for byte loads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15991 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-22 08:10:15 +00:00
Nate Begeman
1f4a132599
Don't hard code the offset of the saved R31 in functions with frame pointers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15990 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-22 08:09:17 +00:00
Nate Begeman
a96c4af7f1
Back out branchless SetCC code. While it helped a lot in some cases, it
...
hurt a lot in others. Instead, improve branching version of SetCC and
Select instructions. The old code will be in CVS should we ever need to
dig it up again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15979 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:42:14 +00:00
Chris Lattner
608034ec1a
Switch from bytes to bits for alignment.
...
Also, change GPRC for PPC32 to align on 32-bit boundary instead of 64-bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15975 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:14:40 +00:00
Chris Lattner
8edcd84653
Reduce uses of getRegClass
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15968 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 19:51:17 +00:00
Chris Lattner
12585baf1a
Fix warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15964 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 19:11:03 +00:00
Nate Begeman
c3306120cc
Move XForm instructions over to the auto-generated asm writer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15962 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 05:56:39 +00:00
Nate Begeman
b65eadb7f5
remove some things from the todo list.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15956 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-20 18:46:54 +00:00
Chris Lattner
f908888553
Do not register ppc64 yet, as it breaks the SparcV9 backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15955 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-20 18:09:18 +00:00
Nate Begeman
b47321ba2b
Implement code to convert SetCC into straight line code where appropriate. Add necessary instructions for this transformation to the .td file.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15952 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-20 09:56:22 +00:00
Misha Brukman
43f20a56b2
Fix opcodes being printed in caps (the more general fix may be `AsmWriter')
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15932 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:56:12 +00:00
Misha Brukman
1601d9c1f0
Stack space for argument passing is 32 regardless of 32- vs. 64-bit arch.
...
Thanks to Nate Begeman for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15930 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:51:19 +00:00
Misha Brukman
983e92dc0d
LR needs to be saved at 16-byte offset on a 64-bit arch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15929 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:36:14 +00:00
Misha Brukman
4debafbea4
On 64-bit PowerPC, pointers are 8 bytes, so parameter area offset is 48, not 24
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15928 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:34:05 +00:00
Misha Brukman
d2cbb871d0
This PHI has 4 additional operands, not 2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15926 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:00:12 +00:00
Misha Brukman
95ab78af3c
Use the appropriate 64-bit register description file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15922 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 19:36:57 +00:00
Misha Brukman
5e9867e71c
Fix more remaining 32-bit vestiges of PowerPC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15919 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 18:49:58 +00:00
Misha Brukman
cc55ad5fe9
Fix another vestige of the 32-bit PowerPC backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15918 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 16:50:30 +00:00
Misha Brukman
ab566eaa68
Correct character prepended to global symbols ('.'), use Mangler consistently
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15917 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 16:33:56 +00:00
Misha Brukman
1c514ec89d
* Eliminate global base register, r2 is used for that on AIX/PowerPC
...
* Fix bug from 32-bit PowerPC days of 2-register long split
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15916 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 16:29:25 +00:00
Misha Brukman
85aa4d0cc5
Wrap long lines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15915 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 16:28:30 +00:00
Nate Begeman
1e67d4d7ba
Convert casts that will have no effect into move instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15914 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 08:07:50 +00:00
Nate Begeman
81d265d692
Clean up floating point instruction selection.
...
Change int->float cast code to put conversion constants in constant pool.
Shorten code sequence for constant pool fp loads.
Remove LOADLoDirect/LOADLoIndirect psuedo instructions and tweak asmwriter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15913 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 05:20:54 +00:00
Chris Lattner
f746a7d09b
Rename var
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15897 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-18 02:22:55 +00:00
Misha Brukman
5069438763
This file is no longer used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15893 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 20:23:33 +00:00
Chris Lattner
69d485e646
Start using alignment output routines from AsmPrinter.
...
Changes to make this more similar to the X86 asmprinter
Fix overalignment of globals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15891 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 19:26:03 +00:00
Chris Lattner
5676310c5d
Print comments with ;
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15881 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 16:27:26 +00:00
Nate Begeman
07a73755d3
Re-fix hiding the Frame Pointer from the register allocator in functions
...
that have a frame pointer. This change fixes Burg. In addition, make
the necessary changes to floating point code gen and constant loading after
Chris Lattner's fixes to the asm writer. These changes fix MallocBench/gs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15873 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 07:17:44 +00:00
Chris Lattner
79835d9f9f
Use the emitGlobalConstant defined in AsmPrinter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15869 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 06:37:12 +00:00
Chris Lattner
b462e47d2d
New, more general, interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15866 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 06:07:43 +00:00
Misha Brukman
9e36843964
Rewrite targets/rules to generate files for just PowerPC or PPC{32,64}
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15862 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:11:54 +00:00
Misha Brukman
8283ec7c1c
Register classes are target-dependent
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15861 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:10:31 +00:00
Misha Brukman
6316181ee0
#include <map> is not necessary here
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15860 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:09:39 +00:00
Misha Brukman
1dcddfefbd
`PowerPC' is no longer a real target
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15859 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:09:10 +00:00
Misha Brukman
f2f8cfb945
Move variables and methods which need PPC{32,64}* distinction to subclasses
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15858 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:08:44 +00:00
Misha Brukman
66aa3e0e8b
No need for an `is64bit' flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15857 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:06:47 +00:00
Misha Brukman
a2a27b3c85
PowerPCInstrInfo and PowerPCRegisterInfo have gone away; they are replaced
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by 32- and 64-bit customized files, named appropriately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15856 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:05:00 +00:00
Misha Brukman
08dde0ba85
Consistently name passed with 32 or 64 in their name
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15855 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:02:58 +00:00
Misha Brukman
3d58b8f531
PowerPCRegisterInfo no longer takes a bool to differentiate 32 vs 64 bits
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15854 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:02:18 +00:00
Misha Brukman
db50bd3e7a
The PowerPCInstrInfo class has gone away.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15853 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:00:46 +00:00
Misha Brukman
363dd07320
PowerPCInstrInfo has gone away, PPC32 and PPC64 share opcodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15852 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 04:58:50 +00:00
Misha Brukman
adde6994ac
PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15851 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 04:57:37 +00:00
Misha Brukman
f2ccb77ee9
PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15850 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 04:55:41 +00:00
Chris Lattner
469ab79584
Print float constants as 4 byte values.
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Also, fix endianness problems when cross compiling from little-endian host.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15847 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 02:48:44 +00:00
Chris Lattner
505e783d8c
Make sure to put an _ prefix on all identifiers!
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Also, add some (currently disabled) code to print float's as 32-bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15846 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 02:29:00 +00:00
Chris Lattner
416ca3384a
More changes to make PPC32 and X86 more similar
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15842 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 23:38:36 +00:00
Chris Lattner
36aacdb974
Minor changes to make the diff be nothing against the X86 version
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15841 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 23:30:16 +00:00
Chris Lattner
a3840795a5
Finegrainify namespacification
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Start using the AsmPrinter base class to factor out a bunch of code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15840 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 23:25:21 +00:00
Chris Lattner
b6482069f0
There is no need for a cast here
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15810 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 05:09:58 +00:00
Nate Begeman
746a49516c
Update the current state of the world
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15809 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 05:06:43 +00:00
Nate Begeman
7e0fd576d3
Fix typo of the word 'implicit' I made resolving a CVS conflict. Whoops!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15808 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 02:12:49 +00:00
Nate Begeman
1cffdf0798
Fix frame pointer handling:
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Reserve R0 in store/load from stack slot for building >32k offsets from SP
or FP. This also requires we use R11 rather than R0 for holding the LR
value we want to save or restore. Also, tell the register allocator not
to use R31 (our FP) in functions that have a frame pointer. These changes
fix Burg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15807 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 01:52:12 +00:00
Nate Begeman
865075ed35
Fix mismatched adjust down/up of SP in functions that contain variable
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sized allocas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15806 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 01:50:22 +00:00
Chris Lattner
6ff3f83ef0
Insertion methods now return void instead of #instrs inserted. Also, use
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more powerful forms of BuildMI to concisify the code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15782 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 22:15:56 +00:00
Chris Lattner
57f1b67c34
These methods no longer take a TargetRegisterClass* operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 21:56:44 +00:00
Alkis Evlogimenos
8c9b4de574
Make this compile on gc 3.4.1 (static_cast to non-const type was not
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allowed).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15766 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 09:18:55 +00:00
Nate Begeman
f7bb8c0caa
Add future optimization opportunity
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15760 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 06:43:10 +00:00
Nate Begeman
43d64eae53
Fix float to int codepath by always allocating 8 bytes for the target of a double store; optimize cmplwi generation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15759 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 06:42:28 +00:00
Chris Lattner
08eceec98d
Zimm16 is now dead. Its entry is not removed from the enum, to avoid having
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to renumber everything. Similar elimination should be applied to other
operand enum values that are only used to format printing in the .s file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15755 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 05:48:47 +00:00
Chris Lattner
0ea3171fbf
Convert all of the DForm_6* operations, which makes all of the Zimm16 users
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dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15754 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 05:46:14 +00:00
Chris Lattner
d15575d39f
Reenable the CCRC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15752 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 05:31:15 +00:00
Chris Lattner
97b2a2e389
Convert the DForm_4 over to the asmprintergen
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15751 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 05:20:16 +00:00
Nate Begeman
ad9c242605
Remove dead code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15750 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 00:31:02 +00:00
Chris Lattner
7bb424fafc
Print mflr using the asmwriter generator
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15749 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 23:27:29 +00:00
Nate Begeman
ca068e861b
Replace PowerPCPEI.cpp with target independant PrologEpilogInserter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15746 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:16:36 +00:00
Nate Begeman
ffde1de597
Add support for frame pointers, and large offsets from stack and frame pointers. Adopt elimination of MachineFunction& arg from eliminateFrameIndex.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15745 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:13:58 +00:00
Nate Begeman
b0b8b93e58
Add indexed forms of load doubleword and load word algebraic for 64 bit targets
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15743 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:12:20 +00:00
Nate Begeman
6d1e2dfd86
Fix handling of FP constants with single precision, and loading of internal linkage function addresses
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15742 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:11:38 +00:00
Nate Begeman
e59bf59ba5
Add initial support for using the generated asm writer. Also, fix FP constant printing to always print 8 byte intializers. Move printing of LinkOnce stubs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15741 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:09:10 +00:00
Nate Begeman
14d89d6810
Add generation of asm writer from tablegen files to Makefile
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15740 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:06:38 +00:00
Nate Begeman
1c284ac5ec
Remove an unneeded header and forward declaration
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15722 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-13 09:33:17 +00:00
Nate Begeman
b73a711ed7
Fix siod by switching BoolTy to byte rather than int until CFE changes for
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Darwin. Also, change asm printer to output proper stubs for external
functions whose address is passed as an argument to aid in bugpointing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15721 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-13 09:32:01 +00:00
Nate Begeman
293d88ca8b
Fix 177.mesa compilation, don't use floating point regs for base addresses!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15720 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-13 04:45:14 +00:00
Nate Begeman
8cfa427d9c
Fix llc crasher compiling siod by giving BuildMI the correct number of arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15719 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-13 03:56:49 +00:00
Nate Begeman
5a104b0ec5
Longs are in one register on PowerPC 64; use appropriate instructions to operate on them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15711 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-13 02:20:47 +00:00
Nate Begeman
244e64ead2
Add some more 64 bit instructions we need for the PowerPC-64 ISel to the tablegen files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15710 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-13 02:19:26 +00:00
Misha Brukman
f5f70685b6
Disable PPC64 backend by default because LLC cannot choose automatically between
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SparcV9 and PowerPC64 without target triples, since they are both 64-bit
big-endian targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15688 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 17:16:43 +00:00
Misha Brukman
a1b6ae9d7c
* Correct 64-bit version: blr 1 (not 0)
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* BuildMI() can build 0-param instructions (e.g., NOP)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15681 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 03:30:03 +00:00
Misha Brukman
e4d093c356
* Print out full names for non-GPR or -FPR registers
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* BuildMI() really *does* handle 0 params!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15680 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 03:28:47 +00:00
Misha Brukman
cc6b01b1e6
* Pointers are 8 bytes, hence cLong type on 64-bit PPC
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* Fix loading of GlobalValues
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15678 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 02:53:01 +00:00
Misha Brukman
8e63dcebcc
Eliminate special-casing 14-bit immediate load/store opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15677 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 02:51:38 +00:00
Misha Brukman
c90f2963c4
Correctly print out ASCII literal strings on AIX
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15674 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 01:01:13 +00:00
Misha Brukman
ef9468cfe5
Mark R2 as available for allocation on Darwin/PPC32, but not AIX/PPC64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15673 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 00:10:01 +00:00
Misha Brukman
1d3527edbf
* Move AIX into the llvm namespace to be accessed from RegisterInfo
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* Mark InstrInfo with 32 vs. 64 bit flag
* Enable the 64-bit isel and asm printer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15672 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:47:08 +00:00
Misha Brukman
a6ecd9ee47
Set the is64bit flag and propagate it to PowerPCRegisterInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15671 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:45:43 +00:00
Misha Brukman
dceb457607
* Set the is64bit boolean flag in PowerPCRegisterInfo
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* Doubles are 8 bytes in 64-bit PowerPC, and use the general register class
* Use double-word loads and stores for restoring from/saving to stack
* Do not allocate R2 if compiling for AIX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15670 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:44:55 +00:00
Misha Brukman
ca9309f22e
64-bit instruction selector and AIX-specific 64-bit asm printer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15669 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:42:15 +00:00
Misha Brukman
55eee3dc7a
Fix names of 64-bit CMP*D* opcodes, add LWA and STD* opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15668 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:33:34 +00:00
Misha Brukman
f1f6cef161
Add support for 64-bit CMPDI, CMPLDI, and CMPLD opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15667 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 20:56:14 +00:00
Misha Brukman
96b6110685
Add doubleword load/store (64-bit only).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15665 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 15:54:36 +00:00
Misha Brukman
9582822341
Hyphenate ##-bit and remove first-person from comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15663 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 13:35:44 +00:00
Nate Begeman
7a4fe9be7e
Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15662 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:40:04 +00:00
Chris Lattner
74a806cd3d
Fix a case where constantexprs could leak into the PPC isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15661 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:34:50 +00:00
Nate Begeman
8d963e602b
Fix 255.vortex by using getClassB instead of getClass
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15648 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 03:30:55 +00:00
Misha Brukman
0145881cb9
Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15636 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 00:11:25 +00:00
Misha Brukman
c0f6420b96
Breaking up the PowerPC target into 32- and 64-bit subparts: Part II: 64-bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15635 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 00:10:41 +00:00
Misha Brukman
3d9a6c2842
Breaking up the PowerPC target into 32- and 64-bit subparts, Part I: 32-bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15634 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 00:09:42 +00:00
Misha Brukman
5b5708106e
Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15631 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 22:47:03 +00:00
Misha Brukman
698fbd5b94
* Fix file header to use tablegen emacs mode instead of c++
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* Wrap long line to 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15630 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 21:24:44 +00:00
Nate Begeman
b64af918cb
Fix casts of float to unsigned long
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Replace STDX (store 64 bit int indexed) with STFDX (store double indexed)
Fix latent bug in indexed load generation
Generate indexed loads and stores in many more cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15626 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 20:42:36 +00:00
Misha Brukman
42efb87410
DForm 5/6 extended mneumonics take 3 arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15620 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 19:03:31 +00:00
Misha Brukman
a91f53634c
Fix DForm_4: format is `op r, r, i'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15613 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 18:07:55 +00:00
Misha Brukman
b05daff7fa
Stub definition of the PowerPC CodeEmitter class; this isn't functional (yet).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15600 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-09 23:03:59 +00:00
Misha Brukman
7103fba019
CodePrinter -> AsmPrinter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15599 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-09 22:27:45 +00:00
Misha Brukman
8124020192
Remove ClassPrefix variable as it's no longer used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15586 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-09 19:13:29 +00:00
Misha Brukman
929072eb04
Define a ClassPrefix for PowerPC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15580 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-09 17:46:26 +00:00
Misha Brukman
f588548a86
Generate a code emitter for PowerPC as well, this will be used in the JIT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15578 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-09 17:24:32 +00:00
Misha Brukman
4ad7d1bee7
Use instruction formats as defined in the PowerPC ISA manual
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15577 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-09 17:24:04 +00:00
Reid Spencer
524a60587d
Fix stack size processing now that the return address isn't an implied
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push onto the top of the stack like x86, which uses the local area
offset. This will allow the removal of PowerPCPEI.cpp soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15573 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-09 01:24:32 +00:00