Jim Grosbach
d4462a5a4f
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117927 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 16:44:21 +00:00
Rafael Espindola
f89671d994
Move EmitInstruction to MCObjectStreamer so that ELF and MachO can share it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117925 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 16:27:31 +00:00
Jim Grosbach
9729d2e998
The T2 extract/pack instructions are only valid in Thumb2 mode. Mark the
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patterns as such
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117923 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 15:59:52 +00:00
Rafael Espindola
cc3acee7b3
Add support for .value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117922 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 15:29:07 +00:00
Rafael Espindola
484291c273
Implement .weakref.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 14:28:48 +00:00
Bill Wendling
69661191ce
Move instruction encoding bits into the parent class and remove the temporary
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*_Encode classes. These instructions are the only ones which use those classes,
so a subclass isn't necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117906 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 06:00:39 +00:00
Bill Wendling
9e7cb3d243
The testcase is now XFAILed. Sorry about the breakage.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:50:55 +00:00
Chris Lattner
acc473fcf9
"mov[zs]x (mem), GR16" are not ambiguous: the mem
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must be 8 bits. Support this memory form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:41:10 +00:00
Chris Lattner
b501d4f673
Implement enough of the missing instalias support to get
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aliases installed and working. They now work when the
matched pattern and the result instruction have exactly
the same operand list.
This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.
Note that we do not accept instructions like:
movzx 0(%rsp), %rsi
GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand. It could be 8/16/32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:34:34 +00:00
Chris Lattner
4164f6bbbf
make the asm matcher emitter reject instructions that have comments
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in their asmstring. Fix the two x86 "NOREX" instructions that have them.
If these comments are important, the instlowering stuff can print them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 04:44:29 +00:00
Chris Lattner
4d1189f385
reject instructions that contain a \n in their asmstring. Mark
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various X86 and ARM instructions that are bitten by this as isCodeGenOnly,
as they are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117884 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 00:46:16 +00:00
Eric Christopher
b698a56dd4
Revert r117876 for now, it's causing more testsuite failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 22:42:55 +00:00
Bill Wendling
b3747706fc
Disable the peephole optimizer until 186.crafty on armv6 is fixed. This is what
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looks like is happening:
Without the peephole optimizer:
(1) sub r6, r6, #32
orr r12, r12, lr, lsl r9
orr r2, r2, r3, lsl r10
(x) cmp r6, #0
ldr r9, LCPI2_10
ldr r10, LCPI2_11
(2) sub r8, r8, #32
(a) movge r12, lr, lsr r6
(y) cmp r8, #0
LPC2_10:
ldr lr, [pc, r10]
(b) movge r2, r3, lsr r8
With the peephole optimizer:
ldr r9, LCPI2_10
ldr r10, LCPI2_11
(1*) subs r6, r6, #32
(2*) subs r8, r8, #32
(a*) movge r12, lr, lsr r6
(b*) movge r2, r3, lsr r8
(1) is used by (x) for the conditional move at (a). (2) is used by (y) for the
conditional move at (b). After the peephole optimizer, these the flags resulting
from (1*) are ignored and only the flags from (2*) are considered for both
conditional moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117876 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 22:07:12 +00:00
Nicolas Geoffray
7a5a3f75eb
Attach a GCModuleInfo to a MachineFunction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 20:38:38 +00:00
Chris Lattner
150d20e8fc
fix the !eq operator in tblgen to return a bit instead of an int.
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Use this to make the X86 and ARM targets set isCodeGenOnly=1
automatically for their instructions that have Format=Pseudo,
resolving a hack in tblgen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:22:57 +00:00
Chris Lattner
a4a3a5e3c2
two changes: make the asmmatcher generator ignore ARM pseudos properly,
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and make it a hard error for instructions to not have an asm string.
These instructions should be marked isCodeGenOnly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:15:18 +00:00
Chris Lattner
39ee036f40
reapply r117858 with apparent editor malfunction fixed (somehow I
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got a dulicated line).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:10:56 +00:00
Chris Lattner
8b2f0822f3
revert r117858 while I check out a failure I missed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:05:32 +00:00
Chris Lattner
efa53760fe
the asm matcher can't handle operands with modifiers (like ${foo:bar}).
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Instead of silently ignoring these instructions, emit a hard error and
force the target author to either refactor the target or mark the
instruction 'isCodeGenOnly'.
Mark a few instructions in ARM and MBlaze as isCodeGenOnly the are
doing this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 18:48:12 +00:00
Chris Lattner
a33b93f7f1
sketch out the planned instruction alias mechanism, add some comments about
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how the push/pop mnemonic aliases are wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117857 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 18:43:46 +00:00
Duncan Sands
4590766580
Factorize the duplicated logic for choosing the right argument
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calling convention out of the fast and normal ISel files, and
into the calling convention TD file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117856 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 13:21:44 +00:00
Duncan Sands
e26032d5b2
Remove CCAssignFnForRet from X86 FastISel in favour of RetCC_X86,
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which has the same logic specified in the CallingConv TD file.
This brings FastISel in line with the standard X86 ISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117855 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 13:02:38 +00:00
Rafael Espindola
7be2c33193
Add support for files with more than 65280 sections. No testcase since
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it would be a bit too big :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117849 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 00:16:26 +00:00
Eric Christopher
76d61478df
Make sure we have a legal type (and simple) before continuing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117848 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 21:25:26 +00:00
Chris Lattner
0f899c78e1
Resolve a terrible hack in tblgen: instead of hardcoding
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"In32BitMode" and "In64BitMode" into tblgen, allow any
predicate that inherits from AssemblerPredicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:38:20 +00:00
Chris Lattner
693173feef
Implement (and document!) support for MnemonicAlias's to have Requires
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directives, allowing things like this:
def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;
Move the rest of the X86 MnemonicAliases over to the .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117830 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:23:13 +00:00
Chris Lattner
a47b265b1a
really zap alias.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117824 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:23:25 +00:00
Chris Lattner
b3c417845d
move fcompi alias to .td file and zap some useless code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117823 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:22:53 +00:00
Chris Lattner
6f96b0899b
move rep aliases to td file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117822 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:17:33 +00:00
Chris Lattner
a17a9a00dc
move sal aliases to .td file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117821 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:14:54 +00:00
Chris Lattner
1a1ecc9f3c
fix an encoding mismatch where "sal %eax, 1" was not using the short encoding
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for shl. Caught by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117820 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:13:10 +00:00
Chris Lattner
8b260a7644
move a bunch more aliases from .cpp -> .td file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117819 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:07:17 +00:00
Chris Lattner
8cb441c9e0
move cmov aliases to .td file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117818 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 17:56:50 +00:00
Chris Lattner
b69fc28e92
move setcc and jcc aliases from .cpp to .td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117817 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 17:51:45 +00:00
Chris Lattner
537ca844dd
move some code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117816 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 17:38:55 +00:00
Chris Lattner
674c1dcca2
implement (and document!) the first kind of MC assembler alias, which
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just remaps one mnemonic to another. Convert a few of the X86 aliases
from .cpp to .td code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 17:36:36 +00:00
Duncan Sands
aa66099330
Now that the MallocInst no longer exists, this workaround for
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it claiming not to have side-effects is no longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 16:12:16 +00:00
Jim Grosbach
7644971232
Add FIXME.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117787 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 14:54:23 +00:00
Jim Grosbach
604cdf6ea7
Clean up comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117785 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 13:48:28 +00:00
Duncan Sands
ad6f541840
If a function does a volatile load from a global constant, do not
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consider it to be readonly. In fact, don't even consider it to be
readonly if it does a volatile load from an AllocaInst either (it
is debatable as to whether readonly would be correct or not in this
case; play safe for the moment). This fixes PR8279.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117783 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 12:59:44 +00:00
Jim Grosbach
4aaf59d8ed
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117782 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 12:59:16 +00:00
Chris Lattner
9a82e70275
stay out of the reserved namespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117773 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 04:57:14 +00:00
Chris Lattner
dba34d874d
simplify this code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117771 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 04:35:59 +00:00
Chris Lattner
e5658fa15e
split MaybeParseRegister into its two logical uses, eliminating malloc+free traffic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 04:09:10 +00:00
Jim Grosbach
4b5236c966
Avoid re-evaluating MI.getNumOperands() every iteration of the loop.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117766 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 01:40:16 +00:00
Jakob Stoklund Olesen
e5f4e9fb2b
Include MachineBasicBlock numbers in viewCFG() output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 01:26:19 +00:00
Jakob Stoklund Olesen
5b4bb218d1
Make sure copies are inserted after any exception handling labels at the top of
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a basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117764 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 01:26:16 +00:00
Jakob Stoklund Olesen
92095e7b3f
Add SkipPHIsAndLabels from PHIElimination to MachineBasicBlock. It is needed
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elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117763 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 01:26:14 +00:00
Jakob Stoklund Olesen
ab56647e6b
Disable more of physical register live intervals verification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117762 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 01:26:11 +00:00
Jakob Stoklund Olesen
7d57753df3
Print out register class of spilled register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117761 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 01:26:09 +00:00
Bob Wilson
f74a429816
Overhaul memory barriers in the ARM backend. Radar 8601999.
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There were a number of issues to fix up here:
* The "device" argument of the llvm.memory.barrier intrinsic should be
used to distinguish the "Full System" domain from the "Inner Shareable"
domain. It has nothing to do with using DMB vs. DSB instructions.
* The compiler should never need to emit DSB instructions. Remove the
ARMISD::SYNCBARRIER node and also remove the instruction patterns for DSB.
* Merge the separate DMB/DSB instructions for options only used for the
disassembler with the default DMB/DSB instructions. Add the default
"full system" option ARM_MB::SY to the ARM_MB::MemBOpt enum.
* Add a separate ARMISD::MEMBARRIER_MCR node for subtargets that implement
a data memory barrier using the MCR instruction.
* Fix up encodings for these instructions (except MCR).
I also updated the tests and added a few new ones to check for DMB options
that were not currently being exercised.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117756 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 00:54:37 +00:00
Jim Grosbach
6b5252db2d
Encode the register list operands for ARM mode LDM/STM instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 00:37:59 +00:00
Bill Wendling
52925b60f1
Some instructions end with an "ls" prefix, but it doesn't indicate that they are
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conditional. Check for those instructions explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:50:21 +00:00
Evan Cheng
189c1ec4c1
Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:36:03 +00:00
Jim Grosbach
f38bfd1918
Remove hard tab characters.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117742 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:23:15 +00:00
Jim Grosbach
c4bc2111a7
80 column fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:21:57 +00:00
Jim Grosbach
d8a11c25fa
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:21:03 +00:00
Jim Grosbach
0d2d2e9246
s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operand
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encoder functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117738 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:19:55 +00:00
Evan Cheng
e09206d4d7
Fix fpscr <-> GPR latency info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117737 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:16:55 +00:00
Rafael Espindola
d179886f05
Be more strict on when we produce an undefined reference. In gas a file with
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just
.type foo,@object
will produce an undefined reference to foo. On the other hand, a file with
just
.weakref bar, foo
will not. It is somewhat hard to support both in MC since both statements
should create the symbols. It should be possible if we really need to by
adding to the flags, but hopefully that is not necessary.
With this patch we do not produce a undefined reference in any of those cases.
The assembly file needs an actual use for the undefined reference to be
present.
This is in preparation for a patch implementing .weakref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117735 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:09:31 +00:00
Bob Wilson
db1da8ed42
Clean up indentation and other whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:20:45 +00:00
Bob Wilson
09fd64644d
Remove trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117727 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:20:43 +00:00
Bob Wilson
f0b48f836e
Fix 80-column violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:03:07 +00:00
Bob Wilson
822cb58d08
Change instcombine's getShuffleMask to represent undef with negative values.
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This code had previously used 2*N, where N is the mask length, to represent
undef. That is not safe because the shufflevector operands may have more
than N elements -- they don't have to match the result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117721 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:03:05 +00:00
Bob Wilson
46455096be
Remove DAG combiner patch to fold vector splats. Instcombiner does it now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:03:02 +00:00
Bob Wilson
4cac5facc3
Make instcombine a little more aggressive in combining vector shuffles.
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Allow splats even if they don't match either of the original shuffles,
possibly due to undef entries in the shuffles masks. Radar 8597790.
Also fix some 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117719 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:02:50 +00:00
Jim Grosbach
3df518e67e
add FIXME
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 21:56:51 +00:00
Jim Grosbach
8e0a3eb957
Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it in
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the ARMExpandPseudos pass rather than during the asm lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117714 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 21:35:25 +00:00
Eric Christopher
0e6233bfd7
Handle comparison values we already have - this fixes the consumer-typeset
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failure for llvm-gcc on arm fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117710 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 21:08:19 +00:00
Owen Anderson
0995f20cfd
Give up on doing in-line instruction simplification during correlated value propagation. Instruction simplification
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needs to be guaranteed never to be run on an unreachable block. However, earlier block simplifications may have
changed the CFG to make block that were reachable when we began our iteration unreachable by the time we try to
simplify them. (Note that this also means that our depth-first iterators were potentially being invalidated).
This should not have a large impact on code quality, since later runs of instcombine should pick up these simplifications.
Fixes PR8506.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 21:05:17 +00:00
Jim Grosbach
a3c1629ff5
ARM::MOVi32imm is expanded in ARMExpandPseudoInsts, so there's no need to
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handle it in the asm lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117707 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 20:37:06 +00:00
Jim Grosbach
e317b13a2d
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117703 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 20:21:49 +00:00
Jim Grosbach
f32ecc69e5
ARM encoding information for CLREX, SWP and SWPB. Add comment for sjlj pseudos and a FIXME for TLS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117702 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 20:21:36 +00:00
Dan Gohman
e60dcb5e97
Make ScalarEvolution::forgetLoop forget all contained loops too, because
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they may have ValuesAtScopes map entries referencing their outer loops.
This fixes a user-after-free reported in PR8471.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117698 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 20:16:10 +00:00
Jim Grosbach
86875a2463
ARM mode LDREX*/STREX* binary encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117695 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 19:58:57 +00:00
Jim Grosbach
27e900888e
Encoding information for ARM conditional move instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117687 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 19:28:17 +00:00
Jakob Stoklund Olesen
db4eec3d2c
Fix sign error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 18:21:18 +00:00
Evan Cheng
089751535d
Avoiding overly aggressive latency scheduling. If the two nodes share an
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operand and one of them has a single use that is a live out copy, favor the
one that is live out. Otherwise it will be difficult to eliminate the copy
if the instruction is a loop induction variable update. e.g.
BB:
sub r1, r3, #1
str r0, [r2, r3]
mov r3, r1
cmp
bne BB
=>
BB:
str r0, [r2, r3]
sub r3, r3, #1
cmp
bne BB
This fixed the recent 256.bzip2 regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117675 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 18:09:28 +00:00
Evan Cheng
d7e473c629
- Don't schedule nodes with only MVT::Flag and MVT::Other values for latency.
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- Compute CopyToReg use operand latency correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117674 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 18:07:31 +00:00
Jakob Stoklund Olesen
3ccfce0e35
Don't transfer unused values to the new intervals formed by splitting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117673 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:47:49 +00:00
Jim Grosbach
80eb233a3c
Handle ARM addrmode5 instructions with an offset.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117672 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:41:25 +00:00
Benjamin Kramer
8a8e26fb18
Silence Release build warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:40:05 +00:00
Jakob Stoklund Olesen
6d309059a7
Teach ConnectedVNInfoEqClasses::Classify to deal with unused values.
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We don't want unused values forming their own equivalence classes, so we lump
them all together in one class, and then merge them with the class of the last
used value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117670 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:37:29 +00:00
Jakob Stoklund Olesen
c94fcb1507
Never propagate the idom value out of a block that defines its own value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117669 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:37:25 +00:00
John Thompson
44ab89eb37
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:29:13 +00:00
Dan Gohman
3545635a60
Check if ErrMsg is null. This fixes the "not" command.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117666 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:20:42 +00:00
Dan Gohman
c463316046
Fix these error messages to be less confusing. These error
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messages primarily indicate errors running the viewer, not
errors with the graph file itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117665 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:03:40 +00:00
Dan Gohman
e5f77cda25
Make Program::Wait differentiate execution failure due to the file
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being not found from the file being not executable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 16:54:25 +00:00
Jim Grosbach
d8d716fad3
Revert 117660. Apparently it's not as trivial as that...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117663 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 16:50:53 +00:00
Dan Gohman
695e85d477
Make Program::Wait provide an error message string for errors
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executing the child process and abnormal child process termination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117661 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 16:39:01 +00:00
Jim Grosbach
da54c6dd4f
ARM addrmode5 instructions have neither writeback nor post-indexed modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117660 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 16:38:59 +00:00
Jim Grosbach
16c7425cff
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117651 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 14:46:02 +00:00
Benjamin Kramer
61a4d56a03
ARMAsmParser: Plug a memory leak.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117648 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 09:43:39 +00:00
Eric Christopher
c223e2b10b
Add an unreachable to silence warning - the switch is actually
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fully enumerated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117647 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 09:26:59 +00:00
Bill Wendling
49ad731adf
This may be an ARM target, so check for _Unwind_SjLj_Resume.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117643 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 07:46:01 +00:00
Dan Gohman
cd5c123a1d
Teach memdep to use pointsToConstantMemory to determine that loads
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from constant memory don't alias any stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117636 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 01:14:04 +00:00
Jakob Stoklund Olesen
eeaae20be0
Fix broken equivalence class calculation. We could probably also use
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EquvivalenceClasses.h except it looks like overkill when elements are continuous
integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117631 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 00:40:59 +00:00
Jakob Stoklund Olesen
cb367778c0
Print out the connected components in the verifier after complaining about their
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multiplicity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117630 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 00:40:57 +00:00
Jakob Stoklund Olesen
1f46a0ac66
Run a verification pass before any splitting to better distribute blame.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117629 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 00:40:55 +00:00
Chris Lattner
14b93851cc
add simple support for addrmode5 operands, allowing
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vldr.64 to work. I have no idea if this is fully right, but
it is in the right direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 00:27:31 +00:00
Devang Patel
4d7f9a00a5
Ignore empty blocks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117615 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 22:11:59 +00:00
Chris Lattner
e73d4f8ec7
give better error diagnostics, for example:
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t.s:1:14: error: invalid operand for instruction
vldr.64 d17, [r0]
^
instead of:
t.s:1:1: error: unrecognized instruction
vldr.64 d17, [r0]
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117611 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 21:41:58 +00:00
Chris Lattner
6274ec48b3
hook up getOpcodeName for ARM so that "llc -show-mc-inst" includes
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the opcode string in the inst dump, e.g.:
vmov r2, r3, d17 @ encoding: [0x31,0x2b,0x53,0xec]
@ <MCInst #989 VMOVRRD
@ <MCOperand Reg:68>
@ <MCOperand Reg:69>
@ <MCOperand Reg:19>
@ <MCOperand Imm:14>
@ <MCOperand Reg:0>>
The "VMOVRRD" is new.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117609 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 21:37:33 +00:00
Rafael Espindola
f4b0f3e616
Improvements to .section parsing:
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* If we have a M or a G, reject sections without the type
* Only parse the flag specific arguments if we have M or G
* Parse the corresponding arguments for M and G
We ignore the G arguments and flag for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117608 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 21:33:33 +00:00
Chris Lattner
fa42fad8bf
move a method out of line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117605 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 21:28:01 +00:00
Chris Lattner
550276ee5b
remove the rest of hte owningptr's, no functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117603 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 20:52:15 +00:00
Jakob Stoklund Olesen
8c4564287d
One day, physical register live ranges will be sensible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117602 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 20:44:22 +00:00
Jakob Stoklund Olesen
e1dde7b05a
Replace SplitKit SSA update with an iterative algorithm very similar to the one
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in SSAUpdaterImpl.h
Verifying live intervals revealed that the old method was completely wrong, and
we need an iterative approach to calculating PHI placemant. Fortunately, we have
MachineDominators available, so we don't have to compute that over and over
like SSAUpdaterImpl.h must.
Live-out values are cached between calls to mapValue() and computed in a greedy
way, so most calls will be working with very small block sets.
Thanks to Bob for explaining how this should work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 20:34:52 +00:00
Jakob Stoklund Olesen
d68f458244
Make MachineDominators available for SplitEditor. We are going to need it for
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proper SSA updating.
This doesn't cause MachineDominators to be recomputed since we are already
requiring MachineLoopInfo which uses dominators as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117598 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 20:34:50 +00:00
Jakob Stoklund Olesen
26b92be922
Add a temporary command line option to verify machine code after each spill or
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split.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 20:34:47 +00:00
Dan Gohman
24a492683c
Revert r117582, which reverted r77396. Searching PATH for a string
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which contains slashes is inconsistent with the meaning of PATH on
Unix-type platforms, and pretty surprising.
If the user has given a specific path to execute and we can't
execute it, we should fail and say why. (Apparently the new
posix_spawn code doesn't always say why, but that's a separate
issue.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 20:34:33 +00:00
Rafael Espindola
787c33718d
Add support for the .string directive.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117592 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 20:02:27 +00:00
Devang Patel
bc2bb9bbd0
Do not work too hard to find type's file info. There is a special field to record file info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 19:50:08 +00:00
Rafael Espindola
1973d43792
Defined weak symbols should have non-zero value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117585 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 19:39:57 +00:00
Mikhail Glushenkov
9f36e7389f
llvmc: Make ExecuteProgram() look in the driver directory first.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117584 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 19:33:08 +00:00
Mikhail Glushenkov
8a5ff478db
Remove an unnecessary check and an unnecessary temporary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117583 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 19:33:04 +00:00
Mikhail Glushenkov
c61c7549a8
Revert r77396.
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Original commit message:
On "Unix", if Program::FindProgramByName is given a name containing
slashes, just go with it, regardless of whether it looks like it will
be executable. This follows the behavior of sh(1) more closely.
It's better when behaviour is consistent between platforms. This change also
makes FindExecutable() behave as expected on unix-likes (before this commit, it
used to always succeed).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117582 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 19:32:58 +00:00
Mikhail Glushenkov
7289d06e48
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117581 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 19:32:53 +00:00
Rafael Espindola
29129728f1
Fix relocations with renamed symbols.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117575 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 19:08:03 +00:00
Benjamin Kramer
57ca3ccd45
Reduce malloc thrashing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117572 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 18:41:23 +00:00
Jim Grosbach
ab682a2090
PLD, PLDW, PLI encodings, plus refactor their use of addrmode2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117571 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 18:34:10 +00:00
Rafael Espindola
f571f9a8fe
Aliases defined with .symver should copy the binding of the symbols they alias.
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Move the existing patching for undefined symbols so that all the patching
is done in the same function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117570 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 18:33:03 +00:00
Devang Patel
3cabc9d2c9
Technically DIFile scope should also be handled here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 17:30:52 +00:00
Chris Lattner
c0ddfaa134
rearrange ParseRegisterList.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117560 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 17:23:41 +00:00
Chris Lattner
3a69756e39
refactor some code to simplify it, eliminating some owningptr's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117559 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 17:20:03 +00:00
Bob Wilson
0f1db1a6c6
Teach the DAG combiner to fold a splat of a splat. Radar 8597790.
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Also do some minor refactoring to reduce indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117558 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 17:06:14 +00:00
Roman Divacky
f9d1752104
Use the IDVal directly as there's no need to convert to std::string.
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Pointed out by Chris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 16:57:58 +00:00
Roman Divacky
50e7a78709
Implement .equ directive as a synonym to .set.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117553 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 16:22:58 +00:00
Duncan Sands
f22b74608e
Fix PR8494: when reading invalid bitcode, getTypeByID may return
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a null pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117551 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 15:47:26 +00:00
Rafael Espindola
aa8f1f0135
Implement R_X86_64_DTPOFF32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117548 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 15:11:03 +00:00
Rafael Espindola
b4d1721eff
Implement TLSLD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117547 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 15:02:40 +00:00
Rafael Espindola
0cf15d61b7
Implement DTPOFF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117546 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 14:48:59 +00:00
Rafael Espindola
a264f72d3f
Implement TLSLDM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117544 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 14:37:09 +00:00
Rafael Espindola
a0a2f8734c
Implement VK_GOTNTPOFF and switch RelocNeedsGOT to use VariantKind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117543 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 14:22:44 +00:00
Mikhail Glushenkov
6d8ac5ac6d
Reindent.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117538 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 08:25:44 +00:00
Evan Cheng
7e2fe9150f
Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 06:47:08 +00:00
Evan Cheng
9e08ee5d16
Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117520 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 02:00:25 +00:00
Evan Cheng
0104d9de04
- Assign load / store with shifter op address modes the right itinerary classes.
...
- For now, loads of [r, r] addressing mode is the same as the
[r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should
identify the former case and reduce the output latency by 1.
- Also identify [r, r << 2] case. This special form of shifter addressing mode
is "free".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117519 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 01:49:06 +00:00
Evan Cheng
7c88cdcc3b
Fix a major bug in operand latency computation. The use index must be adjusted
...
by the number of defs first for it to match the instruction itinerary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117518 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 01:46:29 +00:00
Dale Johannesen
e49406fd63
Fix pastos in handling of AVX cvttsd2si, PR8491.
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Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 00:35:54 +00:00
Owen Anderson
cfd0e1f3ae
Add correct NEON encodings for vtbl and vtbx.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 00:18:46 +00:00
Owen Anderson
3eff4af42d
Add correct NEON encodings for vext, vtrn, vuzp, and vzip.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117512 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:56:39 +00:00
Bob Wilson
1fa9d301a8
Fix compiler warnings about signed/unsigned comparisons.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117511 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:49:00 +00:00
Dale Johannesen
f514f52790
Teach InstCombine not to use Add and Neg on FP. PR 8490.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117510 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:45:18 +00:00
Evan Cheng
f40deed62f
Shifter ops are not always free. Do not fold them (especially to form
...
complex load / store addressing mode) when they have higher cost and
when they have more than one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:41:30 +00:00
Evan Cheng
de5fa932b9
Putting r117193 back except for the compile time cost. Rather than assuming fallthroughs uses all registers, just gather the union of all successor liveins.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:17:17 +00:00
Jim Grosbach
7e3383c007
Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like
...
the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117505 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:12:14 +00:00
Owen Anderson
498ec20703
Provide correct encodings for NEON vcvt, which has its own special immediate encoding
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for specifying fractional bits for fixed point conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 22:49:00 +00:00
Jim Grosbach
6b15639e26
Trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117496 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 21:39:08 +00:00
Owen Anderson
d2fbdb7f5c
Provide correct encodings for the get_lane and set_lane variants of vmov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 21:28:09 +00:00
Rafael Espindola
3cede2d0b2
Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117494 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 21:23:52 +00:00
Kevin Enderby
529b1a4398
Added the x86 instruction ud2b (2nd official undefined instruction).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:46:49 +00:00
Jim Grosbach
ccf72caa92
JIT imm12 encoding for constant pool entry references.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117483 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:39:40 +00:00
Bob Wilson
f20700ca77
SelectionDAG shuffle nodes do not allow operands with different numbers of
...
elements than the result vector type. So, when an instruction like:
%8 = shufflevector <2 x float> %4, <2 x float> %7, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
is translated to a DAG, each operand is changed to a concat_vectors node that appends 2 undef elements. That is:
shuffle [a,b], [c,d] is changed to:
shuffle [a,b,u,u], [c,d,u,u]
That's probably the right thing for x86 but for NEON, we'd much rather have:
shuffle [a,b,c,d], undef
Teach the DAG combiner how to do that transformation for ARM. Radar 8597007.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117482 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:38:28 +00:00
Rafael Espindola
bc82d8b84f
Implement R_X86_64_GOTTPOFF, R_X86_64_TLSGD and R_X86_64_TPOFF32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:28:07 +00:00
Jim Grosbach
f31430f6ec
ARM JIT fix for LDRi12 and company.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117478 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 19:55:59 +00:00
Benjamin Kramer
07ee63283c
Replace pointer arithmetic with StringRef::substr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117477 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 19:53:52 +00:00
Owen Anderson
f587a9352a
Provide correct NEON encodings for vdup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117475 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 19:25:54 +00:00
Michael J. Spencer
6dad10ed66
x86-Win32: Switch ftol2 calling convention from stdcall to C.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117474 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 18:52:38 +00:00
Michael J. Spencer
3931b54a5f
COFF: Add IMAGE_SCN_MEM_READ to text sections.
...
There are currently 100 references to COFF::IMAGE_SCN in 6 files
and 11 different functions. Section to attribute mapping really
needs to happen in one place to avoid problems like this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117473 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 18:52:29 +00:00
Michael J. Spencer
579d7a3dcc
Fix whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 18:52:20 +00:00
Rafael Espindola
4fa3478fc2
Set default type and flags for .init and .fini.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 18:45:20 +00:00
Rafael Espindola
83ff4d2b0d
Produce an error for an invalid use of .symver.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117462 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:56:18 +00:00
Jim Grosbach
093177d5cd
The new LDR* instruction patterns should handle the necessary encoding of
...
operands in the TableGen'erated bits, so we don't need to do the additional
magic explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117461 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:52:51 +00:00
Owen Anderson
0745c389d9
Add correct NEON encodings for vsli and vsri.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117459 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:40:08 +00:00
Owen Anderson
dd31ed67e6
Add correct NEON encodings for vsra and vrsra.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:29:29 +00:00
Jim Grosbach
063efbf569
The immediate operands of an LDRi12 instruction doesn't need the addrmode2
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encoding tricks. Handle the 'imm doesn't fit in the insn' case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117454 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 16:50:31 +00:00
Jim Grosbach
0ed257c036
Formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 16:30:18 +00:00
Rafael Espindola
bf052ac5d1
Symbols defined as the difference of other two end up in the ABS section.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 16:04:30 +00:00
Rafael Espindola
8818213247
Add support for the .symver directive. This is really ugly, but most of it is
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contained in the ELF object writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 15:18:17 +00:00
Rafael Espindola
a6866969ba
Move more logic to isInSymtab and simplify.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117447 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 14:44:52 +00:00
Mikhail Glushenkov
401b90a4bc
80-col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 09:09:10 +00:00
Mikhail Glushenkov
11d03f690e
Remove try/catch(...) from Win32/Signals.inc.
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catch(...) is used in Win32/Signals.inc for catching Win32 structured
exceptions, but according to [1], this is wrong.
We can't simply change try/catch to __try/__finally, since this syntax is not
supported by MinGW. We can use __try/__finally on MSVC and __try1/__except1
macros on MinGW [2], but I think that that solution obfuscates the code too
much.
The use of try/catch(...) in Signals.inc makes it impossible to link
MinGW-compiled libSystem with llvm-gcc compiled executables. I propose that we
just remove try/catch(...) from Signals.inc, since the meaning of the code won't
change.
[1] http://members.cox.net/doug_web/eh.htm
[2] http://article.gmane.org/gmane.comp.compilers.llvm.cvs/81315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117442 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 09:09:04 +00:00
Kevin Enderby
e460890351
Yet another tweak to X86 instructions to add ud2a as an alias to ud2
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(still to add ud2b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 03:01:02 +00:00
Kevin Enderby
5a378076a4
Another tweak to X86 instructions to add the missing flex instruction (without
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the wait prefix).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117434 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 02:53:04 +00:00
Kevin Enderby
f4630ecc3f
Tweaks to X86 instructions to allow the 'w' suffix in places it makes
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sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler
allows for these instructions. Done differently than in r117031 that
caused a valgrind error which was later reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 02:32:19 +00:00
Jim Grosbach
77aee8e22c
LDRi12 machine instructions handle negative offset operands normally (simple
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integer values), not with the addrmode2 encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117429 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 01:19:41 +00:00
Kevin Enderby
41e8cc73cf
Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc
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will accept versions that the darwin assembler allows. Forms ending in "pi" and
forms without all the operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117427 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:59:28 +00:00
Jakob Stoklund Olesen
c95c1465fd
Handle critical loop predecessors by making both inside and outside registers
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live out.
This doesn't prevent us from inserting a loop preheader later on, if that is
better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117424 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:39:07 +00:00
Jakob Stoklund Olesen
0960a650b7
Compute critical loop predecessors in the same way as critical loop exits.
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Critical edges going into a loop are not as bad as critical exits. We can handle
them by splitting the critical edge, or by having both inside and outside
registers live out of the predecessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117423 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:39:05 +00:00
Jakob Stoklund Olesen
8c593f9173
Physical registers trivially have multiple connected components all the time.
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Only virtuals should be requires to be connected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:39:01 +00:00
Jim Grosbach
f85dd04bfa
One more spot where the new arm mode LDR instruction representation
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doesn't need the additional addrmode2 register operand. Missed it the first
time around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:38:16 +00:00
Wesley Peck
a06038369b
Adding disassembler to the MicroBlaze backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117420 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:23:01 +00:00
Jim Grosbach
c1d30212e9
Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on
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rdar://8477752.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117419 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:19:44 +00:00
Jim Grosbach
28e3fe961f
Since I parameterized this bit, I should probably actually use said parameter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117418 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 23:58:04 +00:00
Dale Johannesen
1de4aa904e
Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
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memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet). No functional change except
for dump output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 23:11:10 +00:00
Andrew Trick
3d26d5d524
Remove the vector of live vregs. I thought we would need to track
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them, but hopefully we won't. And this is not the right data structure
to do it anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117412 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:58:24 +00:00
Owen Anderson
86ed2324a6
Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:50:46 +00:00
Jim Grosbach
3e55612472
First part of refactoring ARM addrmode2 (load/store) instructions to be more
...
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117409 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:37:02 +00:00
Jakob Stoklund Olesen
3a0e0715a5
After splitting, compute connected components of all new registers, not just for
...
the remainder register.
Example:
bb0:
x = 1
bb1:
use(x)
...
x = 2
jump bb1
When x is isolated in bb1, the inner part breaks into two components, x1 and x2:
bb0:
x0 = 1
bb1:
x1 = x0
use(x1)
...
x2 = 2
x0 = x2
jump bb1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117408 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:36:09 +00:00
Jakob Stoklund Olesen
501dc42245
Verify that live intervals are connected. If there are multiple connected
...
components, each should get its own virtual register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:36:07 +00:00
Jakob Stoklund Olesen
f1354ae95a
Call RenumberValues for all new registers created during splitting. This is
...
necessary to get correct hasPHIKill flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117406 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:36:05 +00:00
Jakob Stoklund Olesen
79c0262fa8
Preserve PHIDef bits in cloned values during splitting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:36:02 +00:00
Devang Patel
7e13efad38
Assign source ordering to nodes created for StoreInst.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:14:52 +00:00
Owen Anderson
632c235a31
Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117402 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:58:41 +00:00
Owen Anderson
ac92262b61
Simplify classes for shift instructions, which are never commutable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117398 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:13:59 +00:00
Owen Anderson
3557d00a38
Provide correct NEON encodings for vshl, register and immediate forms.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 20:56:57 +00:00
Jakob Stoklund Olesen
f4a1e1a69f
Teach MachineBasicBlock::print() to annotate instructions and blocks with
...
SlotIndexes when available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117392 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 20:21:46 +00:00
Jakob Stoklund Olesen
dbcc2e119d
Remmeber to print full live interval on verification error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117391 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 20:21:43 +00:00
Rafael Espindola
61e3b91da7
Add support for .ident.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 19:35:47 +00:00
Jim Grosbach
0eb7d06ab1
Grammar.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117388 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 19:34:41 +00:00
Jim Grosbach
c3baf62800
Nuke extraneous comment. It's applicable elsewhere, but not in this func.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117387 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 19:22:23 +00:00
Andrew Trick
e16eecc323
Jakob's review of the basic register allocator.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:34:01 +00:00
Owen Anderson
bc4118bd36
Add correct NEON encoding for vpadal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117380 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:18:03 +00:00
Rafael Espindola
de42e5c09b
handle X86::EH_RETURN64 and X86::EH_RETURN.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117378 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:09:55 +00:00
Devang Patel
cbbe287f8a
s/beginScope/beginInstruction/g
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s/endScope/endInstruction/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 17:49:02 +00:00
Owen Anderson
a88ea03bf2
Add NEON encodings for vmov and vmvn of immediates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117374 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 17:40:54 +00:00
Jakob Stoklund Olesen
e459d55f28
Don't verify physical registers going into landing pads.
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Magic is happening that we don't understand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117370 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 16:49:23 +00:00
Rafael Espindola
e4f506ff4b
Implement some relaxations for arithmetic instructions. The limitation
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on RIP relative relocations looks artificial, but this is a superset of
what we were able to do before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 14:09:12 +00:00
Kalle Raiskila
505faa6b12
Change v64 datalayout in SPU.
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The SPU ABI does not mention v64, and all examples
in C suggest v128 are treated similarily to arrays,
we use array alignment for v64 too. This makes the
alignment of e.g. [2 x <2 x i32>] behave "intuitively"
and similar to as if the elements were e.g. i32s.
This also makes an "unaligned store" test to be
aligned, with different (but functionally equivalent)
code generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 10:45:47 +00:00
Evan Cheng
c8141dfc7f
Use instruction itinerary to determine what instructions are 'cheap'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 02:08:50 +00:00
Evan Cheng
0e9996ca94
NEON vmov's are in Neon domain.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117347 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 02:03:05 +00:00
Nick Lewycky
a568d66512
For statistics that are only used in functions declared in !NDEBUG, wrap the
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declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117345 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:51:57 +00:00
Jakob Stoklund Olesen
0a12b801b5
InlineSpiller can also update LiveStacks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:11:35 +00:00
Jakob Stoklund Olesen
2d17293dd0
Make the spiller responsible for updating the LiveStacks analysis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:11:33 +00:00
Bob Wilson
7c730e7790
When the "true" and "false" blocks of a diamond if-conversion are the same,
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do not double-count the duplicate instructions by counting once from the
beginning and again from the end. Keep track of where the duplicates from
the beginning ended and don't go past that point when counting duplicates
at the end. Radar 8589805.
This change causes one of the MC/ARM/simple-fp-encoding tests to produce
different (better!) code without the vmovne instruction being tested.
I changed the test to produce vmovne and vmoveq instructions but moving
between register files in the opposite direction. That's not quite the same
but predicated versions of those instructions weren't being tested before,
so at least the test coverage is not any worse, just different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:02:24 +00:00
Bob Wilson
2ad40d3494
Change if-conversion to keep track of the extra cost due to microcoded
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instructions separately from the count of non-predicated instructions. The
instruction count is used in places to determine how many instructions to
copy, predicate, etc. and things get confused if that count includes the
extra cost for microcoded ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117332 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:02:21 +00:00
Bob Wilson
b3a6817d06
Tidy up redundant check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117331 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:02:19 +00:00
Evan Cheng
38fd9f2a2d
Neuter r117193 as it causes significant post-ra scheduler compile time regression.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117329 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 23:56:21 +00:00
Rafael Espindola
3336384239
Produce the headers directly in the Finish method. This allows us to use
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the existing streamer methods that are endian safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 22:26:55 +00:00
Dale Johannesen
d155d7e428
An stdcall function calling a non-stdcall function
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cannot use tailcall. PR 8461.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 22:17:05 +00:00
Dan Gohman
87c5c2f069
Support TBAA attachments on calls. This is somewhat experimental.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:38:20 +00:00
Devang Patel
df8370bd70
Simplify.
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Do not count use of sdisel for single call instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117316 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:31:46 +00:00
Owen Anderson
5258b61966
Add correct encodings for NEON vabal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117315 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:29:04 +00:00
Dan Gohman
0b2136927d
Fix chaining in TBAA's pointsToConstantMemory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117314 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:24:55 +00:00
Devang Patel
948f7d0216
Add counters to count basic blocks and machine basic blocks with out of order line number info.
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Add counters to count how many basic blocks are entirely selected by fastisel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:55:43 +00:00
Owen Anderson
410aebc670
Add correct NEON encodings for vaba.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:52:57 +00:00
Devang Patel
9a31f0f398
Add simple counter to count no. of basic blocks without any line number information. At -O0, these basic block coule cause less than optimial debugging experience.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:45:32 +00:00
Dan Gohman
ae92af6771
Only read one bit for testing for a readonly type, leaving the other
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bits open for future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117301 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:22:29 +00:00
Daniel Dunbar
b1e0f76352
MC/AsmParser: Fix relative precedence of {+,-} and comparison ops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117299 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:18:56 +00:00
Daniel Dunbar
bdf90d679b
MC/AsmLexer: Fix bug in source location for Slash token.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117298 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:18:53 +00:00
Owen Anderson
31e6ed890a
Attempt to provide correct encodings for NEON vbit and vbif, even though we can't test them at the moment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117294 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:17:22 +00:00
Owen Anderson
4110b4325d
Provide correct NEON encodings for vbsl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:13:13 +00:00
Jim Grosbach
458f2dc5d1
imm12 operands aren't Thumb2 only, so rename the printer helper function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117291 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:00:01 +00:00
Dan Gohman
269008ee83
Add a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 19:47:25 +00:00
Owen Anderson
162875a9f3
Add correct instruction encodings for vbic, vorn, and vmvn.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:43:52 +00:00
Rafael Espindola
4921e2356e
Add a virtual destructor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:38:32 +00:00
Owen Anderson
8c71eff594
Provide correct NEON encodings for vand, veor, and vorr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:28:30 +00:00
Owen Anderson
d0c5b6170f
Add NEON encoding tests for vcgt and vacgt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:03:59 +00:00
Rafael Espindola
cecbc3d282
Add support for emitting ARM file attributes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117275 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:50:35 +00:00
Owen Anderson
10c15e5d58
Add tests for NEON encodings of vcge and vacge.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117274 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:49:32 +00:00
Owen Anderson
4fe20bbd66
Add a warning about our inability to test the encoding of vceq with immediate zero.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117273 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:33:02 +00:00
Jakob Stoklund Olesen
d3b4895414
In which I learn how to forward declare template classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117272 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:27:30 +00:00
Dan Gohman
e46a3881fc
Update comments; BasicAA is no longer necessarily the end of the chain.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 16:29:52 +00:00
Dan Gohman
852dda4625
Reintroduce these asserts, now that BasicAA is a normal AliasAnalysis pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117266 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 16:28:57 +00:00
Dan Gohman
17a0bf996f
Fix a case where instcombine was stripping metadata (and alignment)
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from stores when folding in bitcasts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117265 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 16:16:27 +00:00
Charles Davis
970bfcc7d8
Add a new 'hotpatch' attribute. This attribute will insert a two-byte no-op
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instruction at the beginning of each function that has the attribute, allowing
the function to be easily hooked and/or patched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117264 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 15:37:09 +00:00
Duncan Sands
05897c8f26
ATTRIBUTE_UNUSED has been renamed to LLVM_ATTRIBUTE_UNUSED.
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Rather than rename this instance, use the cast-to-void idiom
instead. This will hopefully fix the windows buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117262 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 13:10:03 +00:00
Rafael Espindola
24ba4f7f5f
Add X86::reloc_global_offset_table and use it to have a single place where
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we check for _GLOBAL_OFFSET_TABLE_.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-24 17:35:42 +00:00
Duncan Sands
5f28475b30
Fix PR8445: a block with no predecessors may be the entry block, in which case
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it isn't unreachable and should not be zapped. The check for the entry block
was missing in one case: a block containing a unwind instruction. While there,
do some small cleanups: "M" is not a great name for a Function* (it would be
more appropriate for a Module*), change it to "Fn"; use Fn in more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-24 12:23:30 +00:00
Benjamin Kramer
a53fe6070c
SmallVectorize.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117213 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 17:10:24 +00:00
Eric Christopher
a4633f5d74
Move rejection of NEON parameters earlier in fast isel call processing,
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note that we can actually handle some f64 arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117209 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:37:17 +00:00
Benjamin Kramer
4d1dca92bd
Make the disassembler tables const so they end up in read-only memory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:10:44 +00:00
Michael J. Spencer
c527407010
X86: Emit _fltused instead of __fltused on Windows x64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:06:59 +00:00
Chandler Carruth
19e57025d4
Move the remaining attribute macros to systematic names based on the attribute
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name and prefixed with 'LLVM_'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117203 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 08:40:19 +00:00
Chandler Carruth
5117709a1d
Remove a define which is never referenced.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117202 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 08:25:16 +00:00
Chandler Carruth
100c267249
Switch attribute macros to use 'LLVM_' as a prefix. We retain the old names
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until other LLVM projects using these are cleaned up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117200 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 08:10:43 +00:00
Chandler Carruth
2b3ef8b065
Fix a likely bug in an assertion by adding parentheses around '||'. This bug
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was found by a GCC warning. ;]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 07:46:14 +00:00
Evan Cheng
5c2d428f43
Enable ARM fastcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 02:19:37 +00:00
Evan Cheng
ec6906ba47
Properly model the latency of register defs which are 1) function returns or
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2) live-outs.
Previously the post-RA schedulers completely ignore these dependencies since
returns, branches, etc. are all scheduling barriers. This patch model the
latencies between instructions being scheduled and the barriers. It also
handle calls by marking their register uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 02:10:46 +00:00
Evan Cheng
dd9dd6f857
Latency between CPSR def and branch is zero.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117192 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 02:04:38 +00:00
Jakob Stoklund Olesen
7871687604
Verify LiveIntervals against the CFG, ensuring that live-in values are live-out
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of all predecessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 00:49:09 +00:00
Jim Grosbach
a9a968d1ef
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117188 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:48:29 +00:00
Andrew Trick
f433106054
Nonvirtual dtor that was accessible enough to be bad.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117180 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:33:19 +00:00
Gabor Greif
41f31ef28e
fix memory-layout assumption which only holds on little-endian systems
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:16:11 +00:00
Andrew Trick
14e8d71cc9
This is a prototype of an experimental register allocation
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framework. It's purpose is not to improve register allocation per se,
but to make it easier to develop powerful live range splitting. I call
it the basic allocator because it is as simple as a global allocator
can be but provides the building blocks for sophisticated register
allocation with live range splitting.
A minimal implementation is provided that trivially spills whenever it
runs out of registers. I'm checking in now to get high-level design
and style feedback. I've only done minimal testing. The next step is
implementing a "greedy" allocation algorithm that does some register
reassignment and makes better splitting decisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:09:15 +00:00
Jakob Stoklund Olesen
3bf7cf9f0e
Add more verification of LiveIntervals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 22:48:58 +00:00
Jakob Stoklund Olesen
2bfb324684
Be more strict about detecting multi-use blocks for isolation.
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When a block has exactly two uses and the register is both live-in and live-out,
don't isolate the block. We would be inserting two copies, so we haven't really
made any progress.
If the live-in and live-out values separate into disconnected components after
splitting, we would be making progress. We can't detect that for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117169 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 22:48:56 +00:00
Jim Grosbach
f8da5f5dfa
ARM mode encoding information for CLZ, RBIT, REV*, and PKH*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 22:12:16 +00:00
Evan Cheng
c8f46c45a0
Unbreak build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 21:49:09 +00:00
Bob Wilson
364f17c471
Teach instcombine to set the alignment arguments for NEON load/store intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117154 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 21:41:48 +00:00
Evan Cheng
b179b46cc5
Transfer implicit ops when forming load multiple and return instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117151 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 21:29:58 +00:00
Jakob Stoklund Olesen
2c1442e1b2
Be more strict when detecting critical edges before loop splitting.
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An exit block with a critical edge must only have predecessors in the loop, or
just before the loop. This guarantees that the inserted copies in the loop
predecessors dominate the exit block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117144 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 20:28:23 +00:00
Jakob Stoklund Olesen
532de3dc6e
Add print methods
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 20:28:21 +00:00
Owen Anderson
9b26497273
Add correct NEON encodings for vqdmlal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117134 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 19:35:48 +00:00
Jim Grosbach
385e136dce
Add the encoding information for the rest of the ARM mode multiply instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 19:15:30 +00:00
Owen Anderson
92205842ca
Provide correct encodings for NEON vmlal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117131 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 19:05:25 +00:00
Evan Cheng
1f8b40d51c
Silence compiler warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117128 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:57:05 +00:00
Owen Anderson
18341e9e31
Provide correct NEON encodings for vmla.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117126 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:54:37 +00:00
Jim Grosbach
3870b750e6
More ARM multiply instuction binary encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117121 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:35:16 +00:00
Evan Cheng
76f920d316
Add fastcc cc: pass and return VFP / NEON values in registers. Controlled by -arm-fastcc for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117119 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:23:05 +00:00
Jim Grosbach
929a7056d8
Parameterize a bit of ARM encoding information, simplifying some instruction
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definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117114 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:42:06 +00:00
Benjamin Kramer
a3ac427507
Make some symbols static, move classes into anonymous namespaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117111 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:35:07 +00:00
Jim Grosbach
9463d0e400
More ARM multiply instruction encoding information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:16:17 +00:00
Wesley Peck
eecb858ca8
Making the e_machine configurable by the target backend in ELFObjectWriter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117099 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 15:52:49 +00:00
Andrew Trick
0966ec0861
Reverting r117031 to cleanup valgrind errors.
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It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117087 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 03:58:29 +00:00
Eric Christopher
4f512efee9
Add some basic ret instruction support to arm fast-isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117085 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 01:28:00 +00:00
Sean Callanan
751752e7ca
Fixed handling of immediate operand sizes, which
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weren't properly reflecting the OperandSize attribute
of the instruction leading to improper decoding of
certain instructions with the 66H prefix. Also added
a test case for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117084 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 01:24:11 +00:00
NAKAMURA Takumi
2172f3cd97
Win32/Signals.inc: DontRemoveFileOnSignal(): Please acquire the CriticalSection.
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It choked BugPoint on Mingw.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 01:23:50 +00:00
Jim Grosbach
f50af8b5b8
ARM binary encoding for some of the multiply instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117080 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:52:30 +00:00
Jim Grosbach
3686046a2c
ARM binary encodings for MVN variants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:19:32 +00:00
Jim Grosbach
fe40f9551c
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:04:05 +00:00
Jim Grosbach
3fea19105d
ARM Binary encoding information for BFC/BFI instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:03:21 +00:00
Dan Gohman
ee135131b1
Add some more documentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117070 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 21:55:35 +00:00
Eric Christopher
1778772d1b
These don't need to be virtual.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 21:47:51 +00:00
Michael J. Spencer
ef0401ad66
Fix Warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117062 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:49:38 +00:00
Michael J. Spencer
391b43bf33
X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan!
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This is needed for indirect calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:49:23 +00:00
Owen Anderson
90d4cf9314
Move the encoding logic for Q registers into getMachineOpValue().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:49:13 +00:00
Mikhail Glushenkov
84ba14f6d0
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:40:39 +00:00
Owen Anderson
d451f888b8
ARM encodes Q registers as 2xregno (i.e. the number of the D register that corresponds to the lower
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half of the Q register), rather than with just regno. This allows us to unify the encodings for
a lot of different NEON instrucitons that differ only in whether they have Q or D register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:21:49 +00:00
Eric Christopher
5b924809e4
Handle storing args to the stack for calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:09:54 +00:00
Wesley Peck
4da992aeba
Adding initial AsmParser implementation for the MBlaze backend. It is
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mostly based on the ARM AsmParser at this time and is not particularly
functional.
Changed the MBlaze data layout from:
"E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-v64:32:32-v128:32:32-n32"
to:
"E-p:32:32:32-i8:8:8-i16:16:16"
because the MicroBlaze doesn't have i64, f64, v64, or v128 data types.
Cleaned up the MBlaze source code:
1. The floating point register class has been removed. The
MicroBlaze does not have floating point registers. Floating
point values are simply stored in integer registers.
2. Renaming the CPURegs register class to GPR to reflect the
standard naming.
3. Removing a lot of stale code from AsmPrinter after
the conversion to InstPrinter.
4. Simplified sign extended loads by marking them as
expanded in ISelLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117054 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:48:38 +00:00
Dan Gohman
bc078c81e6
Explain what "constant" means here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:45:09 +00:00
Eric Christopher
212ae937bb
More load/store refactoring, call reg+offset simplification from within
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the emitter to handle the addresses. Only simplify the offset if we need
to - also fix bug where in addrmode 5 we weren't dividing the offset by
4, which showed up due to not always lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117051 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:40:30 +00:00
Jim Grosbach
3ab5658a12
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:38:40 +00:00
Dan Gohman
de38897cfc
Update comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117048 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:01:22 +00:00
Owen Anderson
1e93466c3a
Add correct NEON encodings for vhadd and vrhadd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:55:04 +00:00
Jakob Stoklund Olesen
9d999772df
Don't include the destination interval in the union when computing
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Parent - union(Y, ...). Doh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117042 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:47:08 +00:00
Jakob Stoklund Olesen
0a7bbcb0cc
Permit landing pad successor blocks when verifying basic blocks that end in an
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unconditional branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117041 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:47:06 +00:00
Owen Anderson
9d50559bae
Add correct encodings for NEON vaddw.s* and vaddw.u*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:20:25 +00:00
Owen Anderson
e0e6dc3f4e
Provide correct NEON encodings for vaddl.u* and vaddl.s*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:09:17 +00:00
Rafael Espindola
8c8bc05a38
Do not recurse into symbol refs that have a variant kind. This prevents us
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from losing the variant when producing a relocation on an alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:00:20 +00:00
Kevin Enderby
0b9325c97d
More tweaks to X86 instructions to allow the 'w' suffix in places it makes
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sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler allows
for these instructions. Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 17:16:46 +00:00
Duncan Sands
bf9fc53f46
AlignLoc is never used for anything - zap it (gcc-4.6 warning).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117025 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:07:10 +00:00
Duncan Sands
dbbd99faf1
The return value of this call is not used, so no point
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in assigning it to a variable (gcc-4.6 warning).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117024 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:06:28 +00:00
Duncan Sands
2b55f56df8
RetOp is not actually used for anything useful (though
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it looks like maybe it was supposed to be used in the
test...), so zap it (gcc-4.6 warning).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117023 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:05:44 +00:00
Duncan Sands
9bc20ca728
The variable liTRC is not used for anything useful, zap it
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(gcc-4.6 warning).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:04:43 +00:00
Duncan Sands
6abfa46987
Remove some variables that are never really used
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(gcc-4.6 warns about these).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:03:28 +00:00
Duncan Sands
1e1ca0b56d
Add parentheses to pacify gcc, which warns otherwise.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:02:12 +00:00
Duncan Sands
b35fd448ce
Fix the cleanup process of exception information in JIT. Now JIT
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deregisters registered by it FDE structures allowing consecutive
JIT runs to succeed. Patch by Yuri. Fixes PR8285.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117004 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 08:57:29 +00:00
Wesley Peck
42bd9b30d9
Removing stale AsmPrinter directory from MicroBlaze backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116998 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 05:05:06 +00:00
Oscar Fuentes
b692360955
Deleted lib/Target/MBlaze/AsmPrinter/CMakeLists.txt. This way the
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CMake build does not try to build that library, which collides with
MBlaze/InstPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116997 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 05:01:26 +00:00
Wesley Peck
4e9141fd4c
Recommit 116986 with capitalization typo fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116993 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:57:26 +00:00
Andrew Trick
5b7a825ec5
putback r116983 and fix simple-fp-encoding.ll tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116992 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:40:16 +00:00
Wesley Peck
60e7127e86
Reverting the commit 116986. It was breaking the build on llvm-x86_64-linux though it
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compiles on OS X. I'll ensure that it builds on a linux machine before committing
again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:34:22 +00:00
Owen Anderson
d9707e3d85
Revert r116983, which is breaking all the buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:11:16 +00:00
Wesley Peck
13a949071c
Major update of the MicroBlaze backend. The new features are:
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1. A delay slot filler that searches for valid instructions
to fill the delay slot with. Previously NOPs would always
be inserted into delay slots.
2. Support for MC based instruction printer added.
3. Support for MC based machine code generation and ELF
file generation. ELF file generation does not yet
completely work as much of the ELF support infrastructure
is still x86/x86-64 specific.
4. General clean up of the MBlaze backend code. Much of the
tablegen code has been cleanup and simplified.
Bug Fixes:
1. Removed duplicate periods from subtarget feature descriptions.
2. Many of the instructions had bad machine code information
in the tablegen files. Much of this has been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116986 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:09:55 +00:00
Michael J. Spencer
e9c253e0bc
X86: Add alloca probing to dynamic alloca on Windows. Fixes PR8424.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 01:41:01 +00:00
Evan Cheng
d6865de2d2
Add missing scheduling itineraries for transfers between core registers and VFP registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116983 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 01:12:00 +00:00
Owen Anderson
d7795540d0
Implement correct encodings for NEON vadd, both integer and floating point.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 00:48:00 +00:00
Michael J. Spencer
dd0a00a6e3
CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
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This should be the minimum set of functions that could possibly need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 00:08:21 +00:00
Eric Christopher
2d8f6fe610
Custom lower f64 args passed in integer registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 00:01:47 +00:00
Michael J. Spencer
6e56b18e57
Fix Whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116972 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 23:40:27 +00:00
Bill Wendling
01aabdac44
Add encoding for moving a value between two ARM core registers and a doublework
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extension register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116970 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 23:37:40 +00:00
Jakob Stoklund Olesen
f1583ae84a
Remember to keep track of rematted values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:50:42 +00:00
Bill Wendling
7d31a169af
Add encodings for movement between ARM core registers and single-precision
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registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116961 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:44:54 +00:00
Dan Gohman
adb30d211b
Memdep says that an instruction clobbers itself
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when it means there is no specific clobber instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116960 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:37:41 +00:00
Owen Anderson
75f6df283f
Attempt to fix valgrind complaining about (benign) leaks in pass registration by having PassRegistry
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delete PassInfo objects that were created using new-style initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116959 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:22:30 +00:00
Dan Gohman
ba13864483
Factor out the main aliasing check into a separate function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116958 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:11:14 +00:00
Evan Cheng
134982daa9
More accurate estimate / tracking of register pressure.
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- Initial register pressure in the loop should be all the live defs into the
loop. Not just those from loop preheader which is often empty.
- When an instruction is hoisted, update register pressure from loop preheader
to the original BB.
- Treat only use of a virtual register as kill since the code is still SSA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116956 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:03:58 +00:00
Dale Johannesen
e4d31593c5
Fix crash introduced in 116852. 8573915.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:03:37 +00:00
Dan Gohman
0b62f95ea8
Fix comments; the type graph is currently a tree, not a DAG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116954 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:02:58 +00:00
Jakob Stoklund Olesen
080c316ff8
Move some of the InlineSpiller rematerialization code into LiveRangeEdit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:00:51 +00:00
Dale Johannesen
e93d99cf07
Remove Synthesizable from the Type system; as MMX vector
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types are no longer Legal on X86, we don't need it.
No functional change. 8499854.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 21:32:10 +00:00
Jakob Stoklund Olesen
9b25940474
When SimpleRegisterCoalescing is trimming kill flags on a physical register
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operand, also check if subregisters are killed.
Add <imp-def> operands for subregisters that remain alive after a super register
is killed.
I don't have a testcase for this that reproduces on trunk. <rdar://problem/8441758>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116940 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 18:45:55 +00:00
Rafael Espindola
64e6719ee8
Handle _GLOBAL_OFFSET_TABLE_ correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 16:46:08 +00:00
Michael J. Spencer
9f608b1919
Use C++03...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116927 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 16:00:45 +00:00
Michael J. Spencer
a9cf7b8443
System-Win32/Path: Fix incorrect assumption in isValid.
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A recent commit to clang exposed a bug in the Win32 Path code. This is a
minimal fix for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116925 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 15:23:58 +00:00
Chandler Carruth
1cd9708f5c
Remove remaining uses of ATTRIBUTE_UNUSED on variables, and delete three
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#includes in the process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 08:27:02 +00:00
Eric Christopher
3659ac22c0
Fix a TODO by removing some unnecesary copies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 08:02:24 +00:00