Chris Lattner
6df1154644
fix a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26941 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 04:18:34 +00:00
Evan Cheng
b9df0ca67b
Some splat and shuffle support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26940 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 02:53:00 +00:00
Evan Cheng
a9f2a717e9
Add a couple more pseudo instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26939 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 02:52:03 +00:00
Evan Cheng
4a7da36546
Didn't mean to check this in. No MMX support yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26933 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 23:04:23 +00:00
Evan Cheng
48090aa814
- Use movaps to store 128-bit vector integers.
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- Each scalar to vector v8i16 and v16i8 is a any_extend followed by a movd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 23:01:21 +00:00
Chris Lattner
9b3bd467d0
These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 20:51:05 +00:00
Evan Cheng
7ab54047e7
Combine 2 entries
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26921 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 07:18:26 +00:00
Evan Cheng
50a6d8c835
Add a note about x86 register coallescing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26920 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 07:12:57 +00:00
Evan Cheng
82521dd838
- Remove scalar to vector pseudo ops. They are just wrong.
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- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS
and MOVAPD. Mark them as move instructions and *hope* they will be deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 07:09:35 +00:00
Evan Cheng
811ec1c92a
x86 ISD::SCALAR_TO_VECTOR support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 00:33:35 +00:00
Evan Cheng
5c791c8ba4
Junk unused vector register classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 00:30:59 +00:00
Chris Lattner
39afef3150
Add a build_vector node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20 06:18:01 +00:00
Evan Cheng
ba753c61b7
Move a few things around.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26893 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20 06:04:52 +00:00
Chris Lattner
8bcf926277
add a note with a testcase
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26877 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-19 22:27:41 +00:00
Evan Cheng
c12e6c488e
Vector undef's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26870 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-19 09:38:54 +00:00
Evan Cheng
5fef51e9aa
Turning on LSR by default
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26861 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-19 06:08:49 +00:00
Evan Cheng
0def9c3d7d
Remember which tests are hurt by LSR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26860 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-19 06:08:11 +00:00
Chris Lattner
a064d28843
rename these nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26848 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-19 01:13:28 +00:00
Evan Cheng
2246f8449f
Use the generic vector register classes VR64 / VR128 rather than V4F32,
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V8I16, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26838 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-18 01:23:20 +00:00
Evan Cheng
df57fa0c7d
Darwin should use _setjmp/_longjmp instead of setjmp/longjmp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26833 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 20:31:41 +00:00
Evan Cheng
06a8aa14b3
Move some pattern fragments to the right files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26831 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 19:55:52 +00:00
Chris Lattner
89fad2c3b2
Disable x86 fastcc from passing args in registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 17:27:47 +00:00
Chris Lattner
1c636e9d98
Parameterize the number of integer arguments to pass in registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26818 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 05:10:20 +00:00
Evan Cheng
8586b953a0
Also fold MOV8r0, MOV16r0, MOV32r0 + store to MOV8mi, MOV16mi, and MOV32mi.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26817 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 02:36:22 +00:00
Evan Cheng
5bd4d48c24
Add some missing entries to X86RegisterInfo::foldMemoryOperand(). e.g.
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ADD32ri8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26816 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 02:25:01 +00:00
Evan Cheng
7f31ad39fb
- Nuke 16-bit SBB instructions. We'll never use them.
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- Nuke a bogus comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26815 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 02:24:04 +00:00
Nate Begeman
81e8097377
Remove BRTWOWAY*
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Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26814 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 01:40:33 +00:00
Evan Cheng
2771d21c50
A new entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26810 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 22:44:22 +00:00
Evan Cheng
2221de9cc1
Bug fix: condition inverted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26804 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 22:02:48 +00:00
Evan Cheng
714554d707
Added a way for TargetLowering to specify what values can be used as the
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scale component of the target addressing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26802 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 21:47:42 +00:00
Evan Cheng
c4c6257c1a
Added getTargetLowering() to TargetMachine. Refactored targets to support this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26742 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13 23:20:37 +00:00
Evan Cheng
30b37b5f29
Add LSR hooks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26740 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13 23:18:16 +00:00
Evan Cheng
627fb57e19
Add option -enable-x86-lsr to enable x86 loop strength reduction pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26665 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-09 21:51:28 +00:00
Chris Lattner
181b9c6a2a
a couple of miscellaneous things.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26625 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-09 01:39:46 +00:00
Evan Cheng
9925642ec5
X86ISD::REP_STOS and X86ISD::REP_MOVS now produces a flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26604 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07 23:34:23 +00:00
Evan Cheng
ff909926e2
Use rep/stosl; and Count 0x3; rep/stosb for memset with 4 byte aligned dest.
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and variable value.
Similarly for memcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26603 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07 23:29:39 +00:00
Jim Laskey
7809811e4e
Use "llvm.metadata" section for debug globals. Filter out these globals in the
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asm printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26599 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07 22:00:35 +00:00
Evan Cheng
d594881a28
- Emit subsections_via_symbols for Darwin.
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- Conditionalize Dwarf debugging output (Darwin only for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26582 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07 02:23:26 +00:00
Evan Cheng
3c992d291b
Enable Dwarf debugging info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26581 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07 02:02:57 +00:00
Chris Lattner
9601a86a64
Copysign needs to be expanded everywhere. Note that Alpha and IA64 should
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implement copysign as a native op if they have it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26541 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-05 05:08:37 +00:00
Chris Lattner
a4929df2da
add a note for something evan noticed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26539 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-05 01:15:18 +00:00
Evan Cheng
f42f516984
Add an entry
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26520 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-04 07:49:50 +00:00
Evan Cheng
62bec2ca4c
MEMSET / MEMCPY lowering bugs: we can't issue a single WORD / DWORD version of
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rep/stos and rep/mov if the count is not a constant. We could do
rep/stosl; and $count, 3; rep/stosb
For now, I will lower them to memset / memcpy calls. We will revisit this after
a little bit experiment.
Also need to take care of the trailing bytes even if the count is a constant.
Since the max. number of trailing bytes are 3, we will simply issue loads /
stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26517 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-04 02:48:56 +00:00
Evan Cheng
8df346b4e8
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26512 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-04 01:12:00 +00:00
Chris Lattner
41edaa0529
remove the read/write port/io intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26479 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03 00:19:58 +00:00
Evan Cheng
d30bf01e90
Vector op lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26438 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01 01:11:20 +00:00
Evan Cheng
aafc1412b1
Another entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26430 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-28 23:38:49 +00:00
Evan Cheng
8c03fe4aca
Don't match x << 1 to LEAL. It's better to emit x + x.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26429 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-28 21:13:57 +00:00
Evan Cheng
140a4c4868
ConstantPoolIndex is now the displacement portion of the address (rather
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than base).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26382 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 09:12:34 +00:00
Evan Cheng
a09bd8190c
Fixed ConstantPoolIndex operand asm print bug. This fixed 2005-07-17-INT-To-FP
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and 2005-05-12-Int64ToFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 08:28:12 +00:00
Evan Cheng
51a9ed9b41
* Cleaned up addressing mode matching code.
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* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
they need to be matched before LEA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26376 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 10:09:08 +00:00
Evan Cheng
53f280a30e
Updates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26375 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 10:04:07 +00:00
Evan Cheng
71fb834b50
* Allow mul, shl nodes to be codegen'd as LEA (if appropriate).
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* Add patterns to handle GlobalAddress, ConstantPool, etc.
MOV32ri to materialize these nodes in registers.
ADD32ri to handle %reg + GA, etc.
MOV32mi to handle store GA, etc. to memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 10:02:21 +00:00
Evan Cheng
c4ee50c6b9
ConstantPoolIndex is now the displacement field of addressing mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26373 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 09:56:50 +00:00
Evan Cheng
bbbb2fbbde
Added a common about the need for X86ISD::Wrapper.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26372 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 09:55:19 +00:00
Evan Cheng
404cb4f9fa
Added an offset field to ConstantPoolSDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26371 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 09:54:52 +00:00
Evan Cheng
cb4a38e75d
Fix an obvious bug exposed when we are doing
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ADD X, 4
==>
MOV32ri $X+4, ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26366 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 01:37:02 +00:00
Evan Cheng
020d2e8e7a
- Clean up the lowering and selection code of ConstantPool, GlobalAddress,
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and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
mentioned leaf nodes. Do not mutate and nodes and do not record the
selection in CodeGenMap. These nodes should be safe to duplicate. This is
a performance win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26335 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 20:41:18 +00:00
Chris Lattner
e650a6b3f4
"." isn't enough to get a private label on linux, use ".L".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26327 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 05:25:02 +00:00
Chris Lattner
205065ae0c
add a small and simple case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26326 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 05:17:43 +00:00
Evan Cheng
3032410f9b
A couple of new entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26325 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 02:50:21 +00:00
Evan Cheng
a0ea0539e3
PIC related bug fixes.
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1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26324 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 02:43:52 +00:00
Evan Cheng
224ec39cab
X86 codegen tweak to use lea in another case:
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Suppose base == %eax and it has multiple uses, then instead of
movl %eax, %ecx
addl $8, %ecx
use
leal 8(%eax), %ecx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26323 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 00:13:58 +00:00
Evan Cheng
f1616dadad
Missing .globl for weak / link-once .text symbols.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26321 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 23:59:57 +00:00
Evan Cheng
4c1aa86657
- Added option -relocation-model to set relocation model. Valid values include static, pic,
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dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26315 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 20:19:42 +00:00
Evan Cheng
470a6adc78
Added MMX, SSE1, and SSE2 vector instructions and some simple patterns.
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Fixed some existing bugs (wrong predicates, prefixes) at the same time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 02:26:30 +00:00
Chris Lattner
1efa40f6a4
split register class handling from explicit physreg handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 00:56:39 +00:00
Chris Lattner
4217ca8dc1
Updates to match change of getRegForInlineAsmConstraint prototype
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 23:11:00 +00:00
Evan Cheng
4e4c71e423
One more round of reorg so sabre doesn't freak out. :-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26303 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 20:00:20 +00:00
Evan Cheng
beb07e117d
A big more cleaning up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26302 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 19:30:30 +00:00
Evan Cheng
bf156d1ae6
Moving things to their proper places.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26301 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 19:26:52 +00:00
Evan Cheng
ffcb95beab
Split instruction info into multiple files, one for each of x87, MMX, and SSE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26300 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 19:13:53 +00:00
Evan Cheng
747a90d887
Added separate alias instructions for SSE logical ops that operate on non-packed types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26297 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 02:24:38 +00:00
Evan Cheng
7dbc0a3351
Added MMX and XMM packed integer move instructions, movd and movq.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26296 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 01:39:57 +00:00
Evan Cheng
933be3318b
Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64.
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Added generic vector types: VR64 and VR128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26295 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 01:38:21 +00:00
Evan Cheng
aea20f50e5
Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit
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packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26294 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-20 22:34:53 +00:00
Evan Cheng
755ee8f9aa
Some updates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26292 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-20 19:58:27 +00:00
Evan Cheng
45af8fd8c2
If SSE3 is available, promote FP_TO_UINT i32 to FP_TO_SINT i64 to take
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advantage of fisttpll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26288 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 07:26:17 +00:00
Evan Cheng
2b15271571
Added fisttp for fp to int conversion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26283 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 02:36:28 +00:00
Evan Cheng
6428302f3d
Disable PIC for JIT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26281 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 01:49:25 +00:00
Evan Cheng
5e8b5558f7
Jit does not support PIC yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26278 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 00:57:10 +00:00
Evan Cheng
7ccced634a
x86 / Darwin PIC support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26273 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 00:15:05 +00:00
Chris Lattner
c2fe97e726
unbreak the build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26260 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 07:09:27 +00:00
Evan Cheng
5298bcc722
Unbreak x86 be
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26259 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 07:01:52 +00:00
Nate Begeman
551bf3f800
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
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and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 05:43:56 +00:00
Chris Lattner
a648df2871
add note about div by power of 2
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26253 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 04:20:13 +00:00
Evan Cheng
7634ac4a9b
Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers"
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issue. Need to do more experiments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26247 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 00:04:28 +00:00
Nate Begeman
4c5dcf54ff
Kill the x86 pattern isel. boom.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26246 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 00:03:04 +00:00
Evan Cheng
dc8acb6420
Remove the entry about using movapd for SSE reg-reg moves.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26245 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 00:00:58 +00:00
Evan Cheng
39d1761c70
pxor (for FLD0SS) encoding was missing the OpSize prefix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 23:59:30 +00:00
Evan Cheng
fe5cb19405
1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This
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proves to be worth 20% on Ptrdist/ks. Might be related to dependency
breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
spill / restore FsMOVAPSrr and FsMOVAPDrr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26241 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 22:45:17 +00:00
Evan Cheng
19ade3bf9c
Use movaps / movapd to spill / restore V4F4 / V2F8 registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26240 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 21:20:26 +00:00
Nate Begeman
368e18d56a
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
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and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 21:11:51 +00:00
Evan Cheng
77dea9b3c3
MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26234 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 19:34:41 +00:00
Evan Cheng
d51425a82d
Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg
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transfer.
According to the Intel P4 Optimization Manual:
Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.
Not to mention movaps is shorter than movss.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26226 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 01:50:02 +00:00
Evan Cheng
18a8452f3d
A bit more memset / memcpy optimization.
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Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26224 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 00:21:07 +00:00
Evan Cheng
2354f5a46b
Remove an entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26197 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 01:56:48 +00:00
Evan Cheng
17ef92eda7
Use .zerofill on x86/darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26196 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 01:56:23 +00:00
Evan Cheng
f3f0a9c587
cvtsd2ss / cvtss2sd encoding bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26193 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 00:31:03 +00:00
Evan Cheng
7335f9beea
movaps, movapd encoding bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26192 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 00:11:37 +00:00
Chris Lattner
ae302ab9cb
new note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26186 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 22:19:54 +00:00
Evan Cheng
ee50a1ae27
Don't special case XS, XD prefixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26183 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 21:52:51 +00:00
Evan Cheng
576c141921
Bug fix: XS, XD prefixes were being emitted twice.
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XMM registers were not being handled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26182 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 21:45:24 +00:00
Evan Cheng
ddf7532442
Duh
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26180 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 20:37:37 +00:00
Evan Cheng
968c178172
Remove -disable-x86-sse
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26179 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 20:30:14 +00:00
Evan Cheng
a03a5dc7ce
Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:38:30 +00:00
Evan Cheng
952b7d6a1e
Add a entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26173 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:25:32 +00:00
Evan Cheng
87ed716d21
Set maxStoresPerMemSet to 16. Ditto for maxStoresPerMemCpy and
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maxStoresPerMemMove. Although the last one is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26172 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:25:08 +00:00
Evan Cheng
82eaf628b4
Enable SSE (for the right subtargets)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26169 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:07:58 +00:00
Chris Lattner
94dd29216c
Switch targets over to using SelectionDAG::getCALLSEQ_START to create
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CALLSEQ_START nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26143 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-13 09:00:43 +00:00
Evan Cheng
2486af1b53
Prevent certain nodes that have already been selected from being folded into
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X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that is at the root of the addressing
mode expression tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26117 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-11 02:05:36 +00:00
Evan Cheng
23addc061c
Nicer code. :-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26111 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 22:46:26 +00:00
Evan Cheng
f597dc78f8
Added X86 isel debugging stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26110 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 22:24:32 +00:00
Evan Cheng
c57e5c17bc
Remove a completed entry; add a new entry about fisttp op
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 05:48:15 +00:00
Evan Cheng
7d82d607c5
Match tblgen change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 22:12:53 +00:00
Evan Cheng
7e9b26fc73
Match getTargetNode() changes (now return SDNode* instead of SDOperand).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26085 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 07:17:49 +00:00
Chris Lattner
23c574a841
provide an explicit alignment for cp entries
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26069 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 02:15:30 +00:00
Evan Cheng
34167215a8
Change Select() from
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SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26067 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 00:37:58 +00:00
Chris Lattner
418caa1356
Darwin doesn't support #APP/#NO_APP
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26066 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-08 23:42:22 +00:00
Chris Lattner
dba382b16a
add a simple optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26062 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-08 17:47:22 +00:00
Chris Lattner
cb298907ab
more email -> README moving
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26054 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-08 07:12:07 +00:00
Chris Lattner
8f77b73430
Add some random notes, not high-prio
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26052 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-08 06:52:06 +00:00
Evan Cheng
5ada370f42
Fixed a local common symbol bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26044 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-07 23:32:58 +00:00
Evan Cheng
315421e77c
For ELF, .comm takes alignment value as the optional 3rd argument. It must be
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specified in bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26043 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-07 21:54:08 +00:00
Evan Cheng
2338c5cb0e
Darwin ABI issues: weak, linkonce, etc. dynamic-no-pic support is complete.
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Also fixed a function stub bug. Added weak and linkonce support for
x86 Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26038 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-07 08:38:37 +00:00
Evan Cheng
183fff997c
Remind myself to add PIC and static asm printer support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26037 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-07 08:35:44 +00:00
Chris Lattner
a3b8c57b9e
Eliminate the printCallOperand method, using a 'call' modifier on
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printOperand instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26025 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-06 23:41:19 +00:00
Evan Cheng
5e35168b11
- Update load folding checks to match those auto-generated by tblgen.
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- Manually select SDOperand's returned by TryFoldLoad which make up the
load address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26012 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-06 06:02:33 +00:00
Evan Cheng
ba2f0a9ee5
Use SelectRoot() as entry of any tblgen based isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25997 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05 06:46:41 +00:00
Evan Cheng
7dd281b3e5
Re-commit the last bit of change that was backed out.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25983 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05 05:25:07 +00:00
Chris Lattner
ff805b50f8
Use getPreferredAlignmentLog.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05 01:45:04 +00:00
Chris Lattner
b46ef67679
Temporarily revert this patch, which probably breaks with the
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tblgen patch reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25971 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 09:24:16 +00:00
Evan Cheng
9c4815a036
Complex pattern's custom matcher should not call Select() on any operands.
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Select them afterwards if it returns true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25968 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 08:50:49 +00:00
Evan Cheng
72f514cf39
Remove an unnecessary predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25954 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 02:23:01 +00:00
Evan Cheng
e3de85b447
Separate FILD and FILD_FLAG, the later is only used for SSE2. It produces a
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flag so it can be flagged to a FST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25953 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 02:20:30 +00:00
Chris Lattner
4efab056e1
remove an old comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25940 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 18:59:39 +00:00
Chris Lattner
299f9bab47
Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is now
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obsolete. yaay :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25939 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 18:54:24 +00:00
Chris Lattner
d77525da5e
When rewriting frame instructions, emit the appropriate small-immediate
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instruction when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25938 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 18:20:04 +00:00
Chris Lattner
33c1dab0bd
remove some target-indep and implemented notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 06:22:11 +00:00
Chris Lattner
018c02dd11
the X86 backend no longer needs to delete its own noop copies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25923 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 02:59:58 +00:00
Chris Lattner
1c07e7286d
fix operand numbers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25915 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 20:38:12 +00:00
Chris Lattner
4083960147
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 20:12:32 +00:00
Chris Lattner
9c8dd970f7
implement isStoreToStackSlot
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 20:00:41 +00:00
Chris Lattner
1d6ecd03ea
add a method
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 19:57:16 +00:00
Chris Lattner
d395d0984f
more notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25908 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 19:43:28 +00:00
Chris Lattner
9acddcd07e
add a note, I have no idea how important this is.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25907 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 19:16:34 +00:00
Chris Lattner
1bac941019
implemented, testcase here: test/Regression/CodeGen/X86/compare-add.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25899 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 06:36:48 +00:00
Evan Cheng
8b6e4e6e3e
Update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25896 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 02:40:17 +00:00
Evan Cheng
d25e9e8294
Fix a erroneous comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25894 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 00:28:23 +00:00
Chris Lattner
4d7db40ab1
more notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25890 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 23:38:08 +00:00
Evan Cheng
bda54cdd47
Tell codegen MOVAPSrr and MOVAPDrr are copies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25889 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 23:03:16 +00:00
Evan Cheng
b1b4e86a02
Added SSE entries to foldMemoryOperand().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25888 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 23:02:25 +00:00
Evan Cheng
78376d59ab
Rearrange code to my liking. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25887 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 23:01:57 +00:00
Chris Lattner
3e2b94a171
another note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25883 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 21:44:48 +00:00
Nate Begeman
750ac1bdfa
Fix some of the stuff in the PPC README file, and clean up legalization
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of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25875 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 07:19:44 +00:00
Chris Lattner
1f7c6302be
add a note, I'll take care of this after nate commits his big patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25873 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 06:40:32 +00:00
Evan Cheng
3c55c54a87
- Use xor to clear integer registers (set R, 0).
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- Added a new format for instructions where the source register is implied
and it is same as the destination register. Used for pseudo instructions
that clear the destination register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25872 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 06:13:50 +00:00
Evan Cheng
214a79423f
Remove another entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25871 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 06:08:48 +00:00
Chris Lattner
3e1d5e5ea3
Another regression from the pattern isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25867 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 01:44:25 +00:00
Evan Cheng
760df29881
Return's chain should be matching either the chain produced by the
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value or the chain going into the load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25863 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 01:19:32 +00:00
Evan Cheng
0d084c9e4a
When folding a load into a return of SSE value, check the chain to
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ensure the memory location has not been clobbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25861 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 00:20:21 +00:00
Evan Cheng
4ccf4c0d0b
Remove an item. It's done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25860 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 00:15:53 +00:00
Evan Cheng
0e8671bf4a
Be smarter about whether to store the SSE return value in memory. If
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it is already available in memory, do a fld directly from there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25859 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 23:19:54 +00:00
Chris Lattner
bb1d528aa6
turning these into 'adds' would require extra copies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25858 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:59:46 +00:00
Evan Cheng
223547ab31
- Allow XMM load (for scalar use) to be folded into ANDP* and XORP*.
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- Use XORP* to implement fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25857 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:28:30 +00:00
Evan Cheng
598463fde4
Remove entries on fabs and fneg. These are done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25856 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:26:21 +00:00
Chris Lattner
259e97cc72
* Fix 80-column violations
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* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 19:43:35 +00:00
Evan Cheng
ef6ffb17c7
Added custom lowering of fabs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25831 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 03:14:29 +00:00
Chris Lattner
8e38ae60c7
Another high-prio selection performance bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25828 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 02:10:06 +00:00
Chris Lattner
594086d494
more mumbling
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25826 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 00:45:37 +00:00
Chris Lattner
bdde465bcf
add some notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25825 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 00:20:38 +00:00
Evan Cheng
6dfa999c01
Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip
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the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 23:41:35 +00:00
Evan Cheng
02568ff48d
i64 -> f32, f32 -> i64 and some clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25818 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 22:13:22 +00:00
Evan Cheng
6dab05363f
Always use FP stack instructions to perform i64 to f64 as well as f64 to i64
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conversions. SSE does not have instructions to handle these tasks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25817 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 08:02:57 +00:00
Chris Lattner
c6fd6cd65c
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:09:27 +00:00
Chris Lattner
87c890a9c2
adjust prototype
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25798 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 03:49:07 +00:00
Chris Lattner
c7097afe51
add another note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25789 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:46:06 +00:00
Chris Lattner
5164a313e0
add some performance notes from looking at sgefa
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25788 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:42:20 +00:00
Chris Lattner
6a28456e18
add a high-priority SSE issue from sgefa
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25787 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:14:47 +00:00
Chris Lattner
b638cd89db
add a missed optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25786 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:08:15 +00:00
Reid Spencer
2ce5b263ba
Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a
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few stores under certain conditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25777 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:48:25 +00:00
Chris Lattner
0fc9c26e7d
remove now-dead code, the legalizer takes care of this for us
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25776 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:45:31 +00:00
Chris Lattner
44d9b9bb86
The FP stack doesn't support UNDEF, ask the legalizer to legalize it
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instead of lying and saying we have it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25775 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:44:22 +00:00
Chris Lattner
a54aa94197
Targets all now request ConstantFP to be legalized into TargetConstantFP.
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'fpimm' in .td files is now TargetConstantFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25771 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:26:08 +00:00
Jeff Cohen
b8643ac476
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25760 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 03:45:35 +00:00
Jeff Cohen
c4013d6772
Flesh out AMD family/models.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25755 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 20:30:18 +00:00
Jeff Cohen
216d281d0a
Correctly determine CPU vendor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25754 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 19:48:34 +00:00
Jeff Cohen
a349640b7f
Use union instead of reinterpret_cast.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:47:32 +00:00
Jeff Cohen
7617717496
Fix recognition of Intel CPUs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25750 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:38:20 +00:00
Chris Lattner
c2fad16155
Is64Bit reflects the capability of the chip, not an aspect of the target os
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25749 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:23:48 +00:00
Chris Lattner
dabbc98396
Fix a bunch of JIT failures with the new isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25748 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:19:37 +00:00
Jeff Cohen
41adb0d679
Improve X86 subtarget support for Windows and AMD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25747 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:09:06 +00:00
Chris Lattner
6b2469c1ad
silence a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25745 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 10:34:47 +00:00
Chris Lattner
1e39a15b42
make this work on non-native hosts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25734 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 06:05:41 +00:00
Evan Cheng
d41e9e5e7a
A bit of wisdom from Chris on the last entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25715 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:54:32 +00:00
Evan Cheng
85214ba3cc
AT&T assembly convention: registers are in lower case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:53:29 +00:00
Chris Lattner
104988a16a
initialize all instance vars
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25711 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:37:09 +00:00
Evan Cheng
e826a018b9
Added notes about a x86 isel deficiency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25706 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:11:01 +00:00
Evan Cheng
dbd38d7f64
Added a temporary option -enable-x86-sse to enable sse support. It is used by
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llc-beta.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25701 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:49:34 +00:00
Evan Cheng
8e44f0756f
Bye bye Pattern ISel, hello DAG ISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25700 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:26:54 +00:00
Nate Begeman
ee625573b5
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
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the same functionality. This addresses another piece of bug 680. Next,
on to fixing Alpha VAARG, which I broke last time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:09:22 +00:00
Evan Cheng
b3a7e21b7e
A better workaround
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25692 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 19:30:30 +00:00
Chris Lattner
9f96a32831
force sse/3dnow off until they work. This fixes all the x86 failures last night
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25690 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 18:30:50 +00:00
Chris Lattner
c2493c45a0
Unbreak the JIT with SSE
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25688 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 18:27:18 +00:00
Evan Cheng
559806f575
x86 CPU detection and proper subtarget support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25679 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 08:10:46 +00:00
Chris Lattner
cedc6f4b30
PHI and INLINEASM are now built-in instructions provided by Target.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25674 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 01:46:15 +00:00
Jeff Cohen
9471c8a93b
Improve compatibility with VC2005, patch by Morten Ofstad!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25661 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 20:41:32 +00:00
Chris Lattner
38f7373018
Improve compatibility with VC2005, patch by Morten Ofstad!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25653 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 19:55:20 +00:00
Evan Cheng
97c7fc351e
Added preliminary x86 subtarget support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25645 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 09:53:06 +00:00
Evan Cheng
67caa39e4c
Work around some x86 Darwin assembler bugs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25638 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 02:27:43 +00:00
Evan Cheng
9bba894596
When trying to fold X86::SETCC into a Select, make a copy if it has more than
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one use. This allows more CMOV instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25634 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 02:13:10 +00:00
Evan Cheng
71fb9ad5d9
Remove the uses of STATUS flag register. Rely on node property SDNPInFlag,
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SDNPOutFlag, and SDNPOptInFlag instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25629 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 00:29:36 +00:00
Nate Begeman
acc398c195
First part of bug 680:
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Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 18:21:52 +00:00
Evan Cheng
0b2afbd58a
X86 prefer scheduling for reduced register pressure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25602 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 09:15:17 +00:00
Evan Cheng
0d718e9afc
Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25596 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 09:05:09 +00:00
Chris Lattner
31e63881b3
Loosen up these checks to allow direct uses of ESP
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25595 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 08:00:36 +00:00
Chris Lattner
91cacc810b
use ESP directly, not a copy of ESP into some other register for fastcc calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25584 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-24 06:14:44 +00:00
Chris Lattner
af63bb03c5
Emit the copies out of call return registers *after* the ISD::CALLSEQ_END
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node, fixing fastcc and the case where a function has a frame pointer due
to dynamic allocas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25580 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-24 05:17:12 +00:00
Chris Lattner
6da23db69f
Allow jit-beta to work
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25578 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-24 04:50:48 +00:00
Chris Lattner
2c2c6c61f1
Add explicit #includes of <iostream>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-22 23:41:00 +00:00
Evan Cheng
86556a5f42
Rename fcmovae to fcmovnb and fcmova to fcmovnbe (following Intel manual).
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Some assemblers can't recognize the aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25494 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-21 02:55:41 +00:00
Chris Lattner
1f16ff6f0a
LowerReturn now doesn't have to handle f32 returns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25484 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-20 18:41:25 +00:00
Evan Cheng
98f5dab8a7
Stop doing that accidental commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25474 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-20 01:14:05 +00:00
Evan Cheng
21d5443934
A few more SH{L|R}D peepholes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25473 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-20 01:13:30 +00:00
Evan Cheng
cce47faf52
Didn't mean to commit the last one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25469 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 23:27:08 +00:00
Evan Cheng
956044cf03
Added i16 SH{L|R}D patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25468 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 23:26:24 +00:00
Evan Cheng
dc8d2ab3e9
Avoid generating a redundant setcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25457 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 08:52:46 +00:00
Evan Cheng
41b6dc8dbe
adc and sbb need an incoming flag to ensure it reads the carry flag
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from add / sub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25444 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 06:53:20 +00:00
Evan Cheng
68b951a5e5
Two peepholes:
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(or (x >> c) | (y << (32 - c))) ==> (shrd x, y, c)
(or (x << c) | (y >> (32 - c))) ==> (shld x, y, c)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25438 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 01:56:29 +00:00
Evan Cheng
d9c45e9af9
Didn't mean to check that in.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25436 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 01:52:56 +00:00
Evan Cheng
b7b5706340
A obvious typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25435 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 01:46:14 +00:00
Evan Cheng
99fa0a102a
SRA shift amount must be in i8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25416 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-18 09:26:46 +00:00
Evan Cheng
68e5d084f1
If a call return type is i1, insert a truncate from X86::AL to i1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25415 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-18 08:08:38 +00:00
Evan Cheng
357c58efde
Fix lowering of calls which return f32 values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25413 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-17 21:58:21 +00:00
Evan Cheng
e5d9343377
Zero extending load from i1 to i8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25391 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-17 07:02:46 +00:00
Evan Cheng
6892f28e99
SSE does not support i64 SINT_TO_FP (FP stack doesn't either, but we custom
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expand it), so ask legalizer to expand i32 UINT_TO_FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25386 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-17 02:32:49 +00:00
Evan Cheng
2059f884aa
Added a FIXME comment about why FST is currently flagged to fpGETRESULT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25381 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-17 00:37:42 +00:00
Evan Cheng
42ef0bc6fb
Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should
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read a flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25378 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-17 00:19:47 +00:00
Evan Cheng
b5d0b0bae5
More typo's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25375 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-16 23:26:53 +00:00
Evan Cheng
8a3f4c75fa
Some typo's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-16 22:48:46 +00:00
Evan Cheng
0cc3945efe
Fix FP_TO_INT**_IN_MEM lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25368 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-16 21:21:29 +00:00
Chris Lattner
1db4b4f5c4
transfer some notes from my email to somewhere useful.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25361 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-16 17:53:00 +00:00
Evan Cheng
cf74a7c762
Added patterns for 8-bit multiply
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25338 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-15 10:05:20 +00:00
Chris Lattner
e112552b5a
Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25333 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-15 09:00:21 +00:00
Chris Lattner
b47fad9892
silence a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25322 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-14 20:11:13 +00:00
Nate Begeman
d88fc03602
bswap implementation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25312 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-14 03:14:10 +00:00
Evan Cheng
e3703d44e9
A typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25307 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-14 01:18:49 +00:00
Evan Cheng
b8414333ac
Add truncstore i1 patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25296 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 21:45:19 +00:00
Chris Lattner
052d2ff5dd
Fix a bug in my last X86 checkin, pointed out by cozmic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25293 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 20:19:44 +00:00
Evan Cheng
e90da97f3e
LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be
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flipped around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25290 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 19:51:46 +00:00
Chris Lattner
9edba7605e
Enable X86 support for savestack/restorestack
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25278 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 18:00:54 +00:00
Chris Lattner
b99329e8a0
expand unsupported stacksave/stackrestore nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25272 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 02:42:53 +00:00
Evan Cheng
e08c270623
Minor update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25263 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 01:20:42 +00:00
Evan Cheng
80ebe38118
More typo's. I need new eye glasses...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25261 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 01:17:24 +00:00
Evan Cheng
189d01e8cc
Oops. Typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25260 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 01:06:49 +00:00
Evan Cheng
1bcee3602e
Fix a SETCC / BRCOND folding bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25259 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 01:03:02 +00:00
Evan Cheng
a3195e8643
Fix sint_to_fp (fild*) support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25257 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 22:54:21 +00:00
Evan Cheng
77e9043b84
Specify transformation from GlobalAddress to TargetGlobalAddress and
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ExternalSymbol to TargetExternalSymbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25253 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 19:36:31 +00:00
Evan Cheng
5ee4ccce5b
X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be
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linked together).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25247 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 08:27:59 +00:00
Evan Cheng
002fe9baf2
* Materialize GlobalAddress and ExternalSym with MOV32ri rather than
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LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25246 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 07:56:47 +00:00
Evan Cheng
eb422a7234
Added ROTL and ROTR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25232 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 23:20:05 +00:00
Evan Cheng
67f92a7649
Support for MEMCPY and MEMSET.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25226 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 22:15:48 +00:00
Evan Cheng
38262cad0a
Select DYNAMIC_STACKALLOC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25225 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 22:15:18 +00:00
Nate Begeman
35ef913ec2
Add bswap, rotl, and rotr nodes
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Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25222 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 21:21:00 +00:00
Evan Cheng
8700e14ba1
* Add special entry code main() (to set x87 to 64-bit precision).
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* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
call parmater passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25207 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 06:09:51 +00:00
Chris Lattner
92cb0af675
implement FP_REG_KILL insertion for the dag-dag instruction selector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25192 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 01:15:34 +00:00
Chris Lattner
a2b694ce35
Fit into 80 cols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25191 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 00:46:55 +00:00
Evan Cheng
4a46080fe0
SSE cmov support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25190 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 00:33:36 +00:00
Evan Cheng
f710062bfb
* fp to sint patterns.
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* fiadd, fisub, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25189 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-10 22:22:02 +00:00
Evan Cheng
aaca22ca91
FP_TO_INT*_IN_MEM and x87 FP Select support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25188 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-10 20:26:56 +00:00
Evan Cheng
510e478098
* Added undef patterns.
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* Some reorg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25163 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 23:10:28 +00:00
Evan Cheng
910cd3cfa2
More typos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25162 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 22:29:54 +00:00
Evan Cheng
82a24b9813
typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25160 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 20:49:21 +00:00
Evan Cheng
e3413160ca
Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25158 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 18:33:28 +00:00
Evan Cheng
948f343a2f
* Added integer div / rem.
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* Fixed a load folding bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25136 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 23:19:29 +00:00
Evan Cheng
0114e94903
ISEL code for MULHU, MULHS, and UNDEF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25132 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 20:36:21 +00:00
Chris Lattner
cb83374bd9
silence a bogus gcc warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25129 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 17:56:38 +00:00
Evan Cheng
cfa260b2ab
Addd (shl x, 1) ==> (shl x, x) peepholes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25123 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 02:31:59 +00:00
Evan Cheng
da95a84a11
fold (shl x, 1) -> (add x, x)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25120 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 01:06:31 +00:00
Evan Cheng
d9558e0ba6
* Fast call support.
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* FP cmp, setcc, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25117 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 00:43:03 +00:00
Evan Cheng
650d688db6
Added ConstantFP patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25108 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 02:08:37 +00:00
Jim Laskey
e0bce71c42
Had expand logic backward.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 01:47:43 +00:00
Jim Laskey
abf6d1784b
Added initial support for DEBUG_LABEL allowing debug specific labels to be
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inserted in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25104 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 01:25:28 +00:00
Evan Cheng
d90eb7fb24
DAG based isel call support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 00:27:02 +00:00
Chris Lattner
f31d193cce
Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25024 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-27 03:02:18 +00:00
Evan Cheng
2b4ea795a2
Added field noResults to Instruction.
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Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-26 09:11:45 +00:00
Evan Cheng
e4672aa5b4
Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25004 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-24 09:48:35 +00:00
Evan Cheng
171049d10f
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
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* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 22:14:32 +00:00
Evan Cheng
38bcbaf23e
More X86 floating point patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24990 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 07:31:11 +00:00
Chris Lattner
21f66859e4
make sure bit_convert's are expanded
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24979 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 05:15:23 +00:00
Evan Cheng
5bc4da4893
Bye bye HACKTROCITY.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24935 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-22 02:26:21 +00:00
Evan Cheng
3a03ebb377
* Fix a GlobalAddress lowering bug.
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* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 23:05:39 +00:00
Evan Cheng
793ca4caa4
Oops. Accidentally deleted RET pattern. It's still needed for return void;
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24920 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 22:22:16 +00:00
Jim Laskey
e81aecbae6
Disengage DEBUG_LOC from non-PPC targets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24919 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 20:51:37 +00:00
Evan Cheng
d5781fca4f
* Added support for X86 RET with an additional operand to specify number of
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bytes to pop off stack.
* Added support for X86 SETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24917 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 20:21:51 +00:00
Chris Lattner
c515ad18f8
This was meant to go in
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24900 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 07:50:26 +00:00
Chris Lattner
58fe459e36
Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns
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that were overloaded to work before and after the stackifier runs. With the
new clean world, it is possible to write patterns for these instructions: woo!
This also adds a few simple patterns here and there, though there are a lot
still missing. These should be easy to add though. :)
See the comments under "Floating Point Stack Support" for more details on
the new world order.
This patch as absolutely no effect on the generated code, woo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24899 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 07:47:04 +00:00
Chris Lattner
9fb2422c49
Wrap some long lines: no functionality change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24898 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 05:34:58 +00:00
Evan Cheng
8263c5e920
Remove ISD::RET select code. Now tblgen'd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24889 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 02:41:57 +00:00
Evan Cheng
b077b842b6
* Added lowering hook for external weak global address. It inserts a load
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for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
value (or store / fld / copy to ST(0) for floating point value). This
eliminate the need to write C++ code to handle RET with variable number
of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24888 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 02:39:21 +00:00