Evan Cheng
54de3ea1ca
Code refactoring.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92694 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 06:52:31 +00:00
David Greene
9759c305c2
Change errs() to dbgs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:29:36 +00:00
David Greene
f5c95a6ee2
Change errs() to dbgs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92654 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:29:34 +00:00
David Greene
5b90132332
Change errs() to dbgs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92653 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:29:29 +00:00
David Greene
92f164416b
Change errs() to dbgs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92651 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:29:23 +00:00
David Greene
bd7b8458d1
Change errs() to dbgs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92648 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:29:13 +00:00
David Greene
d7f4f24d3f
Change errs() to dbgs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92647 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:29:08 +00:00
David Greene
c719d5f621
Change errs() to dbgs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92644 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:28:53 +00:00
Dan Gohman
eeb3a00b84
Change SelectCode's argument from SDValue to SDNode *, to make it more
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clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:24:18 +00:00
Devang Patel
44a29e066a
Remove dead debug info intrinsics.
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Intrinsic::dbg_stoppoint
Intrinsic::dbg_region_start
Intrinsic::dbg_region_end
Intrinsic::dbg_func_start
AutoUpgrade simply ignores these intrinsics now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:10:40 +00:00
Dan Gohman
4361bbfd0e
Remove the SDNPAssociative properties for the flags-producing
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operators. Eli pointed out that it's not obvious what that
would mean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92555 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 00:44:20 +00:00
Evan Cheng
760d1945bc
Perform this folding as a target specific dag combine:
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(or (x << c) | (y >> (64 - c))) ==> (shld64 x, y, c)
The isel patterns may not catch all the cases if general dag combine has reduced width of source operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 21:22:48 +00:00
Dan Gohman
3c02c22ef9
Remove some README.txt entries which are now implemented.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92511 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 20:55:05 +00:00
Dan Gohman
3cc4a307a8
A use by operand 1 or 2 of a SELECT is not a FLAGS use. This
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lets the test-elimination work in more conditional-move cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92508 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 20:52:50 +00:00
Dan Gohman
9ef51c8011
Flags-producing add, and, or, etc. have the same profibility
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rules as normal add, and, or, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92507 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 20:51:50 +00:00
Dan Gohman
43ffe6769a
Add SDNPCommutative and SDNPAssociative to several X86 target nodes.
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This lets isel fold loads into them in more cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 20:51:05 +00:00
Anton Korobeynikov
39784e158a
Fix invalid chain folding for memory variant of sdiv / udiv
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 10:31:54 +00:00
Chris Lattner
e4412c1f0b
implement an instcombine xform needed by clang's codegen
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on the example in PR4216. This doesn't trigger in the testsuite,
so I'd really appreciate someone scrutinizing the logic for
correctness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 06:03:59 +00:00
Chris Lattner
f031e8ad01
Teach codegen to lower llvm.powi to an efficient (but not optimal)
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multiply sequence when the power is a constant integer. Before, our
codegen for std::pow(.., int) always turned into a libcall, which was
really inefficient.
This should also make many gfortran programs happier I'd imagine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92388 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-01 03:32:16 +00:00
Chris Lattner
398ffba75f
update this. To take the next step, llvm.powi should be generalized to work
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on integers as well and codegen should lower them to branch trees.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92382 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-01 01:29:26 +00:00
Benjamin Kramer
7f1a560b2f
Replace a few more SmallVectors with arrays.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92265 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-29 16:57:26 +00:00
Sanjiv Gupta
223497e1ef
Extern declaration for unordered.f32 libcall was not being emitted. Fixed that.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92242 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-29 03:24:34 +00:00
Chris Lattner
43469b6957
move debug info stuff out of line, allowing two #includes
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to go away from IRBuilder.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 21:45:40 +00:00
Benjamin Kramer
e55b15fa47
Add missing include (for inline PATypeHolder::get).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92222 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 12:27:56 +00:00
Sanjiv Gupta
917283a418
Fixed llc crash for zext (i1 -> i8) loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 04:53:24 +00:00
Sanjiv Gupta
8f17a36d31
Allow targets to specify the return type of libcalls that are generated for floating point comparisons, rather than hard-coding them as i32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92199 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 02:40:33 +00:00
Bill Wendling
202249a698
Mark variable used by 'assert' as 'unused'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92198 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 02:07:00 +00:00
Bill Wendling
57f08adbb3
Remove dead variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92197 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 02:05:36 +00:00
Bill Wendling
53df23cff4
Remove dead variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92196 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 02:04:53 +00:00
Bill Wendling
cc690b694a
Remove dead variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 02:01:06 +00:00
Bill Wendling
ab58f13839
Remove dead variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 02:00:30 +00:00
Bill Wendling
9bf50f45e7
Remove dead variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92193 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 01:57:39 +00:00
Bill Wendling
3ef10858de
Remove dead variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92186 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 01:42:12 +00:00
Bill Wendling
67f9dc2559
Remove dead variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92185 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 01:41:12 +00:00
Bill Wendling
c41b638d4a
Remove dead variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92184 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 01:36:02 +00:00
Bill Wendling
ce90c245ff
Remove dead store. The initial value was never used, but always overridden.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92182 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 01:31:11 +00:00
Bill Wendling
079b6f5ee5
Add an "ATTRIBUTE_UNUSED" macro (and use it). It's for variables which are
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mainly used in debugging and/or assert situations. It should make the compiler
and the static analyzer stop nagging us about them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92181 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 01:20:29 +00:00
Eli Friedman
ba7b1c4db4
PR5886: Make sure IMUL32m is marked as setting EFLAGS, so scheduling doesn't
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do illegal stuff around it. No testcase because the issue is very fragile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92167 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-26 20:08:30 +00:00
Jakob Stoklund Olesen
1dbc38f52e
Move kill flags when the same register occurs more than once in a sequence.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92058 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 21:34:03 +00:00
Jakob Stoklund Olesen
158a2263bd
Handle undef operands properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 21:28:42 +00:00
Jakob Stoklund Olesen
6528966eae
Make insert position available to MergeOpsUpdate.
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Rearrange arguments.
No functional changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 21:28:37 +00:00
Jakob Stoklund Olesen
3063aed8d2
Perform kill flag calculations in new method. No functional changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 21:28:31 +00:00
Jakob Stoklund Olesen
f8e33e513f
Move repeated code to a new method. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 21:28:23 +00:00
Sanjiv Gupta
76d2f9a4db
Reapply 91904.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 11:19:09 +00:00
Sanjiv Gupta
7fb0ead091
Added missing patterns for subtract instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91995 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 10:56:02 +00:00
Sanjiv Gupta
6d48855a56
Reverting back 91904.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91993 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 09:46:01 +00:00
Chris Lattner
ac105c4dca
really remove the instruction, don't just comment it out
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 01:46:40 +00:00
Chris Lattner
9e3238303c
completely eliminate the MOV16r0 'instruction'. The only
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interesting part of this is the divrem changes, which are
already tested by CodeGen/X86/divrem.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91975 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 01:45:04 +00:00
Sean Callanan
5227cc89f4
More fixes for Visual C++. Replaced several very small
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static inline functions with macros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 01:32:29 +00:00
Chris Lattner
6a38182471
stop pattern matching 16-bit zero's of a register to MOV16r0,
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instead use the appropriate subreggy thing. This generates identical
code on some large apps (thanks to Evan's cross class coalescing
stuff he did back in july). This means that MOV16r0 can go away
completely in the future soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 01:30:26 +00:00
Jakob Stoklund Olesen
24b34f8f3e
Add a SPR register class to the ARM target.
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Certain Thumb instructions require only SP (e.g. tSTRspi).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91944 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 23:54:44 +00:00
Sean Callanan
542eabcba6
Removed the "inline" keyword from the disassembler decoder,
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because the Visual C++ build does not build .c files as C99
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91935 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 22:51:40 +00:00
Sean Callanan
7fb35a2fd8
Fixes to the X86 disassembler:
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Made LEA memory operands emit only 4 MCInst operands.
Made the scale operand equal 1 for instructions that have no
SIB byte.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 21:12:55 +00:00
Jakob Stoklund Olesen
e9912dc553
Use proper move instructions. Make the verifier happy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91914 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 18:49:55 +00:00
Evan Cheng
b1f4981333
Remove target attribute break-sse-dep. Instead, do not fold load into sse partial update instructions unless optimizing for size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91910 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 17:47:23 +00:00
Douglas Gregor
3dac3b7d23
Include based on the current path, since we already -I the X86 target's path. Fixes CMake build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91908 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 17:25:11 +00:00
Sanjiv Gupta
66500208a5
While converting one of the operands to a memory operand, we need to check if it is Legal and does not result into a cyclic dep.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91904 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 14:25:37 +00:00
Bill Wendling
3ea3c24619
Add more plumbing. This time in the LowerArguments and "get" functions which
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return partial registers. This affected the back-end lowering code some.
Also patch up some places I missed before in the "get" functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 02:10:19 +00:00
Sean Callanan
06b766d1c0
Changed REG_* to MODRM_REG_* to avoid conflicts
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with symbols in AuroraUX's global namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91879 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 02:07:42 +00:00
Daniel Dunbar
baf2e35e18
Fix some may-be-uninitialized var warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91878 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 01:41:37 +00:00
Sean Callanan
0122c9051a
Fixed library dependencies between the X86 disassembler and
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X86 codegen that were causing circular symbol dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 01:11:26 +00:00
Chris Lattner
ffc0574a12
print pcrel immediates as signed values instead of unsigned so that we
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get things like this out of the disassembler:
0x100000ecb: callq -96
instead of:
0x100000ecb: callq 4294967200
rdar://7491123
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91864 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 00:44:05 +00:00
Anton Korobeynikov
7058f9c114
Mark FPW as allocable when frame address is taken.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91841 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21 20:18:49 +00:00
Evan Cheng
102ebf16b6
Delete the instruction just before the function terminates for consistency sake.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21 19:53:39 +00:00
Eric Christopher
f4f43cb501
Fix setting and default setting of code model for jit. Do this
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by allowing backends to override routines that will default
the JIT and Static code generation to an appropriate code model
for the architecture.
Should fix PR 5773.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91824 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21 08:15:29 +00:00
Eli Friedman
1f1b0f748d
A couple minor README updates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91823 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21 08:03:16 +00:00
Daniel Dunbar
d4f84dadda
Remove unused variable (noticed by clang++).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91780 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 18:58:49 +00:00
Daniel Dunbar
c814346c9d
#if 0 out X86 disassembler for now, it is breaking the build in multiple places.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 17:11:53 +00:00
Sanjiv Gupta
bcfd12a234
Emit direction operand in binary insns that stores in memory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91777 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 13:52:01 +00:00
Nuno Lopes
392bbd99b6
rename dprintf to dbgpritnf, in order to fix build with glibc (which already defines dprintf in stdio.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91775 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 12:07:00 +00:00
Sanjiv Gupta
08bd440bca
1. In indirect load/store insns , the name of fsr should be emitted as INDF.
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2. include standard asmbly headers in generated asmbly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 08:26:25 +00:00
Douglas Gregor
cabdd7425d
Fix a bunch of little errors that Clang complains about when its being pedantic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 07:05:23 +00:00
Daniel Dunbar
71f842d7c1
Use memset instead of bzero, its more portable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91754 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 03:31:50 +00:00
Sean Callanan
8ed9f51663
Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit
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incarnations), integrated into the MC framework.
The disassembler is table-driven, using a custom TableGen backend to
generate hierarchical tables optimized for fast decode. The disassembler
consumes MemoryObjects and produces arrays of MCInsts, adhering to the
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).
The disassembler is documented in detail in
- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)
You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets. Please let me know if you encounter any problems
with it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91749 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 02:59:52 +00:00
Anton Korobeynikov
e9ec6ad1ba
Bump alignment requirements for windows targets to achieve compartibility with vcpp.
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Based on patch by Michael Beck!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 02:04:23 +00:00
Bill Wendling
b4e6a5df5d
Changes from review:
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- Move DisableScheduling flag into TargetOption.h
- Move SDNodeOrdering into its own header file. Give it a minimal interface that
doesn't conflate construction with storage.
- Move assigning the ordering into the SelectionDAGBuilder.
This isn't used yet, so there should be no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 23:32:53 +00:00
Rafael Espindola
fda60d35c2
Fix libstdc++ build on ARM linux and part of PR5770.
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MI was not being used but it was also not being deleted, so it was kept in the garbage list. The memory itself was freed once the function code gen was done.
Once in a while the codegen of another function would create an instruction on the same address. Adding it to the garbage group would work once, but when another pointer was added it would cause an assert as "Cache" was about to be pushed to Ts.
For a patch that make us detect problems like this earlier, take a look at
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20091214/092758.html
With that patch we assert as soon and the new instruction is added to the garbage set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 16:59:39 +00:00
Tilmann Scheller
cfcb7997ad
Fix wrong frame pointer save offset in the 64-bit PowerPC SVR4 ABI.
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Patch contributed by Ken Werner of IBM!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91681 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 13:00:34 +00:00
Tilmann Scheller
3a84dae654
Add support for calls through function pointers in the 64-bit PowerPC SVR4 ABI.
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Patch contributed by Ken Werner of IBM!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91680 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 13:00:15 +00:00
Evan Cheng
400073d546
On recent Intel u-arch's, folding loads into some unary SSE instructions can
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be non-optimal. To be precise, we should avoid folding loads if the instructions
only update part of the destination register, and the non-updated part is not
needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks
the partial register dependency and it can improve performance. e.g.
movss (%rdi), %xmm0
cvtss2sd %xmm0, %xmm0
instead of
cvtss2sd (%rdi), %xmm0
An alternative method to break dependency is to clear the register first. e.g.
xorps %xmm0, %xmm0
cvtss2sd (%rdi), %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 07:40:29 +00:00
Eric Christopher
5e63990271
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91657 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 02:12:53 +00:00
Evan Cheng
c7928f8f4e
Re-apply 91623 now that I actually know what I was trying to do.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91655 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:59:21 +00:00
Bob Wilson
5afffaed5c
Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
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The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types. Radar 7457110.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:03:29 +00:00
John McCall
c226fe3c3e
Pass the error string directly to llvm_unreachable instead of the residual
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(0 && "error"). Rough consensus seems to be that g++ *should* be diagnosing
this because the pointer makes it not an ICE in c++03. Everyone agrees that
the current standard is silly and null-pointer-ness should not be based on
ICE-ness. Excellent fight scene in Act II, denouement weak, two stars.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91644 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 00:27:18 +00:00
Sean Callanan
108934c65d
Instruction fixes, added instructions, and AsmString changes in the
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X86 instruction tables.
Also (while I was at it) cleaned up the X86 tables, removing tabs and
80-line violations.
This patch was reviewed by Chris Lattner, but please let me know if
there are any problems.
* X86*.td
Removed tabs and fixed 80-line violations
* X86Instr64bit.td
(IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW)
Added
(CALL, CMOV) Added qualifiers
(JMP) Added PC-relative jump instruction
(POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate
that it is 64-bit only (ambiguous since it has no
REX prefix)
(MOV) Added rr form going the other way, which is encoded
differently
(MOV) Changed immediates to offsets, which is more correct;
also fixed MOV64o64a to have to a 64-bit offset
(MOV) Fixed qualifiers
(MOV) Added debug-register and condition-register moves
(MOVZX) Added more forms
(ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which
(as with MOV) are encoded differently
(ROL) Made REX.W required
(BT) Uncommented mr form for disassembly only
(CVT__2__) Added several missing non-intrinsic forms
(LXADD, XCHG) Reordered operands to make more sense for
MRMSrcMem
(XCHG) Added register-to-register forms
(XADD, CMPXCHG, XCHG) Added non-locked forms
* X86InstrSSE.td
(CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ)
Added
* X86InstrFPStack.td
(COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP,
FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1, FYL2X,
FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM,
FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE,
FXRSTOR)
Added
(FCOM, FCOMP) Added qualifiers
(FSTENV, FSAVE, FSTSW) Fixed opcode names
(FNSTSW) Added implicit register operand
* X86InstrInfo.td
(opaque512mem) Added for FXSAVE/FXRSTOR
(offset8, offset16, offset32, offset64) Added for MOV
(NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR,
LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS,
LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT,
LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC,
CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC,
SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL,
VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD,
VMWRITE, VMXOFF, VMXON) Added
(NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier
(JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL,
JGE, JLE, JG, JCXZ) Added 32-bit forms
(MOV) Changed some immediate forms to offset forms
(MOV) Added reversed reg-reg forms, which are encoded
differently
(MOV) Added debug-register and condition-register moves
(CMOV) Added qualifiers
(AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV
(BT) Uncommented memory-register forms for disassembler
(MOVSX, MOVZX) Added forms
(XCHG, LXADD) Made operand order make sense for MRMSrcMem
(XCHG) Added register-register forms
(XADD, CMPXCHG) Added unlocked forms
* X86InstrMMX.td
(MMX_MOVD, MMV_MOVQ) Added forms
* X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table
change
* X86RegisterInfo.td: Added debug and condition register sets
* x86-64-pic-3.ll: Fixed testcase to reflect call qualifier
* peep-test-3.ll: Fixed testcase to reflect test qualifier
* cmov.ll: Fixed testcase to reflect cmov qualifier
* loop-blocks.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-11.ll: Fixed testcase to reflect call qualifier
* 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call
qualifier
* x86-64-pic-2.ll: Fixed testcase to reflect call qualifier
* live-out-reg-info.ll: Fixed testcase to reflect test qualifier
* tail-opts.ll: Fixed testcase to reflect call qualifiers
* x86-64-pic-10.ll: Fixed testcase to reflect call qualifier
* bss-pagealigned.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-1.ll: Fixed testcase to reflect call qualifier
* widen_load-1.ll: Fixed testcase to reflect call qualifier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91638 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 00:01:26 +00:00
Jeffrey Yasskin
08ce53996e
Revert r91623 to unbreak the buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91632 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17 22:44:34 +00:00
Evan Cheng
73ebbd8aac
Remove an unused option.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91623 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17 21:23:58 +00:00
Chris Lattner
551dec592f
finish cleaning up StructLayoutMap.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91612 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17 20:00:21 +00:00
Ken Dyck
70d0ef1459
In LowerEXTRACT_VECTOR_ELT, force an i32 value type for PEXTWR instead of
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incrementing the simple value type of the 16-bit type, which would give the
wrong type if an intemediate MVT (such as i24) were introduced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17 15:31:52 +00:00
Johnny Chen
caedfbc6ae
Renamed "tCMNZ" to "tCMNz" to be consistent with other similar namings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91571 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 23:36:52 +00:00
John McCall
6eeccd4aa4
Silence a clang warning about the deprecated (but perfectly reasonable in
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context) increment-of-bool idiom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91564 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 20:31:50 +00:00
Jim Grosbach
587b072f23
Mark STREX* as earlyclobber for the success result register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 19:44:06 +00:00
Johnny Chen
bbc71b2904
Add encoding bits for some Thumb instructions. Plus explicitly set the top two
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bytes of Inst to 0x0000 for the benefit of the Thumb decoder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 02:32:54 +00:00
Evan Cheng
2e489c4f9d
Re-enable 91381 with fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91489 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 00:53:11 +00:00
John McCall
bd13cb911c
Every anonymous namespace is different. Caught by clang++.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91481 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 00:15:28 +00:00
Jeffrey Yasskin
32d7e6ebde
Change indirect-globals to use a dedicated allocIndirectGV. This lets us
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remove start/finishGVStub and the BufferState helper class from the
MachineCodeEmitter interface. It has the side-effect of not setting the
indirect global writable and then executable on ARM, but that shouldn't be
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 22:42:46 +00:00
Johnny Chen
d68e119c0f
Added encoding bits for the Thumb ISA. Initial checkin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 17:24:14 +00:00
Evan Cheng
dba6cac0d4
Fix an encoding bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 06:49:02 +00:00
Kenneth Uildriks
76df3f398c
For fastcc on x86, let ECX be used as a return register after EAX and EDX
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91410 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 03:27:52 +00:00
Evan Cheng
d7760a4905
Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91405 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 03:07:11 +00:00
Evan Cheng
ad9c0a3d8b
Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:53:42 +00:00
Jim Grosbach
c67b556b5b
nand atomic requires opposite operand ordering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91371 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:12:35 +00:00
Dan Gohman
2e141d744e
Fix integer cast code to handle vector types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 23:40:38 +00:00
Johnny Chen
ec689151f2
Add encoding bits "let Inst{11-4} = 0b00000000;" to BR_JTr to disambiguate
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between BR_JTr and STREXD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91339 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 21:51:34 +00:00
Jim Grosbach
80dd125e17
v6 sync insn copy/paste error
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91333 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 21:33:32 +00:00
Jim Grosbach
7c03dbd8ed
Add ARMv6 memory and sync barrier instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 21:24:16 +00:00
Johnny Chen
c474796438
Fixed encoding bits typo of ldrexd/strexd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91327 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 21:01:46 +00:00
Jim Grosbach
a36c8f2c2e
Thumb2 atomic operations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 20:14:59 +00:00
Chris Lattner
cdfb302876
fix an obvious bug found by clang++ and collapse a redundant if.
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Here's the diagnostic from clang:
/Volumes/Data/dgregor/Projects/llvm/lib/Target/CppBackend/CPPBackend.cpp:989:23: warning: 'gv' is always NULL in this context
printConstant(gv);
^
1 diagnostic generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91318 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 19:34:32 +00:00
Jim Grosbach
a623f5a58d
correct selection requirements for thumb2 vs. arm versions of the barrier intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91313 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 19:24:11 +00:00
Jim Grosbach
c219e4dd59
add Thumb2 atomic and memory barrier instruction definitions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91310 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 18:56:47 +00:00
Jim Grosbach
015d3b5704
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91307 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 18:36:32 +00:00
Jim Grosbach
f6b2862e81
ARM memory barrier instructions are not predicable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91305 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 18:31:20 +00:00
Jim Grosbach
d7d72d66b7
add ldrexd/strexd instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91284 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 17:02:55 +00:00
Bill Wendling
85de1e5bad
Whitespace changes, comment clarification. No functional changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91274 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 06:51:19 +00:00
Jim Grosbach
c3c2354ec9
atomic binary operations up to 32-bits wide.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91260 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 04:22:04 +00:00
Anton Korobeynikov
cdcad11c94
Do not allow uninitialize access during debug printing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91232 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-13 01:00:32 +00:00
Eli Friedman
bcae205a4b
More info on this transformation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 23:23:43 +00:00
Eli Friedman
1555473387
Remove some stuff that's already implemented. Also, remove the note about
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merging x >u 5 and x <s 20 because it's impossible to implement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91228 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 21:41:48 +00:00
Evan Cheng
dd99f3a7dc
Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91223 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 20:03:14 +00:00
Anton Korobeynikov
2625de35ed
Implement variable-width shifts.
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No testcase yet - it seems we're exposing generic codegen bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91221 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 18:55:37 +00:00
Evan Cheng
04ab19cb14
Add comment about potential partial register stall.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91220 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 18:55:26 +00:00
Evan Cheng
15b0d97068
Fix an obvious bug. No test case since LEA16r is not being used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91219 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 18:51:56 +00:00
Jim Grosbach
e801dc4a7b
Framework for atomic binary operations. The emitter for the pseudo instructions
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just issues an error for the moment. The front end won't yet generate these
intrinsics for ARM, so this is behind the scenes until complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 01:40:06 +00:00
Anton Korobeynikov
8d1ffbd1ad
Lower setcc branchless, if this is profitable.
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Based on the patch by Brian Lucas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91175 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 23:01:29 +00:00
Dan Gohman
87862e77bb
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 21:31:27 +00:00
Jim Grosbach
c8f9e4fdc5
memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 20:29:53 +00:00
Anton Korobeynikov
817a46454a
Honour setHasCalls() set from isel.
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This is used in some weird cases like general dynamic TLS model.
This fixes PR5723
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:39:55 +00:00
Johnny Chen
0291d7ed09
Store Register Exclusive should leave the source register Inst{3-0} unspecified.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:37:26 +00:00
Jim Grosbach
66869104dd
Update properties.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91140 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 18:52:41 +00:00
Evan Cheng
656e51454a
Add support to 3-addressify 16-bit instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91104 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 06:01:48 +00:00
Jim Grosbach
5278eb802f
Rough first pass at compare_and_swap atomic builtins for ARM mode. Work in progress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 01:42:04 +00:00
Jim Grosbach
cbd77d2cb1
Add instruction encoding for DMB/DSB
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 18:35:32 +00:00
Jim Grosbach
3728e96a6c
Add memory barrier intrinsic support for ARM. Moving towards adding the atomic operations intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91003 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 00:11:09 +00:00
Evan Cheng
c363094e04
Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
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vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>
iff ptr is 16-byte aligned (or can be made into 16-byte aligned).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 21:00:30 +00:00
Evan Cheng
7bd6478cd6
Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90925 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 01:53:58 +00:00
Evan Cheng
64fa4a9584
Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90922 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 01:36:00 +00:00
Evan Cheng
d831cda3e7
- Support inline asm 'w' constraint for 128-bit vector types.
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- Also support the 'q' NEON registers asm code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 23:06:22 +00:00
Anton Korobeynikov
9aa1ec87b0
Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90819 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 01:03:04 +00:00
Dan Gohman
d84ea47b89
Don't enable the post-RA scheduler on x86 except at -O3. In its
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current form, it is too expensive in compile time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 19:04:31 +00:00
Anton Korobeynikov
6bfcba7e13
Some pretty-printing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:28:41 +00:00
Anton Korobeynikov
06ccca5f70
Add lowering of returnaddr and frameaddr intrinsics. Shamelessly stolen from x86 :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:28:10 +00:00
Anton Korobeynikov
e662f7a8b2
Initial codegen support for MSP430 ISRs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:27:53 +00:00
Anton Korobeynikov
b2de1ea29b
Add ability to select hw multiplier mode and select appropriate libcalls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:27:08 +00:00
Anton Korobeynikov
7cca606aaa
Dynamic stack realignment use of sp register as source/dest register
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in "bic sp, sp, #15 " leads to unpredicatble behaviour in Thumb2 mode.
Emit the following code instead:
mov r4, sp
bic r4, r4, #15
mov sp, r4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-06 22:39:50 +00:00
Bill Wendling
740266269b
Calling InvalidateEntry during the refinement was breaking the bootstrap.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 07:59:04 +00:00
Bill Wendling
32bc2362a1
Final cleanups:
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- Privatize a typedef.
- Call the InvalidateEntry when refining a type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90655 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 07:46:49 +00:00
Bill Wendling
688da28687
Inline methods which are called only once.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 01:46:01 +00:00
Bill Wendling
5681689795
Refactor some code. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90639 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 01:43:33 +00:00
Dan Gohman
864e2efce2
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
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MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 00:44:40 +00:00
David Greene
adbc23cae1
Remove an unneeded include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 23:55:07 +00:00
David Greene
29dbf50b18
Have hasLoad/StoreFrom/ToStackSlot return the relevant MachineMemOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90608 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 22:38:46 +00:00
Bill Wendling
1500c4f49a
Some code cleanup. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90588 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 21:03:02 +00:00
Jim Grosbach
4dc4a61c0c
remove out of date FIXME.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90490 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 21:55:01 +00:00
Chris Lattner
89742c2c3f
expand note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90429 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 07:43:46 +00:00
Chris Lattner
053321731c
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 07:41:54 +00:00
Chris Lattner
56856b1f46
fix a build problem with VC++, PR5664, patch by Alp Toker!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 06:58:32 +00:00
Bob Wilson
324f4f1633
Recognize canonical forms of vector shuffles where the same vector is used for
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both source operands. In the canonical form, the 2nd operand is changed to an
undef and the shuffle mask is adjusted to only reference elements from the 1st
operand. Radar 7434842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 06:40:55 +00:00
Bill Wendling
cb06403145
Revert r90371. It was causing build failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 01:54:07 +00:00
Bill Wendling
b8e675c3c1
Further improvements: refactoring code that does the same thing into one
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function, converting "dyn_cast" to "cast", asserting the correct things, and
other general cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90371 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 01:15:46 +00:00
Chris Lattner
bf108bdee5
yay for case insensitive file systems (?)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90370 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 01:10:05 +00:00
Chris Lattner
35e86af8e5
remove some dead std::ostream using code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:55:04 +00:00
Chris Lattner
7896c9f436
improve portability to avoid conflicting with std::next in c++'0x.
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Patch by Howard Hinnant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:50:42 +00:00
Bill Wendling
dd5eb02304
This initial code is meant to convert TargetData to use an AbstractTypesUser so
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that it doesn't have dangling pointers when abstract types are resolved. This
modifies it somewhat to address comments: making the "StructLayoutMap" an
anonymous structure, calling "removeAbstractTypeUser" when appropriate, and
adding asserts where helpful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:17:12 +00:00
Jim Grosbach
e27d205d5d
Factor the stack alignment calculations out into a target independent pass.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-02 19:30:24 +00:00
Jim Grosbach
d122874996
Thumb1 exception handling setjmp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90246 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 18:10:36 +00:00
Johnny Chen
b731e87649
For VLDM/VSTM (Advanced SIMD), set encoding bits Inst{11-8} to 0b1011.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90243 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 17:37:06 +00:00
Johnny Chen
208d76cad9
For VMOV (immediate), make some of the encoding bits (cmode and op) unspecified.
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For VMOVv*i[16,32], op bit is don't care, and some cmode bits vary depending on
the immediate values.
Ref: Table A7-15 Modified immediate values for Advanced SIMD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90173 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 00:02:02 +00:00
Dan Gohman
39a1fab856
Minor whitespace fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90166 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 23:33:53 +00:00
Dan Gohman
22f6526081
Fix a minor inconsistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90165 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 23:33:37 +00:00
Bob Wilson
15217e63bc
Remove isProfitableToDuplicateIndirectBranch target hook. It is profitable
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for all the processors where I have tried it, and even when it might not help
performance, the cost is quite low. The opportunities for duplicating
indirect branches are limited by other factors so code size does not change
much due to tail duplicating indirect branches aggressively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 18:35:03 +00:00
Bob Wilson
afa1df467b
Fix some more ARM unified syntax warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90141 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 17:47:19 +00:00
Mon P Wang
cd6e725f21
Added support to allow clients to custom widen. For X86, custom widen vectors for
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divide/remainder since these operations can trap by unroll them and adding undefs
for the resulting vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 02:42:02 +00:00
Chris Lattner
d4137f40da
update and consolidate the load pre notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-29 02:19:52 +00:00
Chris Lattner
1d159838a3
add a deadargelim note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90009 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-27 17:12:30 +00:00
Chris Lattner
6d94926a52
This testcase is actually only partially redundant, and requires
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the FIXME I added yesterday to be implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-27 16:53:57 +00:00
Chris Lattner
20ce7c0ded
this (and probably several others) are now done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89982 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-27 00:35:04 +00:00
Chris Lattner
cc3d0eb483
Teach memdep to phi translate bitcasts. This allows us to compile
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the example in GCC PR16799 to:
LBB1_2: ## %bb1
movl %eax, %eax
subq %rax, %rdi
movq %rdi, (%rcx)
movl (%rdi), %eax
testl %eax, %eax
je LBB1_2
instead of:
LBB1_2: ## %bb1
movl (%rdi), %ecx
subq %rcx, %rdi
movq %rdi, (%rax)
cmpl $0, (%rdi)
je LBB1_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-26 23:41:07 +00:00
Chris Lattner
5d5261c819
Teach basicaa that x|c == x+c when the c bits of x are clear. This
...
allows us to compile the example in readme.txt into:
LBB1_1: ## %bb
movl 4(%rdx,%rax), %ecx
movl %ecx, %esi
imull (%rdx,%rax), %esi
imull %esi, %ecx
movl %esi, 8(%rdx,%rax)
imull %ecx, %esi
movl %ecx, 12(%rdx,%rax)
movl %esi, 16(%rdx,%rax)
imull %ecx, %esi
movl %esi, 20(%rdx,%rax)
addq $16, %rax
cmpq $4000, %rax
jne LBB1_1
instead of:
LBB1_1:
movl (%rdx,%rax), %ecx
imull 4(%rdx,%rax), %ecx
movl %ecx, 8(%rdx,%rax)
imull 4(%rdx,%rax), %ecx
movl %ecx, 12(%rdx,%rax)
imull 8(%rdx,%rax), %ecx
movl %ecx, 16(%rdx,%rax)
imull 12(%rdx,%rax), %ecx
movl %ecx, 20(%rdx,%rax)
addq $16, %rax
cmpq $4000, %rax
jne LBB1_1
GCC (4.2) doesn't seem to be able to eliminate the loads in this
testcase either, it generates:
L2:
movl (%rdx), %eax
imull 4(%rdx), %eax
movl %eax, 8(%rdx)
imull 4(%rdx), %eax
movl %eax, 12(%rdx)
imull 8(%rdx), %eax
movl %eax, 16(%rdx)
imull 12(%rdx), %eax
movl %eax, 20(%rdx)
addl $4, %ecx
addq $16, %rdx
cmpl $1002, %ecx
jne L2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-26 16:26:43 +00:00
Chris Lattner
f6ac4d9dad
teach basicaa that A[i] != A[i+1].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89951 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-26 16:18:10 +00:00
Chris Lattner
9c6a0dcf0e
update some notes slightly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89913 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-26 01:51:18 +00:00
Viktor Kutuzov
308f6630a3
Rollback changes r89516: Added two SubtargetFeatures::AddFeatures methods, which accept a comma-separated string or already parsed command line parameters as input, and some code re-factoring to use these new methods.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89893 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 22:44:18 +00:00
Bob Wilson
de9b1dae37
Tail duplicate indirect branches for PowerPC, too.
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With the testcase for pr3120, the "threaded interpreter" runtime decreases
from 1788 to 1413 with this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89877 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 19:57:14 +00:00
Benjamin Kramer
1c3451fc99
Avoid some possibly unsafe uses of StringRef::data().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89873 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 18:26:09 +00:00
Devang Patel
65dbc909f5
Use StringRef (again) in DebugInfo interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 17:36:49 +00:00
Bob Wilson
4a66e5bfc2
Based on the testcase for pr3120, running on my MacPro with Xeon processors,
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it is definitely profitable to tail duplicate indirect branches for x86.
This is likely to be true to various degrees for all modern x86 processors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89865 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 17:27:53 +00:00
Bruno Cardoso Lopes
d71cebf575
Support PIC loading of constant pool entries
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 12:17:58 +00:00
Daniel Dunbar
5f9b9efa17
Sketch structure for X86 disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89850 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 06:53:08 +00:00
Bruno Cardoso Lopes
37fd537544
Use endianess dependent offsets for load/store of doubles when
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using two swc/lwc instead of sdc/ldc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89826 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 01:05:25 +00:00
Dale Johannesen
0106a0aafe
Fix compiler warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89824 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 00:58:21 +00:00
Bruno Cardoso Lopes
5f222b18e3
Only include in the callee saved regs the sub registers to avoid
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unnecessary save/restore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89823 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 00:47:43 +00:00
Bruno Cardoso Lopes
302525b234
Add proper emission of load/store double to stack slots for mips1 targets!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89821 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 00:36:00 +00:00
Devang Patel
7dbc610309
Revert r89803.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89819 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 00:31:13 +00:00
Bob Wilson
f8c4cfb7cc
Refactor target hook for tail duplication as requested by Chris.
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Make tail duplication of indirect branches much more aggressive (for targets
that indicate that it is profitable), based on further experience with
this transformation. I compiled 3 large applications with and without
this more aggressive tail duplication and measured minimal changes in code
size. ("size" on Darwin seems to round the text size up to the nearest
page boundary, so I can only say that any code size increase was less than
one 4k page.) Radar 7421267.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 23:35:49 +00:00
Dale Johannesen
f7801b493e
Do not store R31 into the caller's link area on PPC.
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This violates the ABI (that area is "reserved"), and
while it is safe if all code is generated with current
compilers, there is some very old code around that uses
that slot for something else, and breaks if it is stored
into. Adjust testcases looking for current behavior.
I've verified that the stack frame size is right in all
testcases, whether it changed or not. 7311323.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89811 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 22:59:02 +00:00
Devang Patel
eac79170d2
Enable debug info for ppc-darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89803 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 21:38:54 +00:00
Evan Cheng
d7f0810c93
Enable predication of NEON instructions in Thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89748 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 08:06:15 +00:00
Dale Johannesen
b60d5194f5
Make capitalization of names starting "is" more consistent.
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No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 01:09:07 +00:00
Evan Cheng
9d172d5ee7
Data type suffix must come after predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 01:05:23 +00:00
Anton Korobeynikov
5cdc3a949a
Materialize global addresses via movt/movw pair, this is always better
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than doing the same via constpool:
1. Load from constpool costs 3 cycles on A9, movt/movw pair - just 2.
2. Load from constpool might stall up to 300 cycles due to cache miss.
3. Movt/movw does not use load/store unit.
4. Less constpool entries => better compiler performance.
This is only enabled on ELF systems, since darwin does not have needed
relocations (yet).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 00:44:37 +00:00
Jim Grosbach
6935efcb66
80 column violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89718 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 00:20:27 +00:00
Jeffrey Yasskin
108c838093
* Move stub allocation inside the JITEmitter, instead of exposing a
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way for each TargetJITInfo subclass to allocate its own stubs. This
means stubs aren't as exactly-sized anymore, but it lets us get rid of
TargetJITInfo::emitFunctionStubAtAddr(), which lets ARM and PPC
support the eager JIT, fixing http://llvm.org/PR4816 .
* Rename the JITEmitter's stub creation functions to describe the kind
of stub they create. So far, all of them create lazy-compilation
stubs, but they sometimes get used when far-call stubs are needed.
Fixing http://llvm.org/PR5201 will involve fixing this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 23:35:19 +00:00
Dan Gohman
735afe14ee
Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.
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Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 23:20:51 +00:00
Jeffrey Yasskin
0261d795f8
Allow more than one stub to be being generated at the same time.
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It's probably better in the long run to replace the
indirect-GlobalVariable system. That'll be done after a subsequent
patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89708 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 22:49:00 +00:00
Evan Cheng
f81bf15552
Massive refactoring of NEON instructions. Separate opcode from data size specifier suffix, move \t up stream to instruction format, and fix more 80 column violations.
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This fixes the NEON asm printing so the "predicate" field is printed between the opcode and the data type suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:57:23 +00:00
Jim Grosbach
77b02beb1f
move fconst[sd] to UAL. <rdar://7414913>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89700 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:08:25 +00:00
Johnny Chen
da1aea4d75
Partially revert r84730 by removing N2VDup from ARMInstrFormats.td and modifying
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VDUPLND and VDUPLNQ to derive from N2V instead of N2VDup. VDUPLND and VDUPLNQ
now expect op19_18 and op17_16 as the first two args.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89699 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:00:43 +00:00
Jim Grosbach
15e6ef886d
fold immediate of a + Const into the user as a subtract if it can fit as a negated two-part immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89694 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 20:35:53 +00:00
Johnny Chen
b16ed11cb4
Revert r84572 by removing N3VImm from ARMInstrFormats.td now that we can specify
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{?,?,?,?} as op11_8 for VEXTd and VEXTq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 20:09:13 +00:00
Johnny Chen
7ebd32a1b8
Partially revert r89377 by removing NLdStLN class definition from
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ARMInstrFormats.td and fixing VLD[234]LN* and VST[234]LN* to derive from NLdSt
instead of NLdStLN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89684 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 18:16:16 +00:00
Johnny Chen
131c4a5257
Make it clear that the index bit(s) of Vector Get Lane and Vector Set Lane
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should be left unspecified now that Bob Wilson has fixed pr5470.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89676 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 17:48:17 +00:00
David Goodwin
7776452a18
Minor itinerary fixes for FP instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 17:34:12 +00:00
Jim Grosbach
a37aa54622
Move default FrameReg val to getFrameIndexReference(). Otherwise, debug info can get bogus values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89618 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 20:05:32 +00:00
Jim Grosbach
50f8516d2d
Generate more correct debug info for frame indices.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 02:32:29 +00:00
Anton Korobeynikov
1722f061a3
Minor optimization: when doing eq/ne comparions and RHS is a constant - swap operands, this will allow us to fold imm into comparison.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:14:08 +00:00
Anton Korobeynikov
ef4e604603
Drop unsupported imm operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89573 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:13:54 +00:00
Anton Korobeynikov
3741be39f9
Use 2-byte alignment for functions. 4 bytes are clear overkill here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:13:39 +00:00
Anton Korobeynikov
3c97fc9ae4
Use semicolon as assembler comment string
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89571 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:12:49 +00:00
Jim Grosbach
21ce2e3c74
Revert 89562. We're being sneakier than I was giving us credit for, and this
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isn't necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 23:34:09 +00:00
Jim Grosbach
f3b33d0b2a
Darwin requires a frame pointer for all non-leaf functions to support correct
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backtraces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 21:40:08 +00:00
Evan Cheng
ac0869dc8a
Add predicate operand to NEON instructions. Fix lots (but not all) 80 col violations in ARMInstrNEON.td.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 06:21:52 +00:00
Devang Patel
bef8888a91
We are not using DBG_STOPPOINT anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89536 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 02:46:55 +00:00
Viktor Kutuzov
054b52c366
Added two SubtargetFeatures::AddFeatures methods, which accept a comma-separated string or already parsed command line parameters as input, and some code re-factoring to use these new methods.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89516 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 00:00:02 +00:00
Dan Gohman
d9e05cd22a
Fix a thinko that caused spurious @GOTOFFs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89509 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:30:32 +00:00
Dan Gohman
71a419631f
Update for new getBlockAddress signature.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89507 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:21:00 +00:00
Dan Gohman
29cbade25a
Target-independent support for TargetFlags on BlockAddress operands,
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and support for blockaddresses in x86-32 PIC mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:18:13 +00:00
Sean Callanan
b9e6b34e1e
Recommitting PALIGNR shift width fixes.
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Thanks to Daniel Dunbar for fixing clang intrinsics:
http://llvm.org/viewvc/llvm-project?view=rev&revision=89499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:28:42 +00:00
Dale Johannesen
5ca124691b
Remove an incorrect overaggressive optimization
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(PPC specific).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:16:40 +00:00
Sean Callanan
1bbf6d1a6f
Reverting PALIGNR fix until I figure out how this
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broke the Clang testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:09:28 +00:00
Sean Callanan
201dfa7432
Fixed PALIGNR to take 8-bit rotations in all cases.
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Also fixed the corresponding testcase, and the PALIGNR
intrinsic (tested for correctness with llvm-gcc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89491 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 21:40:28 +00:00
Evan Cheng
4aedb61d03
Remat VLDRD from constpool. Clean up some instruction property specifications.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:57:15 +00:00
Jim Grosbach
a9562568e5
The verify() call of CPEIsInRange() isn't right for the assertion check of
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constant pool ranges, as CPEIsInRange() makes conservative assumptions about
the potential alignment changes from branch adjustments. The verification,
on the other hand, runs after those branch adjustments are made, so the
effects on alignment are known and already taken into account. The sanity
check in verify should check the range directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89473 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:37:38 +00:00
Jim Grosbach
de8b1dbf95
Remove verifySizes() since it's not adding much value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89443 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:32:06 +00:00
Evan Cheng
9b82425cb0
Also CSE non-pic load from constant pools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:10:27 +00:00
Evan Cheng
9ef4835bd8
Fix codegen of conditional move of immediates. We were not making use of the immediate forms of cmov instructions at all.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 00:54:03 +00:00
Eric Christopher
0dde97156c
Update comment to reflect instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89414 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 00:21:55 +00:00
Jim Grosbach
4d8e90a026
When placing constant islands and adjusting for alignment padding, inline
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assembly can confuse things utterly, as it's assumed that instructions in
inline assembly are 4 bytes wide. For Thumb mode, that's often not true,
so the calculations for when alignment padding will be present get thrown off,
ultimately leading to out of range constant pool entry references. Making
more conservative assumptions that padding may be necessary when inline asm
is present avoids this situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89403 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 23:10:28 +00:00
Evan Cheng
07ba906413
Refactor cmov selection code out to a separate function. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89396 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 21:45:22 +00:00
Bill Wendling
fb7634f1c7
Reverting the EH table patches.
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$ svn merge -c -89279 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r89279 into '.':
U lib/CodeGen/AsmPrinter/DwarfException.cpp
U lib/Target/TargetLoweringObjectFile.cpp
$ svn merge -c -89270 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r89270 into '.':
G lib/CodeGen/AsmPrinter/DwarfException.cpp
G lib/Target/TargetLoweringObjectFile.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 19:21:09 +00:00
Johnny Chen
5c376ff9f0
Added NLdStLN which is similar to NLdSt with the exception that op7_4 is not
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fully specified at this level. Subclasses of NLdStLN can specify selective
bit(s) for Inst{7-4}, as is done for VLD[234]LN* and VST[234]LN* inside
ARMInstrNEON.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89377 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 19:20:17 +00:00
Jim Grosbach
dec6de92d1
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89369 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 18:23:19 +00:00
Dan Gohman
57474fa0f6
Fix a typo in a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 16:35:11 +00:00
Evan Cheng
ed54de40a7
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89337 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 08:16:50 +00:00
Evan Cheng
2ef9c8a43d
More consistent thumb1 asm printing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:57:41 +00:00
Evan Cheng
5b397c93a5
Shrink ldr / str [sp, imm0-1024] to 16-bit instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:32:27 +00:00
Evan Cheng
a64ce45917
Eliminate more * 4 in Thumb1 asm printing for consistency sake.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89325 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:31:26 +00:00
Bruno Cardoso Lopes
2045c47aff
- Add sugregister logic to handle f64=(f32,f32).
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- Support mips1 like load/store of doubles:
Instead of:
sdc $f0, X($3)
Generate:
swc $f0, X($3)
swc $f1, X+4($3)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89322 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:06:13 +00:00
Bruno Cardoso Lopes
0046de0550
Only use small sections for non linux targets!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89316 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 05:28:18 +00:00
Bill Wendling
01c69374b5
The "ReadOnlyWithRel" enum seems to apply more to what Darwin does with the EH
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exception table than DataRel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 00:09:14 +00:00
Richard Osborne
bea7df56ce
Add XCore support for indirectbr / blockaddress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 23:20:42 +00:00