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Author SHA1 Message Date
Misha Brukman
bd7780bc60 DForm_1, particularly used by store instructions, needs the immediate operand to 
be listed second as that is how the instructions are usually created (and is the
correct asm syntax) so that it's assembled correctly from its constituents


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17183 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-23 06:08:38 +00:00
Misha Brukman
da8d96d1a1 Fix the SPR field for MTLR, MFLR, MTCTR, and MFCTR instructions. 
The decimal value given in the manual (8 or 9) really needs to be multiplied by
a factor of 32 because of the group of 5 zero bits after the register code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17182 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-23 06:05:49 +00:00
Misha Brukman
15f74b3f4f The value of the XO field for MFLR and MFCTR is 339, not 399 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17181 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-23 05:38:55 +00:00
Misha Brukman
bb48249414 Remove extraneous blank line 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17180 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-23 04:59:22 +00:00
Misha Brukman
3a060e5279 Align function arguments in function headers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17178 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-23 04:58:32 +00:00
Nate Begeman
31dfc52b81 Kill casts from integer types to unsigned byte, when the cast was only used 
as the shift amount operand to a shift instruction.  This was causing us to
emit unnecessary clear operations for code such as:
int foo(int x) { return 1 << x; }


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17175 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-23 00:50:23 +00:00
Reid Spencer
b8d5570e95 Clean up the output from this makefile so its not verbose. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17173 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-22 23:24:39 +00:00
Misha Brukman
6b9ae58c52 Adjust rules for building .inc files due to Reid's changes of Makefile.rules 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17169 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-22 22:16:24 +00:00
Reid Spencer
8c2c3152d6 Adjust to changes in Makefile.rules 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17167 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-22 21:02:08 +00:00
Reid Spencer
cac731ecbe We won't use automake 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17155 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-22 03:35:04 +00:00
Misha Brukman
9691a898c7 Remove debug code emitter from the JIT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17151 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-21 03:07:38 +00:00
Alkis Evlogimenos
4f9a6c30a2 Make this compile. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17150 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-21 02:44:16 +00:00
Misha Brukman
3070e2ff79 * Added basic support for JITing functions, basic blocks, instruction encoding, 
including registers, constants, and partial support for global addresses
* The JIT is disabled by default to allow building llvm-gcc, which wants to test
  running programs during configure


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17149 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-21 01:42:02 +00:00
Nate Begeman
0797d4905a Don't clear or sign extend bool->int. This fires a few dozen times on the test suite 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17147 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-20 21:55:41 +00:00
John Criswell
57bbfcec91 Small performance improvement in generated C code: 
Instead of unconditionally copying all phi node values into temporaries for
all successor blocks, generate code that will determine what successor
block will be called and then copy only those phi node values needed by
the successor block.

This seems to cut down namd execution time from being 8% higher than GCC to
4% higher than GCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17144 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-20 14:38:39 +00:00
Misha Brukman
d8e6e7f563 * Add baseline structural JIT code, but disable the JIT to allow llvm-gcc builds 
- Support added for functions, basic blocks, constant pool, constants,
    registers, and some basic support for globals, all untested
* Turn assert()s into abort()s so that unimplemented functions fail in release


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17143 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-19 19:49:42 +00:00
Brian Gaeke
849c7b5708 Simplify mapping info generation. In particular, the LLVM-to-MachineInstr map 
is no longer emitted, and we do not reference any MachineCodeForInstruction
information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17138 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-19 05:15:21 +00:00
Reid Spencer
86d341b204 Initial automake generated Makefile template 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17136 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-18 23:55:41 +00:00
Chris Lattner
7d0974b9a0 Improve compatibility with VC++, patch contributed by Morten Ofstad! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17126 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-18 15:54:17 +00:00
Chris Lattner
963869e41a Print a semicolon for the unreacahble instruction. This fixes problems 
where C requires semicolons in some cases to indicate null statements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17107 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 23:49:11 +00:00
Nate Begeman
fcf4a42cdf Generate correct stubs for weak-linked symbols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17101 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 23:01:34 +00:00
Chris Lattner
665825e58e The first hunk corrects a bug when printing undef null values. We would print 
0->field, which is illegal.  Now we print ((foo*)0)->field.

The second hunk is an optimization to not print undefined phi values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17094 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 17:48:59 +00:00
Chris Lattner
611fb259ba Don't print stuff out from the code generator. This broke the JIT horribly 
last night. :)  bork!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17093 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 17:40:50 +00:00
Reid Spencer
ec660ae754 Make the library name SparcV9 specific 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17089 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 15:01:12 +00:00
Reid Spencer
26dde42381 Consolidate the definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17088 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 15:00:26 +00:00
Reid Spencer
761920301d PPC32GenCodeEmitter instead of PowerPCGenCodeEmitter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17087 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 14:59:38 +00:00
Chris Lattner
56a31c69c8 Rewrite support for cast uint -> FP. In particular, we used to compile this: 
double %test(uint %X) {
        %tmp.1 = cast uint %X to double         ; <double> [#uses=1]
        ret double %tmp.1
}

into:

test:
        sub %ESP, 8
        mov %EAX, DWORD PTR [%ESP + 12]
        mov %ECX, 0
        mov DWORD PTR [%ESP], %EAX
        mov DWORD PTR [%ESP + 4], %ECX
        fild QWORD PTR [%ESP]
        add %ESP, 8
        ret

... which basically zero extends to 8 bytes, then does an fild for an
8-byte signed int.

Now we generate this:


test:
        sub %ESP, 4
        mov %EAX, DWORD PTR [%ESP + 8]
        mov DWORD PTR [%ESP], %EAX
        fild DWORD PTR [%ESP]
        shr %EAX, 31
        fadd DWORD PTR [.CPItest_0 + 4*%EAX]
        add %ESP, 4
        ret

        .section .rodata
        .align  4
.CPItest_0:
        .quad   5728578726015270912

This does a 32-bit signed integer load, then adds in an offset if the sign
bit of the integer was set.

It turns out that this is substantially faster than the preceeding sequence.
Consider this testcase:

unsigned a[2]={1,2};
volatile double G;

void main() {
    int i;
    for (i=0; i<100000000; ++i )
        G += a[i&1];
}

On zion (a P4 Xeon, 3Ghz), this patch speeds up the testcase from 2.140s
to 0.94s.

On apoc, an athlon MP 2100+, this patch speeds up the testcase from 1.72s
to 1.34s.

Note that the program takes 2.5s/1.97s on zion/apoc with GCC 3.3 -O3
-fomit-frame-pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17083 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 08:01:28 +00:00
Chris Lattner
07306de06e Unify handling of constant pool indexes with the other code paths, allowing 
us to use index registers for CPI's


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17082 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 07:49:45 +00:00
Chris Lattner
0e0ed85697 Give the asmprinter the ability to print memrefs with a constant pool index, 
index reg and scale


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17081 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 07:16:32 +00:00
Chris Lattner
de95c9e0bb fold: 
%X = and Y, constantint
  %Z = setcc %X, 0

instead of emitting:

        and %EAX, 3
        test %EAX, %EAX
        je .LBBfoo2_2   # UnifiedReturnBlock

We now emit:

        test %EAX, 3
        je .LBBfoo2_2   # UnifiedReturnBlock

This triggers 581 times on 176.gcc for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17080 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 06:10:40 +00:00
Chris Lattner
9894cd300e All of these labels are off by one now that the unreachable instruction exists 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17079 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 05:37:47 +00:00
Nate Begeman
1b75022cd3 Implement bitfield insert by recognizing the following pattern: 
1. optional shift left
2. and x, immX
3. and y, immY
4. or z, x, y
==> rlwimi z, x, y, shift, mask begin, mask end

where immX == ~immY and immX is a run of set bits. This transformation
fires 32 times on voronoi, once on espresso, and probably several
dozen times on external benchmarks such as gcc.

To put this in terms of actual code generated for
struct B { unsigned a : 3; unsigned b : 2; };
void storeA (struct B *b, int v) { b->a = v;}
void storeB (struct B *b, int v) { b->b = v;}

Old:
_storeA:
        rlwinm r2, r4, 0, 29, 31
        lwz r4, 0(r3)
        rlwinm r4, r4, 0, 0, 28
        or r2, r4, r2
        stw r2, 0(r3)
        blr

_storeB:
        rlwinm r2, r4, 3, 0, 28
        rlwinm r2, r2, 0, 27, 28
        lwz r4, 0(r3)
        rlwinm r4, r4, 0, 29, 26
        or r2, r2, r4
        stw r2, 0(r3)
        blr

New:
_storeA:
        lwz r2, 0(r3)
        rlwimi r2, r4, 0, 29, 31
        stw r2, 0(r3)
        blr

_storeB:
        lwz r2, 0(r3)
        rlwimi r2, r4, 3, 27, 28
        stw r2, 0(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17078 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 05:19:20 +00:00
Chris Lattner
7ff5a32a48 I forgot that sparc no longer uses the shared asmwriter. Give it support 
for undef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17075 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 02:44:45 +00:00
Chris Lattner
d14d5b4223 Add support for unreachable and undef 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17074 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-17 02:42:42 +00:00
Nate Begeman
2d4c98d79b Finally fix one of the oldest FIXMEs in the PowerPC backend: correctly 
flag rotate left word immediate then mask insert (rlwimi) as a two-address
instruction, and update the ISel usage of the instruction accordingly.

This will allow us to properly schedule rlwimi, and use it to efficiently
codegen bitfield operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17068 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-16 20:43:38 +00:00
Chris Lattner
9270efcc5f Fix fix fix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17057 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-16 18:21:50 +00:00
Chris Lattner
5a083b81c4 Add support for undef and unreachable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17051 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-16 18:14:10 +00:00
Chris Lattner
289a49ab7d ADd support for undef and unreachable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17050 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-16 18:13:47 +00:00
Chris Lattner
30483b0c84 Teach the X86 backend about unreachable and undef. Among other things, we 
now compile:

'foo() {}' into "ret" instead of "mov EAX, 0; ret"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17049 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-16 18:13:05 +00:00
Chris Lattner
a9d12c0a56 Add support for unreachable and undef 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17048 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-16 18:12:13 +00:00
Chris Lattner
b7a16ce3b1 Add a missing dependency 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17031 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-16 17:12:55 +00:00
Chris Lattner
f146ab1e51 Fix file header 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17030 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-16 16:37:42 +00:00
Chris Lattner
358a9027a8 Instruction select globals with offsets better. For example, on this test 
case:

int C[100];
int foo() {
  return C[4];
}

We now codegen:

foo:
        mov %EAX, DWORD PTR [C + 16]
        ret

instead of:

foo:
        mov %EAX, OFFSET C
        mov %EAX, DWORD PTR [%EAX + 16]
        ret

Other impressive features may be coming later.

This patch is contributed by Jeff Cohen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17011 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-15 05:05:29 +00:00
Chris Lattner
8cce7cd0ae Give the X86 JIT the ability to encode global+disp constants. Patch 
contributed by Jeff Cohen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17010 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-15 04:53:13 +00:00
Chris Lattner
d416f086cc Give the X86 asm printer the ability to print out addressing modes that have 
constant displacements from global variables.  Patch by Jeff Cohen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17009 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-15 04:44:53 +00:00
Chris Lattner
fb3d844e50 Allow X86 addressing modes to represent globals with offsets. Patch contributed 
by Jeff Cohen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17008 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-15 04:43:20 +00:00
Nate Begeman
e0c83a86b0 Better codegen of binary integer ops with 32 bit immediate operands. 
This transformation fires a few dozen times across the testsuite.

For example, int test2(int X) { return X ^ 0x0FF00FF0; }
Old:
_test2:
        lis r2, 4080
        ori r2, r2, 4080
        xor r3, r3, r2
        blr

New:
_test2:
        xoris r3, r3, 4080
        xori r3, r3, 4080
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17004 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-15 00:50:19 +00:00
Misha Brukman
d36047dbdb The field is called imm22', not simply imm' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17003 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 22:33:32 +00:00
Misha Brukman
3df04c58fc Synthetic instructions RET and RETL need to have all 3 parameters specified 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17002 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 22:32:49 +00:00
Misha Brukman
45a68268a4 Class F2_1 already inherits the imm22 field from class F2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17001 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 22:32:24 +00:00
Misha Brukman
009d3f400c Generate the SparcV8 code emitter from .td files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17000 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 21:57:19 +00:00
Misha Brukman
17187e936a * In the F3_1 class, default asi to 0 because it's not currently used 
* In the F3_3 class, remove mention of asi because it's not part of the format


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16999 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 21:53:39 +00:00
Brian Gaeke
59e12ed789 Add FSTOI, FDTOI (fp to integer cast) instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16996 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 19:39:35 +00:00
Brian Gaeke
8b6c1ff677 Rewrite emitCastOperation, refactoring parts of it into emitIntegerCast, and 
adding emitFPToIntegerCast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16995 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 19:39:34 +00:00
Brian Gaeke
941833a37c Add list of libc procedures we'll use, at some point. 
Update list of currently failing tests.
ADJCALLSTACK* support is done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16994 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 19:39:33 +00:00
Misha Brukman
c982cfad87 * Claim to support machine code emission - return false from 
addPassesToEmitMachineCode()
* Add support for registers and constants in getMachineOpValue()

This enables running "int main() { ret 0 }" via the PowerPC JIT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16983 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 06:39:56 +00:00
Misha Brukman
d37faba5b4 * Include the real (generated) version of getBinaryCodeForInstr() 
* Add implementation of getMachineOpValue() for generated code emitter
* Convert assert()s in unimplemented functions to abort()s so that non-debug
  builds fail predictably
* Add file header comments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16981 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 06:07:25 +00:00
Misha Brukman
bab2adf496 * Make a PPC32-specific code emitter because we have separate classes for 32- 
and 64-bit code emitters that cannot share code unless we use virtual
  functions
* Identify components being built by tablegen with more detail by assigning them
  to PowerPC, PPC32, or PPC64 more specifically; also avoids seeing 'building
  PowerPC XYZ' messages twice, where one is for PPC32 and one for PPC64


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16980 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 06:04:56 +00:00
Tanya Lattner
a645750722 Checking in code that works on my simple test case. However, there is still a bug with branches that I need to fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16979 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 06:04:28 +00:00
Misha Brukman
a671f3b1d4 There is only one field in an instruction, and that is `Inst', the final view of 
the instruction binary format, all others are simply operands and should not
have the `field' label


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16978 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 05:55:37 +00:00
Misha Brukman
315d3341fd PowerPC instruction definitions use LittleEndian-style encoding [0..31] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16977 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 05:54:38 +00:00
Misha Brukman
99ee67ab19 Add isLittleEndianEncoding to InstrInfo class, defaults to `off' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16976 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-14 05:53:40 +00:00
Reid Spencer
d96cb6eaa0 Update to reflect changes in Makefile rules. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16950 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-13 11:46:52 +00:00
Chris Lattner
c71ff4c34b Fix a warning that is emitted on the suns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16917 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-11 15:50:40 +00:00
Misha Brukman
b15d4c6072 Add ModuloScheduling to the recursive build tree 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16905 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 23:36:09 +00:00
Misha Brukman
7da1e6e27c Adjust header file inclusion due to move 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16904 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 23:34:50 +00:00
Misha Brukman
0a18934a23 Adjust comment header and paths to refect move 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16903 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 23:34:36 +00:00
Reid Spencer
769dd7d5ec Initial version of automake Makefile.am file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16898 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 22:52:14 +00:00
Reid Spencer
adb6c05f91 Add the new InstrSched directory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16897 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 22:51:03 +00:00
Tanya Lattner
420025b04f Added debug information. Fixed several bugs in the reconstruct loop function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16895 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 22:44:35 +00:00
Reid Spencer
81f76b324e Initial version of automake Makefile.am file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16893 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 22:20:40 +00:00
Reid Spencer
9f41a5fe85 Initial version of automake Makefile.am file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16885 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 20:43:57 +00:00
Brian Gaeke
299b39d356 Fix assertion failure when calling or returning from a function which 
returns 'bool' type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16884 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 20:34:17 +00:00
Brian Gaeke
85c08351ce Implement eliminateCallFramePseudoInstr(). 
Wrap a long comment line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16883 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 19:57:21 +00:00
Brian Gaeke
9f0cecd438 Model calls as *both* using *and* killing O0..O5, because callees use the 
argument values passed in (so they're not dead until *after* the call),
and callees are free to modify those registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16882 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 19:57:20 +00:00
Brian Gaeke
50094edf96 Fix whitespace and wrap some long lines. 
Deal with allocating stack space for outgoing args and copying them into the
correct stack slots (at least, we can copy <=32-bit int args).
We now correctly generate ADJCALLSTACK* instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16881 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 19:57:18 +00:00
Chris Lattner
cbb9812d0d bling bling! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16873 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-10 16:26:13 +00:00
Chris Lattner
83d72bcd11 Instead of silently breaking, print notification of why this doesn't work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16870 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-09 21:13:51 +00:00
Brian Gaeke
03203b423f update according to tonight's info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16866 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-09 05:58:27 +00:00
Brian Gaeke
0e2d466ce9 Implement getModuleMatchQuality and getJITMatchQuality so that v8 will be the 
default 32/BE target on sparc hosts, and ppc will continue to be the default
on other hosts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16865 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-09 05:57:01 +00:00
Chris Lattner
222b86f694 The person who was planning to add SSE support isn't anymore, so disable 
the -sse* options (to avoid misleading people).

Also, the stack alignment of the target doesn't depend on whether SSE is
eventually implemented, so remove a comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16860 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-08 22:41:46 +00:00
Chris Lattner
b0f4e389db Fix a major regression from the bugfix for 2004-10-08-SelectSetCCFold.llx, 
which prevented setcc's from being folded into branches.  It appears that
conditional branchinst's CC operand is actually operand(2), not operand(0)
as we might expect. :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16859 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-08 22:24:31 +00:00
Misha Brukman
7ced638072 Adjust paths due to moving InstrSched to lib/Target/SparcV9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16852 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-08 18:30:22 +00:00
Misha Brukman
855ae5a8f7 Single-space instead of double-spacing in the Makefile 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16848 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-08 18:11:14 +00:00
Misha Brukman
222c98bf82 Build InstrSched as well, and all three subdirs can be built independently 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16847 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-08 18:10:48 +00:00
Misha Brukman
13e4f6eb04 * Adjust for the move to lib/Target/SparcV9/InstrSched 
* Rename library to mark it SparcV9-specific


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16846 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-08 18:10:01 +00:00
Misha Brukman
1481a5c4c7 Single-space instead of double-spacing in the Makefile 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16845 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-08 18:05:25 +00:00
Chris Lattner
d04cd55796 Fix bug: 2004-10-08-SelectSetCCFold.llx. Normally this is hidden by the 
instcombine xform, which is why we didn't notice it before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16840 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-08 16:34:13 +00:00
Nate Begeman
bdf69847a9 Implement logical and with an immediate that consists of a contiguous block 
of one or more 1 bits (may wrap from least significant bit to most
significant bit) as the rlwinm rather than andi., andis., or some longer
instructons sequence.

int andn4(int z) { return z & -4; }
int clearhi(int z) { return z & 0x0000FFFF; }
int clearlo(int z) { return z & 0xFFFF0000; }
int clearmid(int z) { return z & 0x00FFFF00; }
int clearwrap(int z) { return z & 0xFF0000FF; }

_andn4:
        rlwinm r3, r3, 0, 0, 29
        blr

_clearhi:
        rlwinm r3, r3, 0, 16, 31
        blr

_clearlo:
        rlwinm r3, r3, 0, 0, 15
        blr

_clearmid:
        rlwinm r3, r3, 0, 8, 23
        blr

_clearwrap:
        rlwinm r3, r3, 0, 24, 7
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16832 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-08 02:49:24 +00:00
Nate Begeman
b816f0298d Several fixes and enhancements to the PPC32 backend. 
1. Fix an illegal argument to getClassB when deciding whether or not to
   sign extend a byte load.

2. Initial addition of isLoad and isStore flags to the instruction .td file
   for eventual use in a scheduler.

3. Rewrite of how constants are handled in emitSimpleBinaryOperation so
   that we can emit the PowerPC shifted immediate instructions far more
   often.  This allows us to emit the following code:

int foo(int x) { return x | 0x00F0000; }

_foo:
.LBB_foo_0:     ; entry
        ; IMPLICIT_DEF
        oris r3, r3, 15
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16826 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-07 22:30:03 +00:00
Nate Begeman
cb90de37a7 Add ori reg, reg, 0 as a move instruction. This can be generated from 
loading a 32bit constant into a register whose low halfword is all zeroes.

We now omit the ori after the lis for the following C code:

int bar(int y) { return y * 0x00F0000; }

_bar:
.LBB_bar_0:     ; entry
        ; IMPLICIT_DEF
        lis r2, 15
        mullw r3, r3, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16825 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-07 22:26:12 +00:00
Nate Begeman
5a181c848b Remove unnecessary header include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16824 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-07 22:24:32 +00:00
Chris Lattner
7c348e1c9f Correct some typeos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16770 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 16:28:24 +00:00
Chris Lattner
09c750f73d Remove debugging code, fix encoding problem. This fixes the problems 
the JIT had last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16766 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 14:31:50 +00:00
Nate Begeman
35b020df39 Turning on fsel code gen now that we can do so would be good. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16765 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 11:03:30 +00:00
Nate Begeman
087d5d92f1 Implement floating point select for lt, gt, le, ge using the powerpc fsel 
instruction.

Now, rather than emitting the following loop out of bisect:
.LBB_main_19:	; no_exit.0.i
	rlwinm r3, r2, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f2, f2, f1
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fcmpu cr0, f1, f4
	bge .LBB_main_64	; no_exit.0.i
.LBB_main_63:	; no_exit.0.i
	b .LBB_main_65	; no_exit.0.i
.LBB_main_64:	; no_exit.0.i
	fmr f2, f1
.LBB_main_65:	; no_exit.0.i
	addi r3, r2, 1
	rlwinm r3, r3, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f4, f4, f1
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f5, lo16(.CPI_main_1-"L00000$pb")(r3)
	fcmpu cr0, f1, f5
	bge .LBB_main_67	; no_exit.0.i
.LBB_main_66:	; no_exit.0.i
	b .LBB_main_68	; no_exit.0.i
.LBB_main_67:	; no_exit.0.i
	fmr f4, f1
.LBB_main_68:	; no_exit.0.i
	fadd f1, f2, f4
	addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
	lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
	fmul f1, f1, f2
	rlwinm r3, r2, 3, 0, 28
	lfdx f2, r3, r28
	fadd f4, f2, f1
	fcmpu cr0, f4, f0
	bgt .LBB_main_70	; no_exit.0.i
.LBB_main_69:	; no_exit.0.i
	b .LBB_main_71	; no_exit.0.i
.LBB_main_70:	; no_exit.0.i
	fmr f0, f4
.LBB_main_71:	; no_exit.0.i
	fsub f1, f2, f1
	addi r2, r2, -1
	fcmpu cr0, f1, f3
	blt .LBB_main_73	; no_exit.0.i
.LBB_main_72:	; no_exit.0.i
	b .LBB_main_74	; no_exit.0.i
.LBB_main_73:	; no_exit.0.i
	fmr f3, f1
.LBB_main_74:	; no_exit.0.i
	cmpwi cr0, r2, -1
	fmr f16, f0
	fmr f17, f3
	bgt .LBB_main_19	; no_exit.0.i

We emit this instead:
.LBB_main_19:	; no_exit.0.i
	rlwinm r3, r2, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f2, f2, f1
	fsel f1, f1, f1, f2
	addi r3, r2, 1
	rlwinm r3, r3, 3, 0, 28
	lfdx f2, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f4, f4, f2
	fsel f2, f2, f2, f4
	fadd f1, f1, f2
	addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
	lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
	fmul f1, f1, f2
	rlwinm r3, r2, 3, 0, 28
	lfdx f2, r3, r28
	fadd f4, f2, f1
	fsub f5, f0, f4
	fsel f0, f5, f0, f4
	fsub f1, f2, f1
	addi r2, r2, -1
	fsub f2, f1, f3
	fsel f3, f2, f3, f1
	cmpwi cr0, r2, -1
	fmr f16, f0
	fmr f17, f3
	bgt .LBB_main_19	; no_exit.0.i


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16764 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 09:53:04 +00:00
Chris Lattner
2483f67914 Codegen signed mod by 2 or -2 more efficiently. Instead of generating: 
t:
        mov %EDX, DWORD PTR [%ESP + 4]
        mov %ECX, 2
        mov %EAX, %EDX
        sar %EDX, 31
        idiv %ECX
        mov %EAX, %EDX
        ret

Generate:
t:
        mov %ECX, DWORD PTR [%ESP + 4]
***     mov %EAX, %ECX
        cdq
        and %ECX, 1
        xor %ECX, %EDX
        sub %ECX, %EDX
***     mov %EAX, %ECX
        ret

Note that the two marked moves are redundant, and should be eliminated by the
register allocator, but aren't.

Compare this to GCC, which generates:

t:
        mov     %eax, DWORD PTR [%esp+4]
        mov     %edx, %eax
        shr     %edx, 31
        lea     %ecx, [%edx+%eax]
        and     %ecx, -2
        sub     %eax, %ecx
        ret

or ICC 8.0, which generates:

t:
        movl      4(%esp), %ecx                                 #3.5
        movl      $-2147483647, %eax                            #3.25
        imull     %ecx                                          #3.25
        movl      %ecx, %eax                                    #3.25
        sarl      $31, %eax                                     #3.25
        addl      %ecx, %edx                                    #3.25
        subl      %edx, %eax                                    #3.25
        addl      %eax, %eax                                    #3.25
        negl      %eax                                          #3.25
        subl      %eax, %ecx                                    #3.25
        movl      %ecx, %eax                                    #3.25
        ret                                                     #3.25

We would be in great shape if not for the moves.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16763 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 05:01:07 +00:00
Chris Lattner
60e667485e Really fix FreeBSD, which apparently doesn't tolerate the extern. 
Thanks to Jeff Cohen for pointing out my goof.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16762 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:21:52 +00:00
Chris Lattner
3ffdff6448 Fix a scary bug with signed division by a power of two. We used to generate: 
s:   ;; X / 4
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 1
        shr %ECX, 30
        mov %EDX, %EAX
        add %EDX, %ECX
        sar %EAX, 2
        ret

When we really meant:

s:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 1
        shr %ECX, 30
        add %EAX, %ECX
        sar %EAX, 2
        ret

Hey, this also reduces register pressure too :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16761 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:19:43 +00:00
Chris Lattner
610f1e2785 Codegen signed divides by 2 and -2 more efficiently. In particular 
instead of:

s:   ;; X / 2
        movl 4(%esp), %eax
        movl %eax, %ecx
        shrl $31, %ecx
        movl %eax, %edx
        addl %ecx, %edx
        sarl $1, %eax
        ret

t:   ;; X / -2
        movl 4(%esp), %eax
        movl %eax, %ecx
        shrl $31, %ecx
        movl %eax, %edx
        addl %ecx, %edx
        sarl $1, %eax
        negl %eax
        ret

Emit:

s:
        movl 4(%esp), %eax
        cmpl $-2147483648, %eax
        sbbl $-1, %eax
        sarl $1, %eax
        ret

t:
        movl 4(%esp), %eax
        cmpl $-2147483648, %eax
        sbbl $-1, %eax
        sarl $1, %eax
        negl %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16760 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:02:39 +00:00
Chris Lattner
d93d3b047c Add some new instructions. Fix the asm string for sbb32rr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16759 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:01:02 +00:00
Chris Lattner
523001f1bb FreeBSD uses GCC. Patch contributed by Jeff Cohen! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16756 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 03:15:44 +00:00
Chris Lattner
955f09666d * Prune #includes 
* Update comments
* Rearrange code a bit
* Finally ELIMINATE the GAS workaround emitter for Intel mode.  woot!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16647 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:31:08 +00:00
Chris Lattner
ac5701c562 Add support for emitting AT&T style .s files, and make it the default. Users 
may now choose their output format with the -x86-asm-syntax={intel|att} flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16646 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:24:48 +00:00
Chris Lattner
8f99eff156 Convert some missed patterns to support AT&T style 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16645 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:23:07 +00:00
Chris Lattner
10f873b420 Apparently the GNU assembler has a HUGE hack to be compatible with really 
old and broken AT&T syntax assemblers.  The problem with this hack is that
*SOME* forms of the fdiv and fsub instructions have the 'r' bit inverted.
This was a real pain to figure out, but is trivially easy to support: thus
we are now bug compatible with gas and gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16644 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:08:46 +00:00
Chris Lattner
ac6a47588b Fix incorrect suffix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16642 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 05:20:16 +00:00
Chris Lattner
707c6fe3ad Fix some more missed suffixes and swapped operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16641 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 01:38:10 +00:00
Chris Lattner
60c715c9a2 Add missing suffixes to FP instructions for AT&T mode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16640 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 00:43:31 +00:00
Chris Lattner
9a3e49a1b3 Add support for the -x86-asm-syntax flag, which can be used to choose between 
Intel and AT&T style assembly language.  The ultimate goal of this is to
eliminate the GasBugWorkaroundEmitter class, but for now AT&T style emission
is not fully operational.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16639 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-03 20:36:57 +00:00
Chris Lattner
3a173dfc72 Add support to the instruction patterns for AT&T style output, which will 
hopefully lead to the death of the 'GasBugWorkaroundEmitter'.  This also
includes changes to wrap the whole file to 80 columns! Woot! :)

Note that the AT&T style output has not been tested at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16638 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-03 20:35:00 +00:00
Chris Lattner
0fa206615a Add initial support for variants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16635 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-03 19:34:18 +00:00
Brian Gaeke
828c68a4de Make EmitMappingInfo into an "external location" option, so that it can be set 
or cleared externally.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16623 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-30 20:20:01 +00:00
Brian Gaeke
6672f86a4d I think this will handle double args. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16618 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-30 19:44:32 +00:00
Brian Gaeke
d7bf501cc7 Mark the instructions that have delay slots with the hasDelaySlot flag. 
Add some comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16611 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-30 04:04:48 +00:00
Brian Gaeke
870248b164 Use TargetMachine::hasDelaySlot() instead of our old switch statement 
to find instrs that have delay slots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16610 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-30 04:04:47 +00:00
Misha Brukman
1155d31ef6 Change the #ifdefs to allow compilation with a V8 compiler, but the JIT still 
won't work if not compiled in V9 mode, currently by GCC only, because Sun's
system compiler does not tell us if it's a V8 or V9 system.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16602 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 23:01:17 +00:00
Brian Gaeke
49dd15402b Update list of shootout programs that should be working. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16595 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 20:45:06 +00:00
Brian Gaeke
374b36d5cf Tell the target description that calls clobber registers O0...O5. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16594 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 20:45:05 +00:00
Brian Gaeke
22ad67dd68 FITOD is spelled "fitod", not "fitos". Ouch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16591 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 19:59:07 +00:00
Brian Gaeke
6fdd9e1f35 Don't use .quad to output double constants. The assembler must have a bug or 
something, because the wrong bit patterns get output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16590 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 19:59:06 +00:00
Brian Gaeke
9ed920437a Recognize FpMOVD as a move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16586 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 16:45:47 +00:00
Nate Begeman
1f49e868aa Generate better code by being far less clever when it comes to the select instruction. Don't create overlapping register lifetimes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16580 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 05:00:31 +00:00
Brian Gaeke
a771347336 add results 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16579 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:48:55 +00:00
Nate Begeman
1b99fd3e8a improve Type::BoolTy codegen by eliminating unnecessary clears and sign extends 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16578 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:45:33 +00:00
Brian Gaeke
1df468ea9b Simplify copyConstantToRegister() for longs, using a pair of recursive calls. 
Copy constant-pool entries' addresses into registers before loading out of them,
to avoid errors from the assembler.
Handle loading call args past the 6th one off the stack.
Add IMPLICIT_DEF pseudo-instrs for double and long arguments passed in register
pairs.
Use FpMOVD to copy doubles around instead of the horrible store-load thing we
were doing before.
Handle 'ret double' and 'ret long'.
Fix a bug in handling 'and/or/xor long'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16577 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:34:41 +00:00
Brian Gaeke
9b8ed0e04a Fix bug recognizing moves: isMoveInstr should only treat ORs with %g0 as 
moves, not all ORs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16576 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:28:15 +00:00
Brian Gaeke
bcf2ad296f Use FpMOVD pseudo-instruction to move doubles around. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16575 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:27:30 +00:00
Brian Gaeke
a036b53929 Add new FpMOVD pseudo-instruction, used to move doubles around. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16574 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:27:29 +00:00
Brian Gaeke
8a9acd1e31 Fix double and long alignment. 
Call the FPMover pass after register allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16573 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:26:27 +00:00
Brian Gaeke
b27df44b62 Put quotes around argument to .section directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16572 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:25:40 +00:00
Brian Gaeke
1162ed2900 Add createSparcV8FPMoverPass(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16571 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:25:39 +00:00
Brian Gaeke
15b2838035 Pass which converts FpMOVD (double move pseudoinstructions) to pairs 
of FMOVS instrs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16570 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:24:34 +00:00
Nate Begeman
a41fc77ae4 To go along with sabre's improved InstCombining, improve recognition of 
integers that we can use as immediate values in instructions.

Example from yacr2:
-       lis r10, -1
-       ori r10, r10, 65535
-       add r28, r28, r10
+       addi r28, r28, -1
        addi r7, r7, 1
        addi r9, r9, 1
        b .LBB_main_9   ; loopentry.1.i214


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16566 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 02:35:05 +00:00
Nate Begeman
8d5c50329b Add support for the isLoad and isStore flags, needed by the instruction scheduler 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16555 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-28 21:29:00 +00:00
Chris Lattner
7baaf09f9f Capture delay slot info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16551 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-28 18:34:14 +00:00
Alkis Evlogimenos
c72c617a4e Add includes and use std:: for standard library calls to make code 
compile on windows. This patch was contributed by Paolo Invernizzi.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16539 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-28 14:42:44 +00:00
Alkis Evlogimenos
f3ba6ddbec Since we use alloca now make sure we include the proper headers for it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16536 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-28 02:53:15 +00:00
Alkis Evlogimenos
0ee6e2a6da Use alloca instead of a C99 style array. This should fix the 
compilation problem in windows.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16535 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-28 02:47:38 +00:00
Alkis Evlogimenos
200a360ec6 Pull assignment out of for loop conditional in order for this to 
compile under windows. Patch contributed by Paolo Invernizzi!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16534 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-28 02:40:37 +00:00
Misha Brukman
f90a656a9f SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16526 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-27 18:22:18 +00:00
Nate Begeman
da721e74f8 Correct some BuildMI arguments for the upcoming simple scheduler 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16519 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-27 05:08:17 +00:00
Misha Brukman
c6e7430499 Fix the copy-pasto that Brian noticed: V8 int regs are 32-bits wide, not 64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16518 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-26 21:07:43 +00:00
Nate Begeman
645495d2e6 Fix the last of the major PPC GEP folding deficiencies. This will allow 
the ISel to use indexed and non-zero immediate offsets for GEPs that have
more than one use.  This is common for instruction sequences such as a load
followed by a modify and store to the same address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16493 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-23 05:31:33 +00:00
Misha Brukman
c95759c2f5 Use the V8/V9 shared register file description 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16485 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-22 21:48:50 +00:00
Misha Brukman
c42077d371 Combine the F2 and F3 instruction classes into one file for simplicity 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16484 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-22 21:38:42 +00:00
Misha Brukman
31b5edd2e9 Fix file header path 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16483 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-22 21:29:12 +00:00
Misha Brukman
981eefd5f7 Prettify formatting of the file, adjust paths to making V8 a subdir of Sparc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16482 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-22 20:09:29 +00:00
Misha Brukman
2ec09e713e V8 is now a subdirectory of Sparc; adjust paths accordingly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16481 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-22 20:08:52 +00:00
Nate Begeman
a2de102a5b add optimized code sequences for setcc x, 0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16478 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-22 04:40:25 +00:00
Alkis Evlogimenos
65cbfa0f37 The real x87 floating point registers should not be allocatable. They 
are only used by the stackifier when transforming FPn register
allocations to the real stack file x87 registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16472 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-21 21:22:11 +00:00
Misha Brukman
540c82a700 s/ISel/PPC64ISel/ to have unique class names for debugging via gdb because the 
C++ front-end in gcc does not mangle classes in anonymous namespaces correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16471 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-21 18:22:33 +00:00
Misha Brukman
a1dca55a3a s/ISel/PPC32ISel/ to have unique class names for debugging via gdb because the 
C++ front-end in gcc does not mangle classes in anonymous namespaces correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16470 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-21 18:22:19 +00:00
Misha Brukman
eae1bf10ea s/ISel/X86ISel/ to have unique class names for debugging via gdb because the C++ 
front-end in gcc does not mangle classes in anonymous namespaces correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16469 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-21 18:21:21 +00:00
Chris Lattner
8cbee4ea5b Make sure to set the operand list 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16466 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-21 17:30:54 +00:00
Chris Lattner
b12914bfc0 'Pass' should now not be derived from by clients. Instead, they should derive 
from ModulePass.  Instead of implementing Pass::run, then should implement
ModulePass::runOnModule.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16436 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-20 04:48:05 +00:00
Reid Spencer
2da5c3dda6 Convert code to compile with vc7.1. 
Patch contributed by Paolo Invernizzi. Thanks Paolo!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16368 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-15 17:06:42 +00:00
Misha Brukman
a2700194ae Fit long lines into 80 cols via creative space elimination 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16353 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-15 01:40:18 +00:00
Misha Brukman
07542c8c20 Targets are independent of each other, so compile them in parallel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16351 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-15 01:34:25 +00:00
Chris Lattner
b228657acc Revamp the Register class, and allow the use of the RegisterGroup class to 
specify aliases directly in register definitions.

Patch contributed by Jason Eckhardt!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16330 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-14 04:17:02 +00:00
Chris Lattner
1002013ed3 Changes to make this work with Jason's patch. I checked this by hand, but 
would appreciate if others would also look at this to make sure I didn't
botch something obvious


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16312 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-13 21:32:03 +00:00
Misha Brukman
fb0796e82e Fix filename: Printer.cpp has become X86AsmPrinter.cpp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16299 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-12 21:26:04 +00:00
Misha Brukman
bcb5562a5e Renamed file to SparcV8ISelSimple.cpp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16267 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-10 18:51:12 +00:00
Brian Gaeke
fd23c4e9bc Roll back constant printing changes until the problems with larger 
programs and C++ can be looked at in detail.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16266 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-10 18:01:45 +00:00
Alkis Evlogimenos
93c1ab2e15 Use a shorter form to express implicit use/defs in FpGETRESULT and 
FpSETRESULT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16247 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-08 18:29:31 +00:00
Alkis Evlogimenos
978f629ba9 A call instruction should implicitely define ST0 since the return 
value is returned in that register. The pseudo instructions
FpGETRESULT and FpSETRESULT shold also have an implicity use and def
of ST0 repsecitvely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16246 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-08 16:54:54 +00:00
Brian Gaeke
f539ffe1b6 This file does not need <iostream>, I think. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16245 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-08 04:10:52 +00:00
Nate Begeman
20136a21ba Add 64 bit divide instructions, and use them 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16198 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-06 18:46:59 +00:00
Misha Brukman
3e0b51ab3b * Change PPC32AsmPrinter => PowerPCAsmPrinter since it is now shared between 
Darwin and AIX and is not 32- or 64-bit specific
* Bring back PowerPC.td as a result, to make it use the `PowerPC' class name
* Adjust Makefile accordingly


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16174 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-05 02:42:44 +00:00
Misha Brukman
b986b7de50 Renamed PPC32AsmPrinter.cpp => PowerPCAsmPrinter.cpp as the Darwin and AIX asm 
printers are now unified into one file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16173 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-05 02:27:37 +00:00
Nate Begeman
a11c2e8fb9 Include MathExtras.h to fix build breakage, thanks to Vladimir 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16164 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-04 14:51:26 +00:00
Nate Begeman
ed42853be1 All PPC instructions are now auto-printed 
32 and 64 bit AsmWriters unified
Darwin and AIX specific features of AsmWriter split out


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16163 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-04 05:00:00 +00:00
Reid Spencer
40b062fdf8 Clean up some "clean:" targets so they use $(VERB) and don't print anything 
by default, like every other "clean" target in LLVM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16161 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-03 23:19:53 +00:00
Nate Begeman
b7a8f2cdaa Convert remaining X-Form and Pseudo instructions over to asm writer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16142 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-02 08:13:00 +00:00
Brian Gaeke
74dfcf1200 Back to compiling land for v8 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16138 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-02 02:37:43 +00:00
Reid Spencer
551ccae044 Changes For Bug 352 
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-01 22:55:40 +00:00
Nate Begeman
cc8bd9ca7c convert M and MD form instructions to generated asm writer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16121 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-31 02:28:08 +00:00
Nate Begeman
07aada8b0f Move yet more instructions over to being printed by the generated asm writer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16112 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-30 02:28:06 +00:00
Reid Spencer
fc989e1ee0 Reduce the number of arguments in the instruction builder and make some 
improvements on instruction selection that account for register and frame
index bases.

Patch contributed by Jeff Cohen. Thanks Jeff!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16110 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-30 00:13:26 +00:00
Nate Begeman
6b3dc55ef8 Convert A-Form instructions to auto-generated asm writer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16107 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-29 22:45:13 +00:00
Nate Begeman
27bc7c6cae Register sizes should be specified in bits 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16106 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-29 22:03:40 +00:00
Nate Begeman
d332fd54f5 Improvements to int->float cast code for PPC-64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16105 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-29 22:02:43 +00:00
Nate Begeman
f2f0781a10 Implement the following missing functionality in the PPC backend: 
cast fp->bool
cast ulong->fp
algebraic right shift long by non-constant value
These changes tested across most of the test suite.  Fixes Regression/casts


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16081 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-29 08:19:32 +00:00
Nate Begeman
5709998993 Register sizes are in bits, not bytes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16070 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-27 04:28:10 +00:00
Alkis Evlogimenos
bb4bdf4fe4 Add getAllocatableSet() function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16059 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-26 22:21:04 +00:00
Brian Gaeke
07b52b367f Previous checkin broke printf(%a) support for fp constants-- re-fix it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16051 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-25 19:37:26 +00:00
Brian Gaeke
8a702e8e1b New version of Bill Wendling's PR33 patch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16050 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-25 19:00:42 +00:00
Chris Lattner
6f0161aac3 Add -sse[,2,3] arguments to LLC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16018 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-24 08:18:44 +00:00
Chris Lattner
47d2f2bb50 Nuke commented out stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16017 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-24 08:18:27 +00:00
Brian Gaeke
2ff1e67346 This code is dodgy, but the guaranteed assertion failure doesn't help anything. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16014 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-24 06:41:40 +00:00
Brian Gaeke
f1b7eb145e Fix bug in PhyRegAlloc::setCallInterferences() handling call through a 
null pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16013 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-24 06:41:39 +00:00
Brian Gaeke
ac9edd5faa Revise head-of-file comment. 
Eliminate some excess whitespace.
Fix bug in CallArgsDescriptor::get() handling call through a null pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16012 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-24 06:41:38 +00:00
Nate Begeman
0e5e5f56bd Kill a majority of unnecessary sign extensions for byte loads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15991 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-22 08:10:15 +00:00
Nate Begeman
1f4a132599 Don't hard code the offset of the saved R31 in functions with frame pointers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15990 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-22 08:09:17 +00:00
Nate Begeman
a96c4af7f1 Back out branchless SetCC code. While it helped a lot in some cases, it 
hurt a lot in others.  Instead, improve branching version of SetCC and
Select instructions.  The old code will be in CVS should we ever need to
dig it up again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15979 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 20:42:14 +00:00
Chris Lattner
608034ec1a Switch from bytes to bits for alignment. 
Also, change GPRC for PPC32 to align on 32-bit boundary instead of 64-bit


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15975 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 20:14:40 +00:00
Chris Lattner
ff0a6e6aac Switch from bytes to bits for alignment for consistency 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15974 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 20:14:13 +00:00
Chris Lattner
fae896999c Reduce uses of getRegClass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15973 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 20:13:52 +00:00
Chris Lattner
2b0e300342 Convert regclass alignment from bytes to bites 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15972 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 20:13:09 +00:00
Chris Lattner
0e362770d0 Convert bytes to bits in alignment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15971 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 20:09:46 +00:00
Chris Lattner
8edcd84653 Reduce uses of getRegClass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15968 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 19:51:17 +00:00
Chris Lattner
12585baf1a Fix warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15964 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 19:11:03 +00:00
Nate Begeman
c3306120cc Move XForm instructions over to the auto-generated asm writer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15962 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 05:56:39 +00:00
Chris Lattner
b4d83c1f2c Add two values 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15959 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 02:17:39 +00:00
Nate Begeman
b65eadb7f5 remove some things from the todo list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15956 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-20 18:46:54 +00:00
Chris Lattner
f908888553 Do not register ppc64 yet, as it breaks the SparcV9 backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15955 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-20 18:09:18 +00:00
Nate Begeman
b47321ba2b Implement code to convert SetCC into straight line code where appropriate. Add necessary instructions for this transformation to the .td file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15952 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-20 09:56:22 +00:00
Misha Brukman
43f20a56b2 Fix opcodes being printed in caps (the more general fix may be `AsmWriter') 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15932 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 21:56:12 +00:00
Misha Brukman
1601d9c1f0 Stack space for argument passing is 32 regardless of 32- vs. 64-bit arch. 
Thanks to Nate Begeman for pointing this out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15930 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 21:51:19 +00:00
Misha Brukman
983e92dc0d LR needs to be saved at 16-byte offset on a 64-bit arch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15929 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 21:36:14 +00:00
Misha Brukman
4debafbea4 On 64-bit PowerPC, pointers are 8 bytes, so parameter area offset is 48, not 24 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15928 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 21:34:05 +00:00
Misha Brukman
d2cbb871d0 This PHI has 4 additional operands, not 2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15926 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 21:00:12 +00:00
Misha Brukman
95ab78af3c Use the appropriate 64-bit register description file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15922 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 19:36:57 +00:00
Misha Brukman
5e9867e71c Fix more remaining 32-bit vestiges of PowerPC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15919 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 18:49:58 +00:00
Misha Brukman
cc55ad5fe9 Fix another vestige of the 32-bit PowerPC backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15918 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 16:50:30 +00:00
Misha Brukman
ab566eaa68 Correct character prepended to global symbols ('.'), use Mangler consistently 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15917 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 16:33:56 +00:00
Misha Brukman
1c514ec89d * Eliminate global base register, r2 is used for that on AIX/PowerPC 
* Fix bug from 32-bit PowerPC days of 2-register long split


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15916 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 16:29:25 +00:00
Misha Brukman
85aa4d0cc5 Wrap long lines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15915 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 16:28:30 +00:00
Nate Begeman
1e67d4d7ba Convert casts that will have no effect into move instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15914 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 08:07:50 +00:00
Nate Begeman
81d265d692 Clean up floating point instruction selection. 
Change int->float cast code to put conversion constants in constant pool.
Shorten code sequence for constant pool fp loads.
Remove LOADLoDirect/LOADLoIndirect psuedo instructions and tweak asmwriter


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15913 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 05:20:54 +00:00
Brian Gaeke
d6640951c2 M_DUMMY_PHI_FLAG is no longer used to distinguish V9::PHI. Get rid of it and 
its TargetInstrInfo accessor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15907 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-18 20:04:28 +00:00
Brian Gaeke
418379e229 Instead of using isDummyPhiInstr, we just compare the opcode with V9::PHI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15906 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-18 20:04:24 +00:00
Brian Gaeke
e058b27faf Instead of using isDummyPhiInstr, we just compare the opcode with V9::PHI. 
Also, squash a use of TargetInstrInfo::isNop().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15905 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-18 20:04:21 +00:00
Chris Lattner
a1e51ff2aa Convert to the new MachineFunctionInfo interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15904 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-18 18:13:37 +00:00
Brian Gaeke
5978a532e8 The SparcV9 target no longer uses any pseudoinstructions (SETSW, SETUW, 
SETX) or M_PSEUDO_FLAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15901 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-18 17:44:16 +00:00
Brian Gaeke
f84ee3865b The Create*Const methods don't need to pass around a TargetMachine reference. 
Other minor cleanups.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15900 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-18 17:44:15 +00:00
Brian Gaeke
66149920c6 Doxygenify some comments. 
Clean up cpReg2MemMI and cpMem2RegMI, and doxygenify comments.
Get rid of their uses of SETSW, which is a pseudoinstruction. We can't
JIT-compile pseudoinstructions at the moment. This was blowing up 252.eon/jit,
which has some HUGE stack frames.
Reduce the uses of constantFitsInImmedField().
Consolidate some assertions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15899 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-18 17:44:14 +00:00
Chris Lattner
883342c1e5 Switch V9 over to using the AsmPrinter base class to do its constant printing 
Massive thanks to the brg miester for doing the testing. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15898 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-18 05:29:08 +00:00
Chris Lattner
f746a7d09b Rename var 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15897 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-18 02:22:55 +00:00
Misha Brukman
5069438763 This file is no longer used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15893 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 20:23:33 +00:00
Chris Lattner
69d485e646 Start using alignment output routines from AsmPrinter. 
Changes to make this more similar to the X86 asmprinter

Fix overalignment of globals.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15891 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 19:26:03 +00:00
Chris Lattner
c6393f82bf Start using alignment output routines from AsmPrinter. 
Changes to make this more similar to the ppc asmprinter


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15890 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 19:25:42 +00:00
Chris Lattner
d2b0bb41f4 Add a new helper method to get log2(type alignment) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15887 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 19:13:00 +00:00
Chris Lattner
5676310c5d Print comments with ; 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15881 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 16:27:26 +00:00
Nate Begeman
07a73755d3 Re-fix hiding the Frame Pointer from the register allocator in functions 
that have a frame pointer.  This change fixes Burg.  In addition, make
the necessary changes to floating point code gen and constant loading after
Chris Lattner's fixes to the asm writer.  These changes fix MallocBench/gs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15873 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 07:17:44 +00:00
Chris Lattner
8581ee85b4 Use the AsmPrinter emitGlobalConstant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15872 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 06:48:55 +00:00
Chris Lattner
79835d9f9f Use the emitGlobalConstant defined in AsmPrinter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15869 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 06:37:12 +00:00
Chris Lattner
b462e47d2d New, more general, interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15866 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 06:07:43 +00:00
Misha Brukman
9e36843964 Rewrite targets/rules to generate files for just PowerPC or PPC{32,64} 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15862 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 05:11:54 +00:00
Misha Brukman
8283ec7c1c Register classes are target-dependent 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15861 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 05:10:31 +00:00
Misha Brukman
6316181ee0 #include <map> is not necessary here 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15860 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 05:09:39 +00:00
Misha Brukman
1dcddfefbd `PowerPC' is no longer a real target 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15859 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 05:09:10 +00:00
Misha Brukman
f2f8cfb945 Move variables and methods which need PPC{32,64}* distinction to subclasses 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15858 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 05:08:44 +00:00
Misha Brukman
66aa3e0e8b No need for an `is64bit' flag 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15857 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 05:06:47 +00:00
Misha Brukman
a2a27b3c85 PowerPCInstrInfo and PowerPCRegisterInfo have gone away; they are replaced 
by 32- and 64-bit customized files, named appropriately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15856 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 05:05:00 +00:00
Misha Brukman
08dde0ba85 Consistently name passed with 32 or 64 in their name 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15855 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 05:02:58 +00:00
Misha Brukman
3d58b8f531 PowerPCRegisterInfo no longer takes a bool to differentiate 32 vs 64 bits 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15854 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 05:02:18 +00:00
Misha Brukman
db50bd3e7a The PowerPCInstrInfo class has gone away. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15853 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 05:00:46 +00:00
Misha Brukman
363dd07320 PowerPCInstrInfo has gone away, PPC32 and PPC64 share opcodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15852 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 04:58:50 +00:00
Misha Brukman
adde6994ac PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15851 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 04:57:37 +00:00