Eli Friedman
30e71eb61b
Avoid crashing on a variable-index insertelement with element type i16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 06:32:50 +00:00
Eli Friedman
1041553424
Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL
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nodes for vectors with an i16 element type. Add an optimization for
building a vector which is all zeros/undef except for the bottom
element, where the bottom element is an i8 or i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 06:05:10 +00:00
Eli Friedman
9d47b8d8ea
Fix an obvious typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72987 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 05:55:37 +00:00
Bruno Cardoso Lopes
cf0a577033
x86_64 now uses the correct ELF e_machine type
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 04:29:16 +00:00
Eli Friedman
1762c1439e
Get rid of a bogus pattern that interferes with optimization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72985 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 04:17:04 +00:00
Eli Friedman
23ef105580
PR2598: make sure to expand illegal forms of integer/floating-point
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conversions for x86, like <2 x i32> -> <2 x float> and <4 x i16> ->
<4 x float>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72983 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 03:57:58 +00:00
Dan Gohman
2392efef1b
Add explicit keywords.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72969 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 23:05:51 +00:00
Devang Patel
578efa920a
Add new function attribute - noimplicitfloat
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Update code generator to use this attribute and remove NoImplicitFloat target option.
Update llc to set this attribute when -no-implicit-float command line option is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72959 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 21:57:13 +00:00
Nate Begeman
abc0199680
Adapt the x86 build_vector dagcombine to the current state of the legalizer.
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build vectors with i64 elements will only appear on 32b x86 before legalize.
Since vector widening occurs during legalize, and produces i64 build_vector
elements, the dag combiner is never run on these before legalize splits them
into 32b elements.
Teach the build_vector dag combine in x86 back end to recognize consecutive
loads producing the low part of the vector.
Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes
since that was required implicitly.
Add a testcase for the transform.
Old:
subl $28, %esp
movl 32(%esp), %eax
movl 4(%eax), %ecx
movl %ecx, 4(%esp)
movl (%eax), %eax
movl %eax, (%esp)
movaps (%esp), %xmm0
pmovzxwd %xmm0, %xmm0
movl 36(%esp), %eax
movaps %xmm0, (%eax)
addl $28, %esp
ret
New:
movl 4(%esp), %eax
pmovzxwd (%eax), %xmm0
movl 8(%esp), %eax
movaps %xmm0, (%eax)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72957 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 21:37:30 +00:00
Evan Cheng
925492279a
Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72955 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 19:08:58 +00:00
Devang Patel
6a784894b1
Evan thinks NoImplicitFloat check is not required here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72954 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 18:48:29 +00:00
Evan Cheng
87d59e49e9
When merging multiple load / store instructions. Use the DebugLoc of the first one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 18:19:23 +00:00
Evan Cheng
5ba71887f9
Code clean up: return vector by reference rather than by value. No functionality changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72950 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 17:56:14 +00:00
Dan Gohman
c965ee223c
Remove some unnecessary #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72948 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 16:32:58 +00:00
Sanjiv Gupta
4680077959
Lower i16/i32 sdiv/udiv/srem/urem using libcalls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72942 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 14:43:12 +00:00
Dan Gohman
9f5f322a03
Fix an erroneous check for isFNeg; the FNeg case is handled
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a few lines later on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72904 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 23:43:29 +00:00
Bill Wendling
e075a62746
The DWARF unwind info was incorrect. While compiling with
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`-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a
lot of function, and then they would be `0'. The linker (at least on Darwin)
needs to encode the stack size. In some cases, the stack size is too large to
directly encode. So the linker checks to see if there is a "subl $xxx,%esp"
instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If
so, the compact encoding records the offset in the function to where the stack
size is embedded. But because the `DW_CFA_advance_loc' instructions are missing,
it looks before the function and dies.
So, instead of emitting the EH debug label before the stack adjustment
operations, emit it afterwards, right before the frame move stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72898 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:52:30 +00:00
Dan Gohman
ae3a0be92e
Split the Add, Sub, and Mul instruction opcodes into separate
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integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
Devang Patel
d18e31ae17
Add new function attribute - noredzone.
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Update code generator to use this attribute and remove DisableRedZone target option.
Update llc to set this attribute when -disable-red-zone command line option is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:05:33 +00:00
Dale Johannesen
4c9369df57
Fix FP_TO_UINT->i32 on ppc32 -mcpu=g5. This was
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using Promote which won't work because i64 isn't
a legal type. It's easy enough to use Custom, but
then we have the problem that when the type
legalizer is promoting FP_TO_UINT->i16, it has no
way of telling it should prefer FP_TO_SINT->i32
to FP_TO_UINT->i32. I have uncomfortably hacked
this by making the type legalizer choose FP_TO_SINT
when both are Custom.
This fixes several regressions in the testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72891 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 20:53:52 +00:00
Sanjiv Gupta
82f1d1b572
Remove unused code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 15:16:24 +00:00
Sanjiv Gupta
3b0a4f186b
Custom lower SUB with two register operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72861 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 08:52:28 +00:00
Eli Friedman
bccf4b3050
PR3739, part 2: Use an explicit store to spill XMM registers. (Previously,
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the code tried to use "push", which doesn't exist for XMM registers.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 02:32:04 +00:00
Eli Friedman
9a41712122
PR3739, part 1: Disable the red zone on Win64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72830 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 02:02:01 +00:00
Evan Cheng
1488326156
Re-apply 72756 with fixes. One of those was introduced by we changed MachineInstrBuilder::addReg() interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72826 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 01:15:28 +00:00
Stuart Hastings
d58902a19b
Evan says it's wrong; back out 72808.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 22:59:34 +00:00
Stuart Hastings
77648cfd75
Recognize another euphemism for MOVDQ2Q.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 21:39:14 +00:00
Evan Cheng
424f8f339a
For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.
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I view this as a temporary workaround until the assembler / linker changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72806 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 21:13:54 +00:00
Dan Gohman
9911405183
Convert Alpha and Mips to use a MachineFunctionInfo subclass to
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carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This
eliminates the need for them to search through the
MachineRegisterInfo livein list in order to identify these
virtual registers. EmitLiveInCopies is now the only user of the
virtual register portion of MachineRegisterInfo's livein data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72802 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 20:30:14 +00:00
Dan Gohman
c553462c29
Remove the redundant TM member from X86DAGToDAGISel; replace it
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with an accessor method which simply casts the parent class
SelectionDAGISel's TM to the target-specific type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72801 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 20:20:00 +00:00
Mike Stump
222858256f
Make the buildbot see green (to make it easier to spot the next person
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that puts a new warning in).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72797 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 19:07:46 +00:00
Dan Gohman
974d90bb70
Remove unnecessary #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72782 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 16:47:12 +00:00
Sanjiv Gupta
3fc7e532aa
Emit file directives correctly in case of a .bc is generated by llvm-ld after linking in several .bc files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 16:27:49 +00:00
Sanjiv Gupta
892c8caa3c
FrameIndex could be used as a value (addressof (arg)) or as an address.
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Expand it exactly like GlobalAddress.
Fix some more crashes (InsertBranch() not being implemented) for compiling hitec libs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72776 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 15:31:12 +00:00
Sanjiv Gupta
703e235f0c
Fixed a bug in which signed comparisons were being used instead of unsigned comparisons.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72771 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 13:36:44 +00:00
Duncan Sands
12513889fd
Avoid a warning "'U' might be used uninitialized in
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this function" when using a not-too-smart compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 12:05:18 +00:00
Evan Cheng
70fd60bd57
Temporarily revert 72756 for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72757 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 07:40:47 +00:00
Evan Cheng
9d5fb981b0
Fold preceding / trailing base inc / dec into the single load / store as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72756 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 06:14:58 +00:00
Dan Gohman
6ecc2602a6
Revert r72734. The Darwin assembler doesn't support the static
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relocation model on x86-64. Higher level logic should override
the relocation model to PIC on x86_64-apple-darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 00:37:20 +00:00
Evan Cheng
da9863fa41
On Darwin x86_64 small code model doesn't guarantee code address fits in 32-bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-02 20:09:31 +00:00
Dale Johannesen
874ae251c3
Revert 72707 and 72709, for the moment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72712 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-02 03:12:52 +00:00
Dale Johannesen
ca46fdd284
Add missing file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72709 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-01 23:48:58 +00:00
Dale Johannesen
4150d83abe
Make the implicit inputs and outputs of target-independent
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ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag. Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.
Most targets will still produce a Flag-setting target-dependent
version when selection is done. X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc. This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted. All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly. The
same can be done on other targets.
The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-01 23:27:20 +00:00
Dale Johannesen
8313899851
Comment grammaro/clarification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-01 23:13:42 +00:00
Dale Johannesen
69bbb4cd39
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-01 23:12:52 +00:00
Anton Korobeynikov
70459bef9c
Implement review feedback. Make thumb2 'normal' subtarget feature
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-01 20:00:48 +00:00
Bruno Cardoso Lopes
434dd4fd94
Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-01 19:57:37 +00:00
Anton Korobeynikov
d260c248ab
Do not emit "generic" CPU string. This fixes PR4291.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72696 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-01 19:03:17 +00:00
Dan Gohman
2d98f0664b
Fix a grammaro and clarify a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72668 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-31 17:52:18 +00:00
Bruno Cardoso Lopes
a3f99f9033
First patch in the direction of splitting MachineCodeEmitter in two subclasses:
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JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-30 20:51:52 +00:00
Evan Cheng
cf7895ff8b
(i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear the top 8 bits.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72618 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-30 08:43:27 +00:00
Bill Wendling
51b16f4737
Untabification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72604 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-30 01:09:53 +00:00
Anton Korobeynikov
d4022c3fbb
Add placeholder for thumb2 stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72593 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-29 23:41:08 +00:00
Evan Cheng
cb219f0ef6
More h-registers tricks: folding zext nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-29 01:44:43 +00:00
Bill Wendling
2265ba0717
The MONITOR and MWAIT instructions have insufficient information for
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decoding. Essentially, they both map to the same column in the "opcode
extensions for one- and two-byte opcodes" table in the x86 manual. The RawFrm
complicates decoding this.
Instead, use opcode 0x01, prefix 0x01, and form MRM1r. Then have the code
emitter special case these, a la [SML]FENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72556 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 23:40:46 +00:00
Evan Cheng
8a0b2daac2
Fix MOVMSKPDrr encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72535 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 18:55:28 +00:00
Evan Cheng
ed7f56b555
Fix PSIGND encoding bug. Patch by Sean Callanan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72534 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 18:48:53 +00:00
Sanjiv Gupta
dd4694b519
Emit debug info for locals with proper scope.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72531 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 18:24:11 +00:00
Sanjiv Gupta
a455942895
Mark the branch insns correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72529 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 17:32:56 +00:00
Sanjiv Gupta
df75a27609
Fixing problems that got exposed after the refactoring of LegalizeDAG done in 72447.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72521 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 06:59:57 +00:00
Eli Friedman
c06441e5ea
Return the operand rather than a null SDValue when the given SELECT_CC
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is actually legal. Part of LegalizeDAG cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72513 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 04:31:08 +00:00
Jeffrey Yasskin
2d92c71668
This patch brings the list of attributes in CPPBackend.cpp up to date with the
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list in Attributes.h. It also reorders the CPPBackend list to match so that
it's easier to see that it's complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 03:16:17 +00:00
Bill Wendling
3b1259bb9f
"The instructions MMX_PSADBWrm and MMX_PSADBWrr have opcode 0b11100000 (e0), but
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the Intel manual (screenshot) says it should be 0b11110110 (f6). The existing
encoding causes a disassembly conflict with MMX_PAVGBrm, which really should be
0f e0."
Patch by Sean Callanan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 02:04:00 +00:00
Evan Cheng
8b944d39b3
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.
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e.g.
orl $65536, 8(%rax)
=>
orb $1, 10(%rax)
Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72507 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 00:35:15 +00:00
Eli Friedman
ba2352b066
Ger rid of some dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-27 20:39:00 +00:00
Evan Cheng
bc9be219d6
Fix sfence jit encoding. Patch by Sean Callanan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72488 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-27 18:38:01 +00:00
Bruno Cardoso Lopes
d3bdf19ce7
Added support for fround, fextend and FP_TO_SINT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72483 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-27 17:23:44 +00:00
Eli Friedman
36df499648
Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and
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FP_TO_XINT. Necessary for some cleanups I'm working on. Updated
from the previous version (r72431) to fix a bug and make some things a
bit clearer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72445 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-27 00:47:34 +00:00
Daniel Dunbar
82205570d1
Back out r72431, it is causing a number of compilation crashes with clang.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72436 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-26 21:27:02 +00:00
Stefanus Du Toit
8cf5ab153d
Update CPU capabilities for AMD machines
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- added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and
barcelona with appropriate sse3/4a levels
- added FeatureSSE4A for amdfam10 processors
in X86Subtarget:
- added hasSSE4A
- updated AutoDetectSubtargetFeatures to detect SSE4A
- updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and
family 10h as amdfam10
New processor names match those used by gcc.
Patch by Paul Redmond!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-26 21:04:35 +00:00
Eli Friedman
ecc23a5240
Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and
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FP_TO_XINT. Necessary for some cleanups I'm working on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72431 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-26 19:18:56 +00:00
Chris Lattner
d9b77159d6
add some late optimizations that GCC does. It thinks these are a win
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even on Core2, not just AMD processors which was a surprise to me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72396 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-25 20:28:19 +00:00
Chris Lattner
0c85aabfdc
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72395 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-25 19:51:07 +00:00
Chris Lattner
f9dc644936
we should eventually add -march=atom and the new atom movbe instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72387 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-25 16:34:44 +00:00
Eli Friedman
1a8229b162
Make the PPC backend use a legal type for the operands to the BUILD_VECTOR
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nodes it generates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72356 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-24 02:03:36 +00:00
Eli Friedman
108b519cc1
Make the X86 backend mark EXTRACT_SUBVECTOR as Expand, at least for the
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moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72350 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-23 22:44:52 +00:00
Anton Korobeynikov
6d7d2aa38a
Add ARMv7 architecture, Cortex processors and different FPU modes handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72337 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-23 19:51:43 +00:00
Anton Korobeynikov
88ce667003
Emit ARM Build Attributes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-23 19:51:20 +00:00
Anton Korobeynikov
41a024385f
Propagate CPU string out of SubtargetFeatures
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72335 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-23 19:50:50 +00:00
Eli Friedman
948e95a381
Make the x86 backend custom-lower UINT_TO_FP and FP_TO_UINT on 32-bit
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systems instead of attempting to promote them to a 64-bit SINT_TO_FP or
FP_TO_SINT. This is in preparation for removing the type legalization
code from LegalizeDAG: once type legalization is gone from LegalizeDAG,
it won't be able to handle the i64 operand/result correctly.
This isn't quite ideal, but I don't think any other operation for any
target ends up in this situation, so treating this case specially seems
reasonable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72324 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-23 09:59:16 +00:00
Oscar Fuentes
a2ac75d547
CMake: Use libpthread in tblgen when needed. Updated list of source
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files for PIC16 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72277 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-22 20:55:15 +00:00
Bob Wilson
2f95461ee2
Only 64-bit targets support TImode libcalls. Disable the TImode shift libcalls
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for ARM. This fixes rdar://6908807.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72269 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-22 17:38:41 +00:00
Sanjiv Gupta
a57bc3ba02
Emit debug information for globals (which include automatic variables as well because on PIC16 they are emitted as globals by the frontend).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72262 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-22 13:58:45 +00:00
Bob Wilson
261f2a2337
Minor formatting fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72172 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-20 16:30:25 +00:00
Evan Cheng
d7f666a869
Try again. Allow call to immediate address for ELF or when in static relocation mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72160 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-20 04:53:57 +00:00
Evan Cheng
65cdee3fd4
Cannot use immediate as call absolute target in PIC mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72154 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-20 01:11:00 +00:00
Bob Wilson
6aa219a18c
Fix pr4227: Handle large immediate values in inline assembly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72138 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-19 21:27:57 +00:00
Bob Wilson
86c212e894
Follow up on new support for memory operands in ARM inline assembly.
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This fixes pr4233.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72115 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-19 18:33:02 +00:00
Bob Wilson
04746eae49
Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and
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the stack. Patch by Sandeep Patel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72106 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-19 10:02:36 +00:00
Bob Wilson
224c244f56
Fix pr4091: Add support for "m" constraint in ARM inline assembly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72105 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-19 05:53:42 +00:00
Dale Johannesen
f4786cc07a
Spacing fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-19 00:46:42 +00:00
Dale Johannesen
94c9cd17de
Add OpSize to 16-bit ADC and SBB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-18 21:41:59 +00:00
Bob Wilson
e6abdffe06
Fix pr4202: Disable CodePlacementOpt for ARM. The ARMConstantIslandPass has
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to run last because it needs to know the exact size and position of every
basic block. Currently CodePlacementOpt is set up to run last. It might be
worthwhile to investigate reordering these passes, but for now, let's just
make it work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72037 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-18 20:55:32 +00:00
Dale Johannesen
ca11dae4a4
Fill in the missing patterns for ADC and SBB.
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Some comment cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-18 17:44:15 +00:00
Anton Korobeynikov
e4fdb8b8ff
Mark rotl/rotr as expand. This generates pretty ugly code, but this is better than nothing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-17 10:16:28 +00:00
Anton Korobeynikov
aceb620de8
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71975 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-17 10:15:22 +00:00
Jakob Stoklund Olesen
b5426457f0
Fix a missing def-flag on a Mips epilogue load.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71935 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-16 07:26:06 +00:00
Jakob Stoklund Olesen
f2c3f6a855
Remember to set def-flag on register loaded from stack slot in CellSPU.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71934 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-16 07:25:44 +00:00
Mike Stump
11adeed8b3
Reflow to fit 80-col.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-14 23:23:37 +00:00
Mike Stump
6726be6a67
Reflow to fit 80-col.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71812 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-14 23:22:47 +00:00
Jim Grosbach
f957012866
Update the names of the exception handling sjlj instrinsics to
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llvm.eh.sjlj.* for better clarity as to their purpose and scope. Add
a description of llvm.eh.sjlj.setjmp to ExceptionHandling.html.
(llvm.eh.sjlj.longjmp documentation coming when that implementation is
added).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71758 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-14 00:46:35 +00:00
Jim Grosbach
6aa7197fb5
Spelling correction s/builting/builtin/ and remove trailing whitespace in a few places
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71735 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13 22:32:43 +00:00
Evan Cheng
6ebf7bc740
Run code placement optimization for targets that want it (arm and x86 for now).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71726 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13 21:42:09 +00:00
Bill Wendling
587daedce2
Change MachineInstrBuilder::addReg() to take a flag instead of a list of
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booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.
I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13 21:33:08 +00:00
Sanjiv Gupta
ad6585b021
Run through the list of globals once and sectionize all types of globlas includeing declarations. Later emit them from their section lists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13 15:13:17 +00:00
Dale Johannesen
7b9486ad43
Add an int64_t variant of abs, for host environments
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without one. Use it where we were using abs on
int64_t objects.
(I strongly suspect the casts to unsigned in the
fragments in LoopStrengthReduce are not doing whatever
the original intent was, but the obvious change to
uint64_t doesn't work. Maybe later.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71612 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13 00:24:22 +00:00
Jim Grosbach
0e0da734bb
Add support for GCC compatible builtin setjmp and longjmp intrinsics. This is
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a supporting preliminary patch for GCC-compatible SjLJ exception handling. Note that these intrinsics are not designed to be invoked directly by the user, but
rather used by the front-end as target hooks for exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 23:59:14 +00:00
Jim Grosbach
c93f961874
correct register class for tADDspi to GPR since the register will always be SP
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 22:30:18 +00:00
Bill Wendling
b877a1f545
More MSVC fixes -- class/struct conflicts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71601 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 21:55:29 +00:00
Evan Cheng
0af934eb64
80 col violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71582 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 20:17:52 +00:00
Bob Wilson
39bf051ec2
Fix up a few minor typos in comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71563 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 17:35:29 +00:00
Bob Wilson
8494526a23
Fix 80-col violations and remove trailing whitespace. No functional changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 17:09:30 +00:00
Sanjiv Gupta
2364cfeb54
Iterate over globals once and sectionize them into appropriate sections.
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Later in asmprinter, go over thsese sections and print them.
Do not print empty sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 17:07:27 +00:00
Sanjiv Gupta
429185787a
We do not need to create a label for external defs and decls,
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just emit a comment for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71544 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 06:52:41 +00:00
Sanjiv Gupta
ed4f4fbfba
Mark mayLoad, mayStore for insns correctly and use them
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to check if an insn is accessing memory during mem sel optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71537 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 04:30:38 +00:00
Dan Gohman
81db61a2e6
Factor the code for collecting IV users out of LSR into an IVUsers class,
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and generalize it so that it can be used by IndVarSimplify. Implement the
base IndVarSimplify transformation code using IVUsers. This removes
TestOrigIVForWrap and associated code, as ScalarEvolution now has enough
builtin overflow detection and folding logic to handle all the same cases,
and more. Run "opt -iv-users -analyze -disable-output" on your favorite
loop for an example of what IVUsers does.
This lets IndVarSimplify eliminate IV casts and compute trip counts in
more cases. Also, this happens to finally fix the remaining testcases
in PR1301.
Now that IndVarSimplify is being more aggressive, it occasionally runs
into the problem where ScalarEvolutionExpander's code for avoiding
duplicate expansions makes it difficult to ensure that all expanded
instructions dominate all the instructions that will use them. As a
temporary measure, IndVarSimplify now uses a FixUsesBeforeDefs function
to fix up instructions inserted by SCEVExpander. Fortunately, this code
is contained, and can be easily removed once a more comprehensive
solution is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71535 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 02:17:14 +00:00
Evan Cheng
6ed34918eb
Avoid unneeded SIB byte encoding. Patch by Zoltan Varga.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 00:07:35 +00:00
Jay Foad
8d730fbde5
Don't #include DerivedTypes.h from TargetData.h.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 19:38:09 +00:00
Dan Gohman
1f3be1a1fe
Fix two wording errors that Duncan spotted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71459 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 18:51:16 +00:00
Dan Gohman
0d9bb68d6d
LLVM has unaligned loads and stores now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71449 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 18:06:05 +00:00
Dan Gohman
5c8274b5e3
Upgrade this example to new-style syntax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71447 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 18:04:52 +00:00
Dan Gohman
3cd90a18bb
Convert a subtract into a negate and an add when it helps x86
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address folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71446 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 18:02:53 +00:00
Chris Lattner
32c5f17024
remove some done things: we have nocapture and SROA is smarter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71443 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 17:41:40 +00:00
Chris Lattner
d919a8bc8a
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71442 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 17:36:33 +00:00
Jay Foad
7524b59062
Change TargetData::getIntPtrType() to return an IntegerType instead of
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just a Type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71426 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 11:13:47 +00:00
Sanjiv Gupta
e0b4b0e436
Fix more naming issues.
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compiler libcalls start with .lib. now.
fixed section names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71424 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 08:52:04 +00:00
Sanjiv Gupta
0608b49819
Detect calls to compiler intrinsics and emit an extern declarations
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only for those. These extern declarations to intrinsics are currently
being emitted at the bottom of generated .s file, which works fine with
gpasm(not sure about MPSAM though).
PIC16 linker generates errors for few cases (function-args/struct_args_5) if you do not include any
extern declarations (even if no intrinsics are being used), but that
needs to be fixed in the linker itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 06:01:38 +00:00
Sanjiv Gupta
af3fdb5dc4
Module iterator contains list of filescope functions as well, we don't need to emit and global declarations for them. This was working earlier and was broken during one of the recent commit for PIC16 naming.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71394 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-10 16:18:39 +00:00
Anton Korobeynikov
9c11d21d90
Add imm-reg and imm-mem patters for cmp on msp430
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(imm is allowed to be source operand, not dest...)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71393 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-10 14:49:00 +00:00
Sanjiv Gupta
211f3624ef
Changed lowering and asmprinter to use ABI Names class called PAN.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71386 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-10 05:23:47 +00:00
Eli Friedman
cea03cdb69
Remove a completed optimization. Add a potential optimization I ran
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into.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71352 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-09 08:40:15 +00:00
Duncan Sands
777d2306b3
Rename PaddedSize to AllocSize, in the hope that this
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will make it more obvious what it represents, and stop
it being confused with the StoreSize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71349 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-09 07:06:46 +00:00
Sanjiv Gupta
09560f805e
Use 16 bit arithmetic while retrieving the address of callee's frame during indirect function calls, and set pclath before every call to retrieve the frame address.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71323 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-09 05:11:19 +00:00
Evan Cheng
82ae933e55
PPC::B and PPC::BCC's target operand may be an immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71282 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-08 23:09:25 +00:00
Anton Korobeynikov
c1c6ef8f74
Factor out cycle-finder code and make it generic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71241 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-08 18:51:58 +00:00
Anton Korobeynikov
da4d2f63d8
Allow 8 bit select in custom inserter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71239 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-08 18:51:21 +00:00
Anton Korobeynikov
0616c3b678
Expand UREM / SREM into libcalls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71236 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-08 18:50:41 +00:00
Anton Korobeynikov
1cb0acee8a
Add 8 bit select
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71235 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-08 18:50:26 +00:00
Chris Lattner
4992196322
Fix PR4152: asm constraint validation happens before dag combine, so we
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need to work a bit to combine things like (x+c1+c2) into x+c3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71232 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-08 18:23:14 +00:00
Evan Cheng
45e0010e14
Optimize code placement in loop to eliminate unconditional branches or move unconditional branch to the outside of the loop. e.g.
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/// A:
/// ...
/// <fallthrough to B>
///
/// B: --> loop header
/// ...
/// jcc <cond> C, [exit]
///
/// C:
/// ...
/// jmp B
///
/// ==>
///
/// A:
/// ...
/// jmp B
///
/// C: --> new loop header
/// ...
/// <fallthough to B>
///
/// B:
/// ...
/// jcc <cond> C, [exit]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71209 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-08 06:34:09 +00:00
Nick Lewycky
4a228864f2
Add missing #include for "strlen" which is used inline in this header. Fixes
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build under gcc 4.3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71208 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-08 06:22:25 +00:00
Sanjiv Gupta
573eb5e573
Moved pic16 naming functions to correct place.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71207 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-08 04:50:14 +00:00
Evan Cheng
a9bb0675e5
Eliminate compiler warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71149 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-07 05:31:56 +00:00
Oscar Fuentes
d5e8d821dd
CMake: Updated lib/Target/PIC16/CMakeLists.txt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71115 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-06 20:40:05 +00:00
Dale Johannesen
43e91b9c2f
Use X86AddrNumOperands instead of magic constant one
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more place. This fixes a bunch of x86-64 JIT regressions.
(Introduced when the value of the magic constant changed
in 68645. At the time apparently nobody noticed; failures
were hidden in 70343-70439 by an unrelated bug, so showed
up again as "new" failures in 70440.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71106 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-06 19:04:30 +00:00
Sanjiv Gupta
d8d27f4a4b
Emit banksel and movlp instructions.
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Split large global data (both initialized and un-initialized) into multiple sections of <= 80 bytes.
Provide routines to manage PIC16 ABI naming conventions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71073 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-06 08:02:01 +00:00
Chris Lattner
1777d0c6c5
Add basic support for code generation of
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addrspace(257) -> FS relative on x86. Patch by Zoltan Varga!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-05 18:52:19 +00:00
Evan Cheng
ef1840173c
Revert part of 70929 that has to do with determining whether a SIB byte is needed. It causes a lot of x86_64 JIT failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-05 18:18:57 +00:00
Evan Cheng
d923fc621f
Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70950 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-05 00:30:09 +00:00
Evan Cheng
b0030ddca4
- Avoid the longer SIB encoding on x86_64 when it's not needed.
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- Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp
Patch by Zoltan Varga.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70929 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04 22:49:16 +00:00
Dan Gohman
7d04e4a7c0
X86FastISel doesn't support the -tailcallopt ABI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70902 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04 19:50:33 +00:00
Anton Korobeynikov
cffb5284f1
Fix code emission for conditional branches.
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Patch by Collin Winter!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70898 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04 19:10:38 +00:00
Mike Stump
fe095f39e7
Restore minor deletion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70892 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04 18:40:41 +00:00
Anton Korobeynikov
87e3caf819
Handle implicit zext in a better way. Shamelessly stolen from x86 backend.
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Thanks for Dan Gohman for suggestion!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70782 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 15:50:18 +00:00
Anton Korobeynikov
60871cb40c
Update due to mainline API change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70769 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:19:42 +00:00
Anton Korobeynikov
7594884648
Add TODO list :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:19:24 +00:00
Anton Korobeynikov
1bb8cd723d
Make handling of conditional stuff much more straightforward
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:19:09 +00:00
Anton Korobeynikov
1fcfb6b6d2
Temporary disable imm patterns for cmp. Actually, all cmp-related stuff (select_cc, setcc, br_cc). needs to be rethought
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70766 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:18:50 +00:00
Anton Korobeynikov
f2f540261b
Expand divisions into libcalls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:18:33 +00:00
Anton Korobeynikov
b78e214274
Custom lower SIGN_EXTEND
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70763 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:17:49 +00:00
Anton Korobeynikov
1394db0eeb
Some eye-candy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70762 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:17:31 +00:00
Anton Korobeynikov
6130fc8ea3
Print function header / footer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70761 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:17:11 +00:00
Anton Korobeynikov
d9e89f6ea4
Fix printing: je => jeq
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70760 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:16:54 +00:00
Anton Korobeynikov
bf8ef3f29d
Add 8bit shifts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70759 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:16:37 +00:00
Anton Korobeynikov
e699d0f549
Handle logical shift right (at least I hope so :) )
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70758 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:16:17 +00:00
Anton Korobeynikov
e375a7c768
Handle anyext
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70757 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:15:57 +00:00
Anton Korobeynikov
0dbf292f68
Expand all sorts of indirect branches
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70755 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:15:40 +00:00
Anton Korobeynikov
8644af3690
Add InsertBranch() hook for tail mergeing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70754 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:15:22 +00:00
Anton Korobeynikov
49ebc22784
Implement bswap
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70753 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:15:03 +00:00
Anton Korobeynikov
5d59f68ade
Properly handle ExternalSymbol's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70752 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:14:46 +00:00
Anton Korobeynikov
8725bd22bf
Expand muls (all mulls!) to libcalls for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:14:25 +00:00
Anton Korobeynikov
b8f03c9578
Provide addc and subc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70748 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:13:34 +00:00
Anton Korobeynikov
ea54c9846b
Add left shift
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70747 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:13:17 +00:00
Anton Korobeynikov
824d8ddae8
Add direct branch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:12:58 +00:00
Anton Korobeynikov
0af5af823b
It's error-prone to maintain two separate variants of asmprinting stuff, one of which is even used. Drop second (aka 'intel') variant of operands. It can be added later, if needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:12:37 +00:00
Anton Korobeynikov
8b528e52ee
Lower select with custom inserted and make condjumps generic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:12:23 +00:00
Anton Korobeynikov
ed1a51af37
Add first draft for conditions, conditional branches, etc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:12:06 +00:00
Anton Korobeynikov
6e4f62790b
Hanle i8 returns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:11:48 +00:00
Anton Korobeynikov
c08163e72d
Small tweaking
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70741 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:11:35 +00:00
Anton Korobeynikov
ce45d30fa1
Add prologue/epilogue emission. Fix frame pointer handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:11:20 +00:00
Anton Korobeynikov
d5047cb9f7
Add code for save/restore of callee-saved registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:11:04 +00:00
Anton Korobeynikov
875e1eb8ab
Two more hooks for RA and FP registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70738 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:10:40 +00:00
Anton Korobeynikov
40477317f3
Proper handle loading of effective address of stack slot stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:10:26 +00:00
Anton Korobeynikov
82e46c2595
Match frame indexes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:10:11 +00:00
Anton Korobeynikov
aa29915b58
First draft of stack slot loads / stores lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70735 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:09:57 +00:00
Anton Korobeynikov
cf14ae5500
Reverse order of memory arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:09:40 +00:00
Anton Korobeynikov
aecfa7897f
Remove bogus pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70733 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:09:24 +00:00
Anton Korobeynikov
1deea5f3a7
Correct asmprinting of memory operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70732 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:09:10 +00:00
Anton Korobeynikov
0eb6af40e3
Match wrapper node for address
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70731 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:08:51 +00:00
Anton Korobeynikov
3513ca81c6
Add lowering for global address nodes. Not pretty efficient though.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70730 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:08:33 +00:00
Anton Korobeynikov
3c2684d136
Some early full call lowering draft for direct calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:08:13 +00:00
Anton Korobeynikov
b561264d2b
Add call frame setup instruction elimination and lowerid for bunch of call-related stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70728 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:07:54 +00:00
Anton Korobeynikov
4428885c5a
Add CALL lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:07:31 +00:00
Anton Korobeynikov
01e0e8d119
Add bunch of mem-whatever patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70726 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:07:10 +00:00
Anton Korobeynikov
2682bf5979
Add bunch of reg-mem inst patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70725 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:06:46 +00:00
Anton Korobeynikov
54f30d3fc9
Add normal and trunc stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:06:26 +00:00
Anton Korobeynikov
36b6e533c1
Basic support for mem=>reg moves
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:06:03 +00:00
Anton Korobeynikov
51c31d6888
Add 8-bit insts. zext behaviour is not modelled yet
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70722 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:05:42 +00:00
Anton Korobeynikov
cf9adf2cbb
Add 8-bit regclass and pattern for sext_inreg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70721 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:05:22 +00:00
Anton Korobeynikov
0fc32dae8f
Add pattern for OR
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:05:00 +00:00
Anton Korobeynikov
6ee626a1c1
Add reg-imm variants
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70719 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:04:41 +00:00
Anton Korobeynikov
c8166ac760
Add hint to nop
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70718 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:04:23 +00:00
Anton Korobeynikov
0ba0a89c6b
Add more instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70717 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:04:06 +00:00
Anton Korobeynikov
b8639f5214
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70716 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:03:50 +00:00
Anton Korobeynikov
d2c94ae49e
Add dummy lowering for shifts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:03:33 +00:00
Anton Korobeynikov
1476d97037
We don't have any div at all - thus mark it as expensive
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70714 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:03:14 +00:00
Anton Korobeynikov
8d7bb3998b
We're not going to spend 100% of time in interrupts, do we? :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70713 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:02:57 +00:00
Anton Korobeynikov
431beb5fa7
Add simple reg-reg add.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70712 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:02:39 +00:00
Anton Korobeynikov
fff5f76c46
gas uses lower letter for register names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:02:22 +00:00
Anton Korobeynikov
1df221f2bb
Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70710 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:02:04 +00:00
Anton Korobeynikov
09c42f509a
Add function body printing routine
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70709 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:01:41 +00:00
Anton Korobeynikov
f3085ac973
Add 'msp430' target triple recognizer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70708 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:01:23 +00:00
Anton Korobeynikov
e37db97928
Make emit{Prologue,Epilogue}() noop for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:01:04 +00:00
Anton Korobeynikov
fbf165a74b
Add callee-saved regs & reg classes getter hooks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:00:46 +00:00
Anton Korobeynikov
3a4fbcfd33
Add simple FP indicator for given function hook
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:00:28 +00:00
Anton Korobeynikov
dcb802cf7b
Provide set of reserved registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70704 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:00:11 +00:00
Anton Korobeynikov
fd1b7c778c
Add proper ISD::RET lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70703 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:59:50 +00:00
Anton Korobeynikov
c8fbb6ae20
Add first draft of MSP430 calling convention stuff and draft of ISD::FORMAL_ARGUMENTS node lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70702 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:59:33 +00:00
Anton Korobeynikov
2dd6cdc920
Fix register names, fix register allocation order, handle frame pointer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70701 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:59:16 +00:00
Anton Korobeynikov
43ed64a182
Clearify the usage and add some debug stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70700 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:58:58 +00:00
Anton Korobeynikov
9e12339cb2
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70699 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:58:40 +00:00
Anton Korobeynikov
b78e17b33a
Add cmake script. No idea whether it works or not :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:58:22 +00:00
Anton Korobeynikov
fe3fc5ace7
Add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:58:05 +00:00
Anton Korobeynikov
f99601fab4
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70695 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:57:47 +00:00
Anton Korobeynikov
f2c3e179ec
Dummy MSP430 backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70694 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:57:15 +00:00
Chris Lattner
c650f1f141
'The attached patch fixes an issue where llc -march=cpp fails with
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"Invalid primitive type" on input containing the x86_fp80 type.'
Patch by Collin Winter!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01 23:54:26 +00:00
Argyrios Kyrtzidis
9eddfd3687
Fix compilation for some targets other than x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70522 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 23:50:26 +00:00
Argyrios Kyrtzidis
a26eae64dd
Make DebugLoc independent of DwarfWriter.
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-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 23:22:31 +00:00
Jakob Stoklund Olesen
ba67d87fe4
getCommonSubClass() - Calculate the largest common sub-class of two register
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classes.
This is implemented as a function rather than a method on TargetRegisterClass
because it is symmetric in its arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70512 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 21:23:32 +00:00
Dan Gohman
78e04d4aa0
Set mayLoad on MOVZX32_NOREXrm8 too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70466 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 03:11:48 +00:00
Evan Cheng
8c1474050d
Mark MOV8mr_NOREX and MOV8rm_NOREX as mayStore / mayLoad respectively.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70461 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 00:58:57 +00:00
Chris Lattner
cf189964d7
remove progname which is never set. PR4085
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70453 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 00:24:33 +00:00
Bill Wendling
98a366d547
Instead of passing in an unsigned value for the optimization level, use an enum,
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which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 23:29:43 +00:00
Nate Begeman
ec8eee2d3a
Fix infinite recursion in the C++ code which handles movddup by making it unnecessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 22:47:44 +00:00
Nate Begeman
5a5ca1519e
Implement review feedback for vector shuffle work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 05:20:52 +00:00
Sanjiv Gupta
a3518a1d6a
Add a public method called getAddressSpace() to the GlobalAddressSDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 04:43:24 +00:00
Bill Wendling
be8cc2a3de
Second attempt:
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Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 00:15:41 +00:00
Anton Korobeynikov
573c92d8ba
Properly print 'P' modifier on inline asm memory operands.
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This should fix PR3379 and PR4064.
Patch inspired by Edwin Török!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 21:49:33 +00:00
Sanjiv Gupta
23b0543e3f
GlobalValue is always pointer type, so an assert isn't required.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70300 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 16:39:45 +00:00
Bill Wendling
c69d56f115
r70270 isn't ready yet. Back this out. Sorry for the noise.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 01:04:53 +00:00
Bill Wendling
2e9d5f912a
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
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use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 00:21:31 +00:00
Nate Begeman
9008ca6b6b
2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.
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PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70225 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 18:41:29 +00:00
Dan Gohman
4af325d1b4
Rename GR8_ABCD to GR8_ABCD_L and create GR8_ABCD_H, and use these
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to precisely describe the h-register subreg register classes.
Thanks to Jakob Stoklund Olesen for spotting this and for the
initial patch!
Also, make getStoreRegOpcode and getLoadRegOpcode aware of the
needs of h registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 16:41:36 +00:00
Dan Gohman
6241762c5a
Rename GR8_, GR16_, GR32_, and GR64_ to GR8_ABCD, GR16_ABCD,
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GR32_ABCD, and GR64_ABCD, respectively, to help describe them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70210 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 16:33:14 +00:00
Dan Gohman
4d47b9bcb9
Break up long multi-mnemonic strings into separate lines for readability.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70209 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 15:13:28 +00:00
Mon P Wang
a7e01d7efd
Revised 68749 to allow matching of load/stores for address spaces < 256.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70197 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 07:22:10 +00:00
Chris Lattner
bc58322d6a
add support for detecting process features on win64, patch by
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Nicolas Capens!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25 18:27:23 +00:00
Bob Wilson
8091524d98
Change LowerCallResult method so that CCValAssign::BCvt can be used with
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f64 types. This is not used for anything yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25 00:33:20 +00:00
Bob Wilson
d55bd51f31
Adjust a comment to reflect what the code does. Splitting a 64-bit argument
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between registers and the stack may be required with the APCS ABI, but it
isn't tied to using a particular version of the ARM architecture.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 17:05:01 +00:00
Bob Wilson
4d59e1d666
Fix up some problems with getCopyToReg and getCopyFromReg nodes being
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chained and "flagged" together. I also made a few changes to handle the
chain and flag values more consistently. I found these problems by
inspection so I'm not aware of anything that breaks because of them
(thus no testcase).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69977 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 17:00:36 +00:00
Bob Wilson
1c2c462d0f
Remove unnecessary references to f32 types. After specifying that f32
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should be bit-converted to i32, it is sufficient to list only i32 in
subsequent definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 16:55:25 +00:00
Rafael Espindola
15f1b66d64
Fix PR 4004 by including the call to __tls_get_addr in X86tlsaddr. This is not
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very elegant, but neither is the tls specification :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 12:59:40 +00:00
Rafael Espindola
15684b2955
Revert 69952. Causes testsuite failures on linux x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 12:40:33 +00:00
Nate Begeman
b706d29f9c
PR2957
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ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 03:42:54 +00:00
Dan Gohman
f1d012c595
Fix spurious indentation in a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69934 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 22:41:05 +00:00
Sanjiv Gupta
b1f321b553
Banksel immediate constant will always immediately follow the GA/ES, so scan an insn from beginnin to find out the banksel operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69883 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 10:34:58 +00:00
Dan Gohman
146a310e66
Add support for printing MO_ExternalSymbol operands in
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memory operand tuples. This doesn't ever come up in normal
code however.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 00:57:37 +00:00
Sanjiv Gupta
dd92dba644
Make the function begin label start after ther data pointer.
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The address of data frame for function can be obtained by subtracting 2 from the function begin label.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69801 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-22 12:02:36 +00:00
Duncan Sands
005e7984cc
Get rid of what looks like a copy-and-pasted typo.
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Spotted by gcc-4.5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-21 09:44:39 +00:00
Rafael Espindola
7daa13c2a4
TLS_addr64 and TLS_addr32 define RDI and EAX. They don't use them.
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This fixes PR4002.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-21 08:22:09 +00:00
Sanjiv Gupta
e16178b75f
Handle direct aggregate type arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69665 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-21 05:54:51 +00:00
Dan Gohman
70bc17dbf5
Make X86's copyRegToReg able to handle copies to and from subclasses.
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This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp
unnecessary. Derived from a patch by Jakob Stoklund Olesen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69635 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 22:54:34 +00:00
Daniel Dunbar
75397f4092
Remove unused variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69624 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 20:34:38 +00:00
Bob Wilson
998e125a87
Move duplicated AddLiveIn function from X86 and ARM backends to be a method
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in the MachineFunction class, renaming it to addLiveIn for consistency with
the same method in MachineBasicBlock. Thanks for Anton for suggesting this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69615 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 18:36:57 +00:00
Devang Patel
91b477d2fa
Match C backend only if it explicitly requested.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69613 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 18:07:22 +00:00
Sanjiv Gupta
2bdf490d71
Emit the auto variables of a function into a different section than parameters.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69605 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 16:59:35 +00:00
Mon P Wang
0bd07fc5dd
Fixed a few 64 bit cases in X86InstrInfo::commuteInstruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-18 05:16:01 +00:00
Bill Wendling
1824773689
Recommit r69335 and r69336. These were not causing problems.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69394 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 22:40:38 +00:00
Bob Wilson
e3fa9ef936
Move the AddLiveIn function definition closer to its uses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 20:42:34 +00:00
Bob Wilson
e65586b37b
Rearrange code to reduce indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 20:40:45 +00:00
Bob Wilson
dee46d7f6d
Clean up formatting, remove trailing whitespace, fix comment typos and
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punctuation. No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 20:35:10 +00:00
Bob Wilson
1f595bb429
Use CallConvLower.h and TableGen descriptions of the calling conventions
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for ARM. Patch by Sandeep Patel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69371 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 19:07:39 +00:00
Rafael Espindola
2ee3db3003
For general dynamic TLS access we must use
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leaq foo@TLSGD(%rip), %rdi
as part of the instruction sequence. Using a register other than %rdi and then
copying it to %rdi is not valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69350 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 14:35:58 +00:00
Bill Wendling
c3a76ef955
Revert r69335 and r69336. They were causing build failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69347 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 04:19:22 +00:00
Dan Gohman
d10a4ce582
MOV8rr_NOREX is a "Move" instruction. This doesn't currently
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matter, because this instruction isn't generated until after
things that care.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 00:45:17 +00:00
Dan Gohman
d51def353c
Don't use MOV8rr_NOREX on x86-32. It doesn't actually hurt anything at
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present, but it's inconsistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69335 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 00:43:09 +00:00
Chris Lattner
9062d9a55b
Fix some failures in targets on available_externally functions,
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this fixes a crash on CodeGen/Generic/externally_available.ll
on ppc hosts. Thanks to Nicholas L for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69333 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 00:26:12 +00:00
Rafael Espindola
7c36683fa3
fix PR3995. A scale must be 1, 2, 4 or 8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69284 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 12:34:53 +00:00
Dan Gohman
df7dfc7715
Fix 80-column violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69204 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 19:48:57 +00:00
Dan Gohman
25174963f6
Add a folding table entry for MOV8rr_NOREX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69203 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 19:48:28 +00:00
Dan Gohman
6288b93f00
Fix X86MachineFunctionInfo's doxygen comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:20:18 +00:00
Dan Gohman
aaa1fdb271
Do for GR16_NOREX what r69049 did for GR8_NOREX, to avoid trouble with
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the local register allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69115 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:10:16 +00:00
Dan Gohman
6d9305c7fd
Add a new MOV8rr_NOREX, and make X86's copyRegToReg use it when
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either the source or destination is a physical h register.
This fixes sqlite3 with the post-RA scheduler enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69111 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:04:23 +00:00
Dan Gohman
a2f3703efd
GR8_NOREX can contain the H registers, since they don't require
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REX prefixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:00:48 +00:00
Dan Gohman
62ad138d70
For the h-register addressing-mode trick, use the correct value for
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any non-address uses of the address value. This fixes 186.crafty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 22:45:05 +00:00
Evan Cheng
b3f5bfe37f
Some of GR8_NOREX registers are only available in 64-bit mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 16:57:43 +00:00
Sanjiv Gupta
85be408a32
Handle aggregate type arguments to direct and indirect calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 02:49:52 +00:00
Dan Gohman
88c7af096b
Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
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it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 21:06:25 +00:00
Devang Patel
0f7fef3872
Reapply 68847.
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Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 17:02:03 +00:00
Dan Gohman
21e3dfbc86
Implement x86 h-register extract support.
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- Add patterns for h-register extract, which avoids a shift and mask,
and in some cases a temporary register.
- Add address-mode matching for turning (X>>(8-n))&(255<<n), where
n is a valid address-mode scale value, into an h-register extract
and a scaled-offset address.
- Replace X86's MOV32to32_ and related instructions with the new
target-independent COPY_TO_SUBREG instruction.
On x86-64 there are complicated constraints on h registers, and
CodeGen doesn't currently provide a high-level way to express all of them,
so they are handled with a bunch of special code. This code currently only
supports extracts where the result is used by a zero-extend or a store,
though these are fairly common.
These transformations are not always beneficial; since there are only
4 h registers, they sometimes require extra move instructions, and
this sometimes increases register pressure because it can force out
values that would otherwise be in one of those registers. However,
this appears to be relatively uncommon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 16:09:41 +00:00
Dan Gohman
8433df36fb
Remove x86's special-case handling for ISD::TRUNCATE and
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ISD::SIGN_EXTEND_INREG. Tablegen-generated code can handle
these cases, and the scheduling issues observed earlier
appear to be resolved now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68959 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:29:31 +00:00
Dan Gohman
3cf9b3e455
Fix copy+pastos in comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68958 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:28:29 +00:00
Dan Gohman
ee30047386
List the l registers before h registers, for consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68954 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:18:42 +00:00
Dan Gohman
3cd0aa3260
Use X86::SUBREG_8BIT instead of hard-coding the equivalent constant.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68951 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:14:03 +00:00
Dan Gohman
04d19f0241
Add a comment about MOVSX64rr8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68950 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:13:28 +00:00
Dan Gohman
8cc632f705
Fix another hard-coded constant to use X86AddrNumOperands.
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This unbreaks the JIT on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68948 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:04:25 +00:00
Rafael Espindola
7ff5bff45e
X86-64 TLS support for local exec and initial exec.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68947 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 13:02:49 +00:00
Sanjiv Gupta
12f23a86e2
While passing arg of types larger than char only one byte at lower end was getting passed. We couldn't catch this as we did not have tests that were passing an int value larger than 256.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 09:38:38 +00:00
Chris Lattner
266c7bbbbc
Add a new "available_externally" linkage type. This is intended
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to support C99 inline, GNU extern inline, etc. Related bugzilla's
include PR3517, PR3100, & PR2933. Nothing uses this yet, but it
appears to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 05:44:34 +00:00
Rafael Espindola
b215776fa1
In X86DAGToDAGISel::MatchWrapper, if base or index are set, avoid matching
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only if symbolic addresses are RIP relatives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68924 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 23:00:38 +00:00