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4723 Commits

Author SHA1 Message Date
Chris Lattner
deea416570 reindent a loop, unswitch a loop. No functionality changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24692 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 04:33:58 +00:00
Evan Cheng
c937ffafba Beautify a few patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24690 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 02:40:18 +00:00
Evan Cheng
763b029b28 Some shl patterns which do load + store folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24689 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 02:34:51 +00:00
Evan Cheng
605c415046 A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24688 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 01:57:51 +00:00
Evan Cheng
0ef3a77bdf Add and, or, and xor patterns which fold load + stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24687 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 01:41:36 +00:00
Evan Cheng
6cad276c90 Add inc + dec patterns which fold load + stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24686 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 01:02:47 +00:00
Evan Cheng
5ce4edb967 Add neg and not patterns which fold load + stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24685 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:54:44 +00:00
Evan Cheng
5a38e0210d Missed a couple redundant explicit type casts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24684 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:25:07 +00:00
Evan Cheng
9b6b642647 Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24683 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:14:11 +00:00
Evan Cheng
b3558540b6 * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands. 
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24682 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:01:09 +00:00
Evan Cheng
f281e02cbd Add some integer mul patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24681 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 23:47:46 +00:00
Evan Cheng
d160d48a2b Add some sub patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24675 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 21:54:05 +00:00
Evan Cheng
e5280536a3 When SelectLEAAddr() fails, it shouldn't cause the side effect of having the 
base or index operands being selected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24674 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 21:49:40 +00:00
Evan Cheng
cbd6ed4d6b For ISD::RET, if # of operands >= 2, try selection the real data dep. operand 
first before the chain.
e.g.
int X;

int foo(int x)
{
  x += X + 37;
  return x;
}

If chain operand is selected first, we would generate:
	movl X, %eax
	movl 4(%esp), %ecx
	leal 37(%ecx,%eax), %eax

rather than
	movl $37, %eax
	addl 4(%esp), %eax
	addl X, %eax

which does not require %ecx. (Due to ADD32rm not matching.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24673 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 20:32:18 +00:00
Andrew Lenharth
110f2243fc fix FP selects 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24672 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 20:30:09 +00:00
Chris Lattner
a763969837 remove some never-completed and now-obsolete code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24671 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 20:12:20 +00:00
Evan Cheng
ee93f9db87 Add a few more add / store patterns. e.g. ADD32mi8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24670 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 19:45:23 +00:00
Andrew Lenharth
361f45a557 restore a more restricted select 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24668 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 17:43:52 +00:00
Chris Lattner
d2c339cca7 Fix typo :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24664 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-11 18:43:13 +00:00
Chris Lattner
3aed79eadb add selectcc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24662 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-11 08:35:54 +00:00
Chris Lattner
d717b19933 Remove type casts that are no longer needed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24661 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-11 07:45:47 +00:00
Chris Lattner
84384546e2 Realize the constant pool & global addrs must always be ptr type 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24660 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-11 07:45:04 +00:00
Chris Lattner
e54645a6fb Fix the JIT failures from last night. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24659 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-11 07:37:41 +00:00
Andrew Lenharth
e41419f51e FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24658 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-11 03:54:31 +00:00
Nate Begeman
28a6b02626 Add support for TargetConstantPool nodes to the dag isel emitter, and use 
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-10 02:36:00 +00:00
Evan Cheng
b612ff9569 Use SDTCisPtrTy type property for store address. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24656 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-10 01:59:36 +00:00
Evan Cheng
b51a059b2c * Added X86 store patterns. 
* Added X86 dec patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-10 00:48:20 +00:00
Nate Begeman
0976122abc Add support patterns to many load and store instructions which will 
hopefully use patterns in the near future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24651 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-09 23:54:18 +00:00
Chris Lattner
d8fe3b3272 Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load 
must be a pointer.  This removes a type check out of the code generated by
tblgen for load matching.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24650 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-09 22:58:42 +00:00
Evan Cheng
ab24ed2a32 Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24648 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-09 22:48:48 +00:00
Chris Lattner
646f7afb79 Teach the PPC backend about the ctor and dtor list when not using __main and 
linking the entire program into one bc file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24645 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-09 18:24:29 +00:00
Andrew Lenharth
dd3ccde9ea it helps if your conditionals are not reversed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24641 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-09 00:45:42 +00:00
Chris Lattner
62c08dd4a1 Add another important case we miss 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24639 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-08 07:13:28 +00:00
Evan Cheng
f20da7e1a7 Added support for ComplexPattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24638 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-08 04:28:48 +00:00
Evan Cheng
670fd8f8dd Added explicit type field to ComplexPattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24637 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-08 02:15:07 +00:00
Evan Cheng
ec693f77c0 * Added intelligence to X86 LEA addressing mode matching routine so it returns 
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-08 02:01:35 +00:00
Chris Lattner
e80242a948 X86 doesn't support sextinreg for 8-bit things either. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-07 17:59:14 +00:00
Andrew Lenharth
bbe1225bf4 fix divide and remainder 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24628 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-06 23:27:39 +00:00
Chris Lattner
85961d5ec1 Silence another annoying GCC warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24627 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-06 20:56:18 +00:00
Andrew Lenharth
f88471ded7 more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24625 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-06 20:43:30 +00:00
Andrew Lenharth
cfb2815695 OK, this does wonders for broken stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24624 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-06 20:40:34 +00:00
Chris Lattner
4172b10ca1 Use new PPC-specific nodes to represent shifts which require the 6-bit 
amount handling that PPC provides.  These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits.  This fixes a miscompilation of crafty with
the new front-end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24615 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-06 02:10:38 +00:00
Andrew Lenharth
eda80a0dec added instructions with inverted immediates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24614 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-06 00:33:53 +00:00
Andrew Lenharth
8a3a5fc9ba yea, it helps to have your path set right when testing 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24613 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 23:41:45 +00:00
Andrew Lenharth
5de36f95da These never trigger, but whatever 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24612 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 23:19:44 +00:00
Evan Cheng
8d202230b4 Remove unnecessary let hasCtrlDep=1 now it can be inferred. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24611 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 23:09:43 +00:00
Andrew Lenharth
7962065fdb move this over to the dag 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24609 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 20:50:53 +00:00
Andrew Lenharth
b457a93123 fix constant pool loads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24607 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 17:51:02 +00:00
Chris Lattner
3d36a9f6f4 Several things: 
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly.  The port number really
   *is* a 16-bit value, but the patterns should only match if the number
   is 0-255.  Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
   i8, not an i16 as they were believed to be before.  This previous fib
   stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 02:40:25 +00:00
Chris Lattner
68bfd9c1e8 On some targets (e.g. X86), shift amounts are not the same as the value 
being shifted.  Don't assume they are.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24598 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 02:37:26 +00:00
Chris Lattner
b5d01436e3 Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24595 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 02:34:29 +00:00
Chris Lattner
bd05982b48 Add some explicit type casts so that tblgen knows the type of the shift 
amount, which is not necessarily the same as the type being shifted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24594 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 02:34:05 +00:00
Chris Lattner
bead6612a5 The basic fneg cases are already autogen'd 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24592 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-04 19:04:38 +00:00
Chris Lattner
937a79dbe3 Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen 
improvements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24591 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-04 19:01:59 +00:00
Chris Lattner
60a4ab2d5c Finish moving uncond br over to .td file, remove from .cpp file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24590 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-04 18:48:01 +00:00
Chris Lattner
1e48478557 Define BR in the .td file now that Evan made tblgen smarter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24589 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-04 18:42:54 +00:00
Evan Cheng
d35b8c1adb Added isel patterns for RET, JMP, and WRITEPORT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-04 08:19:43 +00:00
Evan Cheng
f8ac814957 * Added instruction property hasCtrlDep for those which r/w control-flow 
chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
  chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24586 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-04 08:13:17 +00:00
Chris Lattner
df65de42cf Fix PR672 another way which should be more robust 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24585 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-04 06:03:50 +00:00
Chris Lattner
a027ba885a Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672. 
This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on.  Given a clean nightly tester run, we should be able to turn it
on by default!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24578 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-03 07:15:55 +00:00
Chris Lattner
865874c88a add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24572 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-02 00:11:20 +00:00
Chris Lattner
18c778f8be IA64 doesn't support the LOCATION node, and for some reason the ISelPattern 
stuff isn't using ISelLowering.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24567 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 18:19:53 +00:00
Chris Lattner
05f56a529c Make sure these get added into the codegenmap when appropriate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24566 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 18:09:22 +00:00
Andrew Lenharth
6251b36d88 major think-o 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24564 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 17:48:51 +00:00
Nate Begeman
6510b22cec Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 04:51:06 +00:00
Nate Begeman
5dfc55c304 Cosmetic change, better reflects actual values 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24562 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 04:48:26 +00:00
Chris Lattner
db1cb2b3a1 Fix a regression caused by a patch earlier today 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24561 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 03:50:19 +00:00
Andrew Lenharth
9352622356 Flags where I think I need them, quick, before the nightly tester starts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24560 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 01:53:10 +00:00
Evan Cheng
640f299b44 Proper support for shifts with register shift value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24559 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 00:43:55 +00:00
Evan Cheng
c121e33e35 Use a getCopyToReg() variant to generate a flaggy CopyToReg node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24558 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 00:41:50 +00:00
Chris Lattner
d5acfb4153 SelectNodeTo now returns its result, we must pay attention to it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24552 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 23:04:38 +00:00
Chris Lattner
b19b899181 Pay attn to the node returned by SelectNodeTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24551 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 23:02:08 +00:00
Chris Lattner
350d22e14d SelectNodeTo now returns its result, we must pay attention to it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24550 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 22:59:19 +00:00
Chris Lattner
71d3d50b4a SelectNodeTo now returns N. Use it instead of return N directly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24549 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 22:53:06 +00:00
Chris Lattner
80720a9219 Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24547 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 20:40:54 +00:00
Nate Begeman
85a168a734 Fix a typo in my latest change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24542 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 18:57:39 +00:00
Nate Begeman
391c5d231a No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 18:54:35 +00:00
Andrew Lenharth
72d32c222c remove redundant code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24538 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 17:14:11 +00:00
Andrew Lenharth
b2156f91f5 Make typesafe that which isn't: FCMOVxx 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24536 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 17:11:20 +00:00
Andrew Lenharth
cd80496ccc FPSelect and more custom lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24535 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 16:10:29 +00:00
Nate Begeman
f43a3ca26d First chunk of actually generating vector code for packed types. These 
changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24534 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 08:22:07 +00:00
Andrew Lenharth
7f0db91f86 All sorts of stuff. 
Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy.  They should be custom lowered though.

Lots more stuff compiles now (go go single source!).  Of course, none of it
probably works, but that is what the nightly tester can find out :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24533 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 07:19:56 +00:00
Chris Lattner
5b9bbc8792 Fix a bug in a recent patch that broke shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24526 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 05:11:18 +00:00
Evan Cheng
bd3d25c6b1 Added support to STORE and shifts to DAG to DAG isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24525 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 02:51:20 +00:00
Evan Cheng
345c3f370d Fixed a minor bug: - -offset != offset iff offset == MININT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24522 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 01:59:00 +00:00
Nate Begeman
7ac8e6b6a8 Represent the encoding of the SPR instructions as they actually are, so 
that we can use the correct SPR numbers in the InstrInfo.td file.  This is
necessary to support VRsave.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24521 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 22:42:50 +00:00
Evan Cheng
f0701842f7 Add more X86 ISel patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24520 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 19:38:52 +00:00
Nate Begeman
425a96971f Hook up one type, v4f32, to the VR RegisterClass for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24517 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 08:17:20 +00:00
Nate Begeman
9b14f66320 Add the remainder of the AltiVec 4 x float instructions. Further 
enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24516 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 08:04:45 +00:00
Chris Lattner
f73bae1b73 No targets support line number info yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24513 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 06:16:21 +00:00
Nate Begeman
6a648614e8 Add the majority of the vector machien value types we expect to support, 
and make a few changes to the legalization machinery to support more than
16 types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24511 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 05:45:29 +00:00
Evan Cheng
5ee16ea417 Fixed a comment bug: 
createPPCPatternInstructionSelector -> createPPCISelPattern


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24510 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 04:59:46 +00:00
Chris Lattner
eedf3b57cb refix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24505 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 00:42:30 +00:00
Chris Lattner
fd5df2b203 don't say this is i128, because it isn't yet. Hopefully nate will change 
this to be something sane, but in the mean time it is unused, so safe to
make something bogus.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24504 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 00:41:40 +00:00
Chris Lattner
46ec78646b revert my change for the time being, which broke the build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24503 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 00:24:08 +00:00
Chris Lattner
0ba7d71213 fix a typo :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24501 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-28 22:42:15 +00:00
Chris Lattner
1e4ed93599 Add a missed optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24495 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-28 04:52:39 +00:00
Nate Begeman
01595c52b3 Small tweaks noticed while on the plane. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24492 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-26 22:39:34 +00:00
Duraid Madina
7b1e154c5a add support for dynamic_stackalloc to the dag isel (thanks andrew ;) 
next up: support argument passing in memory, not just registers


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24490 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-25 07:49:25 +00:00
Nate Begeman
e4f17a5f9b Some first bits of AltiVec stuff: Instruction Formats, Encodings, and 
Registers.  Apologies to Jim if the scheduling info so far isn't accurate.

There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24489 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-23 05:29:52 +00:00