Thomas Harte
31e22e4cfb
Provides full serial input.
2021-11-07 05:19:16 -08:00
Thomas Harte
ecfe68d70f
Introduce the principle that a Serial::Line can be two-wire — clock + data.
2021-11-06 16:54:20 -07:00
Thomas Harte
c0c2b5e3a9
Post key actions to the nominated serial line.
...
Albeit that I'm still thinking through whether I want the option of including a clock on Serial::Line. It'd be natural in one sense — there's already one built in — but might weaken Serial::Line's claim to be a one-stop shop for both enqueued and real-time connections without a reasonable bit of extra work.
2021-11-06 12:03:09 -07:00
Thomas Harte
471e13efbc
Transcribes keycodes.
2021-11-04 18:54:42 -07:00
Thomas Harte
c9bf2dda16
Attempt implementation of disk sync.
2021-11-02 18:18:59 -07:00
Thomas Harte
3ceb378b9b
Relocate disk logic into a separate compilation unit.
2021-11-02 17:35:23 -07:00
Thomas Harte
1cf1c90511
Adds support for interlaced output.
2021-11-02 14:34:03 -07:00
Thomas Harte
d989825216
Add bonus notes on VPOSR.
2021-11-02 03:47:39 -07:00
Thomas Harte
3976420b88
Retains a little more of output controls.
2021-11-01 17:15:36 -07:00
Thomas Harte
2f1ce5fe43
Switch to using the swizzled palette for playfield output.
2021-11-01 14:44:30 -07:00
Thomas Harte
42145a5b8a
Delay bitplane installation until end of slot.
2021-11-01 14:18:58 -07:00
Thomas Harte
4e66017205
Enable sprite reuse and toggle to inactive when visible region is over.
2021-10-31 16:52:48 -07:00
Thomas Harte
299d517449
Performs a first implementation of fill mode.
2021-10-31 14:36:31 -07:00
Thomas Harte
4c1ab6ff25
Rethinks bitplane stops.
2021-10-31 09:01:38 -07:00
Thomas Harte
16f31cab6a
Avoid duplication of CIA select test.
2021-10-30 12:05:18 -07:00
Thomas Harte
02c88e6826
VHPOSR's fields are the other way around.
2021-10-30 12:04:46 -07:00
Thomas Harte
d25804f4a2
Throws in official register names.
2021-10-29 14:05:11 -07:00
Thomas Harte
edb75e69cb
Implement bitplane modulos.
2021-10-29 11:29:22 -07:00
Thomas Harte
f3e895f17c
Tag intended unused parameters.
2021-10-29 06:21:02 -07:00
Thomas Harte
b952d73e83
Disallow programmatic setting of blitter status.
2021-10-29 06:19:57 -07:00
Thomas Harte
07facc0636
Takes a stab at BZERO.
2021-10-28 18:12:46 -07:00
Thomas Harte
da1a69be27
Caps mouse speed.
...
Also takes another guess at CIA interrupt bits. To no avail.
2021-10-27 18:38:02 -07:00
Thomas Harte
b10f5ab110
Apply A mask when loading into barrel shifter.
2021-10-26 20:02:28 -07:00
Thomas Harte
b4286bb42b
Modulos are subtracted in descending mode.
2021-10-26 07:21:51 -07:00
Thomas Harte
139d35c6f9
Switches to basic use of sprite shifters.
2021-10-25 20:58:48 -07:00
Thomas Harte
cb24457b4a
Starts on a two-at-a-time sprite shifter.
2021-10-25 16:30:30 -07:00
Thomas Harte
9f3efb7f05
Limits graphical output to [all but one bit] of the display window.
2021-10-25 14:12:23 -07:00
Thomas Harte
e6001e0f22
Shifts bitplanes irrespective of output window.
2021-10-25 13:59:39 -07:00
Thomas Harte
c6535bf035
Switches bitplane shifter to returning four high-res pixels at a time.
2021-10-25 13:34:36 -07:00
Thomas Harte
7118a515e0
Reduce logging in trustworthy areas.
2021-10-23 20:36:41 -07:00
Thomas Harte
952451c9b8
Add mouse input.
2021-10-23 20:17:13 -07:00
Thomas Harte
610327a04e
Fix sprite H start bit order.
2021-10-22 23:20:20 -07:00
Thomas Harte
2121e32409
Fix sprite bit ordering.
2021-10-22 21:10:01 -07:00
Thomas Harte
7ec21edc2f
Attempts to hack in some form of sprite display.
2021-10-22 19:51:10 -07:00
Thomas Harte
003162f710
Limit to specific purpose.
2021-10-22 16:16:19 -07:00
Thomas Harte
040ac93042
Takes a shot at the vertical stuff of sprite DMA.
2021-10-22 14:32:59 -07:00
Thomas Harte
b489ba3d0d
Adds sprite DMA windows.
2021-10-22 13:07:20 -07:00
Thomas Harte
c5e8b547af
Captures the attach flag and observes activation rule.
2021-10-22 11:21:58 -07:00
Thomas Harte
e67de90ad0
Starts to bring sprites inside DMADevice orthodoxy.
2021-10-21 21:57:46 -07:00
Thomas Harte
c3c84c88a1
Switch to ahead-of-time planar to chunky conversion.
2021-10-21 20:48:57 -07:00
Thomas Harte
0dc9c4cee1
Undo hard-coding of fetch window.
2021-10-19 15:18:39 -07:00
Thomas Harte
b312a61a81
Add two dummy reads.
2021-10-16 13:30:45 -07:00
Thomas Harte
4917556a99
The shift goes the other way in descending mode.
2021-10-16 11:09:40 -07:00
Thomas Harte
aa6b0f07b7
Correct filename.
2021-10-16 05:37:46 -07:00
Thomas Harte
e27a10bde4
Simplify control flow.
2021-10-14 16:47:18 -07:00
Thomas Harte
253a199f27
Fire sync-match interrupt upon any match.
2021-10-14 16:36:17 -07:00
Thomas Harte
61e5702520
Remove dead TODO.
2021-10-14 16:09:11 -07:00
Thomas Harte
b12c640807
Makes drives non-copyable.
...
To avoid error in the future.
2021-10-14 12:37:55 -07:00
Thomas Harte
9be23ecc34
Add end-of-Blit interrupt.
...
Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.
2021-10-13 15:09:19 -07:00
Thomas Harte
eec068914e
Slightly improve logging.
2021-10-11 18:05:57 -07:00
Thomas Harte
39b8285ba5
Trust the HRM on step bit, but catch rising edge.
2021-10-11 07:42:42 -07:00
Thomas Harte
7733fef3bd
DSKLEN has to be written twice.
2021-10-11 06:16:01 -07:00
Thomas Harte
6acddfdb98
Add the sync match interrupt.
...
Albeit that it doesn't yet unblock disk DMA.
2021-10-11 03:37:56 -07:00
Thomas Harte
99492c2ec2
Further tweak logging.
2021-10-10 18:19:50 -07:00
Thomas Harte
846b505d27
Reduce logging; disk data probably isn't the immediate obstacle.
2021-10-10 13:04:10 -07:00
Thomas Harte
8d43b4a98d
Expands Disk DMA access window.
2021-10-10 11:47:02 -07:00
Thomas Harte
9336ffe216
Take a stab at index-hole sync.
2021-10-09 08:01:02 -07:00
Thomas Harte
eb157f15f3
Adds index hole interrupt.
2021-10-09 04:08:59 -07:00
Thomas Harte
d6e2a3f425
Make a first attempt to spool into RAM.
2021-10-08 18:11:47 -07:00
Thomas Harte
b47ca13ed3
Push disk data onwards.
2021-10-08 17:18:11 -07:00
Thomas Harte
67546c4d6e
Per the HRM, the index hole is connected to CIA B, potentially to raise an interrupt.
2021-10-08 17:12:37 -07:00
Thomas Harte
f72deb0a5c
Correct RDY position.
2021-10-08 04:32:13 -07:00
Thomas Harte
616ccbb878
Correct ID bit placement, multiplex with motor state.
...
The latter per my reading of http://www.primrosebank.net/computers/amiga/upgrades/amiga_upgrades_storage_fdis.htm
2021-10-08 04:05:57 -07:00
Thomas Harte
5899af0038
Starts accumulating disk data.
2021-10-07 05:11:32 -07:00
Thomas Harte
33ff4f3b5c
Eliminate drive copies.
2021-10-06 13:40:28 -07:00
Thomas Harte
20bad38d42
Add drive activity lights.
2021-10-06 04:54:40 -07:00
Thomas Harte
92a07398cd
I think CHNG works the other way around.
2021-10-06 04:47:52 -07:00
Thomas Harte
e961d0b4a3
Switch RDY type.
2021-10-06 04:41:09 -07:00
Thomas Harte
2253ff656a
Adds route for inserting disks.
2021-10-05 16:12:30 -07:00
Thomas Harte
18631399ad
Attempts to clock the disk controller.
2021-10-05 15:38:56 -07:00
Thomas Harte
ad4afcdcd5
Switch stepping direction.
...
Empirically, based on the actions of Kickstart, and assuming my confusion is because the relevant signal is active low.
2021-10-05 15:23:48 -07:00
Thomas Harte
2cf5bcc5db
Clarify logic somewhat.
2021-10-05 15:20:05 -07:00
Thomas Harte
1180ad7662
Disables a couple of now-trustworthy LOGs.
2021-10-05 06:51:47 -07:00
Thomas Harte
5463cd1ae3
Attempts to support stepping and head selection.
2021-10-05 06:36:17 -07:00
Thomas Harte
647ec770ce
Implements motor latching, drive ID shift registers.
2021-10-05 05:12:01 -07:00
Thomas Harte
e47bec2e65
Switch CIA B ports over.
2021-10-05 03:38:11 -07:00
Thomas Harte
674941abdf
Starts to add a disk controller.
2021-10-04 16:45:05 -07:00
Thomas Harte
b3f0ca39ed
Adds some unused drives.
2021-10-04 08:12:13 -07:00
Thomas Harte
5ccb512883
Moves the CIAs into the Chipset class.
...
This reflects the routing of interrupt signals for now, but also prepares for the addition of disk drives.
2021-10-04 06:44:54 -07:00
Thomas Harte
da286d5ae8
Switch spaces to tabs.
2021-10-04 05:27:25 -07:00
Thomas Harte
a282a51673
Remove last of the direct printf'ing.
2021-09-30 02:42:59 -04:00
Thomas Harte
b7b13e20d1
Single column blits should use both masks.
2021-09-29 22:49:35 -04:00
Thomas Harte
402fa41bc0
Corrects initial error value.
2021-09-29 22:19:17 -04:00
Thomas Harte
0b9ebafc0f
Flip bit deserialisation order.
2021-09-28 22:12:13 -04:00
Thomas Harte
140e24ef15
Grab further copy flags.
2021-09-28 22:11:58 -04:00
Thomas Harte
ffcd2ea10c
Attempts more properly to implement line mode.
2021-09-28 21:39:09 -04:00
Thomas Harte
cb460de94d
Makes bad first attempt at a Bresenham inner loop.
2021-09-27 22:06:00 -04:00
Thomas Harte
f6624bf776
Edges mildly closer to line output.
2021-09-26 19:18:12 -04:00
Thomas Harte
b4b6c4d86f
Attempts to support left and right masks.
2021-09-26 18:42:08 -04:00
Thomas Harte
759689ff31
Fix line mode flag, add busy status.
2021-09-26 18:16:00 -04:00
Thomas Harte
9012a7f5e1
Merge branch 'master' into Amiga
2021-09-23 23:00:03 -04:00
Thomas Harte
e5a5faa417
Resolves Clang 13 implicit conversion warnings.
2021-09-23 22:53:41 -04:00
Thomas Harte
c4ab2bbeed
Hard-code fetch window width. For now.
2021-09-23 22:06:13 -04:00
Thomas Harte
42ef459e20
Resolve resting values.
2021-09-23 22:05:59 -04:00
Thomas Harte
cad1a9e0f1
Correct bit test.
2021-09-23 20:42:31 -04:00
Thomas Harte
f1d514470d
Add note to future self.
2021-09-23 20:29:39 -04:00
Thomas Harte
9a7a54f22f
Take alternative guess as to meaning of 'use' bits.
2021-09-23 18:42:12 -04:00
Thomas Harte
137d1c61bd
Allow for channel enables and blitting direction.
2021-09-23 18:38:37 -04:00
Thomas Harte
adc071ed7a
Fix: modulos are 15-bit signed, the minterms are also in regular BLTCON0.
2021-09-23 18:30:35 -04:00
Thomas Harte
e06f470044
Ensure no implicit conversion from int to IntT.
2021-09-23 18:30:04 -04:00
Thomas Harte
ab69fe56c9
Take a first shot at magical instant blitting.
2021-09-23 18:13:51 -04:00
Thomas Harte
60bad22a91
Correct fetch window.
2021-09-23 18:13:24 -04:00
Thomas Harte
7092429f7c
Added some notes to self on line mode.
2021-09-20 23:08:26 -04:00
Thomas Harte
fa800bb809
Introduces code for minterm application.
2021-09-20 19:13:23 -04:00
Thomas Harte
e15f1103a0
Takes a shot at low resolution shifting.
2021-09-20 19:00:52 -04:00
Thomas Harte
a4263b5a8c
Ties bitplane collection to line position.
...
Outgoing bug: incrementing the video relative offset too often, due to cycles that are discovered to be CPU-targetted.
2021-09-19 21:55:45 -04:00
Thomas Harte
245b7baa61
Moves the Copper into its own file.
2021-09-16 21:17:23 -04:00
Thomas Harte
0eeaaa150a
Correct Copper start address.
2021-09-16 21:01:37 -04:00
Thomas Harte
692d87f446
Attempts to restrict blitter slot allocation.
2021-09-16 19:56:28 -04:00
Thomas Harte
6572efe2a7
Clarifies word addressing.
2021-09-16 08:24:52 -04:00
Thomas Harte
8aac2bd029
Stubs in serial port status.
2021-09-14 21:53:07 -04:00
Thomas Harte
add11db369
Factors out DMADevice, which is now a parent of Blitter.
2021-09-14 20:51:32 -04:00
Thomas Harte
e47eab1d40
Merge branch 'master' into Amiga
2021-09-14 20:27:59 -04:00
Thomas Harte
fa71ae3174
Add apology.
2021-09-14 20:23:36 -04:00
Thomas Harte
dfcd1508c9
Establishes valid initial BRAM.
2021-09-10 19:56:20 -04:00
Thomas Harte
7e5fc4444a
Default to ROM01.
2021-09-09 22:09:09 -04:00
Thomas Harte
d8e42c4379
Tweak guess at initial state.
2021-09-09 22:06:36 -04:00
Thomas Harte
dd37fa49a0
Stabilises Apple IIgs display.
2021-09-09 20:08:15 -04:00
Thomas Harte
fd70f7ad43
Attempts to make pixel content observeable.
2021-09-08 20:57:26 -04:00
Thomas Harte
6e034c9b7f
At least manages to place a pixel region on screen.
...
Albeit that I've suddenly realised that I've failed properly to think about high-res versus low-res.
2021-08-11 20:31:37 -04:00
Thomas Harte
52e375a985
Move towards playfield decoding.
2021-08-11 18:47:35 -04:00
Thomas Harte
10a5e7313f
Makes a buggy first attempt at bitplane data collection.
2021-08-10 21:28:48 -04:00
Thomas Harte
ec9cb21fae
Starts towards bitplane collection.
2021-08-10 19:01:41 -04:00
Thomas Harte
fdd02ad6a6
Neaten, slightly.
2021-08-10 09:20:34 -04:00
Thomas Harte
76e9fcc94a
Obey blitter DMA-enable mask.
2021-08-10 09:19:15 -04:00
Thomas Harte
e412927415
Logs a bit more from the Blitter, gives it access to slots.
2021-08-10 07:17:01 -04:00
Thomas Harte
dda154c7c6
Adds nonsense disk reads, which seems to lead to bitplane and blitter requests.
...
Progress, at last!
2021-08-09 20:31:14 -04:00
Thomas Harte
9215535bee
Adds a container for the disk controller.
...
Thereby appears to prove that my Amiga is getting as far as attempting to load from floppy.
2021-08-09 17:35:09 -04:00
Thomas Harte
86c6248b48
Merge branch 'master' into Amiga
2021-08-09 17:09:04 -04:00
Thomas Harte
1502c4530e
Takes a further step towards real timing.
2021-08-08 21:52:28 -04:00
Thomas Harte
c1df4d1c0b
Mirroring is correct.
2021-08-08 20:20:12 -04:00
Thomas Harte
7f2610c4fc
Disambiguates serial control logs.
2021-08-07 16:57:30 -04:00
Thomas Harte
b11dd6950c
Adds an entry for DiagROM.
2021-08-07 16:56:18 -04:00
Thomas Harte
db3c158215
Further increases logging.
2021-08-05 20:07:14 -04:00
Thomas Harte
25e2bd307a
Sets VPA for CIA accesses; logs a little more.
2021-08-05 20:06:48 -04:00
Adam Smith
fdb676da4e
.
2021-08-01 00:26:14 -07:00
Thomas Harte
1bae4973bc
Post the serial control write onwards.
2021-07-30 18:24:27 -04:00
Thomas Harte
3d9f86c584
Begins keyboard sketches and notes.
2021-07-30 18:23:15 -04:00
Thomas Harte
3514e537ca
Minor logging tweaks.
2021-07-30 18:22:59 -04:00
Thomas Harte
b78090ec76
Fixes IOPortsAndTimers classification.
2021-07-28 19:39:42 -04:00
Thomas Harte
759007ffc1
Attempts to route CIA interrupts.
2021-07-28 19:36:30 -04:00
Thomas Harte
69ae9d72c8
Remove dead non-access.
2021-07-27 22:27:20 -04:00
Thomas Harte
604232acd9
Establish appropriate word-size mask.
2021-07-27 22:23:38 -04:00
Thomas Harte
82205d71cc
Breaks up loop for arithmetic simplicity.
2021-07-27 21:59:27 -04:00
Thomas Harte
402eab10f8
Breaks video output while attempting to pull it into the main loop.
2021-07-27 21:33:07 -04:00
Thomas Harte
b6bf4d73ad
Blitter-finished bit aside, attempts to complete the Copper.
2021-07-27 21:10:14 -04:00
Thomas Harte
5425b5c423
Adds some form of WAITing to the Copper.
2021-07-27 19:32:55 -04:00
Thomas Harte
29cd8504ca
Implements enough Copper to get a first store.
2021-07-27 19:06:16 -04:00
Thomas Harte
3544746934
Modifies interface, starts on scheduler.
...
Probably corrects the pixel clock, which I think was scaled up by a factor of 4.
2021-07-27 16:41:18 -04:00
Thomas Harte
d8f814f1c4
If I'm going to push only a single colour, might as well make it fast.
2021-07-26 21:19:43 -04:00
Thomas Harte
a43175125a
Assuming I'm going to keep this synchronous, extends function signature.
2021-07-26 20:13:06 -04:00
Thomas Harte
1d03bc560a
Stores the colour palette, uses entry 0 as my new always output.
2021-07-26 18:59:11 -04:00
Thomas Harte
3832acf6e3
Produces a static white box, at least.
2021-07-26 18:51:01 -04:00
Thomas Harte
7894b50321
Starts towards an actual pixel output loop.
2021-07-26 18:44:20 -04:00
Thomas Harte
ffded619e6
Returns track 0 found, as a guess.
2021-07-26 18:44:01 -04:00
Thomas Harte
bcb7bb5cce
Improves logging further.
...
To investigate the new perpetual loop.
2021-07-26 17:02:30 -04:00
Thomas Harte
87dcd82f69
Makes a first attempt at some sort of interrupt functionality.
2021-07-26 16:40:42 -04:00
Thomas Harte
e671cc6056
Add stubs for joystick/mouse querying.
2021-07-26 16:21:51 -04:00
Thomas Harte
5da89b88a6
Add missing space.
2021-07-25 22:17:55 -04:00
Thomas Harte
5d60c1f20b
Stubs in Paula.
2021-07-25 22:16:31 -04:00
Thomas Harte
7fd00165c9
Switch to [hard-coded] PAL, for now.
...
In the hope that I get to see some graphics soon, this should better conform to my expectations.
2021-07-25 20:41:51 -04:00
Thomas Harte
20da194fab
Log slightly more accurately.
2021-07-25 19:59:24 -04:00
Thomas Harte
e3bb9fc1d7
Increase logging.
2021-07-23 23:10:00 -04:00
Thomas Harte
d898a43dff
Implements time-of-day counters, provisionally.
...
Interrupts to do.
2021-07-23 21:24:07 -04:00
Thomas Harte
86c30769d9
Add a divide-by-ten for the CIAs.
2021-07-23 19:25:53 -04:00
Thomas Harte
956a6dbd64
Improve commentary.
2021-07-23 19:23:54 -04:00
Thomas Harte
de208ead4e
Stubs in enough to get back into a persistent loop.
2021-07-22 22:00:53 -04:00
Thomas Harte
87d2fc1491
Adds enough raster position to return something.
2021-07-22 21:45:51 -04:00
Thomas Harte
2bc9af09e1
Factors out the chipset.
2021-07-22 21:16:23 -04:00
Thomas Harte
d1ac54fe92
Stubs in sprite containers.
2021-07-22 19:00:26 -04:00
Thomas Harte
9468adf737
Stubs in Copper addresses.
2021-07-22 18:51:23 -04:00
Thomas Harte
e85db40b0f
Sketches out a blitter class.
2021-07-22 18:43:07 -04:00
Thomas Harte
b3d55cc16d
Adds non-committal reads for some write-only registers.
...
The hardware now proceeds to trying to talk to the Blitter. So that's next.
2021-07-22 16:10:30 -04:00
Thomas Harte
3ee1fc544f
Fix: (1) memory base adjustment; (2) out-of-bounds writes.
2021-07-21 21:49:20 -04:00
Thomas Harte
ba2e5a97a9
Provisionally adds a status LED.
2021-07-19 22:31:36 -04:00
Thomas Harte
4515d1220c
Switches CIA A/B byte connections; applies reset to memory map.
2021-07-19 22:17:40 -04:00
Thomas Harte
486959bce8
With minor additional logging, it appears the Amiga just keeps resetting itself.
2021-07-19 21:50:35 -04:00
Thomas Harte
e1a410bf3d
Further mildly increases logging.
2021-07-19 20:54:32 -04:00
Thomas Harte
3767cc7c0b
Increase logging; fix set/clear of interrupt enable mask.
2021-07-19 19:03:37 -04:00
Thomas Harte
96b0ce9ef2
Merge branch 'master' into Amiga
2021-07-18 22:16:05 -04:00
Thomas Harte
cfaf4a8a65
Add advised brackets; clarify type punning.
2021-07-18 22:11:11 -04:00
Thomas Harte
22dd8a8847
Stubs onward to a second endless loop.
2021-07-18 20:55:33 -04:00
Thomas Harte
3e2bac8129
Stubs in enough to get to a permanent loop.
2021-07-18 20:25:43 -04:00
Thomas Harte
c425dec4d5
Makes some attempt to get as far as the overlay being disabled.
2021-07-18 17:17:41 -04:00
Thomas Harte
622cca0acf
Adds sufficient address decoding to print a more helpful exit message.
2021-07-18 12:13:56 -04:00
Thomas Harte
48999c03a5
Adds concept of time, captured port handler.
2021-07-18 11:49:10 -04:00
Thomas Harte
b1616be4b8
Gets to what is probably a CIA access?
2021-07-17 21:36:20 -04:00
Thomas Harte
a0a9a72d8f
Begins sketching out a memory mapper.
2021-07-17 21:10:06 -04:00
Thomas Harte
f7de6f790c
Meanders vaguely towards a memory map.
2021-07-16 21:42:17 -04:00
Thomas Harte
d1f3b5ed80
Obtains a Kickstart ROM, adds a 68000.
2021-07-16 21:07:12 -04:00
Thomas Harte
7925dcc5a2
Advances far enough for the Amiga to be autonomous.
2021-07-16 20:49:12 -04:00
Thomas Harte
6ade36bf09
Adds an empty shell of a machine.
2021-07-16 20:30:48 -04:00
Thomas Harte
5bfedff8d1
Mutate dangling printf to a LOG.
2021-07-16 17:32:05 -04:00
Thomas Harte
b41e29a83b
Slows CPC typer to avoid dropped characters.
2021-07-15 21:54:02 -04:00
Thomas Harte
52ea3b741c
Introduces a presentation flag for LEDs.
...
All existing receivers ignore it.
2021-07-15 21:26:02 -04:00
Thomas Harte
af1ade9433
Introduces Amiga ROMs to the catalogue.
2021-07-15 21:09:20 -04:00
Thomas Harte
a4c011e3c0
Flip meaning of INT1 input read.
2021-07-09 22:39:51 -04:00
Thomas Harte
6225abd751
Adds 6MHz Enterprise option.
2021-07-07 20:57:04 -04:00
Thomas Harte
0e49258546
Remove caveman debugging.
2021-07-06 23:15:53 -04:00
Thomas Harte
264b8dfb28
Dave: apply ring modulation even in sync mode.
2021-07-06 23:11:30 -04:00
Thomas Harte
5167d256cc
Remove detritus.
2021-07-06 22:43:17 -04:00
Thomas Harte
16bd826491
Reduce nesting.
2021-07-06 22:32:59 -04:00
Thomas Harte
55af8fa5d9
Avoid erroneous Nick delays.
2021-07-06 22:28:44 -04:00
Thomas Harte
1ec8ff20af
Ensure data bus is 0xff during interrupts.
2021-07-06 21:58:17 -04:00
Thomas Harte
7a673a2448
Avoid confusing temporary storage.
2021-07-06 20:23:09 -04:00
Thomas Harte
33e2a4b21c
Minor cleanups.
2021-07-06 20:20:13 -04:00
Thomas Harte
3e6b804896
Switches to linked 1/50/1000 Hz timers, and per-interrupt state toggling.
2021-07-06 20:12:44 -04:00
Thomas Harte
c20e8f4062
Honours 8/12Mhz selection in non-video delays.
2021-07-03 23:05:09 -04:00
Thomas Harte
4add48cffb
Obey Dave's 8/12MHz programmable divider.
2021-07-03 22:43:20 -04:00
Thomas Harte
43ceca8711
Use type alias.
2021-07-03 19:10:39 -04:00
Thomas Harte
3ef28a4f03
Remove unused instance variable.
2021-07-03 19:10:29 -04:00
Thomas Harte
5715c9183f
The target
is now definitely used.
2021-07-03 15:20:37 -04:00
Thomas Harte
196651d9aa
Consolidates TODO.
2021-07-03 13:08:53 -04:00
Thomas Harte
6b46212a4e
Deal with dangling TODO.
2021-07-03 13:07:41 -04:00
Thomas Harte
2a6fff2008
Takes a stab at what might happen if you read from Nick.
2021-07-03 13:06:07 -04:00
Thomas Harte
c5944efe50
Adds various method definitions.
2021-07-03 12:56:56 -04:00
Thomas Harte
f384370b18
Switch what's left of Enterprise logging to actual LOGs.
2021-07-03 12:50:46 -04:00
Thomas Harte
278671cdb9
Correct Nick interrupt prediction.
2021-07-03 00:05:13 -04:00
Thomas Harte
964d2d4fa4
Be consistent in expression of logic.
2021-07-03 00:00:00 -04:00
Thomas Harte
283092cfbc
With a unit test in aid, corrects some lingering TimedInterruptSource
issues.
2021-07-02 23:41:19 -04:00
Thomas Harte
614953a222
Allows the low-pass filter to react to high-pass effects.
2021-07-02 22:36:35 -04:00
Thomas Harte
4fffb3cf19
Allow that final Z80 cycle to start anywhere in the first three of Nick's window of six.
2021-07-02 22:29:35 -04:00
Thomas Harte
d715e5fd1d
Expose composite/RGB option in Qt.
2021-07-02 21:51:48 -04:00
Thomas Harte
7826a26c7b
Adds Enterprise composite video option.
...
While enabling more pixels on the left for RGB mode.
2021-07-02 21:42:09 -04:00
Thomas Harte
763b9ba0ec
Ensure the splash screen is skipped for self-booting disks.
2021-07-02 21:11:54 -04:00
Thomas Harte
51d98ef9ab
Add missing stddef header where size_t is used.
2021-07-01 23:15:32 -04:00
Thomas Harte
742d44a532
Switch to an activity-based typing trigger; add a target loading command.
2021-07-01 22:53:23 -04:00
Thomas Harte
52b96db2b9
Correct syntax, mapping and inter-key timing.
2021-07-01 21:18:15 -04:00
Thomas Harte
0b9de78c38
Add typer support for the Enterprise.
2021-07-01 21:05:03 -04:00
Thomas Harte
1c424833a9
Correct EXDOS ROM name.
2021-06-29 21:04:53 -04:00
Thomas Harte
3d8fc9952d
Remove dead TODO, correct for overflow position.
2021-06-29 15:44:02 -04:00
Thomas Harte
8ce8fbd977
Provide correct input when one of the tone generators is the interrupt source.
2021-06-29 15:41:08 -04:00
Thomas Harte
7f08218b28
The Nick interrupt input also seems to be a live poll, not a retrieval of the mask.
...
This corrects the two pieces of software I knew not to be working.
2021-06-28 22:10:11 -04:00
Thomas Harte
2c139ad931
Adds some notes to self.
...
I think I'm starting to find enough information to handle tapes.
2021-06-28 22:03:06 -04:00
Thomas Harte
1119779c8b
Ensure EXDOS card is completely disabled if no FDC is present.
2021-06-28 21:47:53 -04:00
Thomas Harte
5351ac560f
Ensure the motor goes off for unselected drives.
2021-06-28 21:40:12 -04:00
Thomas Harte
49f0ab0f15
Add note to self.
...
Although I still think there may be some issue lurking.
2021-06-28 21:31:55 -04:00
Thomas Harte
a5c57e777e
VRES appears to work negatively in attribute mode too.
2021-06-28 21:24:13 -04:00
Thomas Harte
3c59042388
Fixes initial state for 1kHz.
2021-06-28 21:08:41 -04:00
Thomas Harte
919e211bc4
Reduces number of interrupt-related sequence points.
2021-06-28 19:30:12 -04:00
Thomas Harte
daa0737ce4
Ensure addresses tick upwards even during sync/burst; correct 2/4/8bpp character sizing.
2021-06-28 19:00:51 -04:00
Thomas Harte
36805cb120
Correct tone channel interrupts, remove dead warning.
2021-06-27 23:21:00 -04:00
Thomas Harte
7de69e9874
Makes an attempt to round out the timed interrupts.
2021-06-27 23:09:11 -04:00
Thomas Harte
b93575bbcc
Spots that b0 and b2 of 0xb4 are 'dividers', not enables.
2021-06-27 22:33:20 -04:00
Thomas Harte
116e0f0105
Interupts 1kHz and 50Hz interrupts, while edging towards tone generator interrupts.
2021-06-27 22:08:38 -04:00
Thomas Harte
e4a650aaff
Implements the 1Hz interrupt.
2021-06-27 21:47:21 -04:00
Thomas Harte
b5312b9ba0
get_interrupt_line can be const.
2021-06-27 21:37:11 -04:00
Thomas Harte
6afee7bb9b
Captures appropriate fields.
...
No action yet.
2021-06-27 21:36:55 -04:00
Thomas Harte
2f53b105bb
The Enterprise is now an Activity::Source; also sketches out the owner of Dave's timed interrupt logic.
2021-06-27 21:02:04 -04:00
Thomas Harte
be19fa9dde
This mapping needs to know where it will occur.
2021-06-27 17:30:09 -04:00