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10921 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
434dd4fd94 Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:57:37 +00:00
Anton Korobeynikov
d260c248ab Do not emit "generic" CPU string. This fixes PR4291. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72696 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:03:17 +00:00
Dan Gohman
2d98f0664b Fix a grammaro and clarify a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72668 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-31 17:52:18 +00:00
Bruno Cardoso Lopes
a3f99f9033 First patch in the direction of splitting MachineCodeEmitter in two subclasses: 
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 20:51:52 +00:00
Evan Cheng
cf7895ff8b (i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear the top 8 bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72618 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 08:43:27 +00:00
Bill Wendling
51b16f4737 Untabification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72604 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 01:09:53 +00:00
Anton Korobeynikov
d4022c3fbb Add placeholder for thumb2 stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72593 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-29 23:41:08 +00:00
Evan Cheng
cb219f0ef6 More h-registers tricks: folding zext nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72558 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-29 01:44:43 +00:00
Bill Wendling
2265ba0717 The MONITOR and MWAIT instructions have insufficient information for 
decoding. Essentially, they both map to the same column in the "opcode
extensions for one- and two-byte opcodes" table in the x86 manual. The RawFrm
complicates decoding this.

Instead, use opcode 0x01, prefix 0x01, and form MRM1r. Then have the code
emitter special case these, a la [SML]FENCE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72556 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 23:40:46 +00:00
Evan Cheng
8a0b2daac2 Fix MOVMSKPDrr encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 18:55:28 +00:00
Evan Cheng
ed7f56b555 Fix PSIGND encoding bug. Patch by Sean Callanan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72534 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 18:48:53 +00:00
Sanjiv Gupta
dd4694b519 Emit debug info for locals with proper scope. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72531 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 18:24:11 +00:00
Sanjiv Gupta
a455942895 Mark the branch insns correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72529 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 17:32:56 +00:00
Sanjiv Gupta
df75a27609 Fixing problems that got exposed after the refactoring of LegalizeDAG done in 72447. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72521 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 06:59:57 +00:00
Eli Friedman
c06441e5ea Return the operand rather than a null SDValue when the given SELECT_CC 
is actually legal.  Part of LegalizeDAG cleanups.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72513 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 04:31:08 +00:00
Jeffrey Yasskin
2d92c71668 This patch brings the list of attributes in CPPBackend.cpp up to date with the 
list in Attributes.h. It also reorders the CPPBackend list to match so that
it's easier to see that it's complete.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72510 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 03:16:17 +00:00
Bill Wendling
3b1259bb9f "The instructions MMX_PSADBWrm and MMX_PSADBWrr have opcode 0b11100000 (e0), but 
the Intel manual (screenshot) says it should be 0b11110110 (f6).  The existing
encoding causes a disassembly conflict with MMX_PAVGBrm, which really should be
0f e0."

Patch by Sean Callanan!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72508 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 02:04:00 +00:00
Evan Cheng
8b944d39b3 Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code. 
e.g.
orl     $65536, 8(%rax)
=>
orb     $1, 10(%rax)

Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72507 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 00:35:15 +00:00
Eli Friedman
ba2352b066 Ger rid of some dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72494 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-27 20:39:00 +00:00
Evan Cheng
bc9be219d6 Fix sfence jit encoding. Patch by Sean Callanan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72488 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-27 18:38:01 +00:00
Bruno Cardoso Lopes
d3bdf19ce7 Added support for fround, fextend and FP_TO_SINT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72483 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-27 17:23:44 +00:00
Eli Friedman
36df499648 Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and 
FP_TO_XINT.  Necessary for some cleanups I'm working on.  Updated 
from the previous version (r72431) to fix a bug and make some things a 
bit clearer.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72445 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-27 00:47:34 +00:00
Daniel Dunbar
82205570d1 Back out r72431, it is causing a number of compilation crashes with clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72436 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-26 21:27:02 +00:00
Stefanus Du Toit
8cf5ab153d Update CPU capabilities for AMD machines 
- added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and
barcelona with appropriate sse3/4a levels
- added FeatureSSE4A for amdfam10 processors
in X86Subtarget:
- added hasSSE4A
- updated AutoDetectSubtargetFeatures to detect SSE4A
- updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and
family 10h as amdfam10

New processor names match those used by gcc.

Patch by Paul Redmond!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72434 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-26 21:04:35 +00:00
Eli Friedman
ecc23a5240 Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and 
FP_TO_XINT.  Necessary for some cleanups I'm working on. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72431 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-26 19:18:56 +00:00
Chris Lattner
d9b77159d6 add some late optimizations that GCC does. It thinks these are a win 
even on Core2, not just AMD processors which was a surprise to me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72396 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-25 20:28:19 +00:00
Chris Lattner
0c85aabfdc fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72395 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-25 19:51:07 +00:00
Chris Lattner
f9dc644936 we should eventually add -march=atom and the new atom movbe instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72387 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-25 16:34:44 +00:00
Eli Friedman
1a8229b162 Make the PPC backend use a legal type for the operands to the BUILD_VECTOR 
nodes it generates.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72356 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-24 02:03:36 +00:00
Eli Friedman
108b519cc1 Make the X86 backend mark EXTRACT_SUBVECTOR as Expand, at least for the 
moment.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72350 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 22:44:52 +00:00
Anton Korobeynikov
6d7d2aa38a Add ARMv7 architecture, Cortex processors and different FPU modes handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72337 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:51:43 +00:00
Anton Korobeynikov
88ce667003 Emit ARM Build Attributes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72336 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:51:20 +00:00
Anton Korobeynikov
41a024385f Propagate CPU string out of SubtargetFeatures 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72335 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:50:50 +00:00
Eli Friedman
948e95a381 Make the x86 backend custom-lower UINT_TO_FP and FP_TO_UINT on 32-bit 
systems instead of attempting to promote them to a 64-bit SINT_TO_FP or 
FP_TO_SINT.  This is in preparation for removing the type legalization 
code from LegalizeDAG: once type legalization is gone from LegalizeDAG, 
it won't be able to handle the i64 operand/result correctly.

This isn't quite ideal, but I don't think any other operation for any 
target ends up in this situation, so treating this case specially seems 
reasonable.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72324 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 09:59:16 +00:00
Oscar Fuentes
a2ac75d547 CMake: Use libpthread in tblgen when needed. Updated list of source 
files for PIC16 target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72277 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-22 20:55:15 +00:00
Bob Wilson
2f95461ee2 Only 64-bit targets support TImode libcalls. Disable the TImode shift libcalls 
for ARM.  This fixes rdar://6908807.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72269 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-22 17:38:41 +00:00
Sanjiv Gupta
a57bc3ba02 Emit debug information for globals (which include automatic variables as well because on PIC16 they are emitted as globals by the frontend). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72262 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-22 13:58:45 +00:00
Bob Wilson
261f2a2337 Minor formatting fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72172 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-20 16:30:25 +00:00
Evan Cheng
d7f666a869 Try again. Allow call to immediate address for ELF or when in static relocation mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72160 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-20 04:53:57 +00:00
Evan Cheng
65cdee3fd4 Cannot use immediate as call absolute target in PIC mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72154 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-20 01:11:00 +00:00
Bob Wilson
6aa219a18c Fix pr4227: Handle large immediate values in inline assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72138 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 21:27:57 +00:00
Bob Wilson
86c212e894 Follow up on new support for memory operands in ARM inline assembly. 
This fixes pr4233.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72115 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 18:33:02 +00:00
Bob Wilson
04746eae49 Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and 
the stack.  Patch by Sandeep Patel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72106 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 10:02:36 +00:00
Bob Wilson
224c244f56 Fix pr4091: Add support for "m" constraint in ARM inline assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72105 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 05:53:42 +00:00
Dale Johannesen
f4786cc07a Spacing fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72083 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 00:46:42 +00:00
Dale Johannesen
94c9cd17de Add OpSize to 16-bit ADC and SBB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72045 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-18 21:41:59 +00:00
Bob Wilson
e6abdffe06 Fix pr4202: Disable CodePlacementOpt for ARM. The ARMConstantIslandPass has 
to run last because it needs to know the exact size and position of every
basic block.  Currently CodePlacementOpt is set up to run last.  It might be
worthwhile to investigate reordering these passes, but for now, let's just
make it work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72037 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-18 20:55:32 +00:00
Dale Johannesen
ca11dae4a4 Fill in the missing patterns for ADC and SBB. 
Some comment cleanup.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72022 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-18 17:44:15 +00:00
Anton Korobeynikov
e4fdb8b8ff Mark rotl/rotr as expand. This generates pretty ugly code, but this is better than nothing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71976 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-17 10:16:28 +00:00
Anton Korobeynikov
aceb620de8 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71975 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-17 10:15:22 +00:00
Jakob Stoklund Olesen
b5426457f0 Fix a missing def-flag on a Mips epilogue load. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71935 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-16 07:26:06 +00:00
Jakob Stoklund Olesen
f2c3f6a855 Remember to set def-flag on register loaded from stack slot in CellSPU. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71934 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-16 07:25:44 +00:00
Mike Stump
11adeed8b3 Reflow to fit 80-col. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71813 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-14 23:23:37 +00:00
Mike Stump
6726be6a67 Reflow to fit 80-col. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71812 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-14 23:22:47 +00:00
Jim Grosbach
f957012866 Update the names of the exception handling sjlj instrinsics to 
llvm.eh.sjlj.* for better clarity as to their purpose and scope. Add
a description of llvm.eh.sjlj.setjmp to ExceptionHandling.html.
(llvm.eh.sjlj.longjmp documentation coming when that implementation is
added).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71758 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-14 00:46:35 +00:00
Jim Grosbach
6aa7197fb5 Spelling correction s/builting/builtin/ and remove trailing whitespace in a few places 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71735 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 22:32:43 +00:00
Evan Cheng
6ebf7bc740 Run code placement optimization for targets that want it (arm and x86 for now). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71726 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 21:42:09 +00:00
Bill Wendling
587daedce2 Change MachineInstrBuilder::addReg() to take a flag instead of a list of 
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.

I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 21:33:08 +00:00
Sanjiv Gupta
ad6585b021 Run through the list of globals once and sectionize all types of globlas includeing declarations. Later emit them from their section lists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71661 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 15:13:17 +00:00
Dale Johannesen
7b9486ad43 Add an int64_t variant of abs, for host environments 
without one.  Use it where we were using abs on
int64_t objects.
(I strongly suspect the casts to unsigned in the
fragments in LoopStrengthReduce are not doing whatever
the original intent was, but the obvious change to
uint64_t doesn't work.  Maybe later.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71612 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 00:24:22 +00:00
Jim Grosbach
0e0da734bb Add support for GCC compatible builtin setjmp and longjmp intrinsics. This is 
a supporting preliminary patch for GCC-compatible SjLJ exception handling. Note that these intrinsics are not designed to be invoked directly by the user, but
rather used by the front-end as target hooks for exception handling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71610 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 23:59:14 +00:00
Jim Grosbach
c93f961874 correct register class for tADDspi to GPR since the register will always be SP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71602 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 22:30:18 +00:00
Bill Wendling
b877a1f545 More MSVC fixes -- class/struct conflicts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71601 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 21:55:29 +00:00
Evan Cheng
0af934eb64 80 col violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71582 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 20:17:52 +00:00
Bob Wilson
39bf051ec2 Fix up a few minor typos in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71563 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 17:35:29 +00:00
Bob Wilson
8494526a23 Fix 80-col violations and remove trailing whitespace. No functional changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71562 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 17:09:30 +00:00
Sanjiv Gupta
2364cfeb54 Iterate over globals once and sectionize them into appropriate sections. 
Later in asmprinter, go over thsese sections and print them.
Do not print empty sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71560 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 17:07:27 +00:00
Sanjiv Gupta
429185787a We do not need to create a label for external defs and decls, 
just emit a comment for readability.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71544 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 06:52:41 +00:00
Sanjiv Gupta
ed4f4fbfba Mark mayLoad, mayStore for insns correctly and use them 
to check if an insn is accessing memory during mem sel optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71537 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 04:30:38 +00:00
Dan Gohman
81db61a2e6 Factor the code for collecting IV users out of LSR into an IVUsers class, 
and generalize it so that it can be used by IndVarSimplify. Implement the
base IndVarSimplify transformation code using IVUsers. This removes
TestOrigIVForWrap and associated code, as ScalarEvolution now has enough
builtin overflow detection and folding logic to handle all the same cases,
and more. Run "opt -iv-users -analyze -disable-output" on your favorite
loop for an example of what IVUsers does.

This lets IndVarSimplify eliminate IV casts and compute trip counts in
more cases. Also, this happens to finally fix the remaining testcases
in PR1301.

Now that IndVarSimplify is being more aggressive, it occasionally runs
into the problem where ScalarEvolutionExpander's code for avoiding
duplicate expansions makes it difficult to ensure that all expanded
instructions dominate all the instructions that will use them. As a
temporary measure, IndVarSimplify now uses a FixUsesBeforeDefs function
to fix up instructions inserted by SCEVExpander. Fortunately, this code
is contained, and can be easily removed once a more comprehensive
solution is available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 02:17:14 +00:00
Evan Cheng
6ed34918eb Avoid unneeded SIB byte encoding. Patch by Zoltan Varga. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71520 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 00:07:35 +00:00
Jay Foad
8d730fbde5 Don't #include DerivedTypes.h from TargetData.h. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71468 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 19:38:09 +00:00
Dan Gohman
1f3be1a1fe Fix two wording errors that Duncan spotted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71459 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 18:51:16 +00:00
Dan Gohman
0d9bb68d6d LLVM has unaligned loads and stores now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71449 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 18:06:05 +00:00
Dan Gohman
5c8274b5e3 Upgrade this example to new-style syntax. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71447 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 18:04:52 +00:00
Dan Gohman
3cd90a18bb Convert a subtract into a negate and an add when it helps x86 
address folding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71446 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 18:02:53 +00:00
Chris Lattner
32c5f17024 remove some done things: we have nocapture and SROA is smarter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71443 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 17:41:40 +00:00
Chris Lattner
d919a8bc8a add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71442 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 17:36:33 +00:00
Jay Foad
7524b59062 Change TargetData::getIntPtrType() to return an IntegerType instead of 
just a Type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71426 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 11:13:47 +00:00
Sanjiv Gupta
e0b4b0e436 Fix more naming issues. 
compiler libcalls start with .lib. now.
fixed section names.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71424 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 08:52:04 +00:00
Sanjiv Gupta
0608b49819 Detect calls to compiler intrinsics and emit an extern declarations 
only for those. These extern declarations to intrinsics are currently 
being emitted at the bottom of generated .s file, which works fine with
gpasm(not sure about MPSAM though).
PIC16 linker generates errors for few cases (function-args/struct_args_5) if you do not include any
extern declarations (even if no intrinsics are being used), but that
needs to be fixed in the linker itself.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71423 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 06:01:38 +00:00
Sanjiv Gupta
af3fdb5dc4 Module iterator contains list of filescope functions as well, we don't need to emit and global declarations for them. This was working earlier and was broken during one of the recent commit for PIC16 naming. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71394 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-10 16:18:39 +00:00
Anton Korobeynikov
9c11d21d90 Add imm-reg and imm-mem patters for cmp on msp430 
(imm is allowed to be source operand, not dest...)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71393 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-10 14:49:00 +00:00
Sanjiv Gupta
211f3624ef Changed lowering and asmprinter to use ABI Names class called PAN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71386 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-10 05:23:47 +00:00
Eli Friedman
cea03cdb69 Remove a completed optimization. Add a potential optimization I ran 
into.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71352 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-09 08:40:15 +00:00
Duncan Sands
777d2306b3 Rename PaddedSize to AllocSize, in the hope that this 
will make it more obvious what it represents, and stop
it being confused with the StoreSize.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71349 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-09 07:06:46 +00:00
Sanjiv Gupta
09560f805e Use 16 bit arithmetic while retrieving the address of callee's frame during indirect function calls, and set pclath before every call to retrieve the frame address. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71323 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-09 05:11:19 +00:00
Evan Cheng
82ae933e55 PPC::B and PPC::BCC's target operand may be an immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71282 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 23:09:25 +00:00
Anton Korobeynikov
c1c6ef8f74 Factor out cycle-finder code and make it generic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71241 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:51:58 +00:00
Anton Korobeynikov
da4d2f63d8 Allow 8 bit select in custom inserter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71239 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:51:21 +00:00
Anton Korobeynikov
0616c3b678 Expand UREM / SREM into libcalls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71236 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:50:41 +00:00
Anton Korobeynikov
1cb0acee8a Add 8 bit select 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71235 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:50:26 +00:00
Chris Lattner
4992196322 Fix PR4152: asm constraint validation happens before dag combine, so we 
need to work a bit to combine things like (x+c1+c2) into x+c3.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71232 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:23:14 +00:00
Evan Cheng
45e0010e14 Optimize code placement in loop to eliminate unconditional branches or move unconditional branch to the outside of the loop. e.g. 
///       A:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       <fallthrough to B>                                                                                                                                                 
///                                                                                                                                                                          
///       B:  --> loop header                                                                                                                                                
///       ...                                                                                                                                                                
///       jcc <cond> C, [exit]                                                                                                                                               
///                                                                                                                                                                          
///       C:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       jmp B                                                                                                                                                              
///                                                                                                                                                                          
/// ==>                                                                                                                                                                      
///                                                                                                                                                                          
///       A:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       jmp B                                                                                                                                                              
///                                                                                                                                                                          
///       C:  --> new loop header                                                                                                                                            
///       ...                                                                                                                                                                
///       <fallthough to B>                                                                                                                                                  
///                                                                                                                                                                          
///       B:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       jcc <cond> C, [exit] 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71209 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 06:34:09 +00:00
Nick Lewycky
4a228864f2 Add missing #include for "strlen" which is used inline in this header. Fixes 
build under gcc 4.3.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71208 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 06:22:25 +00:00
Sanjiv Gupta
573eb5e573 Moved pic16 naming functions to correct place. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71207 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 04:50:14 +00:00
Evan Cheng
a9bb0675e5 Eliminate compiler warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71149 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-07 05:31:56 +00:00
Oscar Fuentes
d5e8d821dd CMake: Updated lib/Target/PIC16/CMakeLists.txt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71115 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-06 20:40:05 +00:00
Dale Johannesen
43e91b9c2f Use X86AddrNumOperands instead of magic constant one 
more place.  This fixes a bunch of x86-64 JIT regressions.
(Introduced when the value of the magic constant changed
in 68645.  At the time apparently nobody noticed; failures
were hidden in 70343-70439 by an unrelated bug, so showed
up again as "new" failures in 70440.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71106 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-06 19:04:30 +00:00
Sanjiv Gupta
d8d27f4a4b Emit banksel and movlp instructions. 
Split large global data (both initialized and un-initialized) into multiple sections of <= 80 bytes.
Provide routines to manage PIC16 ABI naming conventions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71073 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-06 08:02:01 +00:00
Chris Lattner
1777d0c6c5 Add basic support for code generation of 
addrspace(257) -> FS relative on x86.  Patch by Zoltan Varga!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70992 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-05 18:52:19 +00:00
Evan Cheng
ef1840173c Revert part of 70929 that has to do with determining whether a SIB byte is needed. It causes a lot of x86_64 JIT failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-05 18:18:57 +00:00
Evan Cheng
d923fc621f Move getInstrOperandRegClass from the scheduler to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70950 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-05 00:30:09 +00:00
Evan Cheng
b0030ddca4 - Avoid the longer SIB encoding on x86_64 when it's not needed. 
- Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp
Patch by Zoltan Varga.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70929 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-04 22:49:16 +00:00
Dan Gohman
7d04e4a7c0 X86FastISel doesn't support the -tailcallopt ABI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70902 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-04 19:50:33 +00:00
Anton Korobeynikov
cffb5284f1 Fix code emission for conditional branches. 
Patch by Collin Winter!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70898 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-04 19:10:38 +00:00
Mike Stump
fe095f39e7 Restore minor deletion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70892 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-04 18:40:41 +00:00
Anton Korobeynikov
87e3caf819 Handle implicit zext in a better way. Shamelessly stolen from x86 backend. 
Thanks for Dan Gohman for suggestion!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70782 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 15:50:18 +00:00
Anton Korobeynikov
60871cb40c Update due to mainline API change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70769 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:19:42 +00:00
Anton Korobeynikov
7594884648 Add TODO list :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70768 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:19:24 +00:00
Anton Korobeynikov
1bb8cd723d Make handling of conditional stuff much more straightforward 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70767 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:19:09 +00:00
Anton Korobeynikov
1fcfb6b6d2 Temporary disable imm patterns for cmp. Actually, all cmp-related stuff (select_cc, setcc, br_cc). needs to be rethought 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70766 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:18:50 +00:00
Anton Korobeynikov
f2f540261b Expand divisions into libcalls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70765 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:18:33 +00:00
Anton Korobeynikov
b78e214274 Custom lower SIGN_EXTEND 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70763 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:17:49 +00:00
Anton Korobeynikov
1394db0eeb Some eye-candy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70762 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:17:31 +00:00
Anton Korobeynikov
6130fc8ea3 Print function header / footer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70761 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:17:11 +00:00
Anton Korobeynikov
d9e89f6ea4 Fix printing: je => jeq 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70760 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:16:54 +00:00
Anton Korobeynikov
bf8ef3f29d Add 8bit shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70759 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:16:37 +00:00
Anton Korobeynikov
e699d0f549 Handle logical shift right (at least I hope so :) ) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70758 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:16:17 +00:00
Anton Korobeynikov
e375a7c768 Handle anyext 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70757 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:57 +00:00
Anton Korobeynikov
0dbf292f68 Expand all sorts of indirect branches 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70755 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:40 +00:00
Anton Korobeynikov
8644af3690 Add InsertBranch() hook for tail mergeing 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70754 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:22 +00:00
Anton Korobeynikov
49ebc22784 Implement bswap 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70753 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:03 +00:00
Anton Korobeynikov
5d59f68ade Properly handle ExternalSymbol's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70752 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:14:46 +00:00
Anton Korobeynikov
8725bd22bf Expand muls (all mulls!) to libcalls for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70751 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:14:25 +00:00
Anton Korobeynikov
b8f03c9578 Provide addc and subc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70748 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:13:34 +00:00
Anton Korobeynikov
ea54c9846b Add left shift 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70747 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:13:17 +00:00
Anton Korobeynikov
824d8ddae8 Add direct branch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70746 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:12:58 +00:00
Anton Korobeynikov
0af5af823b It's error-prone to maintain two separate variants of asmprinting stuff, one of which is even used. Drop second (aka 'intel') variant of operands. It can be added later, if needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70745 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:12:37 +00:00
Anton Korobeynikov
8b528e52ee Lower select with custom inserted and make condjumps generic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70744 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:12:23 +00:00
Anton Korobeynikov
ed1a51af37 Add first draft for conditions, conditional branches, etc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70743 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:12:06 +00:00
Anton Korobeynikov
6e4f62790b Hanle i8 returns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70742 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:11:48 +00:00
Anton Korobeynikov
c08163e72d Small tweaking 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70741 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:11:35 +00:00
Anton Korobeynikov
ce45d30fa1 Add prologue/epilogue emission. Fix frame pointer handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70740 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:11:20 +00:00
Anton Korobeynikov
d5047cb9f7 Add code for save/restore of callee-saved registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70739 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:11:04 +00:00
Anton Korobeynikov
875e1eb8ab Two more hooks for RA and FP registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70738 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:10:40 +00:00
Anton Korobeynikov
40477317f3 Proper handle loading of effective address of stack slot stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70737 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:10:26 +00:00
Anton Korobeynikov
82e46c2595 Match frame indexes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:10:11 +00:00
Anton Korobeynikov
aa29915b58 First draft of stack slot loads / stores lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70735 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:09:57 +00:00
Anton Korobeynikov
cf14ae5500 Reverse order of memory arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70734 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:09:40 +00:00
Anton Korobeynikov
aecfa7897f Remove bogus pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70733 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:09:24 +00:00
Anton Korobeynikov
1deea5f3a7 Correct asmprinting of memory operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70732 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:09:10 +00:00
Anton Korobeynikov
0eb6af40e3 Match wrapper node for address 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70731 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:08:51 +00:00
Anton Korobeynikov
3513ca81c6 Add lowering for global address nodes. Not pretty efficient though. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70730 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:08:33 +00:00
Anton Korobeynikov
3c2684d136 Some early full call lowering draft for direct calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70729 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:08:13 +00:00
Anton Korobeynikov
b561264d2b Add call frame setup instruction elimination and lowerid for bunch of call-related stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70728 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:07:54 +00:00
Anton Korobeynikov
4428885c5a Add CALL lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70727 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:07:31 +00:00
Anton Korobeynikov
01e0e8d119 Add bunch of mem-whatever patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70726 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:07:10 +00:00
Anton Korobeynikov
2682bf5979 Add bunch of reg-mem inst patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70725 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:06:46 +00:00
Anton Korobeynikov
54f30d3fc9 Add normal and trunc stores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70724 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:06:26 +00:00
Anton Korobeynikov
36b6e533c1 Basic support for mem=>reg moves 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70723 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:06:03 +00:00
Anton Korobeynikov
51c31d6888 Add 8-bit insts. zext behaviour is not modelled yet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70722 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:05:42 +00:00
Anton Korobeynikov
cf9adf2cbb Add 8-bit regclass and pattern for sext_inreg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70721 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:05:22 +00:00
Anton Korobeynikov
0fc32dae8f Add pattern for OR 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70720 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:05:00 +00:00
Anton Korobeynikov
6ee626a1c1 Add reg-imm variants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70719 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:04:41 +00:00
Anton Korobeynikov
c8166ac760 Add hint to nop 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70718 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:04:23 +00:00
Anton Korobeynikov
0ba0a89c6b Add more instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70717 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:04:06 +00:00
Anton Korobeynikov
b8639f5214 Cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70716 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:03:50 +00:00
Anton Korobeynikov
d2c94ae49e Add dummy lowering for shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70715 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:03:33 +00:00
Anton Korobeynikov
1476d97037 We don't have any div at all - thus mark it as expensive 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70714 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:03:14 +00:00
Anton Korobeynikov
8d7bb3998b We're not going to spend 100% of time in interrupts, do we? :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70713 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:02:57 +00:00
Anton Korobeynikov
431beb5fa7 Add simple reg-reg add. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70712 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:02:39 +00:00
Anton Korobeynikov
fff5f76c46 gas uses lower letter for register names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70711 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:02:22 +00:00
Anton Korobeynikov
1df221f2bb Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70710 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:02:04 +00:00
Anton Korobeynikov
09c42f509a Add function body printing routine 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70709 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:01:41 +00:00
Anton Korobeynikov
f3085ac973 Add 'msp430' target triple recognizer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70708 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:01:23 +00:00
Anton Korobeynikov
e37db97928 Make emit{Prologue,Epilogue}() noop for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:01:04 +00:00
Anton Korobeynikov
fbf165a74b Add callee-saved regs & reg classes getter hooks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70706 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:00:46 +00:00
Anton Korobeynikov
3a4fbcfd33 Add simple FP indicator for given function hook 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70705 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:00:28 +00:00
Anton Korobeynikov
dcb802cf7b Provide set of reserved registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70704 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:00:11 +00:00
Anton Korobeynikov
fd1b7c778c Add proper ISD::RET lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70703 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:59:50 +00:00
Anton Korobeynikov
c8fbb6ae20 Add first draft of MSP430 calling convention stuff and draft of ISD::FORMAL_ARGUMENTS node lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70702 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:59:33 +00:00
Anton Korobeynikov
2dd6cdc920 Fix register names, fix register allocation order, handle frame pointer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70701 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:59:16 +00:00
Anton Korobeynikov
43ed64a182 Clearify the usage and add some debug stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70700 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:58:58 +00:00
Anton Korobeynikov
9e12339cb2 Cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70699 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:58:40 +00:00
Anton Korobeynikov
b78e17b33a Add cmake script. No idea whether it works or not :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70698 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:58:22 +00:00
Anton Korobeynikov
fe3fc5ace7 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70697 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:58:05 +00:00
Anton Korobeynikov
f99601fab4 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70695 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:57:47 +00:00
Anton Korobeynikov
f2c3e179ec Dummy MSP430 backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70694 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:57:15 +00:00
Chris Lattner
c650f1f141 'The attached patch fixes an issue where llc -march=cpp fails with 
"Invalid primitive type" on input containing the x86_fp80 type.'
Patch by Collin Winter!




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70610 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-01 23:54:26 +00:00
Argyrios Kyrtzidis
9eddfd3687 Fix compilation for some targets other than x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70522 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-30 23:50:26 +00:00
Argyrios Kyrtzidis
a26eae64dd Make DebugLoc independent of DwarfWriter. 
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70520 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-30 23:22:31 +00:00
Jakob Stoklund Olesen
ba67d87fe4 getCommonSubClass() - Calculate the largest common sub-class of two register 
classes.

This is implemented as a function rather than a method on TargetRegisterClass
because it is symmetric in its arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70512 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-30 21:23:32 +00:00
Dan Gohman
78e04d4aa0 Set mayLoad on MOVZX32_NOREXrm8 too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70466 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-30 03:11:48 +00:00
Evan Cheng
8c1474050d Mark MOV8mr_NOREX and MOV8rm_NOREX as mayStore / mayLoad respectively. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70461 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-30 00:58:57 +00:00
Chris Lattner
cf189964d7 remove progname which is never set. PR4085 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70453 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-30 00:24:33 +00:00
Bill Wendling
98a366d547 Instead of passing in an unsigned value for the optimization level, use an enum, 
which better identifies what the optimization is doing. And is more flexible for
future uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 23:29:43 +00:00
Nate Begeman
ec8eee2d3a Fix infinite recursion in the C++ code which handles movddup by making it unnecessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70425 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 22:47:44 +00:00
Nate Begeman
5a5ca1519e Implement review feedback for vector shuffle work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 05:20:52 +00:00
Sanjiv Gupta
a3518a1d6a Add a public method called getAddressSpace() to the GlobalAddressSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70366 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 04:43:24 +00:00
Bill Wendling
be8cc2a3de Second attempt: 
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 00:15:41 +00:00
Anton Korobeynikov
573c92d8ba Properly print 'P' modifier on inline asm memory operands. 
This should fix PR3379 and PR4064.
Patch inspired by Edwin Török!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70328 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-28 21:49:33 +00:00
Sanjiv Gupta
23b0543e3f GlobalValue is always pointer type, so an assert isn't required. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70300 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-28 16:39:45 +00:00
Bill Wendling
c69d56f115 r70270 isn't ready yet. Back this out. Sorry for the noise. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-28 01:04:53 +00:00
Bill Wendling
2e9d5f912a Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to 
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-28 00:21:31 +00:00
Nate Begeman
9008ca6b6b 2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan. 
PR2957

ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask.  A value of -1 represents UNDEF.

In addition to eliminating the creation of illegal BUILD_VECTORS just to 
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70225 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-27 18:41:29 +00:00
Dan Gohman
4af325d1b4 Rename GR8_ABCD to GR8_ABCD_L and create GR8_ABCD_H, and use these 
to precisely describe the h-register subreg register classes.
Thanks to Jakob Stoklund Olesen for spotting this and for the
initial patch!

Also, make getStoreRegOpcode and getLoadRegOpcode aware of the
needs of h registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70211 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-27 16:41:36 +00:00
Dan Gohman
6241762c5a Rename GR8_, GR16_, GR32_, and GR64_ to GR8_ABCD, GR16_ABCD, 
GR32_ABCD, and GR64_ABCD, respectively, to help describe them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70210 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-27 16:33:14 +00:00
Dan Gohman
4d47b9bcb9 Break up long multi-mnemonic strings into separate lines for readability. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70209 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-27 15:13:28 +00:00
Mon P Wang
a7e01d7efd Revised 68749 to allow matching of load/stores for address spaces < 256. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70197 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-27 07:22:10 +00:00
Chris Lattner
bc58322d6a add support for detecting process features on win64, patch by 
Nicolas Capens!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70057 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-25 18:27:23 +00:00
Bob Wilson
8091524d98 Change LowerCallResult method so that CCValAssign::BCvt can be used with 
f64 types.  This is not used for anything yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70006 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-25 00:33:20 +00:00
Bob Wilson
d55bd51f31 Adjust a comment to reflect what the code does. Splitting a 64-bit argument 
between registers and the stack may be required with the APCS ABI, but it
isn't tied to using a particular version of the ARM architecture.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 17:05:01 +00:00
Bob Wilson
4d59e1d666 Fix up some problems with getCopyToReg and getCopyFromReg nodes being 
chained and "flagged" together.  I also made a few changes to handle the
chain and flag values more consistently.  I found these problems by
inspection so I'm not aware of anything that breaks because of them
(thus no testcase).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69977 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 17:00:36 +00:00
Bob Wilson
1c2c462d0f Remove unnecessary references to f32 types. After specifying that f32 
should be bit-converted to i32, it is sufficient to list only i32 in
subsequent definitions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69973 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 16:55:25 +00:00
Rafael Espindola
15f1b66d64 Fix PR 4004 by including the call to __tls_get_addr in X86tlsaddr. This is not 
very elegant, but neither is the tls specification :-(



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69968 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 12:59:40 +00:00
Rafael Espindola
15684b2955 Revert 69952. Causes testsuite failures on linux x86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69967 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 12:40:33 +00:00
Nate Begeman
b706d29f9c PR2957 
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask.  A value of -1 represents UNDEF.

In addition to eliminating the creation of illegal BUILD_VECTORS just to 
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.

A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 03:42:54 +00:00
Dan Gohman
f1d012c595 Fix spurious indentation in a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69934 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-23 22:41:05 +00:00
Sanjiv Gupta
b1f321b553 Banksel immediate constant will always immediately follow the GA/ES, so scan an insn from beginnin to find out the banksel operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69883 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-23 10:34:58 +00:00
Dan Gohman
146a310e66 Add support for printing MO_ExternalSymbol operands in 
memory operand tuples. This doesn't ever come up in normal
code however.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69848 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-23 00:57:37 +00:00
Sanjiv Gupta
dd92dba644 Make the function begin label start after ther data pointer. 
The address of data frame for function can be obtained by subtracting 2 from the function begin label.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69801 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-22 12:02:36 +00:00
Duncan Sands
005e7984cc Get rid of what looks like a copy-and-pasted typo. 
Spotted by gcc-4.5.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69673 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-21 09:44:39 +00:00
Rafael Espindola
7daa13c2a4 TLS_addr64 and TLS_addr32 define RDI and EAX. They don't use them. 
This fixes PR4002.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69672 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-21 08:22:09 +00:00
Sanjiv Gupta
e16178b75f Handle direct aggregate type arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69665 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-21 05:54:51 +00:00
Dan Gohman
70bc17dbf5 Make X86's copyRegToReg able to handle copies to and from subclasses. 
This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp
unnecessary. Derived from a patch by Jakob Stoklund Olesen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69635 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-20 22:54:34 +00:00
Daniel Dunbar
75397f4092 Remove unused variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69624 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-20 20:34:38 +00:00
Bob Wilson
998e125a87 Move duplicated AddLiveIn function from X86 and ARM backends to be a method 
in the MachineFunction class, renaming it to addLiveIn for consistency with
the same method in MachineBasicBlock.  Thanks for Anton for suggesting this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69615 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-20 18:36:57 +00:00
Devang Patel
91b477d2fa Match C backend only if it explicitly requested. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69613 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-20 18:07:22 +00:00
Sanjiv Gupta
2bdf490d71 Emit the auto variables of a function into a different section than parameters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69605 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-20 16:59:35 +00:00
Mon P Wang
0bd07fc5dd Fixed a few 64 bit cases in X86InstrInfo::commuteInstruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69417 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-18 05:16:01 +00:00
Bill Wendling
1824773689 Recommit r69335 and r69336. These were not causing problems. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69394 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 22:40:38 +00:00
Bob Wilson
e3fa9ef936 Move the AddLiveIn function definition closer to its uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 20:42:34 +00:00
Bob Wilson
e65586b37b Rearrange code to reduce indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69381 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 20:40:45 +00:00
Bob Wilson
dee46d7f6d Clean up formatting, remove trailing whitespace, fix comment typos and 
punctuation.  No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69378 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 20:35:10 +00:00
Bob Wilson
1f595bb429 Use CallConvLower.h and TableGen descriptions of the calling conventions 
for ARM.  Patch by Sandeep Patel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69371 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 19:07:39 +00:00
Rafael Espindola
2ee3db3003 For general dynamic TLS access we must use 
leaq	foo@TLSGD(%rip), %rdi

as part of the instruction sequence. Using a register other than %rdi and then
copying it to %rdi is not valid.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69350 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 14:35:58 +00:00
Bill Wendling
c3a76ef955 Revert r69335 and r69336. They were causing build failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69347 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 04:19:22 +00:00
Dan Gohman
d10a4ce582 MOV8rr_NOREX is a "Move" instruction. This doesn't currently 
matter, because this instruction isn't generated until after
things that care.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69336 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 00:45:17 +00:00
Dan Gohman
d51def353c Don't use MOV8rr_NOREX on x86-32. It doesn't actually hurt anything at 
present, but it's inconsistent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69335 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 00:43:09 +00:00
Chris Lattner
9062d9a55b Fix some failures in targets on available_externally functions, 
this fixes a crash on CodeGen/Generic/externally_available.ll
on ppc hosts.  Thanks to Nicholas L for pointing this out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69333 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 00:26:12 +00:00
Rafael Espindola
7c36683fa3 fix PR3995. A scale must be 1, 2, 4 or 8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69284 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-16 12:34:53 +00:00
Dan Gohman
df7dfc7715 Fix 80-column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69204 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-15 19:48:57 +00:00
Dan Gohman
25174963f6 Add a folding table entry for MOV8rr_NOREX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69203 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-15 19:48:28 +00:00
Dan Gohman
6288b93f00 Fix X86MachineFunctionInfo's doxygen comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69127 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-15 01:20:18 +00:00
Dan Gohman
aaa1fdb271 Do for GR16_NOREX what r69049 did for GR8_NOREX, to avoid trouble with 
the local register allocator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69115 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-15 00:10:16 +00:00
Dan Gohman
6d9305c7fd Add a new MOV8rr_NOREX, and make X86's copyRegToReg use it when 
either the source or destination is a physical h register.

This fixes sqlite3 with the post-RA scheduler enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69111 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-15 00:04:23 +00:00
Dan Gohman
a2f3703efd GR8_NOREX can contain the H registers, since they don't require 
REX prefixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69108 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-15 00:00:48 +00:00
Dan Gohman
62ad138d70 For the h-register addressing-mode trick, use the correct value for 
any non-address uses of the address value. This fixes 186.crafty.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69094 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-14 22:45:05 +00:00
Evan Cheng
b3f5bfe37f Some of GR8_NOREX registers are only available in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69049 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-14 16:57:43 +00:00
Sanjiv Gupta
85be408a32 Handle aggregate type arguments to direct and indirect calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69022 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-14 02:49:52 +00:00
Dan Gohman
88c7af096b Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize 
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 21:06:25 +00:00
Devang Patel
0f7fef3872 Reapply 68847. 
Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68964 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 17:02:03 +00:00
Dan Gohman
21e3dfbc86 Implement x86 h-register extract support. 
- Add patterns for h-register extract, which avoids a shift and mask,
   and in some cases a temporary register.
 - Add address-mode matching for turning (X>>(8-n))&(255<<n), where
   n is a valid address-mode scale value, into an h-register extract
   and a scaled-offset address.
 - Replace X86's MOV32to32_ and related instructions with the new
   target-independent COPY_TO_SUBREG instruction.

On x86-64 there are complicated constraints on h registers, and
CodeGen doesn't currently provide a high-level way to express all of them,
so they are handled with a bunch of special code. This code currently only
supports extracts where the result is used by a zero-extend or a store,
though these are fairly common.

These transformations are not always beneficial; since there are only
4 h registers, they sometimes require extra move instructions, and
this sometimes increases register pressure because it can force out
values that would otherwise be in one of those registers. However,
this appears to be relatively uncommon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68962 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 16:09:41 +00:00
Dan Gohman
8433df36fb Remove x86's special-case handling for ISD::TRUNCATE and 
ISD::SIGN_EXTEND_INREG. Tablegen-generated code can handle
these cases, and the scheduling issues observed earlier
appear to be resolved now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68959 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 15:29:31 +00:00
Dan Gohman
3cf9b3e455 Fix copy+pastos in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68958 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 15:28:29 +00:00
Dan Gohman
ee30047386 List the l registers before h registers, for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68954 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 15:18:42 +00:00
Dan Gohman
3cd0aa3260 Use X86::SUBREG_8BIT instead of hard-coding the equivalent constant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68951 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 15:14:03 +00:00
Dan Gohman
04d19f0241 Add a comment about MOVSX64rr8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68950 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 15:13:28 +00:00
Dan Gohman
8cc632f705 Fix another hard-coded constant to use X86AddrNumOperands. 
This unbreaks the JIT on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68948 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 15:04:25 +00:00
Rafael Espindola
7ff5bff45e X86-64 TLS support for local exec and initial exec. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68947 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 13:02:49 +00:00
Sanjiv Gupta
12f23a86e2 While passing arg of types larger than char only one byte at lower end was getting passed. We couldn't catch this as we did not have tests that were passing an int value larger than 256. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68946 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 09:38:38 +00:00
Chris Lattner
266c7bbbbc Add a new "available_externally" linkage type. This is intended 
to support C99 inline, GNU extern inline, etc.  Related bugzilla's
include PR3517, PR3100, & PR2933.  Nothing uses this yet, but it
appears to work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68940 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-13 05:44:34 +00:00
Rafael Espindola
b215776fa1 In X86DAGToDAGISel::MatchWrapper, if base or index are set, avoid matching 
only if symbolic addresses are RIP relatives.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68924 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-12 23:00:38 +00:00
Rafael Espindola
49a168daae refactor some code into X86DAGToDAGISel::MatchWrapper 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68915 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-12 21:55:03 +00:00
Chris Lattner
8d57b778b5 fix a cross-block fastisel crash handling overflow intrinsics. 
See comment for details.  This fixes rdar://6772169


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68890 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-12 07:51:14 +00:00
Chris Lattner
a9a42259ed simplify code by using IntrinsicInst. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68887 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-12 07:36:01 +00:00
Chris Lattner
0461c0a8f5 Add new TargetInstrDesc::hasImplicitUseOfPhysReg and 
hasImplicitDefOfPhysReg methods.  Use them to remove a 
look in X86 fast isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68886 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-12 07:26:51 +00:00
Dan Gohman
c6fa3ff0bd Revert r68847. It breaks the build on non-Darwin targets, with this message 
from the assembler:

Error: unknown pseudo-op: `.debug_inlined'


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68863 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-11 15:57:04 +00:00
Devang Patel
2057532679 Keep track of inlined functions and their locations. This information is collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.) 
Create debug_inlined dwarf section using these information. This info is used by gdb, at least on Darwin, to enable better experience debugging inlined functions. See DwarfWriter.cpp for more information on structure of debug_inlined section.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68847 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-11 00:16:47 +00:00
Sanjiv Gupta
a3613be963 Added code to handle spilling and reloading of FSRs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68783 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-10 15:10:14 +00:00
Rafael Espindola
dbcfb3080a Don't fold a load if the other operand is a TLS address. 
With this we generate

movl    %gs:0, %eax
leal    i@NTPOFF(%eax), %eax

instead of

movl    $i@NTPOFF, %eax
addl    %gs:0, %eax



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68778 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-10 10:09:34 +00:00
Chris Lattner
c2406f2341 a few fixes to "addrspace(256) is reference offset of GS segment register". 
It turns out that there are still several problems with this, will file a bugzilla.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68749 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-10 00:16:23 +00:00
Bill Wendling
7d16e85bfc Pass in the std::string parameter instead of returning it by value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68747 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-10 00:12:49 +00:00
Dan Gohman
fc1665793e Remove the obsolete SelectionDAG::getNodeValueTypes and simplify 
code that uses it by using SelectionDAG::getVTList instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68744 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-09 23:54:40 +00:00
Owen Anderson
3ca15c989c Give register alias checking the hash table treatment too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68730 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-09 22:19:30 +00:00
Bob Wilson
d9df501704 Fix pr3954. The register scavenger asserts for inline assembly with 
register destinations that are tied to source operands.  The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly.  The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68714 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-09 17:16:43 +00:00
Sanjiv Gupta
37831d0a12 The way we are trying to figure out banksel immediate operand may yield different results for different type of insns. This will eventually need to be changed but currently let us prevent the crash in cases of incorrect detection of banksel operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68713 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-09 17:06:24 +00:00
Sanjiv Gupta
e206b1d142 Arguments to indirect calls were being passed incorrectly. They are not fixed to start after return value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68705 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-09 10:29:32 +00:00
Chris Lattner
a1cd83a258 Fix code size computation on x86-64, patch by Zoltan Varga! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68690 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-09 06:10:51 +00:00
Sanjiv Gupta
6e2a46a0b4 r68576 unconverd a bug in PIC16 port (Thanks to Dan Gohman) where we were custom lowering an ADD to ADDC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68671 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-09 04:03:43 +00:00
Owen Anderson
7d770be047 Convert TargetRegisterInfo's super-register checking to use a pre-computed hash table just like subregister checking does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68669 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-09 03:50:16 +00:00
Dan Gohman
349ba4951f Fix grammaros in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68666 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-09 02:06:09 +00:00
Rafael Espindola
094fad37b9 Re-apply 68552. 
Tested by bootstrapping llvm-gcc and using that to build llvm.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68645 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-08 21:14:34 +00:00
Bob Wilson
2c7dab1864 Fix PR3795: Apply Dan's suggested fix for 
ARMTargetLowering::isLegalAddressingMode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68619 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-08 17:55:28 +00:00
Rafael Espindola
8ef2b89131 Avoid a hard coded constant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68603 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-08 08:09:33 +00:00
Sanjiv Gupta
c1fa70c35a Emit .line debug directives for stoppoints. The debug location is retrieved by the MachineInstr itself, rather than by custom handling the DBG_STOPPOINT nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68602 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-08 06:24:04 +00:00
Sanjiv Gupta
7836fc129a Handle indirect function calls. 
Every function has the address of its frame in the beginning of code section.
The frame address is retrieved and used to pass arguments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68597 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-08 05:38:48 +00:00
Dan Gohman
97121ba2af Implement support for using modeling implicit-zero-extension on x86-64 
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.

This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.

Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.

Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.

Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.

Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-08 00:15:30 +00:00
Bill Wendling
044b5344c4 Temporarily revert r68552. This was causing a failure in the self-hosting LLVM 
builds.

--- Reverse-merging (from foreign repository) r68552 into '.':
U    test/CodeGen/X86/tls8.ll
U    test/CodeGen/X86/tls10.ll
U    test/CodeGen/X86/tls2.ll
U    test/CodeGen/X86/tls6.ll
U    lib/Target/X86/X86Instr64bit.td
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86InstrInfo.td
U    lib/Target/X86/X86RegisterInfo.cpp
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86CodeEmitter.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86InstrInfo.h
U    lib/Target/X86/X86ISelDAGToDAG.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86ISelLowering.h
U    lib/Target/X86/X86InstrInfo.cpp
U    lib/Target/X86/X86InstrBuilder.h
U    lib/Target/X86/X86RegisterInfo.td



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68560 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-07 22:35:25 +00:00
Rafael Espindola
2a6411bbbd Reduce code duplication on the TLS implementation. 
This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.

Will work on it and on X86-64 support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68552 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-07 21:37:46 +00:00
Jim Grosbach
30eae3c022 PR2985 / <rdar://problem/6584986> 
When compiling in Thumb mode, only the low (R0-R7) registers are available
for most instructions. Breaking the low registers into a new register class
handles this. Uses of R12, SP, etc, are handled explicitly where needed
with copies inserted to move results into low registers where the rest of
the code generator can deal with them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68545 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-07 20:34:09 +00:00
Bob Wilson
8f3434647d Handle 'a' modifier in ARM inline assembly. 
Patch by Richard Pennington.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68464 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-06 21:46:51 +00:00
Sanjiv Gupta
cae1b628a7 Map stack based frameindices for spills to zero based indices that can be accessed based on an external symbol defining the location of temporary data for a function. For example: we have spill slots addressed as foo.tmp + 0, foo.tmp + 1 etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68442 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-06 10:54:50 +00:00
Bob Wilson
eec4b2d730 Wrap some lines to fix indentation problems. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68405 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-03 21:08:42 +00:00
Bob Wilson
1b46a68015 Fix some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68404 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-03 20:53:25 +00:00
Oscar Fuentes
fcf054bbd4 CMake: removed IA64AsmPrinter.cpp from lib/Target/IA64/CMakeLists.txt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68384 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-03 12:11:43 +00:00
Anton Korobeynikov
6c5cfec73e Separate MIPS asmprinter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68383 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-03 10:41:41 +00:00
Anton Korobeynikov
60a19a4edd Fix target library name 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-03 10:41:17 +00:00
Anton Korobeynikov
c67d1127d0 Fix comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68381 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-03 10:41:00 +00:00
Anton Korobeynikov
ea38970596 Move IA64 asmprinter to separate library 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68380 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-03 10:38:51 +00:00
Mon P Wang
1e95580925 Added a x86 dag combine to increase the chances to use a 
movq for v2i64 on x86-32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68368 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-03 02:43:30 +00:00
Sanjiv Gupta
c2eb87afc1 Fixed build warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68333 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-02 18:33:12 +00:00
Sanjiv Gupta
5274a4afb7 To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68329 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-02 18:03:10 +00:00
Sanjiv Gupta
b84d5a476a Params are not being generated as static globals now. The caller passes them onto the callee's stack directly and the callee loads the argvals from its own stack. Clang generated frameindexes validatd by recalculating the stack as if all frameindexes represent 1-byte slots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68327 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-02 17:42:00 +00:00
Chris Lattner
5867de1243 silence warning in release-asserts build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68253 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-01 22:14:45 +00:00
Dan Gohman
de551f91d8 Use CHAR_BIT instead of hard-coding 8 in several places where it 
is appropriate. This helps visually differentiate host-oriented
calculations from target-oriented calculations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68227 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-01 18:45:54 +00:00
Dan Gohman
77c5b0d7dc Use LLVM type names instead of C type names in comments, to be 
less ambiguous and less C-specific.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68219 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-01 18:10:16 +00:00
Bob Wilson
bf6396bed0 Fix PR3862: Recognize some ARM-specific constraints for immediates in inline 
assembly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68218 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-01 17:58:54 +00:00
Evan Cheng
d54f2d571d i128 shift libcalls are not available on x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68133 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-31 19:38:51 +00:00