Daniel Dunbar
5fe6338ac8
llvm-mc/AsmParser: Implement user defined super classes.
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- We can now discriminate SUB32ri8 from SUB32ri, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78530 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 07:20:21 +00:00
Daniel Dunbar
98164afb01
Extend comment on ParserMatchClass .td field, and add some missing
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classes for X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78524 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 06:00:04 +00:00
Daniel Dunbar
6745d42e8e
llvm-mc/AsmParser: Define match classes in the .td file.
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-2 FIXMEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78523 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 05:18:30 +00:00
Chris Lattner
93b6db3de9
sink the 'name' and 'isdirective' state out of MCSection into its derived classes.
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This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78517 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 23:39:42 +00:00
Anton Korobeynikov
8e9ece75db
Use subclassing to print lane-like immediates (w/o hash) eliminating
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'no_hash' modifier. Hopefully this will make Daniel happy :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78514 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 23:10:41 +00:00
Chris Lattner
ba44633a3b
add a note about dead zero extends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78511 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 22:46:59 +00:00
Chris Lattner
892e182393
1. Make MCSection an abstract class.
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2. Move section switch printing to MCSection virtual method which takes a
TAI. This eliminates textual formatting stuff from TLOF.
3. Eliminate SwitchToSectionDirective, getSectionFlagsAsString, and
TLOFELF::AtIsCommentChar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 22:41:53 +00:00
Eric Christopher
b4dc13cab7
Add crc32 instruction and intrinsics. Add a new class of prefix
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bytes for F2 0F 38 and propagate. Add a FIXME for a set
of possibilities which correspond to intrinsics already used.
New test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:55:08 +00:00
Jakob Stoklund Olesen
46151de6a0
Add support for READCYCLECOUNTER in Blackfin back-end.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:42:22 +00:00
Chris Lattner
f7427e558d
add new PIC16Section class, this time hopefully not breaking the build :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:37:01 +00:00
Daniel Dunbar
245f05843f
llvm-mc/AsmMatcher: Switch token matching to use the new string matcher.
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Also, redefined MatchRegisterName to just return the register value or a
sentinel, to simplify the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78504 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:22:41 +00:00
Daniel Dunbar
fb373909be
Revert r78501, it doesn't build.
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--- Reverse-merging r78501 into '.':
U lib/Target/PIC16/PIC16TargetObjectFile.cpp
D lib/Target/PIC16/PIC16Section.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78503 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:12:40 +00:00
Chris Lattner
50e38121d1
make PIC16 create its own custom MCSection.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78501 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:55:25 +00:00
Chris Lattner
7c599d056a
make target-specific TLOF impls (except PIC16) create target-specific
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MCSection instances.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:52:13 +00:00
Chris Lattner
5277b22687
eliminate TargetLoweringObjectFileSparc in favor of a TAI hook.
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A TAI hook is appropriate in this case because this is just an
asm syntax issue, not a semantic difference. TLOF should model
the semantics of the section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78498 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:43:12 +00:00
Chris Lattner
9aee18186c
give pic16 a target-specific section creation name too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:23:47 +00:00
Chris Lattner
0c0cb71233
now that getOrCreateSection is all object-file specific,
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give the impls an object-file-specific name. In the future
they can take different arguments etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:22:20 +00:00
Chris Lattner
fbf1d271e6
sink getOrCreateSection down into all the object file implementations,
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now that they create *all* the sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:14:13 +00:00
Bruno Cardoso Lopes
71435a3975
Use reloc_absolute_word_sext relocation for X86::MOV64(ri/mi)32 instructions,
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since they are in 64 bit mode with i64immSExt32 imms. JIT is not affected since
it handles both word absolute relocations in the same way
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78479 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 17:47:41 +00:00
Daniel Dunbar
cf1e764a1c
Update CMake
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78475 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 17:03:13 +00:00
Anton Korobeynikov
06af2ba809
Add insert_elt / extract_elt patterns for v4f32 stuff.
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Did anyone tests v4f32 ever?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 14:06:07 +00:00
Anton Korobeynikov
3405201bce
Lane number should be printed w/o hash
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78469 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 14:05:53 +00:00
Anton Korobeynikov
baf31088f1
Use VLDM / VSTM to spill/reload 128-bit Neon registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 13:35:48 +00:00
Andrew Lenharth
20c08e534f
move this fp select into a pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 12:49:07 +00:00
Daniel Dunbar
a3741fa28b
llvm-mc/AsmMatcher: Improve match code.
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- This doesn't actually improve the algorithm (its still linear), but the
generated (match) code is now fairly compact and table driven. Still need a
generic string matcher.
- The table still needs to be compressed, this is quite simple to do and should
shrink it to under 16k.
- This also simplifies and restructures the code to make the match classes more
explicit, in anticipation of resolving ambiguities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78461 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 07:50:56 +00:00
Bob Wilson
b6ab51e829
Implement Neon VZIP and VUZP instructions. These are very similar to VTRN,
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so I generalized the class for VTRN in the .td file to handle all 3 of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78460 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 06:13:25 +00:00
Bob Wilson
64efd90f8c
Implement Neon VTRN instructions. For now, anyway, these are selected
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directly from the intrinsics produced by the frontend. If it is more
convenient to have a custom DAG node for using these to implement shuffles,
we can add that later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78459 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 05:53:00 +00:00
Evan Cheng
3eff16e27a
Add a skeleton Thumb2 instruction size reduction pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78456 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:21:23 +00:00
Evan Cheng
8fb903604e
Code refactoring. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78455 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:20:32 +00:00
Evan Cheng
57834cdee5
tADDhirr should target GPR, not tGPR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78454 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:19:44 +00:00
Evan Cheng
34f8a029e3
I can type.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78453 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 02:54:37 +00:00
Chris Lattner
41aefdcdd1
make printInstruction return void since its result is omitted. Make the
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error condition get trapped with an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78449 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 01:32:19 +00:00
Chris Lattner
2698cb6811
don't check the result of printInstruction anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78444 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 00:05:42 +00:00
Anton Korobeynikov
941222eea0
Do not generate 32-bit call on win64 when imm does not fit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78443 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 23:59:21 +00:00
David Goodwin
767a952a6f
Make NEON single-precision FP support the default for cortex-a8 (again).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78430 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 23:32:33 +00:00
Chris Lattner
db0a9706e7
remove a bunch of now-dead crud from the asmprinter and TAI interfaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 23:16:27 +00:00
Anton Korobeynikov
a55fd4a23f
Unbreak the stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:51:13 +00:00
Andrew Lenharth
7116b7bb0c
avoid this libcall with long inline expansion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78420 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:37:20 +00:00
Anton Korobeynikov
32a1b25781
2 more vdup.32 cases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:36:50 +00:00
Evan Cheng
fcc716352b
A big oops. Thumb1 default CC is a def of CPSR, not a use of CPSR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78418 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:36:37 +00:00
Bill Wendling
1232167ce3
Reformatting of lines. Put multiple DEBUG statements under one DEBUG statement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78411 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 21:33:25 +00:00
Evan Cheng
d77c7aba83
Thumb2 32-bit ldm / stm needs .w suffix if submode is ia.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78410 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 21:19:10 +00:00
Daniel Dunbar
2724915c17
llvm-mc/AsmMatcher: Tweaks in response to feedback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 20:33:39 +00:00
Evan Cheng
f12288e8aa
This is done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78399 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 19:34:52 +00:00
Evan Cheng
e118cb6146
Use 16-bit tMOVgpr2gpr instead of tMOVr to copy GPR registers in Thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78398 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 19:34:35 +00:00
Evan Cheng
1d2426c470
Fix support to use NEON for single precision fp math.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78397 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 19:30:41 +00:00
Sanjiv Gupta
394a1a21a1
Minor fixes to avoid using invalid debugloc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 11:00:02 +00:00
Benjamin Kramer
b8d222def1
Simplify code and avoid allocations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 10:42:28 +00:00
Daniel Dunbar
6812cd18aa
Improve disabling of X86 AsmMatcher.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 09:06:38 +00:00
Daniel Dunbar
7ddca30f31
Disable X86 AsmMatcher for now, it is causing gcc-4.0 to run out of memory on
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i386-apple-darwin9. This presumably will get fixed once the generated code
improves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 08:45:03 +00:00
Daniel Dunbar
20927f26fc
llvm-mc/AsmMatcher: Move to a slightly more sane matching design.
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- Still not very sane, but a least its not 60k lines on X86. :)
- In terms of correctness, currently some things are hard wired for X86, and we
still don't properly resolve ambiguities (this is ignoring the instructions
we don't even match due to funny .td stuff or other corner cases).
The high level changes:
1. Represent tokens which are significant for matching explicitly as separate
operands. This uniformly handles not only the instruction mnemonic, but
also 'signficiant' syntax like the '*' in "call * ...".
2. Separate the matching of operands to an instruction from the construction of
the MCInst. In theory this can be done during matching, but since the number
of variations is small I think it makes sense to decompose the problems.
3. Improved a few of the mechanisms to at least successfully flatten / tokenize
the assembly strings for PowerPC and ARM.
4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
moving towards for handling ambiguous instructions. The high-bit is to infer
a partial ordering of the operand classes (and force the user to specify one
if we can't) and use that to resolve ambiguities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 08:26:05 +00:00
Evan Cheng
b6879b2b84
Error out, rather than infinite looping, if constant island pass can't converge.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78377 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 07:35:21 +00:00
Evan Cheng
53c67c0218
tBfar is bl, which clobbers LR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78370 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 05:45:07 +00:00
Sanjiv Gupta
85019e15eb
Run memsel inserter just before emit assembly to avoid tinkering by other passes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78369 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 05:44:27 +00:00
Andrew Lenharth
a3c6073fd3
These should be expanded
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78365 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 02:17:44 +00:00
Dan Gohman
7db949df78
Fix a bunch of namespace pollution.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 01:32:21 +00:00
Evan Cheng
861986401e
It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing.
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This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time.
This fixes PR4659 and PR4682.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78361 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 00:34:42 +00:00
Nicolas Geoffray
6f62cffd63
Output the new StructType constructor, which takes the context of the
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module as first argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78340 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 21:31:35 +00:00
Devang Patel
2251666d44
Use DebugInfoFinder
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78334 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 20:53:24 +00:00
Bob Wilson
b36ec86c01
Implement Neon VST[234] operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78330 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 18:47:44 +00:00
David Goodwin
8b7d7ade85
Add parameter to pattern classes to enable an itinerary to be specified for instructions. For now just use the existing itineraries or NoItinerary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 16:52:47 +00:00
Chris Lattner
24f654c8a4
Fix several fixmes and clean up code by sinking *all* section
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creation activity into the target-specific subclasses of TLOF.
Before this, globals with explicit sections could be created by
the base class.
1. make getOrCreateSection protected, add a new getExplicitSectionGlobal
pure virtual method to assign sections to globals with a specified
section.
2. eliminate getSpecialCasedSectionGlobals, which is now PIC specific.
3. eliminate the getKindForNamedSection virtual method, which is
now just a static method for ELF.
4. Add implementions of getExplicitSectionGlobal for ELF/PECOFF/Darwin/PIC16.
They are now all detangled and understandable, woo! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78319 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 16:39:58 +00:00
Chris Lattner
759b88898d
go through PIC16TargetObjectFile to make sections instead of
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creating them directly in the pic16 asmprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78317 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 16:27:28 +00:00
Anton Korobeynikov
d7697d0167
We need to sext global addresses in kernel code model, not zext
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78299 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 11:23:24 +00:00
Dan Gohman
aae317ac32
Fix a bug in x86's PreprocessForRMW logic that was exposed
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by aggressive chain operand optimization. UpdateNodeOperands
does not modify the node in place if it would result in
a node identical to an existing node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78297 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 09:22:57 +00:00
Anton Korobeynikov
186fa1d0df
Missed part of recent kernel codemodel tweaks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 09:11:19 +00:00
Bob Wilson
0cedab9a0d
Neon does not actually have VLD{234}.64 instructions.
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These operations will have to be synthesized from other instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78263 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 00:24:27 +00:00
Bob Wilson
70cd88fb7b
Add a new pre-allocation pass to assign adjacent registers for Neon instructions
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that have that constraint. This is currently just assigning a fixed set of
registers, and it only handles VLDn for n=2,3,4 with DPR registers.
I'm going to expand it to handle more operations next; we can make it smarter
once everything is working correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78256 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 23:12:45 +00:00
Anton Korobeynikov
b5e0172405
Better handle kernel code model. Also, generalize the things and fix one
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subtle bug with small code model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78255 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 23:01:26 +00:00
Dan Gohman
59e34921a5
Use GR32 for copies between GR32_NOSP and GR32_NOREX, as neither
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is a subset of the other, but both are subsets of GR32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78250 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 22:18:26 +00:00
David Goodwin
7bfdca0206
When using NEON for single-precision FP, the NEON result must be placed in D0-D15 as these are the only D registers with S subregs. Introduce a new regclass to represent D0-D15 and use it in the NEON single-precision FP patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78244 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 21:02:22 +00:00
Chris Lattner
cafbdc5c09
remove the 'DataSectionStartSuffix' and 'TextSectionStartSuffix' knobs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78242 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 20:49:52 +00:00
Anton Korobeynikov
058c251d4a
Remove redundand checks: the only way to have, e.g. f32 RegVT is exactly
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hardfloat case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78237 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 20:15:19 +00:00
Dan Gohman
be0cf7dbc2
hasSuperClass tests for a strict superset relation, rather than
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a superset relation. This code wants to test the regular superset
relation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78236 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 20:13:45 +00:00
Anton Korobeynikov
14d9495403
Unbreak the stuff, this is ugly, but we cannot do better for now with 'plain' C calling conv.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78232 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 19:40:16 +00:00
Anton Korobeynikov
567d14f07c
Missed pieces for ARM HardFP ABI.
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Patch by Sandeep Patel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78225 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 19:04:42 +00:00
Andrew Lenharth
7f285c8024
Use elf Object File directly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78220 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 18:13:04 +00:00
Daniel Dunbar
e22f4da01d
Remove some dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78219 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 18:12:37 +00:00
Dan Gohman
74f6f9a931
Enable the new no-SP register classes by default. This is to address
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PR4572. A few tests have some minor code regressions due to different
coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78217 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 17:40:24 +00:00
Bob Wilson
7f0f2515a0
Remove a redundant declaration.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78216 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 17:39:44 +00:00
Anton Korobeynikov
9e155d61da
Convert bswap test to filecheck, add more test entries & convert stuff to filecheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:50:53 +00:00
Dan Gohman
22f7d57dde
Fix a bug in the PIC16 backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:46:43 +00:00
David Goodwin
ce3c1f2a0e
Disable NEON single-precision FP support for Cortex-A8, for now...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78209 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:40:57 +00:00
Devang Patel
bccdcb1857
Remove dead code. MDNode and MDString are not Constant anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78207 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:40:02 +00:00
Anton Korobeynikov
93e21f7b6f
Add memory versions of some instructions.
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Patch by Neale Ferguson!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78203 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:16:11 +00:00
David Goodwin
1f0e404c87
By default, for cortex-a8 use NEON for single-precision FP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:01:19 +00:00
Anton Korobeynikov
1e0039d6cf
Special constants as destinations does not work as expected - drop the patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78191 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 14:42:00 +00:00
Andrew Lenharth
1ad11a896c
Alpha: Get section directives right
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78189 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 13:59:57 +00:00
Anton Korobeynikov
0802a1e1e8
Cleanup in dbg_stoppoint handling in CBE. Patch by Sandeep Patel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78182 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 09:31:40 +00:00
Anton Korobeynikov
e392c8336f
Minor arm CBE fixes. Patch by Sandeep.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78181 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 09:31:07 +00:00
Anton Korobeynikov
e641b527e8
Emit module-level inline asm for CBE.
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Patch by Sandeep Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78180 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 09:29:56 +00:00
Bruno Cardoso Lopes
52d0851446
- Remove custom handling of jumptables by the elf writter (this was
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a dirty hack and isn't need anymore since the last x86 code emitter patch)
- Add a target-dependent modifier to addend calculation
- Use R_X86_64_32S relocation for X86::reloc_absolute_word_sext
- Use getELFSectionFlags whenever possible
- fix getTextSection to use TLOF and emit the right text section
- Handle global emission for static ctors, dtors and Type::PointerTyID
- Some minor fixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 06:57:03 +00:00
Evan Cheng
61f4b721b2
80 col violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78175 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 06:41:25 +00:00
Dan Gohman
c3c9c486e4
Teach X86FastISel how to handle CCValAssign::BCvt, which is used for
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MMX arguments. This fixes PR4684.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78163 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 05:33:42 +00:00
Chris Lattner
26d054d903
Clarify common linkage and the requirements on it. Enforce
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them in the verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78160 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 05:21:07 +00:00
Chris Lattner
58bed8fc29
expose SectionKindForGlobal to curious clients, named as
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getKindForGlobal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78156 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 04:25:40 +00:00
Bob Wilson
aa289d5e7f
Oops. I didn't mean to commit this piece yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78146 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 02:47:13 +00:00
Dan Gohman
98ca4f2a32
Major calling convention code refactoring.
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Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:29:28 +00:00
Dan Gohman
5b0d72e850
Remove an unnecessary flush in the CppBackend's output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78138 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:06:38 +00:00
Dan Gohman
1c55fab534
Don't flush the raw_ostream between each MachineFunction. These flush
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calls were originally put in place because errs() at one time was
not unbuffered, and these print routines are commonly used with errs()
for debugging. However, errs() is now properly unbuffered, so the
flush calls are no longer needed. This significantly reduces the
number of write(2) calls for regular asm printing when there are many
small functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78137 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 00:49:25 +00:00
Bob Wilson
4a3d35abef
Change DAG nodes for Neon VLD2/3/4 operations to return multiple results.
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Get rid of yesterday's code to fix the register usage during isel.
Select the new DAG nodes to machine instructions. The new pre-alloc pass
to choose adjacent registers for these results is not done, so the
results of this will generally not assemble yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78136 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 00:49:09 +00:00
Bruno Cardoso Lopes
e55fef36a9
1) Proper emit displacements for x86, using absolute relocations where necessary
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for ELF to work.
2) RIP addressing: Use SIB bytes for absolute relocations where RegBase=0,
IndexReg=0.
3) The JIT can get the real address of cstpools and jmptables during
code emission, fix that for object code emission
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78129 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 00:11:21 +00:00
Evan Cheng
35d6c41fde
Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78126 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 23:47:55 +00:00
Bob Wilson
c00479253b
Replace dregsingle operand modifier with explicit escaped curly brackets.
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For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78109 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:39:33 +00:00
Mike Stump
4dcff6db72
Restlyize to match other targets, fixes cmake build to boot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78105 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:27:06 +00:00
Evan Cheng
9e7a312391
Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78104 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:12:13 +00:00
Chris Lattner
275bb1bd12
remove a random reference to subtarget. Even without this, we
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still get "intel syntax" instructions from llc with
-x86-asm-syntax=intel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78103 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:12:08 +00:00
David Goodwin
53e4471adc
Add NEON single-precision FP support for fabs and fneg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:39:05 +00:00
Chris Lattner
f9c1ccf280
rip out SectionEndDirectiveSuffix support, only uses by
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the masm backend. If anyone cares about masm in the future,
we'll have semantic sections it can hang off of.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78096 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:09:41 +00:00
Jakob Stoklund Olesen
71d342e854
Most flags are reserved registers on Blackfin.
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The only exception is CC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78089 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 19:16:55 +00:00
Evan Cheng
3425df44b5
In thumb mode, r7 is used as frame register. This fixes pr4681.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:46:17 +00:00
David Goodwin
b84f3d427c
Match common pattern for FNMAC. Add NEON SP support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:44:29 +00:00
Sanjiv Gupta
ada097a853
Legalize i64 store operations generated by inst-combine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78082 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 17:59:16 +00:00
David Goodwin
42a83f2d15
Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 17:53:06 +00:00
Daniel Dunbar
7145e9be64
Avoid compiler warning (in -Asserts mode)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78070 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:46:12 +00:00
Chris Lattner
ec409759e9
enhance codegen to put 16-bit character strings into the
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__TEXT,__ustring section on darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78068 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:27:13 +00:00
Chris Lattner
7e88a50428
fix a fixme: don't create an explicit "CStringSection" for ELF,
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it is just being used as a prefix, so forward substitute it directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:19:50 +00:00
Chris Lattner
1850e5add1
Add support emiting for 2/4 byte mergable strings to the ".rodata.str*"
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section on ELF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78066 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:13:09 +00:00
Anton Korobeynikov
939ba32747
Ooops, I was too fast to commit the wrong fix :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78060 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 11:18:31 +00:00
Anton Korobeynikov
20e037a8c5
Fix a typo - this unbreaks llvm-gcc build on arm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 11:12:51 +00:00
Evan Cheng
eb084d1671
Thumb2 does not have ib (increment before) and da (decrement after) forms of ldm / stm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 08:34:18 +00:00
Chris Lattner
3b24c01720
make MergeableCString be a SectionKind "abstract class", and
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add new concrete versions for 1/2/4-byte mergable strings.
These are not actually created yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78055 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 05:35:56 +00:00
Daniel Dunbar
4b3d57228c
No really, it's unused.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78047 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 04:08:40 +00:00
Daniel Dunbar
214e22396f
Remove now unused Module argument to createTargetMachine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 04:02:45 +00:00
Evan Cheng
f0409ea488
Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78032 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:56:09 +00:00
Evan Cheng
27934da97b
Load / store multiple pass fixes for Thumb2. Not enabled yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78031 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:43:45 +00:00
Evan Cheng
fa2ea1a8cf
Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78030 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:41:15 +00:00
Bob Wilson
a599bff101
Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate the
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results to fixed registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 00:36:16 +00:00
Bob Wilson
916afdbc2d
Minor cleanup. No functional changes intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 00:25:01 +00:00
Ted Kremenek
f6e75c3435
Update CMake files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 23:44:01 +00:00
Chris Lattner
7b59e2493d
remove an unneeded section switch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78014 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 23:02:45 +00:00
Chris Lattner
2dfddee396
switch ppc to using SwitchToSection instead of textual section stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78013 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:52:21 +00:00
Chris Lattner
5e44e472d6
use TLOF to compute the section for a function instead of
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replicating the logic manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:32:50 +00:00
Chris Lattner
f61159b574
convert macho stub emission to use SwitchToSection instead of
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textual sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78007 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:18:15 +00:00
Chris Lattner
865aaf00ad
hoist some common code out of a switch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:16:57 +00:00
Chris Lattner
c8bfb7a49d
this really shouldn't switch sections without telling the asmprinter, but
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hey it uses .previous, so it should work :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78004 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 21:57:00 +00:00
Chris Lattner
11e9657eeb
Eliminate textual section switching from the x86 backend, one
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more step towards "semantics sections"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78002 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 21:53:27 +00:00
Bob Wilson
a6d658620f
Lower CONCAT_VECTOR during legalization instead of matching it during isel.
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Add a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 20:36:38 +00:00
Jakob Stoklund Olesen
ea1c9b7bac
Minor stylistic cleanups in the Blackfin target.
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Thanks Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77987 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 19:32:30 +00:00
Chris Lattner
9a7a4d2a60
remove a dead switch directive, replace it with some
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code that I will be using shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77983 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 19:10:44 +00:00
Evan Cheng
d2aee8ce89
Remove neverHasSideEffects on MMX_MOVD64rrv164 since it has a matching pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 18:07:19 +00:00
Chris Lattner
1763766a57
eliminate textual section switching from intel asm printer.
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This will cause it to enter the ".text" section instead of "_text"
but masm is already broken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77977 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 18:06:07 +00:00
Daniel Dunbar
d1a919e139
Change C, CBE, MSIL to not provide target data via getTargetData().
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- The theory is these should never actually be called, since these boil down to
passes which can access the target data via the standard mechanism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77975 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 17:40:25 +00:00
Benjamin Kramer
d5fe92efbc
llvm_report_error already prints "LLVM ERROR:". So stop reporting errors like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77971 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 13:33:33 +00:00
Anton Korobeynikov
0144280cfb
Unbreak win64 compilation callback.
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Since we're generating stubs by hands we don't follow the ABI and don't
create a register spill area.
Don't use this area in compilation callback!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:43:36 +00:00
Anton Korobeynikov
dd93f5eb71
Create proper frame index for FP
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77966 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:14:30 +00:00
Anton Korobeynikov
6dde14bc25
Perform bitconvert to proper type
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:14:14 +00:00
Anton Korobeynikov
4ab15535e7
Add 'Indirect' LocInfo class and use to pass __m128 on win64. Also minore fixes here and there (mostly __m64).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:13:56 +00:00
Anton Korobeynikov
80cb8aa862
Cleanup Darwin MMX calling conv stuff - make the stuff more generic. This also fixes a subtle bug, when 6th v1i64 argument passed wrongly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77963 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:13:24 +00:00
Anton Korobeynikov
cf6b739d3d
Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:12:53 +00:00
Rafael Espindola
8d632c1e98
Use movd instead of movq
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77956 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 05:21:05 +00:00
Daniel Dunbar
4bd03abe59
Remove now unused arguments from TargetRegistry::lookupTarget.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77950 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 04:20:57 +00:00
Evan Cheng
9072c8198d
These are done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77949 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 04:08:36 +00:00
Daniel Dunbar
3c2d4bf97f
Pass target triple string in to TargetMachine constructor.
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This is not just a matter of passing in the target triple from the module;
currently backends are making decisions based on the build and host
architecture. The goal is to migrate to making these decisions based off of the
triple (in conjunction with the feature string). Thus most clients pass in the
target triple, or the host triple if that is empty.
This has one important change in the way behavior of the JIT and llc.
For the JIT, it was previously selecting the Target based on the host
(naturally), but it was setting the target machine features based on the triple
from the module. Now it is setting the target machine features based on the
triple of the host.
For LLC, -march was previously only used to select the target, the target
machine features were initialized from the module's triple (which may have been
empty). Now the target triple is taken from the module, or the host's triple is
used if that is empty. Then the triple is adjusted to match -march.
The take away is that -march for llc is now used in conjunction with the host
triple to initialize the subtarget. If users want more deterministic behavior
from llc, they should use -mtriple, or set the triple in the input module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 04:03:51 +00:00
Rafael Espindola
0c794b8725
Fix the instruction encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77944 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 03:27:05 +00:00
Rafael Espindola
cc2b67af91
Remove a bitcast that was a no-op.
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Thanks to Eli Friedman for noticing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77942 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 03:00:05 +00:00
Rafael Espindola
def390a30a
Use movq to move 64 bits in and out of mmx registers.
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Fixes PR4669
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 02:45:34 +00:00
Evan Cheng
a8e8984ee4
Use the i12 variant of load / store opcodes if offset is zero. Now we pass all of multisource as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77939 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 02:38:06 +00:00
Eli Friedman
e2c7408199
Remove -disable-mips-abicall and -enable-mips-absolute-call command-line
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options, which don't appear to be useful. -enable-mips-absolute-call is
completely unused (and unless I'm mistaken, is supposed to have the
same effect that -relocation-model=dynamic-no-pic should have),
and -disable-mips-abicall appears to be effectively a
synonym for -relocation-model=static. Adjust the few users of hasABICall
to checks which seem more appropriate. Update MipsSubtarget,
MipsTargetMachine, and MipselTargetMachine to synchronize with recent
changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77938 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 02:22:28 +00:00
Bill Wendling
0ea8bf3590
- s/DOUT/DEBUG(errs()/g
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- Tidy up some headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77929 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 00:11:34 +00:00
Daniel Dunbar
e28039cfd1
Move most targets TargetMachine constructor to only taking a target triple.
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- The C, C++, MSIL, and Mips backends still need the module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77927 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 23:37:13 +00:00
Richard Osborne
d558ea5e0a
Add extra SEXT pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77920 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 22:45:24 +00:00
Bill Wendling
3bb9b9a1ab
The x86 jit doesn't generate a def_cfa_offset unwind instruction after the
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pushes in the function prolog if the function doesn't have any stack space,
i.e. for a prolog like:
0x40011870: push %r15
0x40011872: push %r14
0x40011874: push %rbx
Patch by Zoltan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 22:25:37 +00:00
Daniel Dunbar
3be03406c9
Normalize Subtarget constructors to take a target triple string instead of
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Module*.
Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 22:11:08 +00:00
Jakob Stoklund Olesen
1391cc19d0
Remove unneeded intrinsics from Blackfin backend.
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__builtin_bfin_ones does the same as ctpop, so it can be implemented in the front-end.
__builtin_bfin_loadbytes loads from an unaligned pointer with the disalignexcpt instruction. It does the same as loading from a pointer with the low bits masked. It is better if the front-end creates a masked load. We can always instruction select the masked to disalignexcpt+load.
We keep csync/ssync/idle. These intrinsics represent instructions that need workarounds for some silicon revisions. We may even want to convert inline assembler to intrinsics to enable the workarounds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 21:49:05 +00:00
Jakob Stoklund Olesen
6b30f5c867
Add some basic blackfin intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77903 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 18:28:11 +00:00
Jakob Stoklund Olesen
26a84d4f3c
Add support for CPU features (i.e., bugs) and workarounds.
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This is just the framework to identify the needed workarounds. They are not actually implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77902 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 18:27:36 +00:00
Jakob Stoklund Olesen
63cc527fbc
Inline assembly support for Blackfin.
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We use the same constraints as GCC, including those that are slightly insane for inline assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77899 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 17:39:17 +00:00
Jakob Stoklund Olesen
d950941e13
Analog Devices Blackfin back-end.
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Generate code for the Blackfin family of DSPs from Analog Devices:
http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html
We aim to be compatible with the exsisting GNU toolchain found at:
http://blackfin.uclinux.org/gf/project/toolchain
The back-end is experimental.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 17:32:10 +00:00
Dan Gohman
7267734c39
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77895 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 16:10:52 +00:00
Dan Gohman
cadb226a3f
Add a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 16:10:01 +00:00
Dan Gohman
a98634ba14
Resync lea32addr and lea64addr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77893 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 16:09:17 +00:00
Chris Lattner
18a4c16726
move dwarf debug info section selection stuff from TAI to
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TLOF, unifying all the dwarf targets at the same time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 07:24:22 +00:00
Chris Lattner
35039ac241
convert EHFrameSection to be managed by TLOF instead of TAI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77888 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 06:52:36 +00:00
Chris Lattner
21e1e81aa6
I need Triple information, 10.6 shouldn't set this, it bloats
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object files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77887 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 06:51:58 +00:00
Chris Lattner
24def37c85
ARM TAI no longer needs a TM, but createTargetAsmInfo() still does.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77878 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 05:23:52 +00:00
Chris Lattner
d90183d25d
Move the getInlineAsmLength virtual method from TAI to TII, where
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the only real caller (GetFunctionSizeInBytes) uses it.
The custom ARM implementation of this is basically reimplementing
an assembler poorly for negligible gain. It should be removed
IMNSHO, but I'll leave that to ARMish folks to decide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77877 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 05:20:37 +00:00
Chris Lattner
b6bbfebdc6
move a virtual method body to its .cpp file to avoid a #include
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in a header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77874 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:58:19 +00:00
Chris Lattner
7bbd178d4b
turn some templated inline functions into static functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77873 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:52:00 +00:00
Chris Lattner
f67de7a69e
alpha TAI doesn't need TM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77872 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:46:05 +00:00
Chris Lattner
68f2b2cdd5
MSP430 TAI doesn't need TM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:45:22 +00:00
Chris Lattner
09e820b07c
simplify SPULinuxTargetAsmInfo, remove use of TM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77869 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:44:33 +00:00
Chris Lattner
71a56d75b4
xcore TAI doesn't need TM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77868 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:42:09 +00:00
Chris Lattner
3878bff390
PIC16 TAI doesn't need TM
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77867 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:41:14 +00:00
Chris Lattner
9ba8c6872d
remove the dead ELFTargetAsmInfo.h/cpp file. TargetAsmInfo
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defaults to being ELF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:33:09 +00:00
Chris Lattner
e6483e3097
eliminate the TM argument to the TAI class, remove comment about supporting
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solaris :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77865 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:32:07 +00:00
Chris Lattner
ba8e7401fb
eliminate TargetMAchine argument to sparc TAI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77864 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:30:59 +00:00
Chris Lattner
8d4a0a328a
remove TargetAsmInfo::TM, which is now dead. The basic TAI class now
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no longer depends on TM!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:27:24 +00:00
Chris Lattner
83f08a2efd
remove the x86/ppc impls of getEHGlobalPrefix, which is already dead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77861 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:13:22 +00:00
Chris Lattner
5e62147e07
clean up #includes of TargetAsmInfo.cpp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77858 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:09:22 +00:00
Chris Lattner
b6d667403f
remove the dead PreferredEHDataFormat TAI hook: its now dead
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even considering #if 0 code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77856 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 04:02:52 +00:00
Chris Lattner
d5bbb07ec8
move getDwarfExceptionSection from TAI to TLOF and rename it to
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getLSDASection() to be more specific. This makes it pretty obvious
that the ELF LSDA section is being specified wrong in PIC mode. We're
probably getting a lot of startup-time relocations to a readonly page,
which is expensive and bad.
Someone who cares about ELF C++ should investigate this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 01:34:32 +00:00
Daniel Dunbar
967ce7f5e1
Fix a possible crash on delete of an uninitialized variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77846 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 01:25:15 +00:00
Dan Gohman
18f54c07e1
Don't call SectionForGlobal for hasAvailableExternallyLinkage()
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variables either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77844 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 01:18:44 +00:00
Chris Lattner
6f411dfad9
don't call SectionForGlobal on declarations, you can't tell the section a
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declaration will end up in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77843 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 01:02:43 +00:00
Chris Lattner
80ec2792b2
convert ctors/dtors section to be in TLOF instead of
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TAI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 00:34:36 +00:00
Chris Lattner
73e789fd37
don't override the default of this, the only difference is \t instead of ' '.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77838 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 00:12:20 +00:00
Daniel Dunbar
cdcb388a58
Change MCOperand to use Create style instead of Make style for constructing
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operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77837 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 00:09:22 +00:00
Chris Lattner
1ef9be2883
Make SectionKind::get() private.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77835 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 00:02:44 +00:00
Chris Lattner
2798119ab4
(re)introduce new simpler apis for creation sectionkinds.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77834 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 23:57:16 +00:00
Chris Lattner
83d77faf6e
Remove "JumpTableDataSection" from TAI, instead, have AsmPrinter
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compute it based on what it knows. As part of this, rename getSectionForMergeableConstant
to getSectionForConstant because it works for non-mergable constants also.
The only functionality change from this is that Xcore will start dropping
its jump tables into readonly section instead of data section in -static mode.
This should be fine as the linker resolves the relocations. If this is a
problem, let me know and we'll come up with another solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77833 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 23:46:12 +00:00
Chris Lattner
0da3f4f742
give alpha its readonly section. This optimizes alpha, and prevents a
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testsuite regression with a coming patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77832 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 23:44:04 +00:00
Chris Lattner
528c0d26a5
.rdata == .rodata on mips.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77827 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 23:07:29 +00:00
Chris Lattner
566d1c426b
no need to override the default with the default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77826 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 23:05:25 +00:00
Chris Lattner
b80610cd13
REmove dead fields of TAI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77820 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 22:40:22 +00:00
Chris Lattner
cea01bfe7d
update for rename
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 22:06:53 +00:00
Chris Lattner
824583844a
fix a fixme by sinking various target-specific directives down into
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the appropriate subclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77815 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:56:13 +00:00
Chris Lattner
94dab1e57a
coff also doesn't have a ReadOnlySection yet, (!)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:49:24 +00:00
Chris Lattner
56fe93c5d3
coff doesn't set a .bss seciton, so this is dead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:48:25 +00:00
Chris Lattner
f9650c061e
it turns out that isWeak() was basically dead anyway. Kill off SectionInfo :-/
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77812 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:46:23 +00:00
Chris Lattner
27602b82c2
don't use isWeak anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77810 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:42:58 +00:00
Dan Gohman
a9c1dd7820
Fix typos in comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77806 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:25:00 +00:00
Chris Lattner
968ff11967
Change SectionKind to be a property that is true of a *section*, it
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should have no state that is specific to particular globals in the
section. In this case, it means the removal of the "isWeak" and
"ExplicitSection" bits. MCSection uses the new form of SectionKind.
To handle isWeak, I introduced a new SectionInfo class, which is
SectionKind + isWeak, and it is used by the part of the code generator
that does classification of a specific global.
The ExplicitSection disappears. It is moved onto MCSection as a new
"IsDirective" bit. Since the Name of a section is either a section
or directive, it makes sense to keep this bit in MCSection. Ultimately
the creator of MCSection should canonicalize (e.g.) .text to whatever
the actual section is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77803 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 21:11:14 +00:00
Dan Gohman
7e77b0fcb0
Minor code cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77795 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 19:14:37 +00:00
Nick Lewycky
1102afb8c5
Add newline at end of file to remove gcc warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77791 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 19:09:44 +00:00
Chris Lattner
4a7bc1e5aa
All MCSections are now required to have a SectionKind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 18:25:49 +00:00
Evan Cheng
25f7cfc3cc
Workaround a couple of Darwin assembler bugs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 06:13:52 +00:00
Dan Gohman
7571eb5015
Minor code simplifications.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 03:42:59 +00:00
Evan Cheng
13f8b36205
Split t2MOVCCs since some assemblers do not recognize mov shifted register alias with predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 01:43:45 +00:00
Dan Gohman
92aa4045d2
The X86 maximal stack alignment calculator preserves the CFG. Also,
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be more careful about the return value of runOnMachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77758 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 00:31:02 +00:00
Dan Gohman
df09055cdb
X86 floating-point passes don't modify the CFG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77757 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 00:26:16 +00:00
Evan Cheng
b620724e61
Fix Thumb2 function call isel. Thumb1 and Thumb2 should share the same
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instructions for calls since BL and BLX are always 32-bit long and BX is always
16-bit long.
Also, we should be using BLX to call external function stubs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77756 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01 00:16:10 +00:00
Dan Gohman
675fb65bf4
Use setPreservesAll in X86CodeEmitter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77755 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 23:44:16 +00:00
Daniel Dunbar
c09e411102
llvm-mc: A few more parsing / match tweaks.
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- Operands which are just a label should be parsed as immediates, not memory
operands (from the assembler perspective).
- Match a few more flavors of immediates.
- Distinguish match functions for memory operands which don't take a segment
register.
- We match the .s for "hello world" now!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 22:22:54 +00:00
Evan Cheng
a0ee862f2e
t2BR_JT is mov pc, it's 2 byte long, not 4.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 22:22:22 +00:00
Evan Cheng
1119776b19
Thumb2 movcc need .w suffix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 22:21:55 +00:00
Chris Lattner
7a01e95915
PreferredEHDataFormat is always call with data and global, but this whole
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thing is #if0'd out anyway. Just simplify the code by reducing the interface.
Not deleting this is essential for Bill's continuing happiness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 21:39:55 +00:00
Daniel Dunbar
022e2a84a8
llvm-mc/X86: Sketch match functions for immediates and memory operands.
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Also, change scale value to always be 1 when unspecified to machine MachineInst
encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77728 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:53:16 +00:00
Chris Lattner
26630c1180
move emitUsedDirectiveFor to TargetLoweringObjectFile and rename it to
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indicate that it is a predicate, not an emitter. This eliminates TAI
dependencies on Mangler and GlobalValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77726 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:52:39 +00:00
Chris Lattner
1db511cc91
remove the PPCLinuxTargetAsmInfo implementation of PreferredEHDataFormat,
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because it just calls the default impl.
Remove the PPCDarwinTargetAsmInfo version of PreferredEHDataFormat because
it just returns DW_EH_PE_absptr unless on 10.6. However, 10.6 doesn't support
PPC, so the default impl is just fine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:43:26 +00:00
Chris Lattner
78a0e1bd53
remove a pointless override.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:36:15 +00:00
Owen Anderson
a7235ea724
Move a few more APIs back to 2.5 forms. The only remaining ones left to change back are
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metadata related, which I'm waiting on to avoid conflicting with Devang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77721 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:28:14 +00:00
Eric Christopher
44b93ff9ad
Whitespace and 80-col cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77718 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 20:07:27 +00:00
Chris Lattner
a87dea4f8c
switch off of 'Section' onto MCSection. We're not properly using
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MCSection subclasses yet, but this is a step in the right direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77708 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:48:30 +00:00
Evan Cheng
ff6ab17619
Until we have a "ALIGN" pseudo instruction, have asm printer emitted a .align
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to ensure the instruction that follows a TBB (when the number of table entries
is odd) is 2-byte aligned.
Patch by Sandeep Patel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:35:56 +00:00
Evan Cheng
d26b14c34c
- Teach TBB / TBH offset limits are 510 and 131070 respectively since the offset
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is scaled by two.
- Teach GetInstSizeInBytes about TBB and TBH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77701 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:28:05 +00:00
Daniel Dunbar
d5f02f65af
Normalize target registration code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:16:53 +00:00
Dan Gohman
ad2afc2a42
Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
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shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
and passes like MachineLoop are registered with isCFGOnly set to true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 18:16:33 +00:00
Chris Lattner
f26e03bc7e
refactor section construction in TLOF to be through an explicit
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initialize method, which can be called when an MCContext is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 17:42:42 +00:00
Chris Lattner
82987bfe9b
fix PR4650: we only track sizes for certain objects, so only put something
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into the mergable section if it is one of our special cases. This could
obviously be improved, but this is the minimal fix and restores us to the
previous behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77679 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 16:17:13 +00:00
Benjamin Kramer
c6b79ac88e
Fix a struct/class mismatch, to silence a MSVC warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 11:35:26 +00:00
Sanjiv Gupta
aa93917a5e
define target names for std libcalls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77667 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 07:35:57 +00:00
Daniel Dunbar
c5b19b21d8
Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
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failures when building assorted projects with clang.
--- Reverse-merging r77654 into '.':
U include/llvm/CodeGen/Passes.h
U include/llvm/CodeGen/MachineFunctionPass.h
U include/llvm/CodeGen/MachineFunction.h
U include/llvm/CodeGen/LazyLiveness.h
U include/llvm/CodeGen/SelectionDAGISel.h
D include/llvm/CodeGen/MachineFunctionAnalysis.h
U include/llvm/Function.h
U lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/MachineVerifier.cpp
U lib/CodeGen/MachineFunction.cpp
U lib/CodeGen/PrologEpilogInserter.cpp
U lib/CodeGen/MachineLoopInfo.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D lib/CodeGen/MachineFunctionAnalysis.cpp
D lib/CodeGen/MachineFunctionPass.cpp
U lib/CodeGen/LiveVariables.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 03:02:41 +00:00
Daniel Dunbar
a027d222e1
llvm-mc: Match a few X86 instructions.
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- This is "experimental" code, I am feeling my way around and working out the
best way to do things (and learning tblgen in the process). Comments welcome,
but keep in mind this stuff will change radically.
- This is enough to match "subb" and friends, but not much else. The next step is to
automatically generate the matchers for individual operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77657 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 02:32:59 +00:00
Dan Gohman
933c762371
Manage MachineFunctions with an analysis Pass instead of the Annotable
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mechanism. To support this, make MachineFunctionPass a little more
complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77654 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 01:52:50 +00:00
Evan Cheng
ee42fd309e
When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77642 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 23:29:25 +00:00
David Goodwin
07337c0fcf
Remove redundant match for frame index from imm8 addrmode, it is handled by the imm12 addrmode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77632 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 22:45:52 +00:00
David Goodwin
8f65253236
Darwin assembler now recognizes "orn", so remove workaround.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77627 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 21:51:41 +00:00
David Goodwin
7c92f3ac99
Darwin assembler now supports "rrx", so remove workaround.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 21:38:40 +00:00
David Goodwin
d8c95b5ac2
Cleanup and include code selection for some frame index cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 18:56:48 +00:00
David Goodwin
3e4b22d983
Add missing D* register clobbers for Thumb-2 call.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77611 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 18:01:09 +00:00
Dan Gohman
524dab14f4
Minor whitespace tidiness.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 17:04:07 +00:00
Dan Gohman
68a31c2583
Rename GRAD to GR32_AD, to follow the naming convention of other
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classes. And define its SubRegClassList.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77601 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 17:02:08 +00:00
Chris Lattner
513503961d
add a random codegen deficiency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 16:08:58 +00:00
Evan Cheng
7216920791
Add a note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77584 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 08:56:19 +00:00
Evan Cheng
37b7387da9
Optimize some common usage patterns of atomic built-ins __sync_add_and_fetch() and __sync_sub_and_fetch.
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When the return value is not used (i.e. only care about the value in the memory), x86 does not have to use add to implement these. Instead, it can use add, sub, inc, dec instructions with the "lock" prefix.
This is currently implemented using a bit of instruction selection trick. The issue is the target independent pattern produces one output and a chain and we want to map it into one that just output a chain. The current trick is to select it into a merge_values with the first definition being an implicit_def. The proper solution is to add new ISD opcodes for the no-output variant. DAG combiner can then transform the node before it gets to target node selection.
Problem #2 is we are adding a whole bunch of x86 atomic instructions when in fact these instructions are identical to the non-lock versions. We need a way to add target specific information to target nodes and have this information carried over to machine instructions. Asm printer (or JIT) can use this information to add the "lock" prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77582 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 08:33:02 +00:00
Daniel Dunbar
7f93dc8345
Switch obvious clients to Twine instead of utostr (when they were already using
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a Twine, e.g., for names).
- I am a little ambivalent about this; we don't want the string conversion of
utostr, but using overload '+' mixed with string and integer arguments is
sketchy. On the other hand, this particular usage is something of an idiom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77579 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 04:20:37 +00:00
Sanjiv Gupta
e409f0a779
Keep track of references to mem(cpy,move,set) and then print only one extern
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declaration for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77578 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 04:15:15 +00:00
Dan Gohman
a4714e025d
Add a new register class to describe operands that can't be SP,
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due to x86 encoding restrictions. This is currently off by default
because it may cause code quality regressions. This is for PR4572.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77565 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 01:56:29 +00:00
Dan Gohman
084d1ba5ad
Eliminate a bunch of redundant tables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 00:40:42 +00:00
Bob Wilson
cf661e2c56
Lower a 128-bit BUILD_VECTOR with 2 elements to a pair of INSERT_VECTOR_ELTs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 00:31:25 +00:00
Dan Gohman
7c5f0c5ce9
Use array_endof instead of doing it manually.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77553 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 00:10:18 +00:00
Evan Cheng
8770f747a9
tbb / tbh instructions only branch forward, not backwards.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77522 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 23:20:20 +00:00
Evan Cheng
d600522608
Add VFP3 D registers to the DPR register class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77521 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 23:03:41 +00:00
Owen Anderson
debcb01b0f
Move types back to the 2.5 API.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77516 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 22:17:13 +00:00
Chris Lattner
2a38688494
inline the global 'getInstrOperandRegClass' function into its callers
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now that TargetOperandInfo does the heavy lifting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 21:36:49 +00:00
Evan Cheng
20a2a0aff3
Make sure Thumb2 uses the right call instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77507 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 21:26:42 +00:00
Chris Lattner
cb778a8634
1. Introduce a new TargetOperandInfo::getRegClass() helper method
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and convert code to using it, instead of having lots of things
poke the isLookupPtrRegClass() method directly.
2. Make PointerLikeRegClass contain a 'kind' int, and store it in
the existing regclass field of TargetOperandInfo when the
isLookupPtrRegClass() predicate is set. Make getRegClass pass
this into TargetRegisterInfo::getPointerRegClass(), allowing
targets to have multiple ptr_rc things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77504 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 21:10:12 +00:00
Chris Lattner
2cfd52c507
Give getPointerRegClass() a "kind" value so that targets can
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support multiple different pointer register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77501 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 20:31:52 +00:00
Evan Cheng
0531d04d00
- Fix an obvious copy and paste error.
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- Darwin Thumb2 call clobbers r9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 20:10:36 +00:00
Eric Christopher
978dae35e2
Add llvm_unreachable for ... unreachable code!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77480 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 18:14:04 +00:00
Bob Wilson
b7d0c90c44
Change Neon VLDn intrinsics to return multiple values instead of really
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wide vectors. Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct. Adjust tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 16:39:22 +00:00
Chris Lattner
37dfdecafd
more syntactic cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77442 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 06:33:53 +00:00
Chris Lattner
c3c35b1721
minor smallvector cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77441 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 06:29:53 +00:00
Chris Lattner
31dcfe6121
whitespace cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77438 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 05:48:09 +00:00
Chris Lattner
83d1c3db39
mingw uses .data and .text, not _data and _text.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77435 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 05:25:42 +00:00
Chris Lattner
b8f396bdbb
fix PR4584 with a trivial patch now that the pieces are in place.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 05:20:33 +00:00
Chris Lattner
e53a600f06
pass the mangler down into the various SectionForGlobal methods.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77432 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 05:09:30 +00:00
Chris Lattner
a679207d58
constant prop a utostr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77430 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 04:55:08 +00:00
Chris Lattner
067fe1ae54
remove some completely wrong code. 1 is never < 16. It turns out that GCC appears to put strings of any length into the ELF cstring equivalent, so just rip out the code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77429 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 04:54:38 +00:00
Evan Cheng
5657c01949
Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte / halfword.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77422 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 02:18:14 +00:00
Eric Christopher
794bfed25d
Fix comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77415 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 01:01:19 +00:00
Bill Wendling
859cc77963
Change the "PreferredEHDataFormat" from "absptr" if we're on a Darwin system >
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Leopard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77414 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 00:59:34 +00:00
Eric Christopher
71c6753d03
Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. Lower
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to ptest instruction plus setcc. Revamp ptest instruction. Add test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77407 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 00:28:05 +00:00
Daniel Dunbar
0e2771f4c4
Match X86 register names to number.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 00:02:19 +00:00
David Goodwin
d9453784fb
Thumb-2: fix typo that caused incorrect stack elimination for VFP operations and very large stack frames.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77401 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 23:52:33 +00:00
Daniel Dunbar
16cdcb38b2
Move X86 instruction parsing into X86/AsmParser.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77384 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 22:40:46 +00:00
Bill Wendling
1711a7c8cf
Output the correct format for Darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77376 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 22:03:50 +00:00
Bill Wendling
ac3126ebdd
Darwin outputs (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4) when we're
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dealing with Data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77372 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 21:53:17 +00:00
Devang Patel
0a9f7b9c3e
Rename MDNode.h header. It defines MDnode and other metadata classes.
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New name is Metadata.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77370 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 21:49:47 +00:00
Owen Anderson
af7ec97587
Return ConstantVector to 2.5 API.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 21:19:26 +00:00
Evan Cheng
e7c329bf4b
In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is until more optimization goes in).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77364 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 20:53:24 +00:00
David Goodwin
6340632d3b
Remove support for ORN to workaround <rdar://problem/7096522>.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 20:51:25 +00:00
Daniel Dunbar
a2edbabcb8
Provide generic MCAsmParser when constructing target specific parsers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 20:47:52 +00:00
Chris Lattner
b180d992d8
more simplifications and cleanup. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77350 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 18:48:43 +00:00
Owen Anderson
1fd7096407
Change ConstantArray to 2.5 API.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77347 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 18:32:17 +00:00
David Goodwin
5743854f47
Add workaround for <rdar://problem/7098328>.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77340 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 18:15:38 +00:00
Chris Lattner
bf15e433b9
Fix PR4639, a ELF-TLS regression from some of my refactoring.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 17:57:51 +00:00
Chris Lattner
4bb253c60f
the apple "ld_classic" linker doesn't support .literal16 in 32-bit
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mode, and "ld64" (the default linker) falls back to it in -static
mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77334 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 17:50:28 +00:00
David Goodwin
3583df7676
Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 17:06:49 +00:00
Chris Lattner
8fb0039ea6
fix unused variable warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 16:49:19 +00:00
Evan Cheng
bae20a6353
tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77305 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 07:38:35 +00:00
Evan Cheng
542383d93b
Code clean up. No functionality changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77301 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 06:24:12 +00:00
Evan Cheng
6495f63945
- More refactoring. This gets rid of all of the getOpcode calls.
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- This change also makes it possible to switch between ARM / Thumb on a
per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77300 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 05:48:47 +00:00
Chris Lattner
f4b64f67b6
fix a casting problem on the llvm-x86_64-linux tester
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77295 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 03:20:34 +00:00
Chris Lattner
f0144127b9
Rip all of the global variable lowering logic out of TargetAsmInfo. Since
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it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.
Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.
This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
CStringSection_. Factor the code better.
5. fixes some bugs in string lowering on ELF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 03:13:23 +00:00
Chris Lattner
7988aff079
don't copy TargetLowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 03:05:40 +00:00
David Goodwin
1f0962756d
ORN does not require (and can not have) the ".w" suffix. "Orthogonality" is a dirty word at ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 23:34:12 +00:00
Daniel Dunbar
9a7e2ccf57
llvm-mc: Move AsmLexer::getCurStrVal to StringRef based API.
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- My DFS traversal of LLVM is, at least for now, nearly complete! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77258 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 21:49:56 +00:00
Chris Lattner
2b2954f00b
hoist MCContext/MCStreamer up to AsmPrinter since we're going to start creating
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MCSections soon instead of Section for all targets, and we need something to
own them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 21:28:04 +00:00
Owen Anderson
6f83c9c6ef
Move ConstantFP construction back to the 2.5-ish API.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77247 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 20:59:43 +00:00
David Goodwin
c9d138f505
Remove TPat. No patterns depend on just isThumb(). Must use either T1Pat (isThumb1Only()) or T2Pat (is Thumb2).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77242 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 19:59:26 +00:00
Chris Lattner
3b07b5214c
Sink getSectionPrefixForUniqueGlobal down into the TAI
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implementations that need it, rearrange ELFTAI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77236 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 19:14:14 +00:00
Chris Lattner
fa199f3c16
remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77233 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 19:00:33 +00:00
Evan Cheng
e0f21bd47f
More DCE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77231 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 18:48:45 +00:00
Evan Cheng
78703ddafe
convertToThreeAddress can't handle Thumb2 instructions (which don't have same address mode as ARM instructions).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 18:44:00 +00:00
Evan Cheng
fc17fb0aee
Get rid of more dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77227 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 18:38:54 +00:00
Evan Cheng
293f8d9b88
Cosmetic change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77222 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 18:31:40 +00:00
Evan Cheng
83e0e36be8
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77221 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 18:25:24 +00:00
Evan Cheng
5ca53a7ad8
Get rid of some more getOpcode calls.
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This also fixes potential problems in ARMBaseInstrInfo routines not recognizing thumb1 instructions when 32-bit and 16-bit instructions mix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 18:20:05 +00:00
Mike Stump
487cdc1bdc
Fix build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77217 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 18:18:30 +00:00
Sanjiv Gupta
be7b97b773
Remove duplicate entries while printing decls for external symbols.
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Some libcall names are same, so they were getting printed twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77215 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 18:04:34 +00:00
Chris Lattner
a7defb7150
add an explanatory comment about why we drop these in readonly and
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not in mergable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77210 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 17:39:40 +00:00
Chris Lattner
40412e7e90
make COFF work like ELF and macho, by splitting out into its own
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header even though there is only one COFF target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77204 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:45:59 +00:00
Chris Lattner
afcb70bc73
don't create default text/data sections for all targets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77203 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:44:04 +00:00
Chris Lattner
6470177588
Apparently alpha doesn't use ElfTargetAsmInfo (?)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77202 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:42:14 +00:00
David Goodwin
752aa7d2fe
Thumb-2 does not have RSC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:39:05 +00:00
David Goodwin
af0d08d55c
Add ".w" suffix for wide thumb-2 instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77199 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:31:55 +00:00
Chris Lattner
33ae7a453b
inline a method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77198 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:27:32 +00:00
Chris Lattner
20886cf91c
apparently we have "windows" and "coff", which are different(?)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77197 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:22:39 +00:00
Chris Lattner
92ef3f66c1
sink text/data section creation down into the target-specific places that
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should know about them. PECoff doesn't share these, and I want all sections
to be created by object-file-specific code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77196 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:20:58 +00:00
Chris Lattner
de3a1078ab
32-bit darwin targets support .literal16 too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77191 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 15:44:04 +00:00
Chris Lattner
e346694a81
Eliminate getNamed/getUnnamedSection, adding a new and unified getOrCreateSection
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instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77186 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 06:17:14 +00:00
Chris Lattner
5fe575ff4f
Eliminate SectionFlags, just embed a SectionKind into Section
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instead and drive things based off of that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77184 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 05:32:16 +00:00
Evan Cheng
1f5c988754
If CPSR is modified but the def is dead, then it's ok to fold the load / store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77182 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 04:18:04 +00:00
Evan Cheng
5732ca084a
Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate more getOpcode calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77181 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 03:14:20 +00:00
Sanjiv Gupta
8e14eab07e
Generate a libcall for i8 multiply.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77179 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 02:44:46 +00:00
Sanjiv Gupta
bf36cafb8c
fixed incorrect lowering of ISD::SUB node. SUB has only one result value.
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It wasn't caught during tests because we never got a sub generated, (i8 was always getting promoted to int, which in turn was broken into subc/sube). Though the optimizer leaves an i8 sub now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77178 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 02:26:06 +00:00
Evan Cheng
08b93c6a70
Use the right instructions to copy between GPR and the more strictive tGPR classes. t2MOV does not match the RC requirements.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77175 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 00:33:08 +00:00
Evan Cheng
dced03fc84
Merge isLoadFromStackSlot into one since it behaves the same regardless of sub-target.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77174 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 00:24:36 +00:00
Evan Cheng
68e3c6ae49
Just use a single isMoveInstr to catch all the cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77173 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 00:05:15 +00:00
Evan Cheng
d83360694a
Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a low register. It's moving from a GPR register class to a more restrictive tGPR class. Also change tMOVlor2hir, and tMOVhir2hir.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77172 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 23:59:01 +00:00
Chris Lattner
0fcf4dc6d3
untangle a TargetAsmInfo hack where ELFTargetAsmInfo would create a
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'unnamed' bss section, but some impls would want a named one. Since
they don't have consistent behavior, just make each target do their
own thing, instead of doing something "sortof common" then having
targets change immutable objects later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77165 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 19:23:28 +00:00
Evan Cheng
30b2bdfa73
Refactor. Get rid of a few more getOpcode() calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77164 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 18:55:14 +00:00
Chris Lattner
74fb545163
reduce indentation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77161 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 18:08:15 +00:00
Sanjiv Gupta
f9474ca928
Fix the breakage caused by 76950.
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PIC16 has special naming conventions for variables having section names specified via section attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77153 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 10:25:01 +00:00
Nick Lewycky
92fbbc7588
Move MSILModule and MSILWriter into the 'llvm' namespace, instead of the 'MSIL'
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namespace which could very well conflict with non-LLVM code.
Also clean up some spacing, remove an extra header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77146 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 08:16:51 +00:00
Daniel Dunbar
93b67e40de
Eliminate some uses of DOUT, cerr, and getNameStart().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77145 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 07:49:05 +00:00
Chris Lattner
f40761d522
remove a densemap from TargetAsmInfo that was uniquing the targetflags strings,
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just use a smallstring instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 07:33:58 +00:00
Chris Lattner
6468b44d3a
simplify SectionFlagsForGlobal, even though I want to kill it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 07:17:39 +00:00