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Author SHA1 Message Date
Chris Lattner
5c40e694dc remove the string form of printVisibility. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93609 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-16 01:17:26 +00:00
Chris Lattner
9c09363637 switch more stuff onto MCSymbols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93608 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-16 01:12:01 +00:00
Chris Lattner
8570f594ad eliminate uses of deprecated mangler apis 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93605 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-16 01:00:27 +00:00
Chris Lattner
4fb69f40be switch X86 target off CurFunctionName and MCIze more. 
Note that the code wasn't calling DecorateCygMingName
when emitting the ".ascii -export" stuff at the end of
file for DLLExported functions.  I don't know if it should
or not, but I'm preserving behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93603 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-16 00:51:39 +00:00
Chris Lattner
551cdd56ce MCize tis, and make it keep CurrentFnSym up to date with CurrentFnName. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93598 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-16 00:32:38 +00:00
Chris Lattner
99db039e72 revert the x86 part of my last patch, cygwin is mutating CurrentFnName! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93595 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-16 00:24:20 +00:00
Chris Lattner
12164414dd MCize a bunch more stuff, eliminating a lot of uses of the mangler 
and CurrentFnName.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93594 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-16 00:21:18 +00:00
Chris Lattner
8914fc20c2 remove two write-only sets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93590 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 23:56:03 +00:00
Chris Lattner
d1947ed2f8 supplement CurrentFnName with CurrentFnSym, which will eventually 
replace it.  Upgrade Alpha, Blackfin, and part of CellSPU to not
use mangler anymore.  CellSPU needs more invasive surgery.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93589 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 23:55:16 +00:00
Chris Lattner
53d4d78d9a add a version of AsmPrinter::printVisibility that takes an MCSymbol. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93587 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 23:38:51 +00:00
Chris Lattner
f0aacf8201 use MCSymbol instead of getMangledName() in all cases except one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93582 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 23:31:55 +00:00
Dale Johannesen
9a23981ecc Adjust some comments per review. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93580 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 23:29:29 +00:00
Chris Lattner
8b3787586e mc'ize a bunch of symbol stuff, eliminating std::strings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93578 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 23:26:49 +00:00
David Greene
ee9c595885 Fix PR6019. A load has more than one use if it feeds a bitconvert that 
has more than one use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93576 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 23:23:41 +00:00
Chris Lattner
6b04edee11 add a AsmPrinter::GetGlobalValueSymbol and GetExternalSymbolSymbol 
helper method, use it to simplify some code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93575 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 23:18:17 +00:00
Ted Kremenek
aeb9f0881a Update CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93570 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 22:59:11 +00:00
Dale Johannesen
23cdb0bdcf DEBUG_VALUE is now variable sized, as it has a 
target-dependent memory address representation in it.
Restore X86 printing of DEBUG_VALUE; lowering is
done in X86RegisterInfo using the normal algorithm.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93565 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 22:22:35 +00:00
Jim Grosbach
98793b9468 Update Thumb1 storeRegToStackSlot() and loadRegFromStackSlot() to properly 
handle physical registers R0-R7 when described as having a non-tGPR register
class.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93564 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 22:21:03 +00:00
Dan Gohman
5ad7de227b Fix a typo that Anton noticed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93563 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 22:18:15 +00:00
Eric Christopher
606a1d1f59 Remove the InlineHint attribute. There are no current or planned 
users.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93558 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:36:30 +00:00
Anton Korobeynikov
9afb7c5fb3 zext / truncate is free on msp430. Inform codegen about this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93556 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:19:43 +00:00
Anton Korobeynikov
702adaba6d Add branch relaxation pass (shamelessly stolen from PPC). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93554 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:19:05 +00:00
Anton Korobeynikov
05011a8aba Provide instruction sizes & encoding. No opcodes yet (but not needed so far). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93553 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:18:39 +00:00
Anton Korobeynikov
cb50e0bd60 Enable bit tests and setcc stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93552 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:18:18 +00:00
Anton Korobeynikov
0c1ba91a54 Add micro-optimization which allows us to fold imm into cmp. This allows us to save 1 word (sometimes) and reduce register pressure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93551 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:18:02 +00:00
Anton Korobeynikov
3af4a0b4cb Add instruction formats & support stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93550 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:17:13 +00:00
Chris Lattner
54482b472a fix a bug in range information for $42, eliminate an 
unneeded argument from ParseExpression.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93536 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 19:39:23 +00:00
Chris Lattner
0a3c5a54a1 add range information for mem X86Operand's, now all 
X86Operand's have range info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93535 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 19:33:43 +00:00
Chris Lattner
b4307b3370 extend MCAsmParser::ParseExpression and ParseParenExpression 
to return range information for subexpressions.  Use this to
provide range info for several new X86Operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93534 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 19:28:38 +00:00
Chris Lattner
1f19f0f31d give X86Operand a ctor and start passing SMLoc's into it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93532 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 19:06:59 +00:00
Dale Johannesen
3752d2fe34 Revert 93499. After discussion with Chris we agreed 
FrameIndexes should be lowered, but the same way as
everything else (target dependent) rather than in a
special hacked way.  The lowering needs to be done
for eventual purposes of Dwarf generation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93530 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 18:58:14 +00:00
Chris Lattner
29ef9a21dd add range location info for registers, change 
X86Operand::Create* implementations to avoid
copy ctor use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93528 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 18:51:29 +00:00
Chris Lattner
309264d1e4 clean up the memory management of the operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93526 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 18:44:13 +00:00
Chris Lattner
23075746a1 refactor ParseRegister to avoid using X86Operand as a temporary 
datastructure when parsing a mem operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93521 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 18:27:19 +00:00
Dale Johannesen
bc971c1575 Lower FrameIndex operand of DEBUG_VALUE (specially) and 
print it as a comment on X86.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93499 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 01:54:55 +00:00
Anton Korobeynikov
f7ed979257 Fix cmp emission on msp430: we definitely should turn stuff like 
"icmp lhs, rhs" into "cmp rhs, lhs". This should fix PR5979.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 01:29:49 +00:00
Jim Grosbach
867bbbfff7 Name change for consistency. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93480 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 00:22:18 +00:00
Jim Grosbach
5efaed3bf4 EmitAtomicCmpSwap() custome inserter needs to delete the MI passed in. EmitAtomicBinary() already does this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93479 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 00:18:34 +00:00
Jeffrey Yasskin
13c10c4e49 Teach PPC how to replaceMachineCodeForFunction correctly. (Fixes 
JITTest.FunctionIsRecompiledAndRelinked.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93475 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-14 23:15:26 +00:00
Johnny Chen
51bc5612b3 Added 16-bit Thumb Load/Store immediate instructions with encoding bits so that 
the disassembler can properly decode Load/Store register/immediate instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-14 22:42:17 +00:00
Chris Lattner
9898671a74 Split the TargetAsmParser "ParseInstruction" interface in half: 
the new ParseInstruction method just parses and returns a list of
target operands.  A new MatchInstruction interface is used to
turn the operand list into an MCInst.

This requires new/deleting all the operands, but it also gives 
targets the ability to use polymorphic operands if they want to. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93469 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-14 22:21:20 +00:00
Anton Korobeynikov
5fcf52ccf3 Remove pseudo-MI in custom inserter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93467 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-14 22:09:11 +00:00
Chris Lattner
f007e853e2 prune #includes in TargetAsmParser.h 
Pass in SMLoc of instr opcode into ParseInstruction.
Make AsmToken be a class, not a struct.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93457 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-14 21:32:45 +00:00
Chris Lattner
7659389d0d introduce MCParsedAsmOperand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93455 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-14 21:21:40 +00:00
Chris Lattner
45220a8439 introduce the MCParsedAsmOperand class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93454 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-14 21:20:55 +00:00
Jakob Stoklund Olesen
09bf003983 ARM "l" constraint for inline asm means R0-R7, also for Thumb2. 
This is consistent with llvm-gcc's arm/constraints.md.

Certain instructions (e.g. CBZ, CBNZ) require a low register, even in Thumb2
mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93436 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-14 18:19:56 +00:00
Jakob Stoklund Olesen
069e100f9a Don't fold insufficiently aligned ldr/str into ldm/stm instructions. 
An unaligned ldr causes a trap, and is then emulated by the kernel with
awesome performance. The darwin kernel does not emulate unaligned ldm/stm
Thumb2 instructions, so don't generate them.

This fixes the miscompilation of Multisource/Applications/JM/lencod for Thumb2.

Generating unaligned ldr/str pairs from a 16-bit aligned memcpy is probably
also a bad idea, but that is beyond the scope of this patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93393 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-14 00:54:10 +00:00
Chris Lattner
5350f78323 this is an SSE-specific issue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93373 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 23:29:11 +00:00
Chris Lattner
689339c50f X86 if conversion + tail merging issues from PR6032. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93372 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 23:28:40 +00:00
Chris Lattner
8da8d4b12a fix ELF section mangling stuff for weak symbols to not use 
obsolete Mangler interfaces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93356 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 21:29:21 +00:00
Chris Lattner
a46a34431c reduce duplicate mangling logic by using MCSymbol::printMangledName. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93351 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 21:12:34 +00:00
Johnny Chen
12360917ef Fixed a couple of places for Thumb MOV where encoding bits are underspecified. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93349 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 21:00:26 +00:00
Jakob Stoklund Olesen
15913c999e Fix pasto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93342 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 19:54:39 +00:00
Chris Lattner
471f1e9dc0 stop the CBE from using deprecated Mangler stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93341 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 19:54:07 +00:00
Chris Lattner
cab16cc9a3 Use the GV version of getNameWithPrefix in TargetLoweringObjectFileCOFF:: 
SelectSectionForGlobal, unbreaking weak globals with no-name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93336 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 19:19:17 +00:00
Chris Lattner
656bb20d61 just finish MCizing FnStubInfo which cleans it up and simplifies it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93334 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 19:13:16 +00:00
Chris Lattner
59b34fe55f don't call getNameWithPrefix repeatedly and unnecesarily. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93333 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 19:05:36 +00:00
Chris Lattner
0b4bad54f6 properly use MCSymbol to print the strings aquired from getNameWithPrefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93332 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 19:00:57 +00:00
Chris Lattner
09533a404c upgrade and MC'ize a few uses of makeNameProper. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93310 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 08:08:33 +00:00
Chris Lattner
13b1e92e6c MC'ize this a bit and upgrade APIs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93309 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 08:04:24 +00:00
Chris Lattner
4d5f06fbe5 add a fixme, ELF MCSection isn't quite right and weak unnamed globals are broken 
on linux (even though they are pointless, they shouldn't ICE).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93308 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 08:02:14 +00:00
Evan Cheng
57d1d936fc For now, avoid issuing extract_subreg to reuse lower 8-bit, it's not safe in 32-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93307 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 08:01:32 +00:00
Chris Lattner
ee9250bb4f eliminate some uses of Mangler::makeNameProper. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93305 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 07:56:59 +00:00
Chris Lattner
4813035b72 change Mangler::makeNameProper to return its result in a SmallVector 
instead of returning it in an std::string.  Based on this change:

1. Change TargetLoweringObjectFileCOFF::getCOFFSection to take a StringRef
2. Change a bunch of targets to call makeNameProper with a smallstring,
   making several of them *much* more efficient.
3. Rewrite Mangler::makeNameProper to not build names and then prepend
   prefixes, not use temporary std::strings, and to avoid other crimes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93298 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 06:38:18 +00:00
Jakob Stoklund Olesen
c5b7ef1519 Remove the JustSP single-register regclass. 
It was only being used by instructions with the t_addrmode_sp addressing mode,
and that is pattern matched in a way that guarantees SP is used. There is
never any register allocation done from this class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93280 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 00:43:06 +00:00
Evan Cheng
7da9ecf967 Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg. 
For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93278 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-13 00:30:23 +00:00
Evan Cheng
3bda20112e Eliminate or_not_add and just use AddedComplexity so isel tries or_is_add patterns first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93245 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-12 18:31:19 +00:00
Duncan Sands
796248fdb1 Revert commit 93204, since it causes the assembler to barf 
on x86-64 linux with messages like this:
Error: Incorrect register `%r14' used with `l' suffix


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93242 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-12 17:46:16 +00:00
Duncan Sands
990c4b87e3 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93235 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-12 08:30:46 +00:00
Duncan Sands
e2de606e0b Tweak commit 91745, which changed target data for both Mingw and Cygwin, 
to not touch Cygwin: the change caused llvm-gcc build failures due to
long double getting the wrong size.  Patch by Aaron Gray.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93234 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-12 08:21:07 +00:00
Dan Gohman
f1b4d26e67 Reapply the MOV64r0 patch, with a fix: MOV64r0 clobbers EFLAGS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93229 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-12 04:42:54 +00:00
Evan Cheng
a5a81d7072 Add TargetInstrInfo::isCoalescableInstr. It returns true if the specified 
instruction is copy like where the source and destination registers can
overlap. This is to be used by the coalescable to coalesce the source and
destination registers of instructions like X86::MOVSX64rr32. Apparently
some crazy people believe the coalescer is too simple.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93210 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-12 00:09:37 +00:00
Evan Cheng
b85071c736 Add manual ISD::OR fastisel selection routines. TableGen is no longer autogen them after 93152 and 93191. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93204 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 22:59:27 +00:00
Evan Cheng
199c4240fe Extend r93152 to work on OR r, r. If the source set bits are known not to overlap, then select as an ADD instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93191 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 22:03:29 +00:00
Evan Cheng
05920b8146 Revert 93158. It's breaking quite a few x86_64 tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93185 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 21:13:41 +00:00
Evan Cheng
ac000fa0ed Do not turn 8-bit OR to ADD since ADD8ri is not 3-addressfiable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93182 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 20:18:04 +00:00
Benjamin Kramer
d4f195999a Reimplement getToken and SplitString as "StringRef helper functions" 
- getToken is modeled after StringRef::split but it can split on multiple
  separator chars and skips leading seperators.
- SplitString is a StringRef::split variant for more than 2 elements with the
  same behaviour as getToken.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93161 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 18:03:24 +00:00
Dan Gohman
e5dacc55ad Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it 
has an immediate with at least 32 bits of leading zeros, to avoid needing to
materialize that immediate in a register first.

FileCheckize, tidy, and extend a testcase to cover this case.

This fixes rdar://7527390.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93160 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 17:58:34 +00:00
Dan Gohman
71c25b7d7b Re-instate MOV64r0 and MOV16r0, with adjustments to work with the 
new AsmPrinter. This is perhaps less elegant than describing them
in terms of MOV32r0 and subreg operations, but it allows the
current register to rematerialize them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93158 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 17:37:57 +00:00
Dan Gohman
7e0d64a49c Pattern top-level operators don't need to be restricted to a 
single user. The _su forms are intended for non-top-level nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93155 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 17:21:05 +00:00
Dan Gohman
9e83467baa Reword this comment to reference a more fundamental issue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93154 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 17:14:46 +00:00
Evan Cheng
4b0345be30 Select an OR with immediate as an ADD if the input bits are known zero. This allow the instruction to be 3address-fied if needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93152 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 17:03:47 +00:00
David Greene
95eb2eeea6 Implement a feature (-vector-unaligned-mem) to allow targets to 
ignore alignment requirements for SIMD memory operands.  This
is useful on architectures like the AMD 10h that do not trap on
unaligned references if a status bit is twiddled at startup time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93151 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-11 16:29:42 +00:00
Chris Lattner
d686c8e73f "In order to ease automatic bindings generation, it would be helpful if boolean values were distinguishable from integers. The attached patch introduces "typedef int LLVMBool;", and uses LLVMBool instead of int throughout the C API, wherever a boolean value is called for." 
Patch by James Y Knight!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93079 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-09 22:27:07 +00:00
Jeffrey Yasskin
a77169dbeb Fix http://llvm.org/PR5729: x86-64 tail calls were putting their targets into 
R11, and then asserting that the target was in R9.  Since R9 isn't reserved for
the target anymore, and is used as an argument, this patch changes the
assertion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93065 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-09 18:56:43 +00:00
Evan Cheng
306b4cafc1 Fix a critical bug in 64-bit atomic operation lowering for 32-bit. The results of the cmpxchg8b instructions are being thrown away when it branches back to the top of the checking loop. This means the loop always compares against the old value and this can result in a dead lock. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93028 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-08 23:41:50 +00:00
Evan Cheng
ad5b52fd5e Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93020 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-08 19:14:57 +00:00
Johnny Chen
d248ffb7d5 Minor change, change the order of two "let Inst{...}" stmts within multiclass 
T2I_bin_ii12rs definition.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93006 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-08 17:41:33 +00:00
Eric Christopher
968b35ff47 After further thought revert the patch to make fast-isel avoid 
putting relocations into the constant pool - this isn't needed
for correctness and in the rare occasion it happens would pull
us out of fast isel for the block.

If fast-isel application startup time ever becomes an issue we
can add better support for these addresses instead of bailing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92995 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-08 08:24:49 +00:00
Evan Cheng
b093bd0565 Fix what looks to me obvious instruction definition bugs. 
1. CMPXCHG8B and CMPXCHG16B did not specify implicit physical register defs and uses.
2. LCMPXCHG8B is loading 64 bit memory, not 32 bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92985 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-08 01:29:19 +00:00
Eric Christopher
d74a7d4e2c Remove extraneous include. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92972 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-08 00:05:33 +00:00
Eric Christopher
e6c74c9c2a If the data requires a relocation then don't attempt to 
add it to the constant pool for fast-isel. We already
don't add it for the normal case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92934 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-07 19:45:14 +00:00
Eric Christopher
a07b750405 We need to put any kind of data with a relocation into a 
not-readonly segment on darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92933 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-07 19:44:05 +00:00
Chris Lattner
ddac706747 constant materialization could be improved. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92921 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-07 17:53:10 +00:00
Evan Cheng
17751dac3e Fix a minor regression from my dag combiner changes. One more place which needs to look pass truncates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92885 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-07 00:54:06 +00:00
Jim Grosbach
9631864688 80 column violations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92876 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-06 23:54:42 +00:00
Jakob Stoklund Olesen
30ac0467ce Add Target hook to duplicate machine instructions. 
Some instructions refer to unique labels, and so cannot be trivially cloned
with CloneMachineInstr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92873 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-06 23:47:07 +00:00
Jim Grosbach
ce3e769c15 Addressing mode 6 (load/store) instructions can't encode an immediate offset 
for stack references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92871 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-06 23:45:18 +00:00
Evan Cheng
d40d03e1bd Teach dag combine to fold the following transformation more aggressively: 
(OP (trunc x), (trunc y)) -> (trunc (OP x, y))

Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.

This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-06 19:38:29 +00:00
Duncan Sands
e10920d678 Fix a README item: have functionattrs look through selects and 
phi nodes when deciding which pointers point to local memory.
I actually checked long ago how useful this is, and it isn't
very: it hardly ever fires in the testsuite, but since Chris
wants it here it is!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92836 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-06 15:37:47 +00:00
Duncan Sands
7c422ac216 Partially address a README by having functionattrs consider calls to 
memcpy, memset and other intrinsics that only access their arguments
to be readnone if the intrinsic's arguments all point to local memory.
This improves the testcase in the README to readonly, but it could in
theory be made readnone, however this would involve more sophisticated
analysis that looks through the memcpy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92829 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-06 08:45:52 +00:00
Dale Johannesen
b7339d079d Reenable debug info on PPC. Works well enough to 
bootstrap.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92818 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-06 02:21:00 +00:00
Dale Johannesen
e89c510c0a Make sure debug info hook gets called when emitting 
synonyms for PPC.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92817 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-06 02:20:18 +00:00
Johnny Chen
8314299161 Undo r92785, it caused test failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92796 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 22:37:28 +00:00
Johnny Chen
83f1136cfd Add Rt2 to the asm format string for 32-bit Thumb load/store register dual 
instructions.  Thumb does not have the restriction that t2 = t+1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92785 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 21:51:46 +00:00
Jakob Stoklund Olesen
e5319202af Don't specify CR sub-registers as implicit defs of BL instructions. 
It is enough to give the super registers CR0, CR1, ..., and specifying the
sub-registers as well causes confusion in the liveness computations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92778 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 21:38:37 +00:00
Benjamin Kramer
8c65f6e71c Move remaining stuff to the isInteger predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92771 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 21:05:54 +00:00
Benjamin Kramer
11acaa374c Convert a ton of simple integer type equality tests to the new predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92760 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 20:07:06 +00:00
Evan Cheng
54de3ea1ca Code refactoring. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92694 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 06:52:31 +00:00
David Greene
9759c305c2 Change errs() to dbgs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92655 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 01:29:36 +00:00
David Greene
f5c95a6ee2 Change errs() to dbgs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92654 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 01:29:34 +00:00
David Greene
5b90132332 Change errs() to dbgs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 01:29:29 +00:00
David Greene
92f164416b Change errs() to dbgs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92651 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 01:29:23 +00:00
David Greene
bd7b8458d1 Change errs() to dbgs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92648 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 01:29:13 +00:00
David Greene
d7f4f24d3f Change errs() to dbgs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92647 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 01:29:08 +00:00
David Greene
c719d5f621 Change errs() to dbgs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92644 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 01:28:53 +00:00
Dan Gohman
eeb3a00b84 Change SelectCode's argument from SDValue to SDNode *, to make it more 
clear what information these functions are actually using.

This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92564 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 01:24:18 +00:00
Devang Patel
44a29e066a Remove dead debug info intrinsics. 
Intrinsic::dbg_stoppoint
 Intrinsic::dbg_region_start 
 Intrinsic::dbg_region_end 
 Intrinsic::dbg_func_start
AutoUpgrade simply ignores these intrinsics now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92557 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 01:10:40 +00:00
Dan Gohman
4361bbfd0e Remove the SDNPAssociative properties for the flags-producing 
operators. Eli pointed out that it's not obvious what that
would mean.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92555 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 00:44:20 +00:00
Evan Cheng
760d1945bc Perform this folding as a target specific dag combine: 
(or (x << c) | (y >> (64 - c))) ==> (shld64 x, y, c)

The isel patterns may not catch all the cases if general dag combine has reduced width of source operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-04 21:22:48 +00:00
Dan Gohman
3c02c22ef9 Remove some README.txt entries which are now implemented. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92511 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-04 20:55:05 +00:00
Dan Gohman
3cc4a307a8 A use by operand 1 or 2 of a SELECT is not a FLAGS use. This 
lets the test-elimination work in more conditional-move cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92508 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-04 20:52:50 +00:00
Dan Gohman
9ef51c8011 Flags-producing add, and, or, etc. have the same profibility 
rules as normal add, and, or, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92507 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-04 20:51:50 +00:00
Dan Gohman
43ffe6769a Add SDNPCommutative and SDNPAssociative to several X86 target nodes. 
This lets isel fold loads into them in more cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92506 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-04 20:51:05 +00:00
Anton Korobeynikov
39784e158a Fix invalid chain folding for memory variant of sdiv / udiv 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92472 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-04 10:31:54 +00:00
Chris Lattner
e4412c1f0b implement an instcombine xform needed by clang's codegen 
on the example in PR4216.  This doesn't trigger in the testsuite,
so I'd really appreciate someone scrutinizing the logic for
correctness.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92458 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-04 06:03:59 +00:00
Chris Lattner
f031e8ad01 Teach codegen to lower llvm.powi to an efficient (but not optimal) 
multiply sequence when the power is a constant integer.  Before, our
codegen for std::pow(.., int) always turned into a libcall, which was
really inefficient.

This should also make many gfortran programs happier I'd imagine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92388 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-01 03:32:16 +00:00
Chris Lattner
398ffba75f update this. To take the next step, llvm.powi should be generalized to work 
on integers as well and codegen should lower them to branch trees.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92382 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-01 01:29:26 +00:00
Benjamin Kramer
7f1a560b2f Replace a few more SmallVectors with arrays. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92265 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-29 16:57:26 +00:00
Sanjiv Gupta
223497e1ef Extern declaration for unordered.f32 libcall was not being emitted. Fixed that. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92242 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-29 03:24:34 +00:00
Chris Lattner
43469b6957 move debug info stuff out of line, allowing two #includes 
to go away from IRBuilder.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92230 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 21:45:40 +00:00
Benjamin Kramer
e55b15fa47 Add missing include (for inline PATypeHolder::get). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92222 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 12:27:56 +00:00
Sanjiv Gupta
917283a418 Fixed llc crash for zext (i1 -> i8) loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92201 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 04:53:24 +00:00
Sanjiv Gupta
8f17a36d31 Allow targets to specify the return type of libcalls that are generated for floating point comparisons, rather than hard-coding them as i32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92199 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 02:40:33 +00:00
Bill Wendling
202249a698 Mark variable used by 'assert' as 'unused'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92198 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 02:07:00 +00:00
Bill Wendling
57f08adbb3 Remove dead variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92197 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 02:05:36 +00:00
Bill Wendling
53df23cff4 Remove dead variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92196 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 02:04:53 +00:00
Bill Wendling
cc690b694a Remove dead variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92195 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 02:01:06 +00:00
Bill Wendling
ab58f13839 Remove dead variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92194 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 02:00:30 +00:00
Bill Wendling
9bf50f45e7 Remove dead variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92193 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 01:57:39 +00:00
Bill Wendling
3ef10858de Remove dead variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92186 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 01:42:12 +00:00
Bill Wendling
67f9dc2559 Remove dead variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92185 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 01:41:12 +00:00
Bill Wendling
c41b638d4a Remove dead variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92184 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 01:36:02 +00:00
Bill Wendling
ce90c245ff Remove dead store. The initial value was never used, but always overridden. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92182 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 01:31:11 +00:00
Bill Wendling
079b6f5ee5 Add an "ATTRIBUTE_UNUSED" macro (and use it). It's for variables which are 
mainly used in debugging and/or assert situations. It should make the compiler
and the static analyzer stop nagging us about them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92181 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-28 01:20:29 +00:00
Eli Friedman
ba7b1c4db4 PR5886: Make sure IMUL32m is marked as setting EFLAGS, so scheduling doesn't 
do illegal stuff around it.  No testcase because the issue is very fragile.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92167 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-26 20:08:30 +00:00
Jakob Stoklund Olesen
1dbc38f52e Move kill flags when the same register occurs more than once in a sequence. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92058 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 21:34:03 +00:00
Jakob Stoklund Olesen
158a2263bd Handle undef operands properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92054 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 21:28:42 +00:00
Jakob Stoklund Olesen
6528966eae Make insert position available to MergeOpsUpdate. 
Rearrange arguments.
No functional changes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92053 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 21:28:37 +00:00
Jakob Stoklund Olesen
3063aed8d2 Perform kill flag calculations in new method. No functional changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92052 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 21:28:31 +00:00
Jakob Stoklund Olesen
f8e33e513f Move repeated code to a new method. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92051 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 21:28:23 +00:00
Sanjiv Gupta
76d2f9a4db Reapply 91904. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91996 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 11:19:09 +00:00
Sanjiv Gupta
7fb0ead091 Added missing patterns for subtract instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91995 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 10:56:02 +00:00
Sanjiv Gupta
6d48855a56 Reverting back 91904. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91993 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 09:46:01 +00:00
Chris Lattner
ac105c4dca really remove the instruction, don't just comment it out 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91976 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 01:46:40 +00:00
Chris Lattner
9e3238303c completely eliminate the MOV16r0 'instruction'. The only 
interesting part of this is the divrem changes, which are
already tested by CodeGen/X86/divrem.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91975 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 01:45:04 +00:00
Sean Callanan
5227cc89f4 More fixes for Visual C++. Replaced several very small 
static inline functions with macros.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91973 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 01:32:29 +00:00
Chris Lattner
6a38182471 stop pattern matching 16-bit zero's of a register to MOV16r0, 
instead use the appropriate subreggy thing.  This generates identical
code on some large apps (thanks to Evan's cross class coalescing
stuff he did back in july).  This means that MOV16r0 can go away
completely in the future soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91972 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 01:30:26 +00:00
Jakob Stoklund Olesen
24b34f8f3e Add a SPR register class to the ARM target. 
Certain Thumb instructions require only SP (e.g. tSTRspi).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91944 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 23:54:44 +00:00
Sean Callanan
542eabcba6 Removed the "inline" keyword from the disassembler decoder, 
because the Visual C++ build does not build .c files as C99


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91935 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 22:51:40 +00:00
Sean Callanan
7fb35a2fd8 Fixes to the X86 disassembler: 
Made LEA memory operands emit only 4 MCInst operands.
Made the scale operand equal 1 for instructions that have no
SIB byte.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 21:12:55 +00:00
Jakob Stoklund Olesen
e9912dc553 Use proper move instructions. Make the verifier happy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91914 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 18:49:55 +00:00
Evan Cheng
b1f4981333 Remove target attribute break-sse-dep. Instead, do not fold load into sse partial update instructions unless optimizing for size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91910 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 17:47:23 +00:00
Douglas Gregor
3dac3b7d23 Include based on the current path, since we already -I the X86 target's path. Fixes CMake build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91908 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 17:25:11 +00:00
Sanjiv Gupta
66500208a5 While converting one of the operands to a memory operand, we need to check if it is Legal and does not result into a cyclic dep. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 14:25:37 +00:00
Bill Wendling
3ea3c24619 Add more plumbing. This time in the LowerArguments and "get" functions which 
return partial registers. This affected the back-end lowering code some.

Also patch up some places I missed before in the "get" functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91880 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 02:10:19 +00:00
Sean Callanan
06b766d1c0 Changed REG_* to MODRM_REG_* to avoid conflicts 
with symbols in AuroraUX's global namespace.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91879 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 02:07:42 +00:00
Daniel Dunbar
baf2e35e18 Fix some may-be-uninitialized var warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91878 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 01:41:37 +00:00
Sean Callanan
0122c9051a Fixed library dependencies between the X86 disassembler and 
X86 codegen that were causing circular symbol dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91871 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 01:11:26 +00:00
Chris Lattner
ffc0574a12 print pcrel immediates as signed values instead of unsigned so that we 
get things like this out of the disassembler:

0x100000ecb: callq	-96

instead of:

0x100000ecb: callq	4294967200

rdar://7491123



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91864 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 00:44:05 +00:00
Anton Korobeynikov
7058f9c114 Mark FPW as allocable when frame address is taken. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91841 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-21 20:18:49 +00:00
Evan Cheng
102ebf16b6 Delete the instruction just before the function terminates for consistency sake. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91836 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-21 19:53:39 +00:00
Eric Christopher
f4f43cb501 Fix setting and default setting of code model for jit. Do this 
by allowing backends to override routines that will default
the JIT and Static code generation to an appropriate code model
for the architecture.

Should fix PR 5773.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91824 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-21 08:15:29 +00:00
Eli Friedman
1f1b0f748d A couple minor README updates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91823 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-21 08:03:16 +00:00
Daniel Dunbar
d4f84dadda Remove unused variable (noticed by clang++). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91780 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-19 18:58:49 +00:00
Daniel Dunbar
c814346c9d #if 0 out X86 disassembler for now, it is breaking the build in multiple places. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91778 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-19 17:11:53 +00:00
Sanjiv Gupta
bcfd12a234 Emit direction operand in binary insns that stores in memory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91777 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-19 13:52:01 +00:00
Nuno Lopes
392bbd99b6 rename dprintf to dbgpritnf, in order to fix build with glibc (which already defines dprintf in stdio.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91775 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-19 12:07:00 +00:00
Sanjiv Gupta
08bd440bca 1. In indirect load/store insns , the name of fsr should be emitted as INDF. 
2. include standard asmbly headers in generated asmbly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91768 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-19 08:26:25 +00:00
Douglas Gregor
cabdd7425d Fix a bunch of little errors that Clang complains about when its being pedantic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91764 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-19 07:05:23 +00:00
Daniel Dunbar
71f842d7c1 Use memset instead of bzero, its more portable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91754 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-19 03:31:50 +00:00
Sean Callanan
8ed9f51663 Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit 
incarnations), integrated into the MC framework.  

The disassembler is table-driven, using a custom TableGen backend to 
generate hierarchical tables optimized for fast decode.  The disassembler 
consumes MemoryObjects and produces arrays of MCInsts, adhering to the 
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).

The disassembler is documented in detail in

- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)

You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets.  Please let me know if you encounter any problems
with it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91749 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-19 02:59:52 +00:00
Anton Korobeynikov
e9ec6ad1ba Bump alignment requirements for windows targets to achieve compartibility with vcpp. 
Based on patch by Michael Beck!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91745 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-19 02:04:23 +00:00
Bill Wendling
b4e6a5df5d Changes from review: 
- Move DisableScheduling flag into TargetOption.h
- Move SDNodeOrdering into its own header file. Give it a minimal interface that
  doesn't conflate construction with storage.
- Move assigning the ordering into the SelectionDAGBuilder.

This isn't used yet, so there should be no functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91727 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 23:32:53 +00:00
Rafael Espindola
fda60d35c2 Fix libstdc++ build on ARM linux and part of PR5770. 
MI was not being used but it was also not being deleted, so it was kept in the garbage list. The memory itself was freed once the function code gen was done.

Once in a while the codegen of another function would create an instruction on the same address. Adding it to the garbage group would work once, but when another pointer was added it would cause an assert as "Cache" was about to be pushed to Ts.

For a patch that make us detect problems like this earlier, take a look at

http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20091214/092758.html

With that patch we assert as soon and the new instruction is added to the garbage set.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91691 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 16:59:39 +00:00
Tilmann Scheller
cfcb7997ad Fix wrong frame pointer save offset in the 64-bit PowerPC SVR4 ABI. 
Patch contributed by Ken Werner of IBM!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91681 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 13:00:34 +00:00
Tilmann Scheller
3a84dae654 Add support for calls through function pointers in the 64-bit PowerPC SVR4 ABI. 
Patch contributed by Ken Werner of IBM!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91680 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 13:00:15 +00:00
Evan Cheng
400073d546 On recent Intel u-arch's, folding loads into some unary SSE instructions can 
be non-optimal. To be precise, we should avoid folding loads if the instructions
only update part of the destination register, and the non-updated part is not
needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks
the partial register dependency and it can improve performance. e.g.

movss (%rdi), %xmm0
cvtss2sd %xmm0, %xmm0

instead of
cvtss2sd (%rdi), %xmm0

An alternative method to break dependency is to clear the register first. e.g.
xorps %xmm0, %xmm0
cvtss2sd (%rdi), %xmm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91672 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 07:40:29 +00:00
Eric Christopher
5e63990271 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91657 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 02:12:53 +00:00
Evan Cheng
c7928f8f4e Re-apply 91623 now that I actually know what I was trying to do. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91655 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 01:59:21 +00:00
Bob Wilson
5afffaed5c Handle ARM inline asm "w" constraints with 64-bit ("d") registers. 
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types.  Radar 7457110.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 01:03:29 +00:00
John McCall
c226fe3c3e Pass the error string directly to llvm_unreachable instead of the residual 
(0 && "error").  Rough consensus seems to be that g++ *should* be diagnosing
this because the pointer makes it not an ICE in c++03.  Everyone agrees that
the current standard is silly and null-pointer-ness should not be based on
ICE-ness.  Excellent fight scene in Act II, denouement weak, two stars.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91644 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 00:27:18 +00:00
Sean Callanan
108934c65d Instruction fixes, added instructions, and AsmString changes in the 
X86 instruction tables.

Also (while I was at it) cleaned up the X86 tables, removing tabs and
80-line violations.

This patch was reviewed by Chris Lattner, but please let me know if
there are any problems.

* X86*.td
	Removed tabs and fixed 80-line violations

* X86Instr64bit.td
	(IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW)
		Added
	(CALL, CMOV) Added qualifiers
	(JMP) Added PC-relative jump instruction
	(POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate
		that it is 64-bit only (ambiguous since it has no
		REX prefix)
	(MOV) Added rr form going the other way, which is encoded
		differently
	(MOV) Changed immediates to offsets, which is more correct;
		also fixed MOV64o64a to have to a 64-bit offset
	(MOV) Fixed qualifiers
	(MOV) Added debug-register and condition-register moves
	(MOVZX) Added more forms
	(ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which
		(as with MOV) are encoded differently
	(ROL) Made REX.W required
	(BT) Uncommented mr form for disassembly only
	(CVT__2__) Added several missing non-intrinsic forms
	(LXADD, XCHG) Reordered operands to make more sense for
		MRMSrcMem
	(XCHG) Added register-to-register forms
	(XADD, CMPXCHG, XCHG) Added non-locked forms
* X86InstrSSE.td
	(CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ)
		Added
* X86InstrFPStack.td
	(COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP,
	 FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1, FYL2X,
	 FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM,
	 FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE,
	 FXRSTOR)
		Added
	(FCOM, FCOMP) Added qualifiers
	(FSTENV, FSAVE, FSTSW) Fixed opcode names
	(FNSTSW) Added implicit register operand
* X86InstrInfo.td
	(opaque512mem) Added for FXSAVE/FXRSTOR
	(offset8, offset16, offset32, offset64) Added for MOV
	(NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR,
	 LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS,
	 LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT,
	 LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC,
	 CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC,
	 SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL,
	 VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD,
	 VMWRITE, VMXOFF, VMXON) Added
	(NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier
	(JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL,
	 JGE, JLE, JG, JCXZ) Added 32-bit forms
	(MOV) Changed some immediate forms to offset forms
	(MOV) Added reversed reg-reg forms, which are encoded
		differently
	(MOV) Added debug-register and condition-register moves
	(CMOV) Added qualifiers
	(AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV
	(BT) Uncommented memory-register forms for disassembler
	(MOVSX, MOVZX) Added forms
	(XCHG, LXADD) Made operand order make sense for MRMSrcMem
	(XCHG) Added register-register forms
	(XADD, CMPXCHG) Added unlocked forms
* X86InstrMMX.td
	(MMX_MOVD, MMV_MOVQ) Added forms
* X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table
	change

* X86RegisterInfo.td: Added debug and condition register sets
* x86-64-pic-3.ll: Fixed testcase to reflect call qualifier
* peep-test-3.ll: Fixed testcase to reflect test qualifier
* cmov.ll: Fixed testcase to reflect cmov qualifier
* loop-blocks.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-11.ll: Fixed testcase to reflect call qualifier
* 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call
  qualifier
* x86-64-pic-2.ll: Fixed testcase to reflect call qualifier
* live-out-reg-info.ll: Fixed testcase to reflect test qualifier
* tail-opts.ll: Fixed testcase to reflect call qualifiers
* x86-64-pic-10.ll: Fixed testcase to reflect call qualifier
* bss-pagealigned.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-1.ll: Fixed testcase to reflect call qualifier
* widen_load-1.ll: Fixed testcase to reflect call qualifier


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91638 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 00:01:26 +00:00
Jeffrey Yasskin
08ce53996e Revert r91623 to unbreak the buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91632 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 22:44:34 +00:00
Evan Cheng
73ebbd8aac Remove an unused option. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91623 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 21:23:58 +00:00
Chris Lattner
551dec592f finish cleaning up StructLayoutMap. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91612 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 20:00:21 +00:00
Ken Dyck
70d0ef1459 In LowerEXTRACT_VECTOR_ELT, force an i32 value type for PEXTWR instead of 
incrementing the simple value type of the 16-bit type, which would give the
wrong type if an intemediate MVT (such as i24) were introduced.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91602 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 15:31:52 +00:00
Johnny Chen
caedfbc6ae Renamed "tCMNZ" to "tCMNz" to be consistent with other similar namings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91571 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 23:36:52 +00:00
John McCall
6eeccd4aa4 Silence a clang warning about the deprecated (but perfectly reasonable in 
context) increment-of-bool idiom.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91564 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 20:31:50 +00:00
Jim Grosbach
587b072f23 Mark STREX* as earlyclobber for the success result register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91555 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 19:44:06 +00:00
Johnny Chen
bbc71b2904 Add encoding bits for some Thumb instructions. Plus explicitly set the top two 
bytes of Inst to 0x0000 for the benefit of the Thumb decoder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91496 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 02:32:54 +00:00
Evan Cheng
2e489c4f9d Re-enable 91381 with fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91489 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 00:53:11 +00:00
John McCall
bd13cb911c Every anonymous namespace is different. Caught by clang++. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91481 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 00:15:28 +00:00
Jeffrey Yasskin
32d7e6ebde Change indirect-globals to use a dedicated allocIndirectGV. This lets us 
remove start/finishGVStub and the BufferState helper class from the
MachineCodeEmitter interface.  It has the side-effect of not setting the
indirect global writable and then executable on ARM, but that shouldn't be
necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91464 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 22:42:46 +00:00
Johnny Chen
d68e119c0f Added encoding bits for the Thumb ISA. Initial checkin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91434 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 17:24:14 +00:00
Evan Cheng
dba6cac0d4 Fix an encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91417 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 06:49:02 +00:00
Kenneth Uildriks
76df3f398c For fastcc on x86, let ECX be used as a return register after EAX and EDX 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91410 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 03:27:52 +00:00
Evan Cheng
d7760a4905 Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91405 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 03:07:11 +00:00
Evan Cheng
ad9c0a3d8b Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91381 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 00:53:42 +00:00
Jim Grosbach
c67b556b5b nand atomic requires opposite operand ordering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91371 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 00:12:35 +00:00
Dan Gohman
2e141d744e Fix integer cast code to handle vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91362 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 23:40:38 +00:00
Johnny Chen
ec689151f2 Add encoding bits "let Inst{11-4} = 0b00000000;" to BR_JTr to disambiguate 
between BR_JTr and STREXD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91339 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 21:51:34 +00:00
Jim Grosbach
80dd125e17 v6 sync insn copy/paste error 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91333 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 21:33:32 +00:00
Jim Grosbach
7c03dbd8ed Add ARMv6 memory and sync barrier instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91329 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 21:24:16 +00:00
Johnny Chen
c474796438 Fixed encoding bits typo of ldrexd/strexd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91327 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 21:01:46 +00:00
Jim Grosbach
a36c8f2c2e Thumb2 atomic operations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91321 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 20:14:59 +00:00
Chris Lattner
cdfb302876 fix an obvious bug found by clang++ and collapse a redundant if. 
Here's the diagnostic from clang:

/Volumes/Data/dgregor/Projects/llvm/lib/Target/CppBackend/CPPBackend.cpp:989:23: warning: 'gv' is always NULL in this context
        printConstant(gv);
                      ^
1 diagnostic generated.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91318 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 19:34:32 +00:00
Jim Grosbach
a623f5a58d correct selection requirements for thumb2 vs. arm versions of the barrier intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91313 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 19:24:11 +00:00
Jim Grosbach
c219e4dd59 add Thumb2 atomic and memory barrier instruction definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91310 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 18:56:47 +00:00
Jim Grosbach
015d3b5704 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91307 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 18:36:32 +00:00
Jim Grosbach
f6b2862e81 ARM memory barrier instructions are not predicable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91305 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 18:31:20 +00:00
Jim Grosbach
d7d72d66b7 add ldrexd/strexd instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91284 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 17:02:55 +00:00
Bill Wendling
85de1e5bad Whitespace changes, comment clarification. No functional changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91274 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 06:51:19 +00:00
Jim Grosbach
c3c2354ec9 atomic binary operations up to 32-bits wide. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91260 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 04:22:04 +00:00
Anton Korobeynikov
cdcad11c94 Do not allow uninitialize access during debug printing 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91232 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-13 01:00:32 +00:00
Eli Friedman
bcae205a4b More info on this transformation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91230 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-12 23:23:43 +00:00
Eli Friedman
1555473387 Remove some stuff that's already implemented. Also, remove the note about 
merging x >u 5 and x <s 20 because it's impossible to implement.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91228 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-12 21:41:48 +00:00
Evan Cheng
dd99f3a7dc Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91223 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-12 20:03:14 +00:00
Anton Korobeynikov
2625de35ed Implement variable-width shifts. 
No testcase yet - it seems we're exposing generic codegen bugs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91221 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-12 18:55:37 +00:00
Evan Cheng
04ab19cb14 Add comment about potential partial register stall. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91220 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-12 18:55:26 +00:00
Evan Cheng
15b0d97068 Fix an obvious bug. No test case since LEA16r is not being used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91219 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-12 18:51:56 +00:00
Jim Grosbach
e801dc4a7b Framework for atomic binary operations. The emitter for the pseudo instructions 
just issues an error for the moment. The front end won't yet generate these
intrinsics for ARM, so this is behind the scenes until complete.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91200 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-12 01:40:06 +00:00
Anton Korobeynikov
8d1ffbd1ad Lower setcc branchless, if this is profitable. 
Based on the patch by Brian Lucas!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91175 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 23:01:29 +00:00
Dan Gohman
87862e77bb Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 21:31:27 +00:00
Jim Grosbach
c8f9e4fdc5 memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91150 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 20:29:53 +00:00
Anton Korobeynikov
817a46454a Honour setHasCalls() set from isel. 
This is used in some weird cases like general dynamic TLS model.
This fixes PR5723

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91144 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 19:39:55 +00:00
Johnny Chen
0291d7ed09 Store Register Exclusive should leave the source register Inst{3-0} unspecified. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91143 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 19:37:26 +00:00
Jim Grosbach
66869104dd Update properties. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91140 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 18:52:41 +00:00
Evan Cheng
656e51454a Add support to 3-addressify 16-bit instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91104 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 06:01:48 +00:00
Jim Grosbach
5278eb802f Rough first pass at compare_and_swap atomic builtins for ARM mode. Work in progress. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91090 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 01:42:04 +00:00
Jim Grosbach
cbd77d2cb1 Add instruction encoding for DMB/DSB 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91053 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-10 18:35:32 +00:00
Jim Grosbach
3728e96a6c Add memory barrier intrinsic support for ARM. Moving towards adding the atomic operations intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91003 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-10 00:11:09 +00:00
Evan Cheng
c363094e04 Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g. 
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>

iff ptr is 16-byte aligned (or can be made into 16-byte aligned).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90984 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-09 21:00:30 +00:00
Evan Cheng
7bd6478cd6 Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90925 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-09 01:53:58 +00:00
Evan Cheng
64fa4a9584 Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90922 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-09 01:36:00 +00:00
Evan Cheng
d831cda3e7 - Support inline asm 'w' constraint for 128-bit vector types. 
- Also support the 'q' NEON registers asm code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90894 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-08 23:06:22 +00:00
Anton Korobeynikov
9aa1ec87b0 Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90819 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-08 01:03:04 +00:00
Dan Gohman
d84ea47b89 Don't enable the post-RA scheduler on x86 except at -O3. In its 
current form, it is too expensive in compile time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90781 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-07 19:04:31 +00:00
Anton Korobeynikov
6bfcba7e13 Some pretty-printing 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90742 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-07 02:28:41 +00:00
Anton Korobeynikov
06ccca5f70 Add lowering of returnaddr and frameaddr intrinsics. Shamelessly stolen from x86 :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90740 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-07 02:28:10 +00:00