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873 Commits

Author SHA1 Message Date
Jim Laskey
5b5f0b7fd5 More optimal solution for loading constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22870 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 18:58:23 +00:00
Chris Lattner
d607c12e8e After selecting the instructions for a basic block, emit the instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22869 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 18:46:06 +00:00
Chris Lattner
f5fac3b4a6 remove some unused stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22866 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 18:34:00 +00:00
Nate Begeman
58dfb08319 Fix int foo() { return 65535; } by using the top 16 bits of the constant 
as the argument to LIS rather than the result of HA16(constant).

The DAG->DAG ISel was already doing the right thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22865 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 18:14:49 +00:00
Nate Begeman
a694047813 Improve ISD::Constant codegen. 
Now for int foo() { return -1; } we generate:
_foo:
        li r3, -1
        blr

instead of
_foo:
        lis r2, -1
        ori r3, r2, 65535
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22864 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 18:01:39 +00:00
Chris Lattner
0c09a411e0 replace switch stmt with an assert, generate li 0 instead of lis 0 for 0, 
to make the code follow people's expectations better.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22861 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 17:16:52 +00:00
Jim Laskey
3285aadce9 Handle loading of 0x????0000 constants with a single instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22858 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 15:52:30 +00:00
Nate Begeman
cffc32b6e2 Add support for ISD::AND, and its various optimized forms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22857 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 07:30:46 +00:00
Nate Begeman
131a880520 Maintain consistency in negating things 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22855 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 05:44:50 +00:00
Nate Begeman
0f3257a330 Implement XOR, remove a broken sign_extend_inreg case 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22854 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 05:00:13 +00:00
Nate Begeman
305a1c75cf Add a bunch more simple nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22851 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 03:04:18 +00:00
Nate Begeman
6a7d61179c Add a couple more nodes that are easy to handle 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22850 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 00:53:47 +00:00
Nate Begeman
b5a0668d43 Be fruitful and multiply! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22849 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 00:21:41 +00:00
Jim Laskey
b454cfd453 Better version of isIntImmediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22848 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 00:15:15 +00:00
Nate Begeman
26653500bb Teach the DAG->DAG ISel about FNEG, and how it can be used to invert 
several of the PowerPC opcodes that come in both negated and non-negated
forms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22845 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 23:46:35 +00:00
Chris Lattner
8482dd894d add a beta option for turning on dag->dag isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22837 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 19:33:30 +00:00
Chris Lattner
a5a91b1026 initial hack at a dag->dag instruction selector. This is obviously woefully 
incomplete, but it is a start.  It handles basic argument/retval stuff, immediates,
add and sub.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22836 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 19:33:03 +00:00
Chris Lattner
d1c4626e14 add prototype, remove dead proto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22835 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 19:32:03 +00:00
Chris Lattner
6d9aed4f8f Fix a few small typos I noticed when converting this over to the DAG->DAG 
selector.  Also, there is no difference between addSImm and addImm, so just
use addImm, folding some branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22819 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 01:25:14 +00:00
Jim Laskey
a033b4d8eb Removed UINT_TO_FP and SINT_TO_FP from ISel outright. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22818 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 01:14:38 +00:00
Jim Laskey
361ca5c927 Remove ISel code generation for UINT_TO_FP and SINT_TO_FP. Now asserts if 
marked as legal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22816 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 00:41:40 +00:00
Jim Laskey
ad23c9d4f2 Make UINT_TO_FP and SINT_TO_FP use generic expansion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22815 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 00:40:22 +00:00
Nate Begeman
456f1e890c Implement a couple improvements: 
Remove dead code in ISD::Constant handling
Add support for add long, imm16

We now codegen 'long long foo(long long a) { return ++a; }'
as:
addic r4, r4, 1
addze r3, r3
blr

instead of:
li r2, 1
li r5, 0
addc r2, r4, r2
adde r3, r3, r5
blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22811 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 00:20:08 +00:00
Chris Lattner
a8cd01524f updates for changes in nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22808 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 21:58:15 +00:00
Nate Begeman
7cbd525ba8 Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty 
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 19:49:35 +00:00
Chris Lattner
7c5a3d390a Pull the LLVM -> DAG lowering code out of the pattern selector so that it 
can be shared with the DAG->DAG selector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22799 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 17:14:42 +00:00
Chris Lattner
b0096bd19d Turn loop strength reduction on by default. 
Only run createLowerConstantExpressionsPass for the simple isel.  The DAG
isel has no need for it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22794 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-15 23:47:04 +00:00
Jim Laskey
ea0617a023 Broke 80 column rule. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22792 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-15 17:35:26 +00:00
Jim Laskey
30679e691d Changed code gen for int to f32 to use rounding. This makes FP results 
consistent with gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22791 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-15 17:14:19 +00:00
Nate Begeman
2d56e72f09 Fix last night's PPC32 regressions by 
1. Not selecting the false value of a select_cc in the false arm, which
   isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
   Expander.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22789 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-14 18:38:32 +00:00
Nate Begeman
5a01481585 Make FP_TO_UINT Illegal. This allows us to generate significantly better 
codegen for FP_TO_UINT by using the legalizer's SELECT variant.

Implement a codegen improvement for SELECT_CC, selecting the false node in
the MBB that feeds the phi node.  This allows us to codegen:
void foo(int *a, int b, int c) { int d = (a < b) ? 5 : 9; *a = d; }
as:
_foo:
        li r2, 5
        cmpw cr0, r4, r3
        bgt .LBB_foo_2  ; entry
.LBB_foo_1:     ; entry
        li r2, 9
.LBB_foo_2:     ; entry
        stw r2, 0(r3)
        blr

insted of:
_foo:
        li r2, 5
        li r5, 9
        cmpw cr0, r4, r3
        bgt .LBB_foo_2  ; entry
.LBB_foo_1:     ; entry
        or r2, r5, r5
.LBB_foo_2:     ; entry
        stw r2, 0(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22784 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-14 01:17:16 +00:00
Nate Begeman
8f331325a2 Remove support for 64b PPC, it's been broken for a long time. It'll be 
back once a DAG->DAG ISel exists.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22778 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-13 05:59:16 +00:00
Jim Laskey
cf083e312c Fix for 2005-08-12-rlwimi-crash.ll. Make allowance for masks being shifted to 
zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22773 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-12 23:52:46 +00:00
Jim Laskey
847c3a976b 1. This changes handles the cases of (~x)&y and x&(~y) yielding ANDC, and 
(~x)|y and x|(~y) yielding ORC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22771 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-12 23:38:02 +00:00
Jim Laskey
191cf943e6 1. Added the function isOpcWithIntImmediate to simplify testing of operand with 
specified opcode and an integer constant right operand.

2. Modified ISD::SHL, ISD::SRL, ISD::SRA to use rlwinm when applied after a mask.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22761 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-11 21:59:23 +00:00
Chris Lattner
2b48bc6f95 Tidied up the use of dyn_cast<ConstantSDNode> by using isIntImmediate more. 
Patch by Jim Laskey.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22760 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-11 17:56:50 +00:00
Chris Lattner
54abfc5ee4 Use a more efficient method of creating integer and float virtual registers 
(avoids an extra level of indirection in MakeReg).

  defined MakeIntReg using RegMap->createVirtualRegister(PPC32::GPRCRegisterClass)
  defined MakeFPReg using RegMap->createVirtualRegister(PPC32::FPRCRegisterClass)

  s/MakeReg(MVT::i32)/MakeIntReg/
  s/MakeReg(MVT::f64)/MakeFPReg/

Patch by Jim Laskey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22759 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-11 17:15:31 +00:00
Nate Begeman
c24d484b78 Make SELECT illegal on PPC32, switch to using SELECT_CC, which more closely 
reflects what the hardware is capable of.  This significantly simplifies
the CC handling logic throughout the ISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22756 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 20:52:09 +00:00
Chris Lattner
b4138c475e Changes for PPC32ISelPattern.cpp 
1. Clean up how SelectIntImmediateExpr handles use counts.
2. "Subtract from" was not clearing hi 16 bits.

Patch by Jim Laskey


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22754 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 18:11:33 +00:00
Chris Lattner
df706e3f0c Changed the XOR case to use the isOprNot predicate. 
Patch by Jim Laskey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22750 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 16:35:46 +00:00
Chris Lattner
0d7d99fd44 1. Refactored handling of integer immediate values for add, or, xor and sub. 
New routine: ISel::SelectIntImmediateExpr
  2. Now checking use counts of large constants.  If use count is > 2 then drop
  thru so that the constant gets loaded into a register.
  Source:

int %test1(int %a) {
entry:
       %tmp.1 = add int %a,      123456789      ; <int> [#uses=1]
       %tmp.2 = or  int %tmp.1,  123456789      ; <int> [#uses=1]
       %tmp.3 = xor int %tmp.2,  123456789      ; <int> [#uses=1]
       %tmp.4 = sub int %tmp.3, -123456789      ; <int> [#uses=1]
       ret int %tmp.4
}

Did Emit:

       .machine ppc970


       .text
       .align  2
       .globl  _test1
_test1:
.LBB_test1_0:   ; entry
       addi r2, r3, -13035
       addis r2, r2, 1884
       ori r2, r2, 52501
       oris r2, r2, 1883
       xori r2, r2, 52501
       xoris r2, r2, 1883
       addi r2, r2, 52501
       addis r3, r2, 1883
       blr


Now Emits:

       .machine ppc970


       .text
       .align  2
       .globl  _test1
_test1:
.LBB_test1_0:   ; entry
       lis r2, 1883
       ori r2, r2, 52501
       add r3, r3, r2
       or r3, r3, r2
       xor r3, r3, r2
       add r3, r3, r2
       blr

Patch by Jim Laskey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22749 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 16:34:52 +00:00
Chris Lattner
979a21e766 Fix a bug compiling: select (i32 < i32), f32, f32 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22747 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 03:40:09 +00:00
Chris Lattner
c7e18a10d4 add a optimization note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22732 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-09 22:30:57 +00:00
Chris Lattner
88ac32ca26 Update the targets to the new SETCC/CondCodeSDNode interfaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22729 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-09 20:21:10 +00:00
Chris Lattner
59b21c25d4 Minor cleanup patch, no functionality changes. Written by Jim Laskey. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22727 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-09 18:29:55 +00:00
Chris Lattner
2f46055cc2 Fix CodeGen/Generic/div-neg-power-2.ll, a regression from last night. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22726 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-09 18:08:41 +00:00
Nate Begeman
d3ded2d8a7 Factor out some common code, and be smarter about when to emit load hi/lo 
code sequences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22719 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-08 22:22:56 +00:00
Chris Lattner
0045776d33 Remove getImmediateForOpcode, which is now dead. 
Patch by Jim Laskey.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22716 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-08 21:34:13 +00:00
Chris Lattner
fd78454477 Add new immediate handling support for mul/div. 
Patch by Jim Laskey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22715 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-08 21:33:23 +00:00
Chris Lattner
5b90917400 Add support for OR/XOR/SUB immediates that are handled with the new immediate 
way.  This allows ORI/ORIS pairs, for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22714 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-08 21:30:29 +00:00
Chris Lattner
2f57c4da21 Modify the ISD::AND opcode case to use new immediate constant predicates. 
Includes wider support for rotate and mask cases.

Patch by Jim Laskey.

I've requested that Jim add new regression tests the newly handled cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22712 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-08 21:24:57 +00:00
Chris Lattner
39c6896d22 Modify the ISD::ADD opcode case to use new immediate constant predicates. 
Includes support for 32-bit constants using addi/addis.

Patch by Jim Laskey.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22711 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-08 21:21:03 +00:00
Chris Lattner
8fd1980ce6 Modify existing support functions to use new immediate constant predicates. 
Patch by Jim Laskey


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22710 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-08 21:12:35 +00:00
Chris Lattner
cf1cf1886e Add support predicates for future immediate constant changes. 
Patch by Jim Laskey


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22709 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-08 21:10:27 +00:00
Chris Lattner
02efa6c140 Move IsRunOfOnes to a more logical place and rename to a proper predicate form 
(lowercase isXXX).

Patch by Jim Laskey.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22708 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-08 21:08:09 +00:00
Nate Begeman
394cd13ba3 Fix JIT encoding of ppc mfocrf instruction; the operands were reversed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22707 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-08 20:04:52 +00:00
Chris Lattner
3c304a3ba1 Consolidate the GPOpt stuff to all use the Subtarget, instead of still 
depending on the command line option.  Now the command line option just
sets the subtarget as appropriate.  G5 opts will now default to on on
G5-enabled nightly testers among other machines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22688 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-05 22:05:03 +00:00
Chris Lattner
ba25365140 Enable gp optimizations by default when available, even when a target triple 
is available, since the target triple doesn't specify whether to use gpopts
or not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22685 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-05 21:25:13 +00:00
Chris Lattner
6281ae4bf0 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22681 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-05 19:18:32 +00:00
Chris Lattner
4e624ecd07 don't crash when running the PPC backend on non-ppc hosts without specifying 
a subtarget.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22677 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-05 16:17:22 +00:00
Nate Begeman
99558806f8 Hack to naturally align doubles in the constant pool. Remove this once we 
know what The Right Thing To Do is.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22660 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-04 21:04:09 +00:00
Nate Begeman
3d72d14887 Use the new subtarget support to automatically choose the correct ABI 
and asm printer for PowerPC if one is not specified.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22659 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-04 20:49:48 +00:00
Nate Begeman
8c00f8cdc7 Add Subtarget support to PowerPC. Next up, using it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22644 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-04 07:12:09 +00:00
Misha Brukman
0a3f677f09 Fix grammar: apostrophe-s ('s) is possessive, not plural; also iff vs. if. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22619 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-03 17:29:52 +00:00
Chris Lattner
a34cbcc50a minor capitalization thing, patch by Jim Laskey 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22617 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-03 16:52:22 +00:00
Chris Lattner
c0d590b6f2 This hunk accidentally got dropped. Patch by Jim Laskey 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22595 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-02 19:30:55 +00:00
Chris Lattner
0561b3ff9f Update to use the new MathExtras.h support for log2 computation. 
Patch contributed by Jim Laskey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22594 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-02 19:26:06 +00:00
Chris Lattner
3f270130b5 add a pass name to make debugging dumps nicer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22588 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-02 19:07:49 +00:00
Jeff Cohen
d29b6aa608 Keep tabs and trailing spaces out. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22565 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-30 18:33:25 +00:00
Andrew Lenharth
422f3d58a8 turn off GOT on archs that didn't use it (not that it appeard to harm them much with it on) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22553 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-29 23:32:02 +00:00
Chris Lattner
988b1dd608 Eliminate an extra copy from R1 that Nate noticed on function calls that 
have to write arguments to the stack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22536 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-28 05:23:43 +00:00
Chris Lattner
4015ea8711 Specify the correct number of operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22535 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-28 04:42:11 +00:00
Nate Begeman
2a05c8e260 Fold constant adds into loads and stores to frame indices. 
For the following code:
double %ext(int %A.0__, long %A.1__) {
        %A_addr = alloca %typedef.DComplex              ; <%typedef.DComplex*> [#uses=2]
        %tmp.1 = cast %typedef.DComplex* %A_addr to int*                ; <int*> [#uses=1]
        store int %A.0__, int* %tmp.1
        %tmp.2 = getelementptr %typedef.DComplex* %A_addr, int 0, uint 1                ; <double*> [#uses=2]
        %tmp.3 = cast double* %tmp.2 to long*           ; <long*> [#uses=1]
        store long %A.1__, long* %tmp.3
        %tmp.5 = load double* %tmp.2            ; <double> [#uses=1]
        ret double %tmp.5
}

We now generate:
_ext:
.LBB_ext_0:     ;
        stw r3, -12(r1)
        stw r4, -8(r1)
        stw r5, -4(r1)
        lfd f1, -8(r1)
        blr

Instead of:
_ext:
.LBB_ext_0:     ;
        stw r3, -12(r1)
        addi r2, r1, -12
        stw r4, 4(r2)
        stw r5, 8(r2)
        lfd f1, 4(r2)
        blr

This also fires hundreds of times on MultiSource.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22533 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-28 03:02:05 +00:00
Nate Begeman
3dee17581c Fix some comments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22530 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 23:11:27 +00:00
Jeff Cohen
00b16889ab Eliminate all remaining tabs and trailing spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 06:12:32 +00:00
Nate Begeman
54eed36da5 Implement the optimization for the Red Zone on Darwin. This removes the 
unnecessary SP manipulation in leaf routines that don't need it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22522 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 06:06:29 +00:00
Jeff Cohen
9eb59ec548 Eliminate tabs and trailing spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22520 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 05:53:44 +00:00
Chris Lattner
b65975a6ed add a note about the red zone 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22518 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-26 19:07:51 +00:00
Chris Lattner
2e00d7d0ae Wrap some long lines, fix emission of weak global variables 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22517 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-26 19:03:27 +00:00
Nate Begeman
4ad870ddcc Update the PPC readme 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22516 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-26 18:59:06 +00:00
Nate Begeman
7b4f0a81ff Fix an optimization put in for accessing static globals. This obviates 
the need to build PIC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22512 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-25 21:15:28 +00:00
Chris Lattner
aa68f7fa09 PowerPC no-pic code is not quite ready for prime-time 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22507 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-22 22:58:34 +00:00
Andrew Lenharth
908bc862d5 update interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22498 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-22 20:49:37 +00:00
Nate Begeman
2497e6391f Support building non-PIC 
Remove the LoadHiAddr pseudo-instruction.
Optimization of stores to and loads from statics.
Force JIT to use new non-PIC codepaths.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22494 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-21 20:44:43 +00:00
Chris Lattner
2130c08930 revert to using 4-byte alignment for doubles, as specified by the ABI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22493 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-21 19:17:18 +00:00
Nate Begeman
18ed029a7b Support assembling fsqrt on darwin. This will be implemented better when 
PowerPC gets subtarget support up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22489 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-21 01:25:49 +00:00
Nate Begeman
adeb43ddf4 Generate mfocrf when targeting g5. Generate fsqrt/fsqrts when targetin g5. 
8-byte align doubles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22486 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-20 22:42:00 +00:00
Nate Begeman
a3fd400fa8 Integrate SelectFPExpr into SelectExpr. This gets PPC32 closer to being 
automatically generated from a target description.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22470 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-19 16:51:05 +00:00
Nate Begeman
63b3f9acae Remove some code that moved to the generic asm printer a long time ago. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22407 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-12 18:34:15 +00:00
Chris Lattner
bce81ae51e Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode. 
This is the last MVTSDNode.

This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.

Also, remove some uses of dyn_cast that should really be cast (which is
cheaper in a release build).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22368 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-10 01:56:13 +00:00
Chris Lattner
9fadb4c1c0 Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22366 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-10 00:29:18 +00:00
Nate Begeman
72b286b0a0 Add support for assembling .s files on mac os x for intel 
Add support for running bugpoint on mac os x for intel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22351 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-08 00:23:26 +00:00
Chris Lattner
e0fe225e89 Make several cleanups to Andrews varargs change: 
1. Pass Value*'s into lowering methods so that the proper pointers can be
   added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
   chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
4. Now that we have Value*'s available in the lowering methods, pass them
   into any load/stores from the valist that are emitted


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22339 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-05 19:58:54 +00:00
Chris Lattner
f84a2ace5e Fix PowerPC varargs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22335 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-05 17:48:31 +00:00
Chris Lattner
c1671e2d7d Varargs is apparently currently broken on PPC. This hacks it so that it 
is at least overloading the right virtual methods.  The implementations
are currently wrong though.  This fixes Ptrdist/bc, but not other programs
(e.g. siod).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22326 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-01 23:11:56 +00:00
Chris Lattner
0431c96cec Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile 
interface.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22282 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-25 02:48:37 +00:00
Andrew Lenharth
213e557cef If we support structs as va_list, we must pass pointers to them to va_copy 
See last commit for LangRef, this implements it on all targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22273 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-22 21:04:42 +00:00
Andrew Lenharth
558bc88a00 core changes for varargs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22254 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-18 18:34:52 +00:00
Reid Spencer
4b828e6384 Clean up some uninitialized variables and missing return statements that 
GCC 4.0.0 compiler (sometimes incorrectly) warns about under release build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22249 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-18 17:37:34 +00:00
Chris Lattner
b157f858a2 silence incredibly braindead GCC 4 warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22246 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-17 13:44:07 +00:00
Nate Begeman
439009c81e Commit fix for generating conditional branch pseudo instructions that 
avoids dereferencing the end() iterator when selecting the fallthrough
block.  This requires an ilist change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22212 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-15 18:22:43 +00:00
Nate Begeman
a43b176f51 Commit a small improvement that is already in the x86 and ia64 backends to 
not generate unnecessary register copies.  This improves compile time by
2-5% depending on the test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22210 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-14 03:55:23 +00:00
Nate Begeman
ac609ddf82 Fix a memory smasher caught by Mac OS X's debug malloc library. We were 
incorrectly using an iterator after it was invalid.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22207 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-12 23:50:33 +00:00
Reid Spencer
eae435de83 For PR572: 
Undefine the PPC symbol which is defined by Linux/PPC (erroneously) so it
doesn't pollute the user namespace and clash with our namespace declarations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22202 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-08 17:44:48 +00:00
Nate Begeman
b2c4bf3ff6 Handle some more real world cases of rlwimi. These don't come up that 
regularly in "normal" code, but for things like software graphics, they
make a big difference.

For the following code:
unsigned short Trans16Bit(unsigned srcA,unsigned srcB,unsigned alpha)
{
	unsigned tmpA,tmpB,mixed;
	tmpA = ((srcA & 0x03E0) << 15) | (srcA & 0x7C1F);
	tmpB = ((srcB & 0x03E0) << 15) | (srcB & 0x7C1F);
	mixed = (tmpA * alpha) + (tmpB * (32 - alpha));
	return ((mixed >> 5) & 0x7C1F) | ((mixed >> 20) & 0x03E0);
}

We now generate:
_Trans16Bit:
.LBB_Trans16Bit_0:      ; entry
        andi. r2, r4, 31775
        rlwimi r2, r4, 15, 7, 11
        subfic r4, r5, 32
        mullw r2, r2, r4
        andi. r4, r3, 31775
        rlwimi r4, r3, 15, 7, 11
        mullw r3, r4, r5
        add r2, r2, r3
        srwi r3, r2, 5
        andi. r3, r3, 31775
        rlwimi r3, r2, 12, 22, 26
        blr

Instead of:
_Trans16Bit:
.LBB_Trans16Bit_0:      ; entry
        slwi r2, r4, 15
        rlwinm r2, r2, 0, 7, 11
        andi. r4, r4, 31775
        or r2, r2, r4
        subfic r4, r5, 32
        mullw r2, r2, r4
        slwi r4, r3, 15
        rlwinm r4, r4, 0, 7, 11
        andi. r3, r3, 31775
        or r3, r4, r3
        mullw r3, r3, r5
        add r2, r2, r3
        srwi r3, r2, 5
        andi. r3, r3, 31775
        srwi r2, r2, 20
        rlwimi r3, r2, 0, 22, 26
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22201 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-08 04:14:27 +00:00
Chris Lattner
fc87928ebb PPC "branch and link" instructions are branches in the PPC sense, but not 
in the LLVM code generator sense (they are calls).  Don't mark them as such,
which fixes the regressions on the ppc tester last night


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22065 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-15 20:11:44 +00:00
Chris Lattner
022ed327bd Fix andrews changes to fit in 80 columns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22064 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-15 19:54:37 +00:00
Chris Lattner
b5d8e6ece6 treat TAILCALL nodes identically to CALL nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21977 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 20:29:26 +00:00
Chris Lattner
adf6a965a3 Add an isTailCall flag to LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21958 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 18:50:42 +00:00
Chris Lattner
32f3cf612e Realize that we don't support fmod directly, fixing CodeGen/Generic/print-arith-fp.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21939 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 16:20:22 +00:00
Chris Lattner
16cd04d26c rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21915 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 23:24:06 +00:00
Chris Lattner
c57f682113 Pass in Calling Convention to use into LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21899 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 19:56:45 +00:00
Chris Lattner
9bce0f92c3 These targets don't like setcc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21884 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 02:06:00 +00:00
Nate Begeman
d7c4a4a6c0 Necessary changes to codegen cttz efficiently on PowerPC 
1. Teach LegalizeDAG how to better legalize CTTZ if the target doesn't have
   CTPOP, but does have CTLZ
2. Teach PPC32 how to do sub x, const -> add x, -const for valid consts
3. Teach PPC32 how to do and (xor a, -1) b -> andc b, a
4. Teach PPC32 that ISD::CTLZ -> PPC::CNTLZW


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21880 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-11 23:43:56 +00:00
Chris Lattner
cafb67b250 fold and (shl X, C1), C2 -> rlwinm when possible. Many other cases are possible, 
include and (srl)    and the inverses (shl and) etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21820 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 17:39:48 +00:00
Andrew Lenharth
b5884d3116 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21693 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-04 19:25:37 +00:00
Andrew Lenharth
691ef2ba06 Implement count leading zeros (ctlz), count trailing zeros (cttz), and count 
population (ctpop).  Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.

More coming soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21676 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-03 17:19:30 +00:00
Chris Lattner
08cae7f519 Doesn't support these nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21634 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-30 04:26:56 +00:00
Chris Lattner
17234b7d78 This target doesn't support the FSIN/FCOS/FSQRT nodes yet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21633 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-30 04:26:06 +00:00
Andrew Lenharth
2d86ea21dd Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends. 
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*.  Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21599 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-27 20:10:01 +00:00
Misha Brukman
7847fcac17 Convert tabs to spaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21452 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-22 17:54:37 +00:00
Misha Brukman
b5f662fa03 Remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21425 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 23:30:14 +00:00
Chris Lattner
837a521c48 Match another form of eqv 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21413 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 21:09:11 +00:00
Chris Lattner
f577c6122f Add completely untested support for mtcrf/mfcrf encoding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21353 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:41:52 +00:00
Chris Lattner
14522e31d9 switch over the rest of the formats that use RC to use isDOT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21352 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:21:30 +00:00
Chris Lattner
883059fb58 Convert the XForm instrs and XSForm instruction over to use isDOT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21351 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:15:18 +00:00
Chris Lattner
97a2d42999 Now that the ppc64 and vmx operands of I are always 0, forward substitute 
them away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21350 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:05:22 +00:00
Chris Lattner
a611ab72ca convert over bform and iform instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21349 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:00:59 +00:00
Chris Lattner
57226fbc7b Convert over DForm and DSForm instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21348 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:59:28 +00:00
Chris Lattner
e19d0b1130 Convert XLForm and XForm instructions over to use PPC64 when appropriate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21347 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:51:30 +00:00
Chris Lattner
5035cef732 Convert XO XS and XFX forms to use isPPC64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21346 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:40:07 +00:00
Chris Lattner
0bdc6f1fd4 Turn PPC64 and VMX into classes that can be added to instructions instead of 
bits that must be passed up the inheritance hierarchy.  Convert MForm and AForm
instructions over


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21345 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:32:54 +00:00
Nate Begeman
1cbf3abbb8 Next round of PPC CR optimizations. For the following code: 
int %bar(float %a, float %b, float %c, float %d) {
entry:
    %tmp.1 = setlt float %a, %d
    %tmp.2 = setlt float %b, %d
    %or = or bool %tmp.1, %tmp.2
    %tmp.3 = setgt float %c, %d
    %tmp.4 = or bool %or, %tmp.3
    %tmp.5 = and bool %tmp.4, true
    %retval = cast bool %tmp.5 to int
    ret int %retval
}

We now emit:

_bar:
.LBB_bar_0:     ; entry
        fcmpu cr0, f1, f4
        fcmpu cr1, f2, f4
        cror 0, 0, 4
        fcmpu cr1, f3, f4
        cror 28, 0, 5
        mfcr r2
        rlwinm r3, r2, 29, 31, 31
        blr

Instead of:

_bar:
.LBB_bar_0:     ; entry
        fcmpu cr7, f1, f4
        mfcr r2
        rlwinm r2, r2, 29, 31, 31
        fcmpu cr7, f2, f4
        mfcr r3
        rlwinm r3, r3, 29, 31, 31
        or r2, r2, r3
        fcmpu cr7, f3, f4
        mfcr r3
        rlwinm r3, r3, 30, 31, 31
        or r3, r2, r3
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21321 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-18 07:48:09 +00:00
Nate Begeman
16ac709c63 Change codegen for setcc to read the bit directly out of the condition 
register.  Added support in the .td file for the g5-specific variant
  of cr -> gpr moves that executes faster, but we currently don't
  generate it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21314 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-18 02:43:24 +00:00
Chris Lattner
477d1de9b2 Handle ExternalSymbol operands in the PPC JIT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21312 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-18 00:46:10 +00:00
Nate Begeman
f8b02949e3 Make pattern isel default for ppc 
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
  0 == off
  1 == on
  2 == target default


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21309 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-15 22:12:16 +00:00
Nate Begeman
7bfba7d5e3 Implement multi-way branches through logical ops on condition registers. 
This can generate considerably shorter code, reducing the size of crafty
by almost 1%.  Also fix the printing of mcrf.  The code is currently
disabled until it gets a bit more testing, but should work as-is.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21298 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 09:45:08 +00:00
Nate Begeman
ef7288c824 Add the necessary support to codegen condition register logical ops with 
register allocated condition registers.  Make sure that the printed
  output is gas compatible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21295 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 03:20:38 +00:00
Nate Begeman
1b7f7fbf95 Start allocating condition registers. Almost all explicit uses of CR0 are 
now gone.  Next step is to get rid of the remaining ones and then start
allocating bools to CRs where appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21294 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 23:15:44 +00:00
Nate Begeman
3664ceffdd Implement the fold shift X, zext(Y) -> shift X, Y at the target level, 
where it is safe to do so.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21293 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 22:14:14 +00:00
Nate Begeman
eea805e74c Disbale the broken fold of shift + sz[ext] for now 
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
  always produces zero or one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21291 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 21:23:31 +00:00
Chris Lattner
519f40ba4e remove one more occurance of this that snuck in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21271 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:46:17 +00:00
Chris Lattner
c951d87fe9 Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit 
andi instructions instead of rlwinm instructions for zero extend, but they
seem like they would take the same time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21268 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:40:26 +00:00
Nate Begeman
b882752bd0 Fold shift by size larger than type size to undef 
Make llvm undef values generate ISD::UNDEF nodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 23:12:17 +00:00
Nate Begeman
9765c25eb7 Implement setcc op, -1 sequences 
Remove dead setcc op, 0 sequences
Coming later: generalization of op, imm


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21260 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 21:22:28 +00:00
Nate Begeman
7af0248af4 Initial support for allocation condition registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21246 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 07:04:16 +00:00
Nate Begeman
9f833d3085 Implement bitfield clears 
Implement divide by negative power of two


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21240 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 00:10:02 +00:00
Nate Begeman
ef9531efed Update PPC readme. Remove things that are done or aren't ppc specific 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21232 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 20:48:57 +00:00
Chris Lattner
5eef9f3bc9 ORo sets CR0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21227 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 15:03:48 +00:00
Chris Lattner
6b4ea2cfa2 Revert the previous patch, which I didn't mean to check in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21226 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 15:03:41 +00:00
Chris Lattner
26d4fdb968 Fix a minor bug (ORo didn't mark that it set CR0). 
Refactor how . instructions are handled.  In particular, instead of passing
the RC flag all the way up the inheritance hierarchy, just make a new tblgen
class 'DOT' which can be added to an instruction definition.

For example, instead of this:

-def AND  : XForm_6<31,  28, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
-let Defs = [CR0] in
-def ANDo : XForm_6<31,  28, 1, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
-                   "and. $rA, $rS, $rB">;

We now have this:

+def AND  : XForm_6<31,  28, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
                    "and $rA, $rS, $rB">;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21225 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 15:01:39 +00:00
Nate Begeman
c7bd4827cd Add recording variants of ISD::AND and ISD::OR. This kills almost 1000 
(1.5%) instructions in 186.crafty


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21222 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 06:34:10 +00:00
Nate Begeman
709c806a1e Fix another fixme: factor out the constant fp generation code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21207 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 06:06:10 +00:00
Nate Begeman
c5b1cd22b5 Fix 64 bit argument loading that straddles the args in regs / args on stack 
boundary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21206 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 05:53:14 +00:00
Nate Begeman
340f290783 Remove unnecessary Implicit Defs. Since r0 is not in allocation, we do not 
have to inform the register allocator it might be stepped on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21202 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 03:59:42 +00:00
Nate Begeman
27499e3f1b Make sure that BRCOND branches can be converted into long branches too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21198 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 01:48:29 +00:00
Nate Begeman
a0e3e9474f Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21197 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 01:14:13 +00:00
Chris Lattner
51d2ed976f rename getPPCOpcodeForSetCCNumber -> getPPCOpcodeForSetCCOpode to be more 
correct.  Remove the EmitComparison retvalue, as it is always the first arg.

Fix a place where we incorrectly passed in the setcc opcode instead of the
setcc number, causing us to miscompile crafty.  Crafty now works!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21195 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 01:03:31 +00:00
Nate Begeman
706471e291 fix ISD::BRCONDTWOWAY codegen to not deference the end() iterator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21193 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 23:35:05 +00:00
Chris Lattner
9184bfbbf4 Fix CodeGen/Generic/2005-05-09-GlobalInPHI.ll, which was reduced from 254.gap. 
This caused the "use before a def" assertion on some programs.

With this patch, 254.gap now passes with the PPC backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21191 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 22:05:17 +00:00
Chris Lattner
91277ea45c do not set the root to null if an argument is dead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21188 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 21:23:24 +00:00
Nate Begeman
cd08e4cb7e Add rlwnm instruction for variable rotate 
Generate rotate left/right immediate
Generate code for brcondtwoway
Use new livein/liveout functionality


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21187 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 20:09:12 +00:00
Chris Lattner
27ee3a332d Fix a crash on 173.applu by asking for a constant bigger than 32-bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21185 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 19:47:21 +00:00
Chris Lattner
f429a3e0f6 Switch this instruction selector over to using liveins and liveouts, eliminating 
implicit defs on entry to the function.  yaay :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21184 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 16:32:30 +00:00
Nate Begeman
af4ab1b103 Optimize FSEL a bit for fneg arguments. This fixes the recently added test 
case so that we emit

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fsel f1, f1, f3, f2
        blr

instead of:

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fneg f0, f1
        fneg f0, f0
        fsel f1, f0, f3, f2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21177 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 09:33:07 +00:00
Chris Lattner
644db4ec5f This target does not yet support ISD::BRCONDTWOWAY 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21163 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 03:22:30 +00:00
Nate Begeman
e88aa5b4d1 64b: Expand S/UREM 
32b: No longer pattern match fneg(fsub(fmul)) as fnmsub
     Pattern match fsub a, mul(b, c) as fnmsub
     Pattern match fadd a, mul(b, c) as fmadd
Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8%


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21161 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 03:05:51 +00:00
Nate Begeman
a9532d5dde Fix 64b shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21159 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-08 23:45:01 +00:00
Nate Begeman
f3f2d6d378 Match Mac OS X 64 bit calling conventions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21157 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-08 21:26:05 +00:00
Nate Begeman
7e7fadd2ea Optimized code sequences for setcc reg, 0 
Optimized code sequence for (a < 0) ? b : 0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21150 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-07 20:30:01 +00:00
Chris Lattner
cbd06fc3d7 PowerPC zero extends setcc results 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21147 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-07 19:41:49 +00:00
Nate Begeman
7ddecb4186 Pattern match bitfield insert, which helps shift long by immediate, among 
other things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21127 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 23:51:40 +00:00
Nate Begeman
020ef42c19 Fix some shift bugs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21126 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 22:42:08 +00:00
Nate Begeman
27b4c23b80 Fixed version of optimized integer divide is now fixed. Calculate the 
quotient, not the remainder.  Also, make sure to remove the old div operand
from the ExprMap and let SelectExpr insert the new one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21111 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 06:44:57 +00:00
Nate Begeman
8f52980f03 Turn off the div -> mul optimization until it works correctly 100% of the 
time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21105 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 03:36:33 +00:00
Nate Begeman
815d6dac1e Add support for MULHS and MULHU nodes 
Have LegalizeDAG handle SREM and UREM for us
Codegen SDIV and UDIV by constant as a multiply by magic constant instead
of integer divide, which is very slow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21104 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 00:25:27 +00:00
Nate Begeman
ad5f65c74b Behold, rlwinm with certain immediate arguments is printed as the much more 
readable slwi or srwi (shift left/right word immediate).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21099 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 18:19:50 +00:00
Nate Begeman
a3829d5580 Fix cut & paste errors (32->64), and codegen float->int more optimally. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21098 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 17:32:30 +00:00
Nate Begeman
d3e6b94020 Remove 64 bit simple ISel, it never worked correctly 
Add initial (buggy) implementation of 64 bit pattern ISel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21096 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 08:51:15 +00:00
Nate Begeman
c8c5c8f0fa Back out the previous change to SelectBranchCC, since there are cases it 
could miscompile.  A correct solution will be found in the near future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21095 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 04:32:16 +00:00
Nate Begeman
439b444cad Rename canUseAsImmediateForOpcode to getImmediateForOpcode to better 
indicate that it is not a boolean function.
Properly emit the pseudo instruction for conditional branch, so that we
  can fix up conditional branches whose displacements are too large.
Reserve the right amount of opcode space for said pseudo instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21094 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 04:22:58 +00:00
Nate Begeman
80196b1331 Implement SDIV by power of 2 as srawi/addze rather than load imm, divw 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21091 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 00:15:08 +00:00
Nate Begeman
93075ec0a5 Pattern match fp mul-add, mul-sub, neg-mul-add, and neg-mul-sub 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21090 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 23:40:36 +00:00
Nate Begeman
178bb34ee5 Add support for multiply-add, multiply-sub, and their negated versions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21089 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 23:01:51 +00:00
Nate Begeman
d860aa62ac Make sure that arg regs used by the call instruction are marked as such, so 
that regalloc doesn't cleverly reuse early arg regs loading later arg regs.
This fixes almost all outstanding failures in the pattern isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21086 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 22:17:48 +00:00
Nate Begeman
04ec80173b Remove unnecessary register copy now that regalloc is fixed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21085 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 21:48:13 +00:00
Nate Begeman
c3e2db407e i1 loads should also be from the low byte of the argument word. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21077 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 09:09:00 +00:00
Nate Begeman
e584668f04 Fix i64 return, fix CopyFromReg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21076 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 06:52:38 +00:00
Nate Begeman
6644d4c933 Full varargs support. All of UnitTests now passes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21070 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 23:11:17 +00:00
Nate Begeman
4ec0cbdf15 Pass the correct value for the chain to the store 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21066 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 22:22:56 +00:00
Nate Begeman
fa55470e39 Fix SHL_PARTS 
Start implementation of integer varargs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21065 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 22:13:27 +00:00
Nate Begeman
aa73a9f16f Keeping up with the Joneses. 
Implement not, nor, nand, and eqv


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21060 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 11:20:20 +00:00
Nate Begeman
27eeb00a1a Set shift amount to Extend 
Implement ISD::FABS and ISD::FNEG nodes
Implement SHL_PARTS, SRL_PARTS, and SRA_PARTS
Generate PowerPC 'fneg', 'fabs', and 'fnabs' instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21018 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 05:59:34 +00:00
Chris Lattner
43fdea070c This target doesn't support fabs/fneg yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21010 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 05:03:24 +00:00
Nate Begeman
27523a1c92 Fix i64 returns 
Generate PowerPC 'subfic' instruction when appropriate


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20995 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 00:42:16 +00:00
Nate Begeman
fc1b1dad88 Add ISD::UNDEF node 
Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
  arguments, but not shadowing their value.  This allows us to do the right
  thing with both fixed and vararg floating point arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20988 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 22:34:39 +00:00
Nate Begeman
6cb2e1b124 Fix Olden/bh, CR0 was being set in the wrong order 
LowerCallTo and ISD::CALL are going to need to be modified, regs are being
set in the wrong order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20981 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 08:57:43 +00:00
Nate Begeman
31318e4b6c Also apply Chris's fix to FP select and SETCC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20979 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 07:21:30 +00:00
Chris Lattner
3071019026 Move the selection of the arms of the select operation up to the conditional 
part to make sure we get the side effects and to avoid confusing the CFG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20977 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 07:10:02 +00:00
Nate Begeman
a7e11a4bb5 Fix stores to global addresses 
Fix calls with no arguments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20975 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 05:57:17 +00:00
Nate Begeman
04730361b5 Support indexed loads and stores. This drops Shootout/matrix time from 
18.8 to 14.8 seconds.  The Pattern ISel is now often faster than the
Simple ISel, esp. on memory intensive code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20973 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 04:45:11 +00:00
Nate Begeman
6b55997df5 Implement FP_TO_SINT and FP_TO_UINT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20972 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 02:59:27 +00:00
Nate Begeman
6d369ccae0 Add support for adding 0.0 and -0.0 to the constant pool, since we lie and 
say that we support them, for the purposes of generating fsel instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20970 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 01:08:07 +00:00
Nate Begeman
dffcfccc13 Factor out common code, support FP comparison in folded SetCC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20969 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 00:32:34 +00:00
Nate Begeman
3e89716ad7 fsel generation for f32 and f64 select 
generate compare immediate for integer compare with constant
fold setcc into branch
fold setcc into select

Code generation quality for Shootout is now on par with the Simple ISel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20968 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-31 23:55:40 +00:00
Nate Begeman
96fc681d7e Pass the correct values to the chain argument for node construction during 
LowerCallTo.
Handle ISD::ADD in SelectAddr, allowing us to have nonzero immediates for
loads and stores, amazing!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20946 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-31 02:05:53 +00:00
Nate Begeman
74d734574e Rewrite LowerCallTo and Select(ISD::CALL) to properly handle float varargs 
Tell the SelectionDAG ISel to expand SEXTLOAD of i1 and i8, rather than
  complicate the code in ISD::SEXTLOAD to do it by hand
Combine the FP and Int ISD::LOAD codegen
Generate better code for constant pool loads

As a result, all of Shootout, and likely many other programs are now
working.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20945 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-31 00:15:26 +00:00
Nate Begeman
fdcf3418e0 Fix calls whose arguments fit entirely in registers to not break the Chain. 
Implement SINT_TO_FP and UINT_TO_FP
Remove some dead code from the simple ISel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20944 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-30 19:38:35 +00:00
Nate Begeman
58f718cd97 Fix frame index code to generate legal PowerPC instructions. About half of 
Shootout now works.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20940 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-30 02:23:08 +00:00
Nate Begeman
01d05266f9 Fix external symbol printing in the AsmPrinter. Tell the ISel that we 
don't support things like memcpy directly.  This allows a handful of the
Shootout programs to work, yay!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20939 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-30 01:45:43 +00:00
Nate Begeman
23afcfb063 Fix BranchCC (it's still dumb), and implement FP select (also dumb) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20935 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-29 22:48:55 +00:00
Nate Begeman
74747861b9 Implement integer select and i1 sign extend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20934 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-29 22:24:51 +00:00
Nate Begeman
3316252034 Implement SetCC, fix ZERO_EXTEND_INREG 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20933 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-29 21:54:38 +00:00
Chris Lattner
848132d671 fix a warning in the optimized build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20920 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-29 15:13:27 +00:00
Nate Begeman
f3d08f31b3 Implement div, rem, and frameindex 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20907 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-29 00:03:27 +00:00
Nate Begeman
f70b576ccc Pattern ISel: fix argument loading for i64s (thanks chris) 
Simple  ISel: fix i64 subtract


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20903 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-28 23:08:54 +00:00
Nate Begeman
ca12a2bd91 Remove fake instruction 'subc' (mnemonic for subfc). 
More pattern isel updates


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20902 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-28 22:28:37 +00:00
Nate Begeman
9db505ca9d Implement proper loads and zero-extends of all types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20897 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-28 19:36:43 +00:00
Nate Begeman
7532e2f555 Fix that pesky floats in integer regs problem by assigning the f32 type to 
the correct register class.  Also remove the loading of float data into int
regs part of varargs; it will need to be implemented differently later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20857 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-26 08:25:22 +00:00
Nate Begeman
f7e4338035 Get closer to having varargs working. There's still something strange 
going on with copies between floating point and integer register files
being generated.  Once that is solved, varargs will be done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20856 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-26 07:46:36 +00:00
Nate Begeman
f26226155e Make 64bit args and float args work correct with calls. Thanks to Chris 
for explaining EXTRACT_ELEMENT to me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20847 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-26 02:17:46 +00:00
Nate Begeman
307e7443b8 Next round of pattern isel changes, mostly dealing with calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20841 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-26 01:28:53 +00:00
Nate Begeman
c13a7f0eb3 Correct a documention link 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20840 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-26 01:28:05 +00:00
Nate Begeman
c7b09f1f01 Support global addresses and fix call returns. Varargs still aren't 
handled correctly for floating point arguments, or more than 8 arguemnts.
This does however, allow hello world to run.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20832 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-25 08:34:25 +00:00
Nate Begeman
9e3e1b5d44 Implement next round of Pattern ISel fixes 
1. void returns
2. multiplies
3. calls


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20822 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 23:35:30 +00:00
Nate Begeman
7ca541b75a Fix an incorrect argument being passed to BuildMI for indirect calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20821 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 23:34:38 +00:00
Nate Begeman
2daec45751 Commit Gabor Greif's patch to use iterators in lowering intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20816 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 20:07:16 +00:00
Chris Lattner
1bcb9abb30 eliminate dead variables, patch contributed by Gabor Greif! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20812 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 17:32:20 +00:00
Nate Begeman
5e9666129a Implement more of the PPC32 Pattern ISel: 
1) dynamic stack alloc
2) loads
3) shifts
4) subtract
5) immediate form of add, and, or, xor
6) change flag from -pattern-isel to -enable-ppc-pattern-isel

Remove dead arguments from getGlobalBaseReg in the simple ISel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20810 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 06:28:42 +00:00
Chris Lattner
246fa6316d Fix silly "no newline at end of file" warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20809 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 06:16:18 +00:00
Nate Begeman
a9795f81e9 Addition of the PPC32 Pattern ISel. While it is far from complete, it will 
be brought up to parity with the current simple ISel in the coming days.
Currently, -pattern-isel is required to trigger it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20805 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 04:41:43 +00:00
Misha Brukman
c7cd5e5672 We may be adding functions to the Module during initialization, so 
conservatively, it's modified


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20735 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-21 19:22:14 +00:00
Chris Lattner
e4d5c441e0 This mega patch converts us from using Function::a{iterator|begin|end} to 
using Function::arg_{iterator|begin|end}.  Likewise Module::g* -> Module::global_*.

This patch is contributed by Gabor Greif, thanks!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20597 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-15 04:54:21 +00:00
Chris Lattner
411eba0eaf Fix a crash handling 'undef bool', fixing an llc crash on 186.crafty 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20523 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-08 22:53:09 +00:00
Chris Lattner
4318a3d0e9 cleanup the cfg after lsr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20410 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-02 21:56:00 +00:00
Chris Lattner
0c7490617a Add a temporary option for llc-beta: -enable-lsr-for-ppc, which turns on 
Loop Strength Reduction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20399 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-02 06:19:22 +00:00
Chris Lattner
7a823bd01f Fix a problem where the PPC backend lost track of the fact that it had 
to save and restore the LR register on entry and exit of a leaf function
that needed to access globals or the constant pool.  This should hopefully
fix oscar from sending the PPC tester spinning out of control.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20197 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-02-15 20:26:49 +00:00
Chris Lattner
3c70764907 Fix Regression/CodeGen/PowerPC/2005-01-14-UndefLong.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19557 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-14 20:22:02 +00:00
Chris Lattner
fbd4de1d9b Fix: Regression/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19555 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-14 19:31:00 +00:00
Chris Lattner
35e5c7c186 This hunk: 
-  unsigned TrueValue = getReg(TrueVal, BB, BB->begin());
+  unsigned TrueValue = getReg(TrueVal);

Fixes the PPC regressions from last night.

The other hunk is just a clarity improvement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19263 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 23:07:31 +00:00
Chris Lattner
6dec0b09d5 Fix a FIXME: Select instructions on longs were miscompiled. 
While we're at it, improve codegen of select instructions.  For this
testcase:

int %test(bool %C, int %A, int %B) {
  %D = select bool %C, int %A, int %B
  ret int %D
}

We used to generate this code:

_test:
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        b .LBB_test_3   ;
.LBB_test_2:    ;
        or r5, r4, r4
.LBB_test_3:    ;
        or r3, r5, r5
        blr

Now we emit:

_test:
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        or r4, r5, r5
.LBB_test_2:    ;
        or r3, r4, r4
        blr

-Chris


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19214 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-01 16:10:12 +00:00
Chris Lattner
47f9dd14b2 Specify all of the targets built. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18985 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-16 17:26:44 +00:00
Chris Lattner
be686a8897 Factor out common .td file chunks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18982 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-16 16:31:57 +00:00
Chris Lattner
869f45937b Fix Regression/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll, and all programs 
when compiled with debug information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18835 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-12 20:36:19 +00:00
Chris Lattner
8363ad6bfc CSE calls to getTypeSize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18833 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-12 20:31:00 +00:00
Chris Lattner
3ea78c4276 Use the target triple to pick this target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18830 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-12 17:40:28 +00:00
Chris Lattner
0284628e8e Fix several bugs in 'op x, imm' handling. Foremost is that we now emit 
addi r3, r3, -1
instead of
   addi r3, r3, 1

for 'sub int X, 1'.

Secondarily, this fixes several cases where we could crash given an unsigned
constant.  And fixes a couple of minor missed optimization cases, such as
xor X, ~0U -> not X


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18379 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-11-30 07:30:20 +00:00
Chris Lattner
35f2bbe8c6 Fix CodeGen/PowerPC/2004-11-30-shr-var-crash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18376 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-11-30 06:40:04 +00:00
Chris Lattner
e74ed0d53b Fix test/Regression/CodeGen/PowerPC/2004-11-29-ShrCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18374 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-11-30 06:36:11 +00:00
Chris Lattner
7747040410 Fix test/Regression/CodeGen/PowerPC/2004-11-30-shift-crash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18371 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-11-30 06:29:10 +00:00