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11046 Commits

Author SHA1 Message Date
Devang Patel
66b4d3ba52 Initialize MMI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73813 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 01:00:07 +00:00
Chris Lattner
ad48be0ea3 hook up printMemReference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73811 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 00:50:32 +00:00
Chris Lattner
f38c03af2a Start implementing translation of MachineInstr to MCInst. Next 
step is to make tblgen generate something more appropriate for MCInst,
and generate calls to operand translation routines where needed.
This includes a bunch of #if 0 code which will slowly be refactored into
something sensible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73810 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 00:49:26 +00:00
Chris Lattner
d5fb790613 stub out some hacky code for wiring up the new asmprinter interfaces 
on X86.  Not useful yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73799 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 23:59:57 +00:00
Devang Patel
5090f19f09 DwarfWriter is used to emit EH info also. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73792 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 23:21:20 +00:00
Evan Cheng
ae69a2a12b Enable arm pre-allocation load / store multiple optimization pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73791 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 23:17:27 +00:00
Devang Patel
1e86a66b00 mv CodeGen/DebugLoc.h Support/DebugLoc.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73786 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 22:08:58 +00:00
Devang Patel
14a55d952c Move up dwarf writer initialization in common AsmPrinter class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73784 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 21:54:26 +00:00
Anton Korobeynikov
e494b9e0d7 Unbreak cyclic deps 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73781 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 19:36:55 +00:00
Chris Lattner
225503a5b5 fix the sparc codegen to not depend on the sparc asmprinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73767 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 15:48:10 +00:00
Evan Cheng
b1019480b6 Add comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73761 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 07:06:07 +00:00
Eli Friedman
7e2242be71 Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to 
handle with an SSE2 instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73760 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 07:00:55 +00:00
Evan Cheng
7a42b08be8 Should be using Bcc (average) latency to determine if-conversion threshold, not BL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73759 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 06:56:26 +00:00
Eli Friedman
aace4b1a2c Misc tweaks to Intel asm printing to make it more compatible with MASM. 
Patch by Benedict Gaster.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73753 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 04:48:38 +00:00
Evan Cheng
974fe5d691 Transfer dead markers when a ldrd is changed into a ldm or a pair of ldr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73749 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 01:59:04 +00:00
Evan Cheng
8557c2bcb8 Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73747 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 01:51:50 +00:00
Eli Friedman
6b7bb42c36 Mark a few Thumb instructions commutable; just happened to spot this 
while experimenting.  I'm reasonably sure this is correct, but please 
tell me if these instructions have some strange property which makes this
change unsafe.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73746 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 01:43:08 +00:00
Chris Lattner
fadc83c699 add a file I missed, this goes with r73743 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73744 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 00:47:59 +00:00
Chris Lattner
475370b036 Add some scaffolding for a new experimental asmprinter 
implementation.  The idea is that we want asmprinting to
work by converting MachineInstrs into a new MCInst class,
then the per-instruction asmprinter works on MCInst.  MCInst
and the new asmprinters will not depend on most of the 
llvm code generators.  This allows building diassemblers
that don't link in the whole llvm code generator.  This is
step #1 of many.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73743 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 00:47:33 +00:00
Chris Lattner
4e0f25b603 merge the common darwin settings from the X86/PPC/ARM targets 
into DarwinTargetAsmInfo.cpp.  The remaining differences should
be evaluated.  It seems strange that x86/arm has .zerofill but ppc
doesn't, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73742 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 00:08:39 +00:00
Chris Lattner
a93ca92379 move mangler quote handling from asm printers to TargetAsmInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73738 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:41:35 +00:00
Chris Lattner
7e816dc175 minor cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73737 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:33:13 +00:00
Chris Lattner
b839c3f577 simplify macro debug info directive handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:31:37 +00:00
Evan Cheng
cd828618b8 Remove UseThumbBacktraces. Just check if subtarget is darwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73734 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:14:30 +00:00
Evan Cheng
b13bafe5c1 On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73720 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 20:37:15 +00:00
Evan Cheng
f9f1da17f8 - Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints. 
- Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping.
- More fixes to get ARM load / store double word working.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73671 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 02:04:01 +00:00
Dale Johannesen
063989455d It looks like nobody is working on PR 4158, so I'm 
adding a check to catch this case at compile time
instead of quietly generating incorrect code.
That will at least let us identify CBE failures
that are not due to this problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73668 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 01:07:23 +00:00
Bob Wilson
ff6de36558 ARM unified syntax is not specific to ELF; use it for Darwin, too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73665 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 00:36:17 +00:00
Anton Korobeynikov
7c4f7dd43a Fix asm string from MOVi16 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73661 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 23:43:36 +00:00
Anton Korobeynikov
d61eca5330 Thumb2 instructions are enabled only in unified assembler mode. 
Emit switch directive for it. I have no idea whether this is
requirement for Darwin or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73660 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 23:43:18 +00:00
Anton Korobeynikov
52237119a9 Initial support for some Thumb2 instructions. 
Patch by Viktor Kutuzov and Anton Korzh from Access Softek, Inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73622 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 18:13:58 +00:00
Devang Patel
369de261e7 Do not use first actual instruction's location for prologue. The debug wants to skip prologue while setting a breakpoint for the function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73592 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 00:48:26 +00:00
Chris Lattner
e8f1018130 fix a circular dependency between the mips code generator 
and its asmprinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73573 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 22:38:04 +00:00
Douglas Gregor
1555a23335 Introduce new headers whose inclusion forces linking and 
initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73543 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 20:12:29 +00:00
Evan Cheng
876eac9da5 CALL64pcrel32 immediate field is 32-bit. Patch by Abhinav Duggal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73536 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 19:44:27 +00:00
Anton Korobeynikov
385f5a99ec Address review comments: add 3 ARM calling conventions. 
Dispatch C calling conv. to one of these conventions based on
target triple and subtarget features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73530 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 18:50:49 +00:00
Anton Korobeynikov
2932795309 GNU as refuses to assemble "pop {}" instruction. Do not emit such 
(this is the case when we have thumb vararg function with single
callee-saved register, which is handled separately).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73529 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 18:49:08 +00:00
Sanjiv Gupta
003263bb9f Added missing libcalls for floating point to int conversions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73491 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 16:17:35 +00:00
Sanjiv Gupta
bde7942072 Code Restructuring. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73481 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 09:45:18 +00:00
Eli Friedman
6314ac2bca Misc accumulated tweaks to legalization logic for various targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73476 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 06:40:59 +00:00
Chris Lattner
b42e20be77 another xform that is target-independent (should be done in instcombine). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73472 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 06:15:56 +00:00
Chris Lattner
d23fffeb16 I think instcombine should unconditionally do this xform. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73471 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 06:11:35 +00:00
Bill Wendling
fe7f294d5c There doesn't seem to be a reason to move the save FP stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73468 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 04:12:45 +00:00
Bill Wendling
d0446b08c4 The DWARF to compact encoding converter assumes that the DW_CFA_def_cfa_offset 
comes after the DW_CFA_def_cfa_register, because the CFA is really ESP from the
start of the function and only gets an offset when the "subl $xxx,%esp"
instruction happens, not the other way around.

And reapply r72898:

The DWARF unwind info was incorrect. While compiling with
`-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a
lot of function, and then they would be `0'. The linker (at least on Darwin)
needs to encode the stack size. In some cases, the stack size is too large to
directly encode. So the linker checks to see if there is a "subl $xxx,%esp"
instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If
so, the compact encoding records the offset in the function to where the stack
size is embedded. But because the `DW_CFA_advance_loc' instructions are missing,
it looks before the function and dies.

So, instead of emitting the EH debug label before the stack adjustment
operations, emit it afterwards, right before the frame move stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73465 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 04:06:15 +00:00
Evan Cheng
88cc7c4194 On Darwin, frame pointer r7 is never available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73434 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 22:32:01 +00:00
Anton Korobeynikov
bb62962342 Rename methods for the sake of consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73428 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 21:46:20 +00:00
Evan Cheng
675860758e Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73422 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 21:18:20 +00:00
Bill Wendling
927788c500 The Ls and Qs were mixed up. Patch by Sean. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73417 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 20:59:31 +00:00
Evan Cheng
d780f35794 Do not form ldrd / strd if the two dests / srcs are the same. Code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73413 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 20:54:56 +00:00
Bill Wendling
453eb26106 "The Intel instruction tables should include the 64-bit and 32-bit instructions 
that push immediate operands of 1, 2, and 4 bytes (extended to the native
register size in each case).  The assembly mnemonics are "pushl" and "pushq."
One such instruction appears at the beginning of the "start" function , so this
is essential for accurate disassembly when unwinding."

Patch by Sean Callanan!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73407 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 19:39:04 +00:00
Evan Cheng
7f04428738 Silence a warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73406 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 19:36:32 +00:00
Evan Cheng
358dec5180 Part 1. 
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent.
- Allow targets to specify alternative register allocation orders based on allocation hint.

Part 2.
- Use the register allocation hint system to implement more aggressive load / store multiple formation.
- Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g.
v1025 = LDR v1024, 0
v1026 = LDR v1024, 0
=>
v1025,v1026 = LDRD v1024, 0

If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair.

- Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions.

This is work in progress, not yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73381 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 08:28:29 +00:00
Chris Lattner
3771071dd8 remove extraneous const qualifier 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73373 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 04:42:32 +00:00
Chris Lattner
2e06dd2101 I got J and K backward, many thanks to Eli for spotting this! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73372 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 04:39:05 +00:00
Chris Lattner
e4935150c7 implement support for the 'K' asm constraint, PR4347 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73366 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 04:01:39 +00:00
Dan Gohman
a119de86a0 Fix old-style type names in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73362 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-14 23:30:43 +00:00
Bruno Cardoso Lopes
ae9163f0e2 Introduce new BinaryObject (blob) class, ELF Writer modified to use it. BinaryObject.h by Aaron Gray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73333 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-14 07:53:21 +00:00
Sanjiv Gupta
dcb6da3efd The subprogram descriptor for a function may be missing (llvm-ld linking two static functions with same name), so pick up the compilation unit for the function from the first valid debug loc of its instructions. 
This patch also emits debug info for structure (aggregate types in 
general) types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73295 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-13 17:35:54 +00:00
Evan Cheng
e7d6df7353 Add a ARM specific pre-allocation pass that re-schedule loads / stores from 
consecutive addresses togther. This makes it easier for the post-allocation pass
to form ldm / stm.

This is step 1. We are still missing a lot of ldm / stm opportunities because
of register allocation are not done in the desired order. More enhancements
coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73291 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-13 09:12:55 +00:00
Evan Cheng
cd799b99cb Mark some pattern-less instructions as neverHasSideEffects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73252 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-12 20:46:18 +00:00
Arnold Schwaighofer
bbd8c33ee6 Fix Bug 4278: X86-64 with -tailcallopt calling convention 
out of sync with regular cc.

The only difference between the tail call cc and the normal
cc was that one parameter register - R9 - was reserved for
calling functions through a function pointer. After time the
tail call cc has gotten out of sync with the regular cc. 

We can use R11 which is also caller saved but not used as
parameter register for potential function pointers and
remove the special tail call cc on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73233 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-12 16:26:57 +00:00
Eli Friedman
7161cb1dad Misc x86 README updates: remove a couple of already-fixed issues, 
add a few suggestions from looking at some assembly code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73210 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 23:07:04 +00:00
Bruno Cardoso Lopes
d00d4159d4 Use forward declarations and move TargetELFWriterInfo impl to a new file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73209 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 22:13:00 +00:00
Bruno Cardoso Lopes
c997d45ae5 Support for ELF Visibility 
Emission for globals, using the correct data sections
Function alignment can be computed for each target using TargetELFWriterInfo
Some small fixes



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73201 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 19:16:03 +00:00
Sanjiv Gupta
6396329d52 Generate libcalls for floating point arithmetic and casting operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73194 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 16:50:48 +00:00
Sanjiv Gupta
fa3f80a2b7 More formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73185 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 06:55:48 +00:00
Sanjiv Gupta
b65d1f23ca Fixed source comments. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73184 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 06:49:55 +00:00
Anton Korobeynikov
b51b6cf1d0 Silence a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73152 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-09 23:00:39 +00:00
Bill Wendling
3ae67f5910 Simplified logic of this if-then statement to reduce nesting. No functionality 
change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73143 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-09 20:08:51 +00:00
Sanjiv Gupta
b157f25926 PIC16 emits auto variables as globals. When optimizer removes a function entierly by estimating its side effects on globals, those globals(autos) without a function were not being printed by the Asm printer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73135 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-09 15:31:19 +00:00
Anton Korobeynikov
2e7ccfce98 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73098 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:59:50 +00:00
Anton Korobeynikov
dada95b5b3 Revert hunk commited by accident 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73097 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:57:18 +00:00
Anton Korobeynikov
0eebf653a7 The attached patches implement most of the ARM AAPCS-VFP hard float 
ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.

Patch by Sandeep Patel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73095 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:53:56 +00:00
Anton Korobeynikov
fbbf1eeccf Separate V6 from V6T2 since the latter has some extra nice instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73085 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 21:20:36 +00:00
Anton Korobeynikov
a7b0ded2a2 Add helper for checking of Thumb1 mode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73080 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 20:31:02 +00:00
Bill Wendling
faf2671776 Revert r72898. It does not solve the problem I want it to solve. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73075 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 18:18:28 +00:00
Eli Friedman
5d28eb9e97 Get rid of some unnecessary code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73017 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-07 07:28:45 +00:00
Eli Friedman
7a5e55509b Slightly generalize the code that handles shuffles of consecutive loads 
on x86 to handle more cases.  Fix a bug in said code that would cause it 
to read past the end of an object.  Rewrite the code in 
SelectionDAGLegalize::ExpandBUILD_VECTOR to be a bit more general. 
Remove PerformBuildVectorCombine, which is no longer necessary with 
these changes.  In addition to simplifying the code, with this change, 
we can now catch a few more cases of consecutive loads.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73012 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-07 06:52:44 +00:00
Eli Friedman
0da9975299 PR3628: Add patterns to match SHL/SRL/SRA to the corresponding Altivec 
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73009 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-07 01:07:55 +00:00
Eli Friedman
30e71eb61b Avoid crashing on a variable-index insertelement with element type i16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72991 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 06:32:50 +00:00
Eli Friedman
1041553424 Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL 
nodes for vectors with an i16 element type.  Add an optimization for 
building a vector which is all zeros/undef except for the bottom 
element, where the bottom element is an i8 or i16.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 06:05:10 +00:00
Eli Friedman
9d47b8d8ea Fix an obvious typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72987 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 05:55:37 +00:00
Bruno Cardoso Lopes
cf0a577033 x86_64 now uses the correct ELF e_machine type 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 04:29:16 +00:00
Eli Friedman
1762c1439e Get rid of a bogus pattern that interferes with optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72985 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 04:17:04 +00:00
Eli Friedman
23ef105580 PR2598: make sure to expand illegal forms of integer/floating-point 
conversions for x86, like <2 x i32> -> <2 x float> and <4 x i16> -> 
<4 x float>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72983 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 03:57:58 +00:00
Dan Gohman
2392efef1b Add explicit keywords. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72969 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 23:05:51 +00:00
Devang Patel
578efa920a Add new function attribute - noimplicitfloat 
Update code generator to use this attribute and remove NoImplicitFloat target option.
Update llc to set this attribute when -no-implicit-float command line option is used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72959 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 21:57:13 +00:00
Nate Begeman
abc0199680 Adapt the x86 build_vector dagcombine to the current state of the legalizer. 
build vectors with i64 elements will only appear on 32b x86 before legalize.
Since vector widening occurs during legalize, and produces i64 build_vector 
elements, the dag combiner is never run on these before legalize splits them
into 32b elements.

Teach the build_vector dag combine in x86 back end to recognize consecutive 
loads producing the low part of the vector.

Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes
since that was required implicitly.

Add a testcase for the transform.

Old:
	subl	$28, %esp
	movl	32(%esp), %eax
	movl	4(%eax), %ecx
	movl	%ecx, 4(%esp)
	movl	(%eax), %eax
	movl	%eax, (%esp)
	movaps	(%esp), %xmm0
	pmovzxwd	%xmm0, %xmm0
	movl	36(%esp), %eax
	movaps	%xmm0, (%eax)
	addl	$28, %esp
	ret

New:
	movl	4(%esp), %eax
	pmovzxwd	(%eax), %xmm0
	movl	8(%esp), %eax
	movaps	%xmm0, (%eax)
	ret




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72957 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 21:37:30 +00:00
Evan Cheng
925492279a Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72955 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 19:08:58 +00:00
Devang Patel
6a784894b1 Evan thinks NoImplicitFloat check is not required here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72954 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 18:48:29 +00:00
Evan Cheng
87d59e49e9 When merging multiple load / store instructions. Use the DebugLoc of the first one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72952 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 18:19:23 +00:00
Evan Cheng
5ba71887f9 Code clean up: return vector by reference rather than by value. No functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72950 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 17:56:14 +00:00
Dan Gohman
c965ee223c Remove some unnecessary #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72948 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 16:32:58 +00:00
Sanjiv Gupta
4680077959 Lower i16/i32 sdiv/udiv/srem/urem using libcalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72942 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 14:43:12 +00:00
Dan Gohman
9f5f322a03 Fix an erroneous check for isFNeg; the FNeg case is handled 
a few lines later on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 23:43:29 +00:00
Bill Wendling
e075a62746 The DWARF unwind info was incorrect. While compiling with 
`-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a
lot of function, and then they would be `0'. The linker (at least on Darwin)
needs to encode the stack size. In some cases, the stack size is too large to
directly encode. So the linker checks to see if there is a "subl $xxx,%esp"
instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If
so, the compact encoding records the offset in the function to where the stack
size is embedded. But because the `DW_CFA_advance_loc' instructions are missing,
it looks before the function and dies.

So, instead of emitting the EH debug label before the stack adjustment
operations, emit it afterwards, right before the frame move stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72898 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 22:52:30 +00:00
Dan Gohman
ae3a0be92e Split the Add, Sub, and Mul instruction opcodes into separate 
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 22:49:04 +00:00
Devang Patel
d18e31ae17 Add new function attribute - noredzone. 
Update code generator to use this attribute and remove DisableRedZone target option.
Update llc to set this attribute when -disable-red-zone command line option is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72894 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 22:05:33 +00:00
Dale Johannesen
4c9369df57 Fix FP_TO_UINT->i32 on ppc32 -mcpu=g5. This was 
using Promote which won't work because i64 isn't
a legal type.  It's easy enough to use Custom, but
then we have the problem that when the type
legalizer is promoting FP_TO_UINT->i16, it has no
way of telling it should prefer FP_TO_SINT->i32
to FP_TO_UINT->i32.  I have uncomfortably hacked
this by making the type legalizer choose FP_TO_SINT
when both are Custom.
This fixes several regressions in the testsuite.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72891 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 20:53:52 +00:00
Sanjiv Gupta
82f1d1b572 Remove unused code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72866 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 15:16:24 +00:00
Sanjiv Gupta
3b0a4f186b Custom lower SUB with two register operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72861 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 08:52:28 +00:00
Eli Friedman
bccf4b3050 PR3739, part 2: Use an explicit store to spill XMM registers. (Previously, 
the code tried to use "push", which doesn't exist for XMM registers.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72836 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 02:32:04 +00:00
Eli Friedman
9a41712122 PR3739, part 1: Disable the red zone on Win64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72830 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 02:02:01 +00:00
Evan Cheng
1488326156 Re-apply 72756 with fixes. One of those was introduced by we changed MachineInstrBuilder::addReg() interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72826 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 01:15:28 +00:00
Stuart Hastings
d58902a19b Evan says it's wrong; back out 72808. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72817 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 22:59:34 +00:00
Stuart Hastings
77648cfd75 Recognize another euphemism for MOVDQ2Q. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72808 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 21:39:14 +00:00
Evan Cheng
424f8f339a For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine. 
I view this as a temporary workaround until the assembler / linker changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72806 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 21:13:54 +00:00
Dan Gohman
9911405183 Convert Alpha and Mips to use a MachineFunctionInfo subclass to 
carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This
eliminates the need for them to search through the
MachineRegisterInfo livein list in order to identify these
virtual registers. EmitLiveInCopies is now the only user of the
virtual register portion of MachineRegisterInfo's livein data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72802 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 20:30:14 +00:00
Dan Gohman
c553462c29 Remove the redundant TM member from X86DAGToDAGISel; replace it 
with an accessor method which simply casts the parent class
SelectionDAGISel's TM to the target-specific type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72801 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 20:20:00 +00:00
Mike Stump
222858256f Make the buildbot see green (to make it easier to spot the next person 
that puts a new warning in).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72797 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 19:07:46 +00:00
Dan Gohman
974d90bb70 Remove unnecessary #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72782 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 16:47:12 +00:00
Sanjiv Gupta
3fc7e532aa Emit file directives correctly in case of a .bc is generated by llvm-ld after linking in several .bc files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72781 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 16:27:49 +00:00
Sanjiv Gupta
892c8caa3c FrameIndex could be used as a value (addressof (arg)) or as an address. 
Expand it exactly like GlobalAddress.
Fix some more crashes (InsertBranch() not being implemented) for compiling hitec libs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72776 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 15:31:12 +00:00
Sanjiv Gupta
703e235f0c Fixed a bug in which signed comparisons were being used instead of unsigned comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72771 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 13:36:44 +00:00
Duncan Sands
12513889fd Avoid a warning "'U' might be used uninitialized in 
this function" when using a not-too-smart compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72768 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 12:05:18 +00:00
Evan Cheng
70fd60bd57 Temporarily revert 72756 for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72757 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 07:40:47 +00:00
Evan Cheng
9d5fb981b0 Fold preceding / trailing base inc / dec into the single load / store as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72756 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 06:14:58 +00:00
Dan Gohman
6ecc2602a6 Revert r72734. The Darwin assembler doesn't support the static 
relocation model on x86-64. Higher level logic should override
the relocation model to PIC on x86_64-apple-darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72746 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 00:37:20 +00:00
Evan Cheng
da9863fa41 On Darwin x86_64 small code model doesn't guarantee code address fits in 32-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72734 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-02 20:09:31 +00:00
Dale Johannesen
874ae251c3 Revert 72707 and 72709, for the moment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72712 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-02 03:12:52 +00:00
Dale Johannesen
ca46fdd284 Add missing file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72709 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 23:48:58 +00:00
Dale Johannesen
4150d83abe Make the implicit inputs and outputs of target-independent 
ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag.  Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.

Most targets will still produce a Flag-setting target-dependent
version when selection is done.  X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc.  This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted.  All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly.  The
same can be done on other targets.

The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 23:27:20 +00:00
Dale Johannesen
8313899851 Comment grammaro/clarification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72706 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 23:13:42 +00:00
Dale Johannesen
69bbb4cd39 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72705 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 23:12:52 +00:00
Anton Korobeynikov
70459bef9c Implement review feedback. Make thumb2 'normal' subtarget feature 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72698 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 20:00:48 +00:00
Bruno Cardoso Lopes
434dd4fd94 Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:57:37 +00:00
Anton Korobeynikov
d260c248ab Do not emit "generic" CPU string. This fixes PR4291. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72696 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:03:17 +00:00
Dan Gohman
2d98f0664b Fix a grammaro and clarify a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72668 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-31 17:52:18 +00:00
Bruno Cardoso Lopes
a3f99f9033 First patch in the direction of splitting MachineCodeEmitter in two subclasses: 
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 20:51:52 +00:00
Evan Cheng
cf7895ff8b (i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear the top 8 bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72618 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 08:43:27 +00:00
Bill Wendling
51b16f4737 Untabification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72604 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 01:09:53 +00:00
Anton Korobeynikov
d4022c3fbb Add placeholder for thumb2 stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72593 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-29 23:41:08 +00:00
Evan Cheng
cb219f0ef6 More h-registers tricks: folding zext nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72558 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-29 01:44:43 +00:00
Bill Wendling
2265ba0717 The MONITOR and MWAIT instructions have insufficient information for 
decoding. Essentially, they both map to the same column in the "opcode
extensions for one- and two-byte opcodes" table in the x86 manual. The RawFrm
complicates decoding this.

Instead, use opcode 0x01, prefix 0x01, and form MRM1r. Then have the code
emitter special case these, a la [SML]FENCE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72556 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 23:40:46 +00:00
Evan Cheng
8a0b2daac2 Fix MOVMSKPDrr encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 18:55:28 +00:00
Evan Cheng
ed7f56b555 Fix PSIGND encoding bug. Patch by Sean Callanan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72534 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 18:48:53 +00:00
Sanjiv Gupta
dd4694b519 Emit debug info for locals with proper scope. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72531 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 18:24:11 +00:00
Sanjiv Gupta
a455942895 Mark the branch insns correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72529 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 17:32:56 +00:00
Sanjiv Gupta
df75a27609 Fixing problems that got exposed after the refactoring of LegalizeDAG done in 72447. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72521 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 06:59:57 +00:00
Eli Friedman
c06441e5ea Return the operand rather than a null SDValue when the given SELECT_CC 
is actually legal.  Part of LegalizeDAG cleanups.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72513 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 04:31:08 +00:00
Jeffrey Yasskin
2d92c71668 This patch brings the list of attributes in CPPBackend.cpp up to date with the 
list in Attributes.h. It also reorders the CPPBackend list to match so that
it's easier to see that it's complete.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72510 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 03:16:17 +00:00
Bill Wendling
3b1259bb9f "The instructions MMX_PSADBWrm and MMX_PSADBWrr have opcode 0b11100000 (e0), but 
the Intel manual (screenshot) says it should be 0b11110110 (f6).  The existing
encoding causes a disassembly conflict with MMX_PAVGBrm, which really should be
0f e0."

Patch by Sean Callanan!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72508 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 02:04:00 +00:00
Evan Cheng
8b944d39b3 Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code. 
e.g.
orl     $65536, 8(%rax)
=>
orb     $1, 10(%rax)

Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72507 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 00:35:15 +00:00
Eli Friedman
ba2352b066 Ger rid of some dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72494 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-27 20:39:00 +00:00
Evan Cheng
bc9be219d6 Fix sfence jit encoding. Patch by Sean Callanan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72488 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-27 18:38:01 +00:00
Bruno Cardoso Lopes
d3bdf19ce7 Added support for fround, fextend and FP_TO_SINT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72483 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-27 17:23:44 +00:00
Eli Friedman
36df499648 Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and 
FP_TO_XINT.  Necessary for some cleanups I'm working on.  Updated 
from the previous version (r72431) to fix a bug and make some things a 
bit clearer.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72445 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-27 00:47:34 +00:00
Daniel Dunbar
82205570d1 Back out r72431, it is causing a number of compilation crashes with clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72436 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-26 21:27:02 +00:00
Stefanus Du Toit
8cf5ab153d Update CPU capabilities for AMD machines 
- added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and
barcelona with appropriate sse3/4a levels
- added FeatureSSE4A for amdfam10 processors
in X86Subtarget:
- added hasSSE4A
- updated AutoDetectSubtargetFeatures to detect SSE4A
- updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and
family 10h as amdfam10

New processor names match those used by gcc.

Patch by Paul Redmond!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72434 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-26 21:04:35 +00:00
Eli Friedman
ecc23a5240 Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and 
FP_TO_XINT.  Necessary for some cleanups I'm working on. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72431 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-26 19:18:56 +00:00
Chris Lattner
d9b77159d6 add some late optimizations that GCC does. It thinks these are a win 
even on Core2, not just AMD processors which was a surprise to me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72396 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-25 20:28:19 +00:00
Chris Lattner
0c85aabfdc fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72395 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-25 19:51:07 +00:00
Chris Lattner
f9dc644936 we should eventually add -march=atom and the new atom movbe instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72387 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-25 16:34:44 +00:00
Eli Friedman
1a8229b162 Make the PPC backend use a legal type for the operands to the BUILD_VECTOR 
nodes it generates.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72356 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-24 02:03:36 +00:00
Eli Friedman
108b519cc1 Make the X86 backend mark EXTRACT_SUBVECTOR as Expand, at least for the 
moment.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72350 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 22:44:52 +00:00
Anton Korobeynikov
6d7d2aa38a Add ARMv7 architecture, Cortex processors and different FPU modes handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72337 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:51:43 +00:00
Anton Korobeynikov
88ce667003 Emit ARM Build Attributes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72336 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:51:20 +00:00
Anton Korobeynikov
41a024385f Propagate CPU string out of SubtargetFeatures 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72335 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:50:50 +00:00
Eli Friedman
948e95a381 Make the x86 backend custom-lower UINT_TO_FP and FP_TO_UINT on 32-bit 
systems instead of attempting to promote them to a 64-bit SINT_TO_FP or 
FP_TO_SINT.  This is in preparation for removing the type legalization 
code from LegalizeDAG: once type legalization is gone from LegalizeDAG, 
it won't be able to handle the i64 operand/result correctly.

This isn't quite ideal, but I don't think any other operation for any 
target ends up in this situation, so treating this case specially seems 
reasonable.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72324 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 09:59:16 +00:00
Oscar Fuentes
a2ac75d547 CMake: Use libpthread in tblgen when needed. Updated list of source 
files for PIC16 target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72277 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-22 20:55:15 +00:00
Bob Wilson
2f95461ee2 Only 64-bit targets support TImode libcalls. Disable the TImode shift libcalls 
for ARM.  This fixes rdar://6908807.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72269 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-22 17:38:41 +00:00
Sanjiv Gupta
a57bc3ba02 Emit debug information for globals (which include automatic variables as well because on PIC16 they are emitted as globals by the frontend). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72262 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-22 13:58:45 +00:00
Bob Wilson
261f2a2337 Minor formatting fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72172 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-20 16:30:25 +00:00
Evan Cheng
d7f666a869 Try again. Allow call to immediate address for ELF or when in static relocation mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72160 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-20 04:53:57 +00:00
Evan Cheng
65cdee3fd4 Cannot use immediate as call absolute target in PIC mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72154 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-20 01:11:00 +00:00
Bob Wilson
6aa219a18c Fix pr4227: Handle large immediate values in inline assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72138 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 21:27:57 +00:00
Bob Wilson
86c212e894 Follow up on new support for memory operands in ARM inline assembly. 
This fixes pr4233.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72115 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 18:33:02 +00:00
Bob Wilson
04746eae49 Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and 
the stack.  Patch by Sandeep Patel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72106 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 10:02:36 +00:00
Bob Wilson
224c244f56 Fix pr4091: Add support for "m" constraint in ARM inline assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72105 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 05:53:42 +00:00
Dale Johannesen
f4786cc07a Spacing fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72083 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 00:46:42 +00:00
Dale Johannesen
94c9cd17de Add OpSize to 16-bit ADC and SBB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72045 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-18 21:41:59 +00:00
Bob Wilson
e6abdffe06 Fix pr4202: Disable CodePlacementOpt for ARM. The ARMConstantIslandPass has 
to run last because it needs to know the exact size and position of every
basic block.  Currently CodePlacementOpt is set up to run last.  It might be
worthwhile to investigate reordering these passes, but for now, let's just
make it work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72037 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-18 20:55:32 +00:00
Dale Johannesen
ca11dae4a4 Fill in the missing patterns for ADC and SBB. 
Some comment cleanup.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72022 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-18 17:44:15 +00:00
Anton Korobeynikov
e4fdb8b8ff Mark rotl/rotr as expand. This generates pretty ugly code, but this is better than nothing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71976 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-17 10:16:28 +00:00
Anton Korobeynikov
aceb620de8 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71975 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-17 10:15:22 +00:00
Jakob Stoklund Olesen
b5426457f0 Fix a missing def-flag on a Mips epilogue load. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71935 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-16 07:26:06 +00:00
Jakob Stoklund Olesen
f2c3f6a855 Remember to set def-flag on register loaded from stack slot in CellSPU. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71934 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-16 07:25:44 +00:00
Mike Stump
11adeed8b3 Reflow to fit 80-col. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71813 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-14 23:23:37 +00:00
Mike Stump
6726be6a67 Reflow to fit 80-col. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71812 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-14 23:22:47 +00:00
Jim Grosbach
f957012866 Update the names of the exception handling sjlj instrinsics to 
llvm.eh.sjlj.* for better clarity as to their purpose and scope. Add
a description of llvm.eh.sjlj.setjmp to ExceptionHandling.html.
(llvm.eh.sjlj.longjmp documentation coming when that implementation is
added).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71758 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-14 00:46:35 +00:00
Jim Grosbach
6aa7197fb5 Spelling correction s/builting/builtin/ and remove trailing whitespace in a few places 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71735 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 22:32:43 +00:00
Evan Cheng
6ebf7bc740 Run code placement optimization for targets that want it (arm and x86 for now). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71726 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 21:42:09 +00:00
Bill Wendling
587daedce2 Change MachineInstrBuilder::addReg() to take a flag instead of a list of 
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.

I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 21:33:08 +00:00
Sanjiv Gupta
ad6585b021 Run through the list of globals once and sectionize all types of globlas includeing declarations. Later emit them from their section lists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71661 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 15:13:17 +00:00
Dale Johannesen
7b9486ad43 Add an int64_t variant of abs, for host environments 
without one.  Use it where we were using abs on
int64_t objects.
(I strongly suspect the casts to unsigned in the
fragments in LoopStrengthReduce are not doing whatever
the original intent was, but the obvious change to
uint64_t doesn't work.  Maybe later.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71612 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 00:24:22 +00:00
Jim Grosbach
0e0da734bb Add support for GCC compatible builtin setjmp and longjmp intrinsics. This is 
a supporting preliminary patch for GCC-compatible SjLJ exception handling. Note that these intrinsics are not designed to be invoked directly by the user, but
rather used by the front-end as target hooks for exception handling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71610 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 23:59:14 +00:00
Jim Grosbach
c93f961874 correct register class for tADDspi to GPR since the register will always be SP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71602 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 22:30:18 +00:00
Bill Wendling
b877a1f545 More MSVC fixes -- class/struct conflicts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71601 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 21:55:29 +00:00
Evan Cheng
0af934eb64 80 col violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71582 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 20:17:52 +00:00
Bob Wilson
39bf051ec2 Fix up a few minor typos in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71563 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 17:35:29 +00:00
Bob Wilson
8494526a23 Fix 80-col violations and remove trailing whitespace. No functional changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71562 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 17:09:30 +00:00
Sanjiv Gupta
2364cfeb54 Iterate over globals once and sectionize them into appropriate sections. 
Later in asmprinter, go over thsese sections and print them.
Do not print empty sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71560 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 17:07:27 +00:00
Sanjiv Gupta
429185787a We do not need to create a label for external defs and decls, 
just emit a comment for readability.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71544 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 06:52:41 +00:00
Sanjiv Gupta
ed4f4fbfba Mark mayLoad, mayStore for insns correctly and use them 
to check if an insn is accessing memory during mem sel optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71537 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 04:30:38 +00:00
Dan Gohman
81db61a2e6 Factor the code for collecting IV users out of LSR into an IVUsers class, 
and generalize it so that it can be used by IndVarSimplify. Implement the
base IndVarSimplify transformation code using IVUsers. This removes
TestOrigIVForWrap and associated code, as ScalarEvolution now has enough
builtin overflow detection and folding logic to handle all the same cases,
and more. Run "opt -iv-users -analyze -disable-output" on your favorite
loop for an example of what IVUsers does.

This lets IndVarSimplify eliminate IV casts and compute trip counts in
more cases. Also, this happens to finally fix the remaining testcases
in PR1301.

Now that IndVarSimplify is being more aggressive, it occasionally runs
into the problem where ScalarEvolutionExpander's code for avoiding
duplicate expansions makes it difficult to ensure that all expanded
instructions dominate all the instructions that will use them. As a
temporary measure, IndVarSimplify now uses a FixUsesBeforeDefs function
to fix up instructions inserted by SCEVExpander. Fortunately, this code
is contained, and can be easily removed once a more comprehensive
solution is available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 02:17:14 +00:00
Evan Cheng
6ed34918eb Avoid unneeded SIB byte encoding. Patch by Zoltan Varga. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71520 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 00:07:35 +00:00
Jay Foad
8d730fbde5 Don't #include DerivedTypes.h from TargetData.h. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71468 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 19:38:09 +00:00
Dan Gohman
1f3be1a1fe Fix two wording errors that Duncan spotted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71459 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 18:51:16 +00:00
Dan Gohman
0d9bb68d6d LLVM has unaligned loads and stores now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71449 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 18:06:05 +00:00
Dan Gohman
5c8274b5e3 Upgrade this example to new-style syntax. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71447 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 18:04:52 +00:00
Dan Gohman
3cd90a18bb Convert a subtract into a negate and an add when it helps x86 
address folding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71446 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 18:02:53 +00:00
Chris Lattner
32c5f17024 remove some done things: we have nocapture and SROA is smarter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71443 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 17:41:40 +00:00
Chris Lattner
d919a8bc8a add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71442 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 17:36:33 +00:00
Jay Foad
7524b59062 Change TargetData::getIntPtrType() to return an IntegerType instead of 
just a Type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71426 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 11:13:47 +00:00
Sanjiv Gupta
e0b4b0e436 Fix more naming issues. 
compiler libcalls start with .lib. now.
fixed section names.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71424 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 08:52:04 +00:00
Sanjiv Gupta
0608b49819 Detect calls to compiler intrinsics and emit an extern declarations 
only for those. These extern declarations to intrinsics are currently 
being emitted at the bottom of generated .s file, which works fine with
gpasm(not sure about MPSAM though).
PIC16 linker generates errors for few cases (function-args/struct_args_5) if you do not include any
extern declarations (even if no intrinsics are being used), but that
needs to be fixed in the linker itself.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71423 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-11 06:01:38 +00:00
Sanjiv Gupta
af3fdb5dc4 Module iterator contains list of filescope functions as well, we don't need to emit and global declarations for them. This was working earlier and was broken during one of the recent commit for PIC16 naming. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71394 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-10 16:18:39 +00:00
Anton Korobeynikov
9c11d21d90 Add imm-reg and imm-mem patters for cmp on msp430 
(imm is allowed to be source operand, not dest...)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71393 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-10 14:49:00 +00:00
Sanjiv Gupta
211f3624ef Changed lowering and asmprinter to use ABI Names class called PAN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71386 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-10 05:23:47 +00:00
Eli Friedman
cea03cdb69 Remove a completed optimization. Add a potential optimization I ran 
into.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71352 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-09 08:40:15 +00:00
Duncan Sands
777d2306b3 Rename PaddedSize to AllocSize, in the hope that this 
will make it more obvious what it represents, and stop
it being confused with the StoreSize.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71349 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-09 07:06:46 +00:00
Sanjiv Gupta
09560f805e Use 16 bit arithmetic while retrieving the address of callee's frame during indirect function calls, and set pclath before every call to retrieve the frame address. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71323 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-09 05:11:19 +00:00
Evan Cheng
82ae933e55 PPC::B and PPC::BCC's target operand may be an immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71282 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 23:09:25 +00:00
Anton Korobeynikov
c1c6ef8f74 Factor out cycle-finder code and make it generic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71241 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:51:58 +00:00
Anton Korobeynikov
da4d2f63d8 Allow 8 bit select in custom inserter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71239 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:51:21 +00:00
Anton Korobeynikov
0616c3b678 Expand UREM / SREM into libcalls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71236 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:50:41 +00:00
Anton Korobeynikov
1cb0acee8a Add 8 bit select 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71235 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:50:26 +00:00
Chris Lattner
4992196322 Fix PR4152: asm constraint validation happens before dag combine, so we 
need to work a bit to combine things like (x+c1+c2) into x+c3.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71232 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 18:23:14 +00:00
Evan Cheng
45e0010e14 Optimize code placement in loop to eliminate unconditional branches or move unconditional branch to the outside of the loop. e.g. 
///       A:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       <fallthrough to B>                                                                                                                                                 
///                                                                                                                                                                          
///       B:  --> loop header                                                                                                                                                
///       ...                                                                                                                                                                
///       jcc <cond> C, [exit]                                                                                                                                               
///                                                                                                                                                                          
///       C:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       jmp B                                                                                                                                                              
///                                                                                                                                                                          
/// ==>                                                                                                                                                                      
///                                                                                                                                                                          
///       A:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       jmp B                                                                                                                                                              
///                                                                                                                                                                          
///       C:  --> new loop header                                                                                                                                            
///       ...                                                                                                                                                                
///       <fallthough to B>                                                                                                                                                  
///                                                                                                                                                                          
///       B:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       jcc <cond> C, [exit] 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71209 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 06:34:09 +00:00
Nick Lewycky
4a228864f2 Add missing #include for "strlen" which is used inline in this header. Fixes 
build under gcc 4.3.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71208 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 06:22:25 +00:00
Sanjiv Gupta
573eb5e573 Moved pic16 naming functions to correct place. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71207 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-08 04:50:14 +00:00
Evan Cheng
a9bb0675e5 Eliminate compiler warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71149 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-07 05:31:56 +00:00
Oscar Fuentes
d5e8d821dd CMake: Updated lib/Target/PIC16/CMakeLists.txt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71115 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-06 20:40:05 +00:00
Dale Johannesen
43e91b9c2f Use X86AddrNumOperands instead of magic constant one 
more place.  This fixes a bunch of x86-64 JIT regressions.
(Introduced when the value of the magic constant changed
in 68645.  At the time apparently nobody noticed; failures
were hidden in 70343-70439 by an unrelated bug, so showed
up again as "new" failures in 70440.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71106 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-06 19:04:30 +00:00
Sanjiv Gupta
d8d27f4a4b Emit banksel and movlp instructions. 
Split large global data (both initialized and un-initialized) into multiple sections of <= 80 bytes.
Provide routines to manage PIC16 ABI naming conventions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71073 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-06 08:02:01 +00:00
Chris Lattner
1777d0c6c5 Add basic support for code generation of 
addrspace(257) -> FS relative on x86.  Patch by Zoltan Varga!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70992 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-05 18:52:19 +00:00
Evan Cheng
ef1840173c Revert part of 70929 that has to do with determining whether a SIB byte is needed. It causes a lot of x86_64 JIT failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-05 18:18:57 +00:00
Evan Cheng
d923fc621f Move getInstrOperandRegClass from the scheduler to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70950 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-05 00:30:09 +00:00
Evan Cheng
b0030ddca4 - Avoid the longer SIB encoding on x86_64 when it's not needed. 
- Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp
Patch by Zoltan Varga.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70929 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-04 22:49:16 +00:00
Dan Gohman
7d04e4a7c0 X86FastISel doesn't support the -tailcallopt ABI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70902 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-04 19:50:33 +00:00
Anton Korobeynikov
cffb5284f1 Fix code emission for conditional branches. 
Patch by Collin Winter!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70898 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-04 19:10:38 +00:00
Mike Stump
fe095f39e7 Restore minor deletion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70892 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-04 18:40:41 +00:00
Anton Korobeynikov
87e3caf819 Handle implicit zext in a better way. Shamelessly stolen from x86 backend. 
Thanks for Dan Gohman for suggestion!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70782 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 15:50:18 +00:00
Anton Korobeynikov
60871cb40c Update due to mainline API change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70769 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:19:42 +00:00
Anton Korobeynikov
7594884648 Add TODO list :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70768 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:19:24 +00:00
Anton Korobeynikov
1bb8cd723d Make handling of conditional stuff much more straightforward 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70767 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:19:09 +00:00
Anton Korobeynikov
1fcfb6b6d2 Temporary disable imm patterns for cmp. Actually, all cmp-related stuff (select_cc, setcc, br_cc). needs to be rethought 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70766 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:18:50 +00:00
Anton Korobeynikov
f2f540261b Expand divisions into libcalls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70765 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:18:33 +00:00
Anton Korobeynikov
b78e214274 Custom lower SIGN_EXTEND 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70763 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:17:49 +00:00
Anton Korobeynikov
1394db0eeb Some eye-candy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70762 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:17:31 +00:00
Anton Korobeynikov
6130fc8ea3 Print function header / footer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70761 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:17:11 +00:00
Anton Korobeynikov
d9e89f6ea4 Fix printing: je => jeq 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70760 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:16:54 +00:00
Anton Korobeynikov
bf8ef3f29d Add 8bit shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70759 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:16:37 +00:00
Anton Korobeynikov
e699d0f549 Handle logical shift right (at least I hope so :) ) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70758 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:16:17 +00:00
Anton Korobeynikov
e375a7c768 Handle anyext 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70757 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:57 +00:00
Anton Korobeynikov
0dbf292f68 Expand all sorts of indirect branches 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70755 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:40 +00:00
Anton Korobeynikov
8644af3690 Add InsertBranch() hook for tail mergeing 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70754 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:22 +00:00
Anton Korobeynikov
49ebc22784 Implement bswap 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70753 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:03 +00:00
Anton Korobeynikov
5d59f68ade Properly handle ExternalSymbol's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70752 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:14:46 +00:00
Anton Korobeynikov
8725bd22bf Expand muls (all mulls!) to libcalls for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70751 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:14:25 +00:00
Anton Korobeynikov
b8f03c9578 Provide addc and subc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70748 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:13:34 +00:00
Anton Korobeynikov
ea54c9846b Add left shift 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70747 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:13:17 +00:00
Anton Korobeynikov
824d8ddae8 Add direct branch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70746 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:12:58 +00:00
Anton Korobeynikov
0af5af823b It's error-prone to maintain two separate variants of asmprinting stuff, one of which is even used. Drop second (aka 'intel') variant of operands. It can be added later, if needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70745 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:12:37 +00:00
Anton Korobeynikov
8b528e52ee Lower select with custom inserted and make condjumps generic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70744 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:12:23 +00:00
Anton Korobeynikov
ed1a51af37 Add first draft for conditions, conditional branches, etc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70743 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:12:06 +00:00
Anton Korobeynikov
6e4f62790b Hanle i8 returns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70742 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:11:48 +00:00
Anton Korobeynikov
c08163e72d Small tweaking 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70741 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:11:35 +00:00
Anton Korobeynikov
ce45d30fa1 Add prologue/epilogue emission. Fix frame pointer handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70740 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:11:20 +00:00
Anton Korobeynikov
d5047cb9f7 Add code for save/restore of callee-saved registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70739 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:11:04 +00:00
Anton Korobeynikov
875e1eb8ab Two more hooks for RA and FP registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70738 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:10:40 +00:00
Anton Korobeynikov
40477317f3 Proper handle loading of effective address of stack slot stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70737 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:10:26 +00:00
Anton Korobeynikov
82e46c2595 Match frame indexes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:10:11 +00:00
Anton Korobeynikov
aa29915b58 First draft of stack slot loads / stores lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70735 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:09:57 +00:00
Anton Korobeynikov
cf14ae5500 Reverse order of memory arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70734 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:09:40 +00:00
Anton Korobeynikov
aecfa7897f Remove bogus pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70733 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:09:24 +00:00
Anton Korobeynikov
1deea5f3a7 Correct asmprinting of memory operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70732 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:09:10 +00:00
Anton Korobeynikov
0eb6af40e3 Match wrapper node for address 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70731 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:08:51 +00:00
Anton Korobeynikov
3513ca81c6 Add lowering for global address nodes. Not pretty efficient though. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70730 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:08:33 +00:00
Anton Korobeynikov
3c2684d136 Some early full call lowering draft for direct calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70729 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:08:13 +00:00
Anton Korobeynikov
b561264d2b Add call frame setup instruction elimination and lowerid for bunch of call-related stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70728 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:07:54 +00:00
Anton Korobeynikov
4428885c5a Add CALL lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70727 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:07:31 +00:00
Anton Korobeynikov
01e0e8d119 Add bunch of mem-whatever patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70726 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:07:10 +00:00
Anton Korobeynikov
2682bf5979 Add bunch of reg-mem inst patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70725 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:06:46 +00:00
Anton Korobeynikov
54f30d3fc9 Add normal and trunc stores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70724 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:06:26 +00:00
Anton Korobeynikov
36b6e533c1 Basic support for mem=>reg moves 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70723 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:06:03 +00:00
Anton Korobeynikov
51c31d6888 Add 8-bit insts. zext behaviour is not modelled yet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70722 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:05:42 +00:00
Anton Korobeynikov
cf9adf2cbb Add 8-bit regclass and pattern for sext_inreg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70721 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:05:22 +00:00
Anton Korobeynikov
0fc32dae8f Add pattern for OR 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70720 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:05:00 +00:00
Anton Korobeynikov
6ee626a1c1 Add reg-imm variants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70719 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:04:41 +00:00
Anton Korobeynikov
c8166ac760 Add hint to nop 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70718 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:04:23 +00:00
Anton Korobeynikov
0ba0a89c6b Add more instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70717 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:04:06 +00:00
Anton Korobeynikov
b8639f5214 Cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70716 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:03:50 +00:00
Anton Korobeynikov
d2c94ae49e Add dummy lowering for shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70715 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:03:33 +00:00
Anton Korobeynikov
1476d97037 We don't have any div at all - thus mark it as expensive 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70714 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:03:14 +00:00
Anton Korobeynikov
8d7bb3998b We're not going to spend 100% of time in interrupts, do we? :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70713 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:02:57 +00:00
Anton Korobeynikov
431beb5fa7 Add simple reg-reg add. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70712 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:02:39 +00:00
Anton Korobeynikov
fff5f76c46 gas uses lower letter for register names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70711 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:02:22 +00:00
Anton Korobeynikov
1df221f2bb Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70710 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:02:04 +00:00
Anton Korobeynikov
09c42f509a Add function body printing routine 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70709 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:01:41 +00:00
Anton Korobeynikov
f3085ac973 Add 'msp430' target triple recognizer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70708 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:01:23 +00:00
Anton Korobeynikov
e37db97928 Make emit{Prologue,Epilogue}() noop for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:01:04 +00:00
Anton Korobeynikov
fbf165a74b Add callee-saved regs & reg classes getter hooks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70706 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:00:46 +00:00
Anton Korobeynikov
3a4fbcfd33 Add simple FP indicator for given function hook 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70705 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:00:28 +00:00
Anton Korobeynikov
dcb802cf7b Provide set of reserved registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70704 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:00:11 +00:00
Anton Korobeynikov
fd1b7c778c Add proper ISD::RET lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70703 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:59:50 +00:00
Anton Korobeynikov
c8fbb6ae20 Add first draft of MSP430 calling convention stuff and draft of ISD::FORMAL_ARGUMENTS node lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70702 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:59:33 +00:00
Anton Korobeynikov
2dd6cdc920 Fix register names, fix register allocation order, handle frame pointer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70701 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:59:16 +00:00
Anton Korobeynikov
43ed64a182 Clearify the usage and add some debug stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70700 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:58:58 +00:00
Anton Korobeynikov
9e12339cb2 Cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70699 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:58:40 +00:00