Chris Lattner
ffc0b2663e
Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns
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using test, which provides nice simplifications like:
- movl %edi, %ecx
- andl $2, %ecx
- cmpl $0, %ecx
+ testl $2, %edi
je LBB1_11 #cond_next90
There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 20:33:45 +00:00
Chris Lattner
b14ca605d7
Some notes on better load folding we could do
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30155 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 20:32:01 +00:00
Evan Cheng
ec3bc39413
Consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30152 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 19:03:48 +00:00
Jim Laskey
05a059d5d8
Make the x86 asm flavor part of the subtarget info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30146 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 12:23:47 +00:00
Evan Cheng
95971c51b0
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30140 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 01:17:57 +00:00
Evan Cheng
48ff2fb129
Watch out for variable_ops instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30135 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 20:32:45 +00:00
Evan Cheng
3530bafe00
Variable ops instructions may ignore the last few operands for code emission.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30134 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 20:24:14 +00:00
Jim Laskey
7c95ad4fb0
Oops - forgot to update banner.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30131 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 19:21:41 +00:00
Jim Laskey
ec0d9fe2b2
Separate target specifc asm properties from asm printers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30127 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 18:35:33 +00:00
Jim Laskey
563321a258
Separate target specific asm properties from the asm printers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30126 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 18:34:40 +00:00
Rafael Espindola
b52b54d4af
add the orr instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30125 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 18:03:12 +00:00
Chris Lattner
6cdb1ea610
Bugfix to work with the two-addr changes that have been made in the tree recently
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30121 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 20:27:32 +00:00
Evan Cheng
2f5993bcf1
Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30113 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 08:32:49 +00:00
Evan Cheng
23b3122c44
JIT encoding bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30112 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 05:59:25 +00:00
Chris Lattner
0e42d81a83
Update the X86 JIT to make it work with the new two-addr changes. This also
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adds assertions that check to make sure every operand gets emitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30110 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 02:52:35 +00:00
Chris Lattner
09e460662a
Completely eliminate def&use operands. Now a register operand is EITHER a
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def operand or a use operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 02:31:13 +00:00
Chris Lattner
2926869b4a
Fix a long-standing wart in the code generator: two-address instruction lowering
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actually *removes* one of the operands, instead of just assigning both operands
the same register. This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.
Changing this also gets rid of a bunch of hacky code in various places.
This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 02:12:02 +00:00
Andrew Lenharth
89c0b4a90e
jmp_bufs are this big on alpha.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30107 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 00:22:25 +00:00
Rafael Espindola
3a02f020eb
add support for returning 64bit values
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 19:05:01 +00:00
Chris Lattner
2130b99eb2
Fix some X86 JIT failures. This should really come from TargetJITInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30102 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 18:48:41 +00:00
Duraid Madina
2a0013f59f
add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
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Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30095 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 06:21:35 +00:00
Chris Lattner
1911fd4f85
Completely rearchitect the interface between targets and the pass manager.
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This pass:
1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
output, move all this to common code, and give targets hooks they can
implement.
3. Commonalize the target population stuff between file emission and JIT
emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
paves the way for "fast -O0" stuff in the CFE later, and now LLC could
lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
which is now orthogonal to the fact that JIT'ing is being done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 04:14:57 +00:00
Chris Lattner
dd842e12e1
Add accessor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30080 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 04:08:58 +00:00
Chris Lattner
3199af2874
remove #include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30078 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 04:06:01 +00:00
Chris Lattner
c4fa386471
Simplify target construction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30070 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-03 18:44:02 +00:00
Rafael Espindola
bc4cec9a62
add the SETULT condition code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30067 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-03 13:19:16 +00:00
Rafael Espindola
5f450d2948
add more condition codes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30056 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-02 20:24:25 +00:00
Evan Cheng
1453de5aa9
Oops. Bad typo. Without the check of N1.hasOneUse() bad things can happen.
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Suppose the TokenFactor can reach the Op:
[Load chain]
^
|
[Load]
^ ^
| |
/ \-
/ |
/ [Op]
/ ^ ^
| .. |
| / |
[TokenFactor] |
^ |
| |
\ /
\ /
[Store]
If we move the Load below the TokenFactor, we would have created a cycle in
the DAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30040 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-01 22:52:28 +00:00
Chris Lattner
aca36b9329
Use a couple of multiclass patterns to factor some integer ops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30039 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-01 22:28:02 +00:00
Chris Lattner
1662239a5e
remove a bunch of comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30038 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-01 22:16:22 +00:00
Evan Cheng
c9676deb23
Minor asm fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29965 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-29 22:14:48 +00:00
Evan Cheng
4a888584ea
Remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29962 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-29 21:42:58 +00:00
Evan Cheng
780413d462
Don't performance load/op/store transformation if op produces a floating point
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or vector result. X86 does not have load/mod/store variants of those
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29957 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-29 18:37:37 +00:00
Evan Cheng
e50794adda
- Enable x86 isel preprocessing by default unless -fast is specified.
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- Also disable isel load folding if -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29956 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-29 18:28:33 +00:00
Jim Laskey
ce50a165c7
Handle callee saved registers in dwarf frame info (lead up to exception
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handling.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29954 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-29 16:24:26 +00:00
Jim Laskey
85aaf9088e
Tidy up options.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29953 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-29 15:13:10 +00:00
Evan Cheng
82a35b34fb
Avoid making unneeded load/mod/store transformation which can hurt performance.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29952 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-29 06:44:17 +00:00
Nate Begeman
06abd22b1a
Make ppc64 jit kinda work right. About 2/3 of Olden passes with this,
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there are clearly some encoding bugs lurking in there somewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29949 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-29 02:30:59 +00:00
Evan Cheng
67afeceaf0
On Mac, print jump table entries after the function to work around a linker issue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29946 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-28 22:14:16 +00:00
Evan Cheng
70e674e95e
Add an optional pass to preprocess the DAG before x86 isel to allow selecting more load/mod/store instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29943 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-28 20:10:17 +00:00
Reid Spencer
3a9ec2463d
For PR387:
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Close out this long standing bug by removing the remaining overloaded
virtual functions in LLVM. The -Woverloaded-virtual option is now turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29934 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-28 01:02:49 +00:00
Chris Lattner
a4f0b3a084
s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-27 12:54:02 +00:00
Evan Cheng
0b828e08f9
Do not use getTargetNode() and SelectNodeTo() which takes more than 3
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SDOperand arguments. Use the variants which take an array and number instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29907 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-27 08:14:06 +00:00
Chris Lattner
16c7fe5ca3
Fix target matching weights, so that ppc-darwin modules are codegen with the
...
ppc target, not the itanium target, when run on an itanium machine.
This should fix the CodeGen/PowerPC regtest failures on itanium.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29903 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-26 21:33:05 +00:00
Evan Cheng
95514bae73
SelectNodeTo now returns a SDNode*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29901 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-26 08:00:10 +00:00
Evan Cheng
9ade218533
Select() no longer require Result operand by reference.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29898 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-26 05:34:46 +00:00
Evan Cheng
6da2f3268d
Match tblgen changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-26 01:07:58 +00:00
Evan Cheng
0469990e79
Match tblgen changes; clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29894 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-26 01:05:16 +00:00
Chris Lattner
8d3e1d6613
Give a good error message when we try to jit inline asm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29891 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-26 00:47:03 +00:00
Evan Cheng
1822ffbab7
Add a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29889 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-25 23:29:06 +00:00
Evan Cheng
b9ca92661c
Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The
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asm printer will print it as offset*4. e.g. bne cr0, $+8.
The PPC code emitter was expecting the offset to be number of instructions, not
number of bytes. This fixes a whole bunch of JIT failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29885 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-25 21:54:44 +00:00
Jim Laskey
4c2c9031ac
Fix some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29880 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-25 19:40:59 +00:00
Rafael Espindola
755be9b3de
use @ for comments
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store LR in an arbitrary stack slot
add support for writing varargs functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29876 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-25 17:55:16 +00:00
Chris Lattner
bf16982e86
We compile this into:
...
_swap_16:
slwi r2, r3, 24
rlwimi r2, r3, 8, 8, 15
srwi r3, r2, 16
blr
now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29864 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-24 23:06:02 +00:00
Chris Lattner
ad69970c4a
Owen implemented this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29863 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-24 23:03:33 +00:00
Rafael Espindola
cdda88cd12
add the "eq" condition code
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implement a movcond instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29857 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-24 17:19:08 +00:00
Rafael Espindola
6f602de3b6
create a generic bcond instruction that has a conditional code argument
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29856 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-24 16:13:15 +00:00
Rafael Espindola
687bc49d1a
initial support for branches
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-24 13:45:55 +00:00
Nate Begeman
eb883af390
Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it
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does emit linkable .o files in very simple cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29850 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-23 21:08:52 +00:00
Rafael Espindola
f4d40050f1
add a README.txt
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29814 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-22 12:22:46 +00:00
Rafael Espindola
3c000bf817
initial support for select
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29802 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-21 22:00:32 +00:00
Rafael Espindola
a5dfc835d4
add the and instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29793 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-21 13:58:59 +00:00
Rafael Espindola
3717ca965b
call computeRegisterProperties
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29780 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-20 01:49:49 +00:00
Chris Lattner
5ea64fd9eb
Constify some methods. Patch provided by Anton Vayvod, thanks!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29756 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 22:00:08 +00:00
Chris Lattner
5ea7a68e15
Revert this patch, the front-end has been fixed to make it unneccesary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29752 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 18:43:24 +00:00
Chris Lattner
b5bc04d38a
'g' is handled by the front-end.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 18:12:28 +00:00
Andrew Lenharth
ad1ed016ce
Fix handling of 'g'. Closes 883
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29750 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 17:50:12 +00:00
Rafael Espindola
f3a335cedf
add a "load effective address"
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29748 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 17:09:40 +00:00
Andrew Lenharth
d337295fb0
Add the 'c' constraint as needed by the linux kernel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29747 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 16:07:50 +00:00
Andrew Lenharth
c63e56ee5f
Add support for S and D constraints, as needed to compile the linux kernel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29746 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 15:35:43 +00:00
Evan Cheng
eb8730d131
Doh. Incorrectly inverted condition. Also add a isOnlyUse check to match tablegen.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29741 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-16 23:59:00 +00:00
Rafael Espindola
ec46ea34dc
Declare the callee saved regs
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Remove the hard coded store and load of the link register
Implement ARMFrameInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29727 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-16 14:43:33 +00:00
Evan Cheng
23329f5e03
SelectNodeTo() may return a SDOperand that is different from the input.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29726 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-16 07:30:09 +00:00
Evan Cheng
4b790573f7
RET_FLAG has an optional input flag, but it does not produce a flag result.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29725 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-16 07:28:58 +00:00
Chris Lattner
5c36d78462
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29722 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-16 02:47:44 +00:00
Chris Lattner
ccbe2ec890
Fix PowerPC/2006-08-15-SelectionCrash.ll and simplify selection code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29715 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-15 23:48:22 +00:00
Rafael Espindola
61369da0e5
select code like
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ldr rx, [ry, #offset]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29664 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-14 19:01:24 +00:00
Nate Begeman
52a51e38dc
Emit .set directives for jump table entries when possible, which reduces
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the number of relocations in object files, shrinkifying them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29650 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-12 21:29:52 +00:00
Chris Lattner
f6e190fae0
Fix a bug in a recent refactoring that broke a bunch of stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29649 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-12 07:20:05 +00:00
Chris Lattner
2b5a82fe1d
eliminate extraneous blank line
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29627 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 21:08:16 +00:00
Chris Lattner
e219945348
Eliminate use of getNode that takes a vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29614 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:38:39 +00:00
Chris Lattner
8742867f95
elimiante use of getNode that takes vector of operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29612 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:22:35 +00:00
Chris Lattner
e0e42d457e
eliminate use of getNode that takes vector of operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29611 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:21:12 +00:00
Chris Lattner
e21492bc4e
eliminate use of getNode that takes vector<SDOperand>. Wrap a really long line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29610 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:19:54 +00:00
Chris Lattner
79e490aa23
Convert vectors to fixed sized arrays and smallvectors. Eliminate use of getNode that takes a vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29609 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:18:05 +00:00
Chris Lattner
325f0a129e
Fix miscompilation of float vector returns. Compile code to this:
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_func:
vsldoi v2, v3, v2, 12
vsldoi v2, v2, v2, 4
blr
instead of:
_func:
vsldoi v2, v3, v2, 12
vsldoi v2, v2, v2, 4
*** vor f1, v2, v2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29607 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 16:47:32 +00:00
Evan Cheng
64a752f7c7
Match tablegen changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29604 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 09:08:15 +00:00
Evan Cheng
bb7b844bec
CALLSEQ_* produces chain even if that's not needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29603 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 09:03:33 +00:00
Evan Cheng
311ace0391
Convert more calls of getNode() that takes a vector to pass in the start of an array.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29601 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 07:35:45 +00:00
Rafael Espindola
a1ab92d8b7
correctly set LocalAreaOffset of TargetFrameInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29589 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09 17:37:45 +00:00
Rafael Espindola
7a53bd0890
fix the spill code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29583 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09 16:41:12 +00:00
Rafael Espindola
2c8cdc6c1a
fix the loading of the link register in emitepilogue
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29580 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09 13:15:47 +00:00
Rafael Espindola
46adf8119d
change the addressing mode of the str instruction to reg+imm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29571 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 20:35:03 +00:00
Rafael Espindola
1a00946817
initial support for variable number of arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29567 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 13:02:29 +00:00
Chris Lattner
bd564bfc63
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
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in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 02:23:42 +00:00
Evan Cheng
f4b4c416d3
Eliminate reachability matrix. It has to be calculated before any instruction
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selection is done. That's rather expensive especially in situations where it
isn't really needed.
Move back to a searching the predecessors, but make use of topological order
to trim the search space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29559 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 00:31:00 +00:00
Evan Cheng
2ef88a09b7
Match tablegen isel changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29549 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-07 22:28:20 +00:00
Evan Cheng
e46e1a5da7
Make XMM, FP register dwarf register numbers consistent with gcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29543 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-07 21:02:39 +00:00
Rafael Espindola
341b864c8d
use a 'register pressure reducing' scheduler
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make sure only one move is used in a hello world
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29520 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-04 12:48:42 +00:00
Rafael Espindola
6312da0fc7
Bug fix: always generate a RET_FLAG in LowerRET
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fixes ret_null.ll and call.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29519 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 22:50:11 +00:00
Chris Lattner
fb1fcf08c9
remove some more dead sparcv9 support stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29506 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 18:55:44 +00:00
Chris Lattner
7a2144b060
remove a dead proto
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29505 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 18:51:04 +00:00
Jim Laskey
6b59a36564
Get darwin intel debugging up and running.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29504 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 17:27:09 +00:00
Rafael Espindola
f4fda80403
add and use ARMISD::RET_FLAG
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29499 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 17:02:20 +00:00
Evan Cheng
4876dc5b13
Reflect change to AssignTopologicalOrder().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29480 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-02 22:01:32 +00:00
Evan Cheng
686c4a18f1
Use of vector<bool> causes some horrendous compile time regression (2x)!
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Looks like libstdc++ implementation does not scale very well. Switch back
to using directly managed arrays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29469 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-02 09:18:33 +00:00
Nate Begeman
83a6d49102
Update the readme to remove duplicate information and clarify the loop
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problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29468 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-02 05:31:20 +00:00
Nate Begeman
8f74680c78
Disable LSR at -fast
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29467 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-02 05:29:40 +00:00
Rafael Espindola
1ed3af11b5
start comments with #
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move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29451 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-01 18:53:10 +00:00
Rafael Espindola
06c1e7eacb
implement LowerConstantPool and LowerGlobalAddress
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29433 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-01 12:58:43 +00:00
Evan Cheng
db3cc3d7d6
Factor topological order code to SelectionDAG. Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29430 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-01 08:17:22 +00:00
Chris Lattner
f76d180c95
Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll.
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The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29420 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 23:26:50 +00:00
Rafael Espindola
6d581e8d15
handle GlobalValue::InternalLinkage in doFinalization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29417 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 20:38:13 +00:00
Evan Cheng
ca3202893c
Remove a duplicate pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29414 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 18:43:10 +00:00
Evan Cheng
043eb829cc
Remove a duplicate pattern/
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29413 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 18:42:49 +00:00
Chris Lattner
dacbe7b171
Make functions with an "asm" name propagate that asm name into the cbe.c file.
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This fixes link errors on programs with these on targets with prefixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29390 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 20:58:47 +00:00
Chris Lattner
0d72a20630
Fix some ppc64 issues with vector code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29384 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 16:45:47 +00:00
Evan Cheng
37e1803a66
Can't spell.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29383 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 06:33:41 +00:00
Evan Cheng
ba27731f35
Some clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29382 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 06:05:06 +00:00
Evan Cheng
f2dfafcbc1
Rename IsFoldableBy to CanBeFoldedleBy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29376 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 01:03:48 +00:00
Evan Cheng
2584d93acf
Node selected into address mode cannot be folded.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 00:49:31 +00:00
Evan Cheng
2641cad180
Remove InFlightSet hack. No longer needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 00:47:19 +00:00
Evan Cheng
63ce5682e2
Another duh. Determine topological order before any target node is added.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29371 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 00:10:59 +00:00
Evan Cheng
0e2c36fcc2
Brain cramp..
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29370 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 23:35:40 +00:00
Evan Cheng
b3c334674d
Allocating too large an array for ReachibilityMatrix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29367 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 22:35:40 +00:00
Evan Cheng
5fa5de80e2
Calculate the portion of reachbility matrix on demand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29366 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 22:10:00 +00:00
Evan Cheng
8cbc93aadb
isNonImmUse is replaced by IsFoldableBy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29365 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 21:19:10 +00:00
Evan Cheng
f141cc46fa
Resolve BB references with relocation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29351 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 18:21:10 +00:00
Evan Cheng
7e6e441394
synchronizeICache removeed from TargetJITInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29348 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 17:33:48 +00:00
Evan Cheng
a8df1b4296
Use reachbility information to determine whether a node can be folded into another during isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29346 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 16:44:36 +00:00
Rafael Espindola
b01c4bbb45
emit global constants
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29344 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 11:38:51 +00:00
Evan Cheng
33e9ad96c8
Remove NodeDepth
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29338 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 06:40:15 +00:00
Jim Laskey
ea348585c8
Use the predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29322 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 02:05:13 +00:00
Nate Begeman
2f1ae88445
Support jump tables when in PIC relocation model
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29318 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 01:13:04 +00:00
Jim Laskey
30ffe1b776
Prevent creation of MachineDebugInfo for intel unless it is darwin. RC842.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29317 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 01:12:23 +00:00
Evan Cheng
ae1d33f82d
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-26 21:49:52 +00:00
Chris Lattner
35d86fef1f
Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29307 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-26 21:12:04 +00:00
Evan Cheng
55fc28076f
- Refactor the code that resolve basic block references to a TargetJITInfo
...
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
of code is emitted to flush the icache. This ensures correct execution
on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29276 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-25 20:40:54 +00:00
Evan Cheng
55371739de
Can't commute shufps. The high / low parts elements come from different vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29275 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-25 20:25:40 +00:00
Rafael Espindola
fac00a93a9
implement function calling of functions with up to 4 arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29274 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-25 20:17:20 +00:00
Evan Cheng
46cd65dfa6
Done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29262 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 23:07:23 +00:00
Rafael Espindola
44819cb20a
implemented sub
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correctly update the stack pointer in the prologue and epilogue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 12:26:16 +00:00
Evan Cheng
625518002d
This opt is now handled in DAG combine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29243 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 08:26:46 +00:00
Evan Cheng
1e1a88e8cc
A splat of a vector constant of all zero or all one is the vector constant.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29234 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-20 23:09:47 +00:00
Evan Cheng
3c62934268
Missing a space.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29233 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-20 22:52:28 +00:00
Evan Cheng
cbac2fa23a
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29228 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-20 21:37:39 +00:00
Evan Cheng
abb4d7829f
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29215 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 21:29:30 +00:00
Jim Laskey
c06fe8a5ac
Do once flag never set to true.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29214 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 19:33:08 +00:00
Jim Laskey
613f1f83fd
Tidy up a few things.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29213 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 19:32:06 +00:00
Jim Laskey
f19807cecb
Reduce size of routine. Shrinks .o by 37%.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29210 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 17:53:32 +00:00
Chris Lattner
2a785500e0
bswapped load/store instructions are only availble in indexed addressing form.
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As such, use xoaddr (indexed only), not xaddr for address selection.
This fixes CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll, a crash compiling lencod.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29208 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 17:15:36 +00:00
Jim Laskey
e29c2f5ca0
Bug#834 ICE (crash in code generator?) when building PCH .
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Missing Darwin check in Intel ATT ASM printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29204 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 11:54:50 +00:00
Evan Cheng
1c96953d2d
Misc. new entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29202 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 06:06:24 +00:00
Evan Cheng
1693e489e6
INC / DEC instructions have shorter code size than ADD32ri8, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29194 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 00:27:29 +00:00
Evan Cheng
e6f32034db
Add code size to target instruction use it as the 3rd isel sorting tie-breaker.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29193 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 00:24:41 +00:00
Rafael Espindola
355746359e
initial prologue and epilogue implementation. Need to define add and sub before finishing it :-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29175 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 17:00:30 +00:00
Chris Lattner
303c695529
Make the implicit def instructions look like other instrs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 16:33:26 +00:00
Rafael Espindola
84b19be6ab
skeleton of a lowerCall implementation for ARM
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29159 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-16 01:02:57 +00:00
Chris Lattner
ba4733d901
Remove what little AIX support we have. It has never been tested and isn't
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complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-15 01:24:23 +00:00
Chris Lattner
a3b5939caa
Add an out-of-line virtual method for X86DwarfWriter to give it a home.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29153 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14 23:05:05 +00:00
Chris Lattner
518f9c7ad0
Add missing PPC64 extload/truncstores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29140 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14 04:42:02 +00:00
Chris Lattner
1eeedaea59
Add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29139 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14 04:07:29 +00:00
Chris Lattner
a606b70cf5
Another fix in the rotate encodings, needed when the first two operands are not
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the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29136 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-13 21:52:41 +00:00
Chris Lattner
45c04fc676
Print negative immediates as negative values instead of large constants
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when using the immshifted addressing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29130 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 23:24:02 +00:00
Chris Lattner
b2c0650ad3
Fix encoding of rotates, such as rldicl
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29128 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 22:08:13 +00:00
Chris Lattner
3bc8a765a9
Implement PPC64 relocations types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29125 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 21:23:20 +00:00
Chris Lattner
3d6721a4a1
An overaggressive #ifdef allows a function to fall off the bottom of the
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function instead of returning a value. This sometimes allowed the ppc32 jit
to be used in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29123 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 20:42:10 +00:00
Chris Lattner
6d3465793f
Add information preventing several register class constraints from working.
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This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29118 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 16:59:49 +00:00
Chris Lattner
be6a039ad4
The PPC64 JIT needs register numbers to encode instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29114 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 20:53:55 +00:00
Evan Cheng
f7eb5d0b02
Emit inc / dec of registers as one byte instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29110 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 19:49:49 +00:00
Jim Laskey
16d42c6ac6
It was pointed out that DEBUG() is only available with -debug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29106 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 18:25:13 +00:00
Jim Laskey
e37fe9b3a1
Ensure that dump calls that are associated with asserts are removed from
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non-debug build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 17:58:07 +00:00
Rafael Espindola
a4e64359aa
add the memri memory operand
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this makes it possible for ldr instructions with non-zero immediate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 11:36:48 +00:00
Chris Lattner
f4dff84c86
Implement the inline asm 'A' constraint. This implements PR825 and
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CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29101 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 02:54:03 +00:00
Chris Lattner
804e067042
In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 00:48:23 +00:00
Evan Cheng
20adf47dbc
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 21:42:16 +00:00
Evan Cheng
1e60c098cc
Fixed stack objects do not specify alignments, but their offsets are known.
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Use that information when doing the transformation to merge multiple loads
into a 128-bit load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29090 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 21:37:44 +00:00
Chris Lattner
d998938459
Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps
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into i16/i32 load/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29089 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 20:56:58 +00:00
Chris Lattner
5c5f4ca6f1
Mark internal function static
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29085 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 19:53:12 +00:00
Rafael Espindola
aefe14299a
create the raddr addressing mode that matches any register and the frame index
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use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 01:41:35 +00:00
Evan Cheng
206ee9d86c
X86 target specific DAG combine: turn build_vector (load x), (load x+4),
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(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).
e.g.
__m128 test(float a, float b, float c, float d) {
return _mm_set_ps(d, c, b, a);
}
_test:
movups 4(%esp), %xmm0
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-07 08:33:52 +00:00
Chris Lattner
90ac1c0775
Undisable ppc64 jit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29011 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-06 17:10:42 +00:00
Evan Cheng
152ed05353
Added option -code-model to set code model (only used in 64-bit) mode. Valid
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values include small, kernel, medium, large, and default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29009 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-06 01:53:36 +00:00
Evan Cheng
60c07e1aea
Reorg. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28999 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-05 22:17:51 +00:00
Evan Cheng
507b0aa062
Fix JIT on non MacOS X i386 systems.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28992 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-05 07:09:13 +00:00
Andrew Lenharth
441a57041d
These are already implemented
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28990 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-03 18:00:29 +00:00
Andrew Lenharth
78c252c93d
0 offsets for memory operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28989 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-03 17:57:34 +00:00
Evan Cheng
775ff18257
Should just use xorps to clear XMM registers for all data types. pxor is also one byte longer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28984 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 18:04:54 +00:00
Evan Cheng
be33dd95d8
Let X86CompilationCallback pass previous frame and return address to X86CompilationCallback2. Remove alloca hack.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28982 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 01:48:36 +00:00
Evan Cheng
09c545790d
Add shift and rotate by 1 instructions / patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 00:36:51 +00:00
Evan Cheng
a8e83ec8c3
Always use xorps to clear XMM registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28979 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 00:34:23 +00:00
Evan Cheng
d3f6981174
Move .literal4 and .literal8 support into AsmPrinter.cpp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28978 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 00:33:06 +00:00
Chris Lattner
2c79de8018
Hide x86 symbols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28976 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 23:27:49 +00:00
Chris Lattner
9525528a7d
Use hidden visibility to make symbols in an anonymous namespace get
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dropped. This shrinks libllvmgcc.dylib another 67K
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 23:17:24 +00:00
Chris Lattner
2a41a98fb7
shrink libllvmgcc.dylib another 25K
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28971 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 22:00:36 +00:00
Evan Cheng
33c36f306a
Doh.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28963 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 17:56:43 +00:00
Evan Cheng
ee12e8f28d
Oops. Need to keep CP index.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28958 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 07:55:24 +00:00
Evan Cheng
07103d312a
Darwin puts float and double literal constants into literal4 and literal8 sections.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28957 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 07:35:41 +00:00
Andrew Lenharth
7794bd3f94
this case isn't handled
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28948 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 23:19:14 +00:00
Rafael Espindola
49e4415587
handle the "mov reg1, reg2" case in isMoveInstr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 21:52:45 +00:00
Chris Lattner
cccef1c6ff
Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28944 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 21:08:52 +00:00
Chris Lattner
6b76b96c69
Fix ppc64 jump tables
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28941 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:46:17 +00:00
Evan Cheng
4df24f2caf
Remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28938 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:34:14 +00:00
Chris Lattner
9f029a61e9
Print stubs for external globals right.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28936 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:20:53 +00:00
Chris Lattner
f89437d049
Implement 64-bit select, bswap, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28935 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:14:52 +00:00
Chris Lattner
e4172be920
Add a pattern for i64 sra. Print 8-byte units with a space between the .quad
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and the data
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28934 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:07:26 +00:00
Chris Lattner
7ffa9abdad
Fix rewriting frame offsets with ixaddr instructions, which implicitly shift
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the offset two bits to the left.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28933 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:55:49 +00:00
Chris Lattner
5f9faeaa78
PPC doesn't have bit converts to/from i64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:40:08 +00:00
Chris Lattner
2e6b77d803
Add 64-bit MTCTR so that indirect calls work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28931 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:36:44 +00:00
Chris Lattner
1fd81107f3
Fix an incorrect store pattern. This fixes em3d.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:22:50 +00:00
Chris Lattner
563ecfbf82
Implement 64-bit undef, sub, shl/shr, srem/urem
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28929 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:18:41 +00:00
Chris Lattner
7b0c58cd25
Use i32 for shift amounts instead of i64. This gets bisort working.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28927 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 17:34:57 +00:00
Chris Lattner
00659b1781
Add zextload from i32 -> i64, with this, perimeter works.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28926 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 17:30:08 +00:00
Chris Lattner
7e097e4633
Print darwin stub stuff correctly in 64-bit mode. With this, treeadd works in
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ppc64 mode!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28923 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 01:02:25 +00:00
Chris Lattner
529c233498
Fix variable shadowing issue
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28922 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 00:10:13 +00:00
Chris Lattner
c08f902bb7
Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but
...
doesn't work right).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28921 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 00:04:13 +00:00
Chris Lattner
041e9d345f
Rearrange compares, add ADDI8, add sext from 32-to-64 bit register
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28920 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26 23:53:10 +00:00
Chris Lattner
c91a4757b6
Improve PPC64 calling convention support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26 22:48:35 +00:00
Chris Lattner
924c576e9f
Remove two more definitions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28918 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26 22:47:37 +00:00
Chris Lattner
7b4e478768
remove two unused instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28917 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26 22:44:13 +00:00
Evan Cheng
da08d2c39a
Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-24 08:36:10 +00:00
Jim Laskey
89d67faf30
Add and sort "sections" in debug lines. This always stepping through
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code in sections other than ".text", including weak sections like ctors and
dtors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28909 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-23 12:51:53 +00:00
Evan Cheng
74cb064a35
Eliminate unneeded parameter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28907 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-22 00:02:55 +00:00
Evan Cheng
22f71315df
variable_ops instructions such as call can have any number of operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28906 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 23:37:07 +00:00
Andrew Lenharth
df97cc67a6
Add memory operand and int regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28896 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 15:42:36 +00:00
Andrew Lenharth
1725599574
inline asm, at least for floats
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 13:37:27 +00:00
Andrew Lenharth
d1aab35d1a
fix argument problem
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28893 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 01:00:43 +00:00
Chris Lattner
ef95710583
Correct returns of 64-bit values, though they seemed to work before...
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28892 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 00:34:03 +00:00
Chris Lattner
7f7b346e3d
Make these predicates correct in 64-bit mode too.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28890 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:21:20 +00:00
Chris Lattner
b410dc9977
Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28889 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:18:58 +00:00
Chris Lattner
96dc5e5f6d
remove unused flag
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28888 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:15:07 +00:00
Chris Lattner
f2c5bca165
add some logical ops
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28887 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:11:59 +00:00
Chris Lattner
4b25b40486
remove some unused patterns
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28886 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:11:36 +00:00
Chris Lattner
3ae5eef027
Add some more immediate patterns. This allows us to compile:
...
void test6() {
Y = 0xABCD0123BCDE4567;
}
into:
_test6:
lis r2, -21555
lis r3, ha16(_Y)
ori r2, r2, 291
rldicr r2, r2, 32, 31
oris r2, r2, 48350
ori r2, r2, 17767
std r2, lo16(_Y)(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28885 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:03:01 +00:00
Chris Lattner
eded521a17
Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is
...
set, so disable the pattern in that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28884 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:38:59 +00:00
Chris Lattner
0ea70b219a
Add some 64-bit logical ops.
...
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation. For example, we now compile this:
static unsigned long long Y;
void test3() {
Y = 0xF0F00F00;
}
into:
_test3:
li r2, 3840
lis r3, ha16(_Y)
xoris r2, r2, 61680
std r2, lo16(_Y)(r3)
blr
GCC produces:
_test3:
li r0,0
lis r2,ha16(_Y)
ori r0,r0,61680
sldi r0,r0,16
ori r0,r0,3840
std r0,lo16(_Y)(r2)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28883 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:34:10 +00:00
Evan Cheng
e3db4daa16
__i386__, __i386, etc. are not defined for x86-64. Use __x86_64__.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28881 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:11:12 +00:00
Chris Lattner
dd58343857
64-bit bugfix: 0xFFFF0000 cannot be formed with a single lis.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28880 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 21:39:30 +00:00
Chris Lattner
f27bb6de10
Add some patterns for globals, so we can now compile this:
...
static unsigned long long X, Y;
void test1() {
X = Y;
}
into:
_test1:
lis r2, ha16(_Y)
lis r3, ha16(_X)
ld r2, lo16(_Y)(r2)
std r2, lo16(_X)(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28879 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 21:23:06 +00:00
Chris Lattner
4e85e64007
Remove some now-unneeded casts from instruction patterns. With the casts
...
removed, tblgen produces identical output to with them in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28867 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:39:56 +00:00
Chris Lattner
047854f2b7
Add some patterns for ppc64
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28866 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:38:36 +00:00
Chris Lattner
30da68acce
Remove some ugly now-redundant casts.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28864 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:25:29 +00:00
Chris Lattner
a973993c0c
Fix some mismatched type constraints
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28862 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:12:37 +00:00
Evan Cheng
b21495043e
Minor clean up.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28860 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-19 19:25:30 +00:00
Rafael Espindola
58421d7d08
initial implementation of ARMRegisterInfo::eliminateFrameIndex
...
fixes test/Regression/CodeGen/ARM/ret_arg5.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-18 00:08:07 +00:00
Evan Cheng
357edf8a4f
A new entry.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28848 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-17 00:45:49 +00:00
Chris Lattner
b1d26f6665
Implement the getPointerRegClass method, which is required for the ptr_rc
...
magic to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28847 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-17 00:01:04 +00:00
Evan Cheng
54edc84000
Later models likely to have Yonah like attributes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28843 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:58:49 +00:00
Chris Lattner
a24b7618f8
Upgrade some load/store instructions to use the proper addressing mode stuff.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28841 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:29:41 +00:00
Chris Lattner
66d7ebb777
In 64-bit mode, addr mode operands use G8RC instead of GPRC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:29:03 +00:00
Chris Lattner
059ca0f5b7
fix some assumptions that pointers can only be 32-bits. With this, we can
...
now compile:
static unsigned long X;
void test1() {
X = 0;
}
into:
_test1:
lis r2, ha16(_X)
li r3, 0
stw r3, lo16(_X)(r2)
blr
Totally amazing :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28839 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:01:35 +00:00
Chris Lattner
956f43c310
Split 64-bit instructions out into a separate .td file
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28838 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 20:22:01 +00:00
Chris Lattner
8fa05dac39
Force 64-bit register availability in 64-bit mode. For real.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 20:05:06 +00:00
Chris Lattner
af89fa609b
Remove the -darwin and -aix llc options, inferring darwinism and aixism from
...
the target triple & subtarget info. woo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:50:48 +00:00
Chris Lattner
1790d44d0d
Don't pass target name into TargetData anymore, it is never used or needed.
...
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:22:52 +00:00
Chris Lattner
acbc07aa22
Remove ctor with each piece specifyable (which causes overload ambiguities),
...
add a new init method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28828 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:11:26 +00:00
Chris Lattner
7c1fb5f08c
Document the subtarget features better, make sure that 64-bit mode, 64-bit
...
support, and 64-bit register use are all consistent with each other.
Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently. This not makes ppc64 blow up on lots
of stuff :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 17:50:12 +00:00
Chris Lattner
a7a5854f1c
Rename some subtarget features. A CPU now can *have* 64-bit instructions,
...
can in 32-bit mode we can choose to optionally *use* 64-bit registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 17:34:12 +00:00
Chris Lattner
94de9a8951
First baby step towards ppc64 support. This adds a new -march=ppc64 backend
...
that is currently just like ppc32 :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28813 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 01:37:27 +00:00
Chris Lattner
8e173de059
Add a note that Nate noticed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28808 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 21:33:31 +00:00
Jim Laskey
f8a01a9661
1. Support standard dwarf format (was bootstrapping in Apple format.)
...
2. Add vector support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28807 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 20:51:43 +00:00
Evan Cheng
31f7be9fb7
Vector extract / insert index operand should have ptr type.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28798 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:19:05 +00:00
Evan Cheng
a7dc4a59cb
Type of extract_element index operand should be iPTR.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28797 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:18:06 +00:00
Evan Cheng
015188ffbc
Type of vector extract / insert index operand should be iPTR.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28796 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:14:54 +00:00
Evan Cheng
fae2994302
X86 call instructions can take variable number of operands. Parameters of
...
vector types are passed via XMM registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28789 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 22:24:55 +00:00
Chris Lattner
4b5a352f25
add a note
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28787 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 21:26:18 +00:00
Evan Cheng
b69d113201
Add argument registers to the end of call operand list (partial fix).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28783 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 18:17:40 +00:00
Jim Laskey
014f98c7e5
Place dwarf headers at earliest possible point. Well behaved when skipping
...
functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28781 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 11:35:03 +00:00
Andrew Lenharth
c8aba85e1c
I am sure I had commited this workaround before. Perhaps soon I should sort it all out
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28772 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-13 20:34:47 +00:00
Andrew Lenharth
0e4dd01ffc
It really helps to be returning to the correct place
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28769 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-13 18:27:39 +00:00
Evan Cheng
004fb92615
Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28764 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-13 05:14:44 +00:00
Chris Lattner
e67304fb78
Gaar! Don't use r11 for CR save/restore, use R0. R11 can be register
...
allocated, thus live across the save/reload. This fixes
llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg
and probably others, with -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28761 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 23:59:16 +00:00
Chris Lattner
b47e0897a0
Fix spilling and reloading of CR regs to reload the right values. This fixes
...
Olden/power (and probably others) with -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28760 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 21:50:57 +00:00
Andrew Lenharth
f2b806a1aa
Let the alpha breakage begin. First Formals and RET. next Calls
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28753 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 18:09:24 +00:00
Rafael Espindola
337c4ad6e7
lower more then 4 formal arguments. The offset is currently hard coded.
...
implement SelectFrameIndex
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 12:28:08 +00:00
Chris Lattner
cf00631719
Work around a nasty tblgen bug where it doesn't add operands for varargs
...
nodes correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28745 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-10 01:15:02 +00:00
Chris Lattner
4a45abf66e
Fix a problem exposed by the local allocator. CALL instructions are not marked
...
as using incoming argument registers, so the local allocator would clobber them
between their set and use. To fix this, we give the call instructions a variable
number of uses in the CALL MachineInstr itself, so live variables understands
the live ranges of these register arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28744 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-10 01:14:28 +00:00
Evan Cheng
e5e228df19
Comments to appease sabre.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28737 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-09 06:25:10 +00:00
Evan Cheng
b12223e284
Minor compilation speed improvement.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28736 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-09 06:24:42 +00:00
Chris Lattner
c0bad5706e
Add support for "m" inline asm constraints.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28728 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-08 18:03:49 +00:00
Evan Cheng
e8bd0a332a
Added X86FunctionInfo subclass of MachineFunction to record whether the
...
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28703 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-06 23:30:24 +00:00
Chris Lattner
475c55393a
Now that PR633 is implemented, the CBE can know to emit _setjmp/_longjmp
...
when available. This speeds up hexxagon from 18.61s to 16.61s with the CBE on
PPC Mac OS (for reference, LLC is 15.48s and GCC is 23.35s).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28697 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-06 21:45:47 +00:00
Chris Lattner
001db453f5
Add PowerPC intrinsics to support dcbz[l]
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28696 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-06 21:29:23 +00:00
Rafael Espindola
4b02367d54
add R0 to liveout
...
expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28691 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-05 22:26:14 +00:00
Evan Cheng
c21051ff96
A few new entries.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28683 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-04 09:08:00 +00:00
Evan Cheng
f8614db52e
Be consistent with gcc.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28682 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-04 07:24:07 +00:00
Andrew Lenharth
a5cc38bcbd
ignore ordered/unordered for now
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28679 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-04 00:25:51 +00:00
Evan Cheng
3649b0efa5
Cygwin support. Patch by Anton Korobeynikov!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28672 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-02 22:38:37 +00:00
Evan Cheng
aede9b9598
Use xor to clear a register.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28667 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-02 21:20:34 +00:00
Evan Cheng
94b1453278
Incorrect AT&T opcode.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28666 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-02 21:09:10 +00:00
Chris Lattner
d9477607dc
Add mingw support, patch contributed by Anton
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28661 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-02 18:54:01 +00:00
Chris Lattner
08a9a985dc
Silence -pedantic warning
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28633 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 17:17:06 +00:00
Chris Lattner
078d1826d2
Silence -pedantic warning.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28630 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 17:13:10 +00:00
Evan Cheng
2675534b7f
Typos
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28617 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 05:53:27 +00:00
Reid Spencer
a2e05ea997
For PR786:
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Don't warn about -pedantic errors. Add a note to the PR instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28616 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 05:49:51 +00:00
Reid Spencer
72f42bbc9b
For PR786:
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Turn -pedantic and -Wno-long-long compile flags on by default. In a few
places, avoid the warnings by removing these options in the local makefile.
One notable exception: lib/Target/CBackend/Writer.cpp. These warnings are
left on as a reminder to developers to clean them up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28614 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 01:55:21 +00:00
Reid Spencer
18c8b49e7d
Use archive libraries instead of object files for VMCore, BCReader,
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BCWriter, and bzip2 libraries. Adjust the various makefiles to accommodate
these changes. This was done to speed up link times.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28610 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 01:30:27 +00:00
Evan Cheng
04b2562502
Remove a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28607 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 00:30:39 +00:00
Evan Cheng
cbe70e1c4b
Rename ASM modifier trunc8, trunc16 to subreg8, subreg16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28606 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-31 22:34:26 +00:00
Reid Spencer
2bc320de0c
Fix casting so there's no warning on Alpha.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28605 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-31 22:26:11 +00:00
Evan Cheng
f91c10153c
Sign extender
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28603 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-31 22:05:11 +00:00
Evan Cheng
190717d3cf
Rename instructions for consistency sake.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28594 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-31 19:00:07 +00:00
Evan Cheng
9d09b89f39
Select vector_shuffle v1, undef <2, 3, ?, ?> to MOVHLPS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28582 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-31 00:51:37 +00:00
Evan Cheng
8f692e2457
Remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28581 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-31 00:50:42 +00:00
Evan Cheng
5a47282149
A new entry
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28579 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 23:56:31 +00:00
Evan Cheng
b5e406afc3
MAXP{D|S} and MINP{D|S} are commutable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28578 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 23:47:30 +00:00
Evan Cheng
efeaed8fb4
Commute shufps / shufpd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28577 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 23:34:30 +00:00
Evan Cheng
a0eaf2d0c5
Somehow I lost a condition when I was shuffling some code around. Anyway,
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only transform a shufps to pshufd when the first two operands are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28575 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 22:13:36 +00:00
Evan Cheng
aa3c1410b4
Fix a build breaker.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28574 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 21:45:53 +00:00
Evan Cheng
51da42c28f
Oops. PSHUFD is only available with SSE2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28573 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 21:30:59 +00:00
Chris Lattner
9e18ef5262
Add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28572 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 21:29:15 +00:00
Chris Lattner
7b05350906
Always reserve space for 8 spilled GPRs. GCC apparently assumes that this
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space will be available, even if the callee isn't varargs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28571 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 21:21:04 +00:00
Evan Cheng
ccba76bb25
Allow shufps x, x, mask to be converted to pshufd x, mask to save a move.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28565 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 20:26:50 +00:00
Evan Cheng
eaf1e31775
Remove bogus comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28564 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 20:24:48 +00:00
Rafael Espindola
85ede37ca9
Expand ret into "CopyToReg;BRIND"
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28559 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 17:33:19 +00:00
Evan Cheng
5a622f2e06
Add a note about integer multiplication by constants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28551 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 07:37:37 +00:00
Evan Cheng
e6ad27e917
A addressing mode folding enhancement:
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Fold c2 in (x << c1) | c2 where (c2 < c1)
e.g.
int test(int x) {
return (x << 3) + 7;
}
This can be codegen'd as:
leal 7(,%eax,8), %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28550 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 06:59:36 +00:00
Evan Cheng
8c65fa564a
Some new entries about truncate / anyext
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28548 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 06:23:50 +00:00
Chris Lattner
a5135ba0c9
Ignore generated files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28520 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-27 01:23:30 +00:00
Evan Cheng
6848be1a27
Change RET node to include signness information of the return values. i.e.
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RET chain, value1, sign1, value2, sign2, ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 23:10:12 +00:00
Evan Cheng
3fddf241d8
Vector argument must be passed in memory location aligned on 16-byte boundary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28505 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 20:37:47 +00:00
Evan Cheng
1d6a9b3b6c
Mac OS X ABI document lied. The first four XMM registers are used to pass
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vector arguments, not three.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28504 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 19:22:06 +00:00
Evan Cheng
052fb5110f
Minor update to make the code more clear
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28499 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:39:59 +00:00
Evan Cheng
f9d62dc6e5
Update more comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28498 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:37:16 +00:00
Evan Cheng
f9ff7c54be
Fix some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28497 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:25:43 +00:00
Evan Cheng
6f707999a1
No need to handle illegal types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28496 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:22:49 +00:00
Rafael Espindola
a1334cdfb2
On ARM, alignment is in bits
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Add lr as a hard coded operand of bx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28494 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 10:56:17 +00:00
Evan Cheng
138a24e4d4
Remove a couple of bogus casts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28493 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 08:04:31 +00:00
Evan Cheng
57c0788e02
Minor bug caught by Ashwin Chandra
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28491 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 06:22:34 +00:00
Evan Cheng
cc1fc220a0
Consistency
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28488 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 23:31:23 +00:00
Evan Cheng
25e71d10a0
Some clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28483 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 22:38:31 +00:00
Chris Lattner
8b5fbc5cd4
Add support for the missing FP condition codes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28482 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 22:26:02 +00:00
Evan Cheng
a9bb445db0
Remove some dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28481 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 22:25:52 +00:00
Evan Cheng
932ad51fea
X86 / Cygwin asm / alignment fixes.
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Patch contributed by Anton Korobeynikov!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28480 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 21:59:08 +00:00
Evan Cheng
6b5783d0b1
Build breakage.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28475 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 18:56:34 +00:00
Chris Lattner
8e2a04e21d
Fix build failure of povray
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28473 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 18:06:16 +00:00
Chris Lattner
5d634ce466
Fix Benchmarks/MallocBench/cfrac
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28471 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 16:54:16 +00:00
Rafael Espindola
2f99b6bd96
implement initial version of ARMAsmPrinter::printOperand
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28470 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 12:57:06 +00:00
Rafael Espindola
c3c1a86aa0
port the ARM backend to use ISD::CALL instead of LowerCallTo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28469 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 11:00:18 +00:00
Evan Cheng
32fe1035a7
Switch X86 over to a call-selection model where the lowering code creates
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the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28463 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 00:59:30 +00:00
Evan Cheng
4360bdcf1f
CALL node change (arg / sign pairs instead of just arguments).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28462 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 00:57:32 +00:00
Evan Cheng
6a3d5a62f0
Assert if InflightSet is not cleared after instruction selecting a BB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28459 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 00:24:28 +00:00
Evan Cheng
afe358e7d4
Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
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non-deterministic behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 20:46:25 +00:00
Reid Spencer
19b7e0e0ca
For PR786:
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Minor tweaks in public headers and a few .cpp files so that LLVM can build
successfully with -pedantic and projects using LLVM with -pedantic don't
get warnings from LLVM. There's still more -pedantic warnings to fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28453 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 19:21:13 +00:00
Reid Spencer
077b387207
For PR786:
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Remove a spurious ;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28452 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 19:05:21 +00:00
Chris Lattner
d74ea2bbd8
Patches to make the LLVM sources more -pedantic clean. Patch provided
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by Anton Korobeynikov! This is a step towards closing PR786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 17:04:05 +00:00
Chris Lattner
2ef5e89dc9
Fix CodeGen/Generic/vector.ll:test_div with altivec.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28445 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 00:15:25 +00:00
Chris Lattner
5734012375
Handle SETO* like we handle SET*, restoring behavior after Evan's setcc
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change. This fixes PowerPC/fnegsel.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28443 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 00:06:44 +00:00
Chris Lattner
0c54d8964d
Print struct return functions and calls as actually returning the hidden
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argument struct pointer, enabling ABI compatibility for the CBE with
platforms with strange struct-return ABIs. This fixes 252.eon and
CoyoteBench/fftbench on Darwin/X86 among other things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28442 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 23:39:48 +00:00
Chris Lattner
c6d0567324
Fix file header comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28441 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 23:20:42 +00:00