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Author SHA1 Message Date
Duncan Sands
4dc2b39bf8 It makes no sense to have a ODR version of common 
linkage, so remove it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66690 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-11 20:14:15 +00:00
Mon P Wang
6b3ef693d7 For yonah, fix a vector shuffle case for v16i8 where we didn't properly clear some bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66684 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-11 18:47:57 +00:00
Mon P Wang
37b9a19653 Fixed a v8i16 shuffle case that should generate a pshufb instead of a pshuflw/hw. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66645 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-11 06:35:11 +00:00
Chris Lattner
47b4ce8529 formatting change, reduce indentation. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66642 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-11 05:48:52 +00:00
Dan Gohman
3328adda6b Add more information to the EFLAGS note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66515 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-10 00:26:23 +00:00
Dan Gohman
ad93e1e5fc Add a note about EFLAGS optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66508 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-09 23:47:02 +00:00
Chris Lattner
087fcf3e89 do not export all the X86FastISel symbols, ever. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-08 18:44:31 +00:00
Chris Lattner
ff9dcee534 add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66360 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-08 03:04:26 +00:00
Chris Lattner
b34487dcba add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66359 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-08 01:54:43 +00:00
Duncan Sands
667d4b8de6 Introduce new linkage types linkonce_odr, weak_odr, common_odr 
and extern_weak_odr.  These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global.  In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time.   This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function.  If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body.  The
code generators on the other hand map weak and weak_odr linkage
to the same thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-07 15:45:40 +00:00
Dan Gohman
3112581441 Arithmetic instructions don't set EFLAGS bits OF and CF bits 
the same say the "test" instruction does in overflow cases,
so eliminating the test is only safe when those bits aren't
needed, as is the case for COND_E and COND_NE, or if it
can be proven that no overflow will occur. For now, just
restrict the optimization to COND_E and COND_NE and don't
do any overflow analysis.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66318 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-07 01:58:32 +00:00
Dan Gohman
1f4af262d5 Don't use plain INC32 and DEC32 on x86-64; it needs 
INC64_32r and INC64_16r, because these instructions are encoded
differently on x86-64. This fixes JIT regressions on x86-64 in
kimwitu++ and others.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66207 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-05 21:32:23 +00:00
Dan Gohman
51bb47480e When creating X86ISD::INC and X86ISD::DEC nodes, only add one operand. 
The extra operand didn't appear to cause any trouble, but it was
erroneous regardless.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66206 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-05 21:29:28 +00:00
Dan Gohman
4bfcf2a2a6 Fix the "test" optimization to recognize "dec" as an add of 
negative one, as subtracts of immediates are canonicalized
to adds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66180 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-05 19:32:48 +00:00
Dan Gohman
076aee32e8 Re-apply 66008, now that the unfoldMemoryOperand bug is fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66058 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 19:44:21 +00:00
Dan Gohman
fc53fc657e Correct this comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66057 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 19:24:25 +00:00
Dan Gohman
b37a8206b6 When using MachineInstr operand indices on SDNodes, the number 
of MachineInstr def operands must be subtracted out. This bug
was uncovered by the recent x86 EFLAGS optimization. Before
that, the only instructions that ever needed unfolding were
things like CMP32rm, where NumDefs is zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66056 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 19:23:38 +00:00
Evan Cheng
ae3f2b6c77 Fix PR3666: isel calls to constant addresses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66024 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 06:48:53 +00:00
Dan Gohman
29582d1223 Revert r66004 for now; it's causing a variety of test failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66008 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 03:54:19 +00:00
Dan Gohman
12bbc52aa7 Teach the x86 backend to eliminate "test" instructions by using the EFLAGS 
result from add, sub, inc, and dec instructions in simple cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66004 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 02:33:24 +00:00
Evan Cheng
599a6a88ce Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65996 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 01:41:49 +00:00
Dan Gohman
09a2609e20 Add '(implicit EFLAGS)' for AND, OR, XOR, NEG, INC, and DEC 
instructions. These aren't used yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65965 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-03 19:53:46 +00:00
Dan Gohman
0f8b53f19d Fix a bunch of Doxygen syntax issues. Escape special characters, 
and put @file directives on their own comment line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65920 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-03 02:55:14 +00:00
Mon P Wang
9feb5dd568 Added another darwin subtarget 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65662 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-28 00:25:30 +00:00
Rafael Espindola
9a58023c6c Refactor TLS code and add some tests. The tests and expected results are: 
pic |  declaration | linkage  | visibility |

!pic |  declaration | external | default    | tls1.ll     tls2.ll     | local exec
 pic |  declaration | external | default    | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default    | tls3.ll     tls4.ll     | initial exec
 pic | !declaration | external | default    | tls3-pic.ll tls4-pic.ll | general dynamic

!pic |  declaration | external | hidden     | tls7.ll     tls8.ll     | local exec
 pic |  declaration | external | hidden     | X                       | local dynamic
!pic | !declaration | external | hidden     | tls9.ll     tls10.ll    | local exec
 pic | !declaration | external | hidden     | X                       | local dynamic

!pic |  declaration | internal | default    | tls5.ll     tls6.ll     | local exec
 pic |  declaration | internal | default    | X                       | local dynamic

The ones marked with an X have not been implemented since local dynamic is not implemented.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65632 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-27 13:37:18 +00:00
Evan Cheng
236aa8a503 ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these intrinsics expect the high bits will not be modified. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65499 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-26 03:12:02 +00:00
Evan Cheng
a87008d90b Revert BuildVectorSDNode related patches: 65426, 65427, and 65296. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65482 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-25 22:49:59 +00:00
Bill Wendling
57f0db833d Overhaul my earlier submission due to feedback. It's a large patch, but most of 
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-24 08:30:20 +00:00
Dan Gohman
e9865945ad Fast-isel can't do TLS yet, so it should fall back to SDISel 
if it sees TLS addresses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65341 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 22:03:08 +00:00
Evan Cheng
242b38bae5 Only v1i16 (i.e. _m64) is returned via RAX / RDX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65313 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 09:03:22 +00:00
Nate Begeman
b9a47b824f Generate better code for v8i16 shuffles on SSE2 
Generate better code for v16i8 shuffles on SSE2 (avoids stack)
Generate pshufb for v8i16 and v16i8 shuffles on SSSE3 where it is fewer uops.
Document the shuffle matching logic and add some FIXMEs for later further
  cleanups.
New tests that test the above.

Examples:

New:
_shuf2:
	pextrw	$7, %xmm0, %eax
	punpcklqdq	%xmm1, %xmm0
	pshuflw	$128, %xmm0, %xmm0
	pinsrw	$2, %eax, %xmm0

Old:
_shuf2:
	pextrw	$2, %xmm0, %eax
	pextrw	$7, %xmm0, %ecx
	pinsrw	$2, %ecx, %xmm0
	pinsrw	$3, %eax, %xmm0
	movd	%xmm1, %eax
	pinsrw	$4, %eax, %xmm0
	ret

=========

New:
_shuf4:
	punpcklqdq	%xmm1, %xmm0
	pshufb	LCPI1_0, %xmm0

Old:
_shuf4:
	pextrw	$3, %xmm0, %eax
	movsd	%xmm1, %xmm0
	pextrw	$3, %xmm1, %ecx
	pinsrw	$4, %ecx, %xmm0
	pinsrw	$5, %eax, %xmm0

========

New:
_shuf1:
	pushl	%ebx
	pushl	%edi
	pushl	%esi
	pextrw	$1, %xmm0, %eax
	rolw	$8, %ax
	movd	%xmm0, %ecx
	rolw	$8, %cx
	pextrw	$5, %xmm0, %edx
	pextrw	$4, %xmm0, %esi
	pextrw	$3, %xmm0, %edi
	pextrw	$2, %xmm0, %ebx
	movaps	%xmm0, %xmm1
	pinsrw	$0, %ecx, %xmm1
	pinsrw	$1, %eax, %xmm1
	rolw	$8, %bx
	pinsrw	$2, %ebx, %xmm1
	rolw	$8, %di
	pinsrw	$3, %edi, %xmm1
	rolw	$8, %si
	pinsrw	$4, %esi, %xmm1
	rolw	$8, %dx
	pinsrw	$5, %edx, %xmm1
	pextrw	$7, %xmm0, %eax
	rolw	$8, %ax
	movaps	%xmm1, %xmm0
	pinsrw	$7, %eax, %xmm0
	popl	%esi
	popl	%edi
	popl	%ebx
	ret

Old:
_shuf1:
	subl	$252, %esp
	movaps	%xmm0, (%esp)
	movaps	%xmm0, 16(%esp)
	movaps	%xmm0, 32(%esp)
	movaps	%xmm0, 48(%esp)
	movaps	%xmm0, 64(%esp)
	movaps	%xmm0, 80(%esp)
	movaps	%xmm0, 96(%esp)
	movaps	%xmm0, 224(%esp)
	movaps	%xmm0, 208(%esp)
	movaps	%xmm0, 192(%esp)
	movaps	%xmm0, 176(%esp)
	movaps	%xmm0, 160(%esp)
	movaps	%xmm0, 144(%esp)
	movaps	%xmm0, 128(%esp)
	movaps	%xmm0, 112(%esp)
	movzbl	14(%esp), %eax
	movd	%eax, %xmm1
	movzbl	22(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	42(%esp), %eax
	movd	%eax, %xmm1
	movzbl	50(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm1, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	77(%esp), %eax
	movd	%eax, %xmm1
	movzbl	84(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	104(%esp), %eax
	movd	%eax, %xmm1
	punpcklbw	%xmm1, %xmm0
	punpcklbw	%xmm2, %xmm0
	movaps	%xmm0, %xmm1
	punpcklbw	%xmm3, %xmm1
	movzbl	127(%esp), %eax
	movd	%eax, %xmm0
	movzbl	135(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	155(%esp), %eax
	movd	%eax, %xmm0
	movzbl	163(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm0, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	188(%esp), %eax
	movd	%eax, %xmm0
	movzbl	197(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	217(%esp), %eax
	movd	%eax, %xmm4
	movzbl	225(%esp), %eax
	movd	%eax, %xmm0
	punpcklbw	%xmm4, %xmm0
	punpcklbw	%xmm2, %xmm0
	punpcklbw	%xmm3, %xmm0
	punpcklbw	%xmm1, %xmm0
	addl	$252, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65311 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 08:49:38 +00:00
Scott Michel
4214a5531c Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR 
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65296 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-22 23:36:09 +00:00
Evan Cheng
779aee1fea Add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-22 08:13:45 +00:00
Evan Cheng
6140a8b057 Be bug compatible with gcc by returning MMX values in RAX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65274 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-22 08:05:12 +00:00
Evan Cheng
c94ebef1b1 Do not consider MMX_MOVD64rr a move instructions. The source register is in GR32, the destination is VR64. They are not compatible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65273 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-22 08:04:23 +00:00
Anton Korobeynikov
b5bd026a75 Drop bunch of half-working stuff in the ext_weak linkage support. 
Now we're using one gross, but quite robust hack :) (previous ones
did not work, for example, when ext_weak symbol was used deep inside
constant expression in the initializer).

The proper fix of this problem will require some quite huge asmprinter
changes and that's why was postponed. This fixes PR3629 by the way :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65230 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-21 11:53:32 +00:00
Bill Wendling
5a45d76c25 Make sure this doesn't access .end() too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65213 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-21 01:11:36 +00:00
Bill Wendling
8aa374b629 Make sure we don't dereference the .end() of the container. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65211 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-21 01:07:26 +00:00
Bill Wendling
3d2445f5d9 Propagate more debug loc infos. This also includes some code cleaning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65207 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-21 00:43:56 +00:00
Bill Wendling
2625f9b2e4 We need to propagate the debug location information even when dealing with the 
prologue/epilogue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65206 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-21 00:32:08 +00:00
Evan Cheng
79fb3b434f Support return of MMX values in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65152 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-20 20:43:02 +00:00
Bill Wendling
cb819f13d7 Put code that generates debug labels into TableGen so that it can be used by 
everyone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 23:12:06 +00:00
Nate Begeman
d6b7a242d3 Add support to the JIT for true non-lazy operation. When a call to a function 
that has not been JIT'd yet, the callee is put on a list of pending functions
to JIT.  The call is directed through a stub, which is updated with the address
of the function after it has been JIT'd.  A new interface for allocating and
updating empty stubs is provided.

Add support for removing the ModuleProvider the JIT was created with, which
would otherwise invalidate the JIT's PassManager, which is initialized with the
ModuleProvider's Module.

Add support under a new ExecutionEngine flag for emitting the infomration 
necessary to update Function and GlobalVariable stubs after JITing them, by
recording the address of the stub and the name of the GlobalValue.  This allows
code to be copied from one address space to another, where libraries may live
at different virtual addresses, and have the stubs updated with their new
correct target addresses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64906 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 08:31:02 +00:00
Dan Gohman
97357614b5 Factor out the code to add a MachineOperand to a MachineInstrBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64891 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 05:45:50 +00:00
Evan Cheng
caa0c2cadd GV with null value initializer shouldn't go to BSS if it's meant for a mergeable strings section. Currently it only checks for Darwin. Someone else please check if it should apply to other targets as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64877 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 02:19:52 +00:00
Scott Michel
fdc40a0a69 Remove trailing whitespace to reduce later commit patch noise. 
(Note: Eventually, commits like this will be handled via a pre-commit hook that
 does this automagically, as well as expand tabs to spaces and look for 80-col
 violations.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64827 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-17 22:15:04 +00:00
Chris Lattner
a66878b881 add a horrible note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64719 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-17 01:16:14 +00:00
Bill Wendling
86e6cb924b --- Merging (from foreign repository) r64714 into '.': 
U    include/llvm/CodeGen/DebugLoc.h
U    lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp

Enable debug location generation at -Os. This goes with the reapplication of the
r63639 patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64715 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-17 01:04:54 +00:00
Dan Gohman
35188eb54d MachineLICM now handles these cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64620 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-15 23:24:52 +00:00
Dan Gohman
b5aa3ad1e7 The x86-64 red zone is now being used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-14 03:30:05 +00:00
Evan Cheng
c7ce29b04f Teach x86 target -soft-float. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64496 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 22:36:38 +00:00
Dale Johannesen
8d13f8f104 Remove non-DebugLoc versions of BuildMI from X86. 
There were some that might even matter in X86FastISel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64437 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 02:33:27 +00:00
Bill Wendling
92c1e12647 Revert this. It was breaking stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64428 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 02:16:35 +00:00
Bill Wendling
54fc7d6714 Turn off the old way of handling debug information in the code generator. Use 
the new way, where all of the information is passed on SDNodes and machine
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64427 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 02:01:04 +00:00
Dale Johannesen
21b5541814 Eliminate a couple of non-DebugLoc BuildMI variants. 
Modify callers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64409 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 23:08:38 +00:00
Dale Johannesen
78e3e521cd Arrange to print constants that match "n" and "i" constraints 
in inline asm as signed (what gcc does).  Add partial support
for x86-specific "e" and "Z" constraints, with appropriate
signedness for printing.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64400 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 20:58:09 +00:00
Chris Lattner
1823c92aa7 fix the X86 backend to just drop llvm.declare nodes for VLAs instead of 
leaving them in the DAG and then getting selection errors.  This is a 
fix for PR3538.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 17:33:11 +00:00
Bill Wendling
fbef3101a5 Propagate DebugLoc info for spiller call-backs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64329 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-11 21:51:19 +00:00
Dan Gohman
d293e0d2dc Don't try to set an EFLAGS operand to dead if no instruction was created. 
This fixes a bug introduced by r61215.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64316 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-11 19:50:24 +00:00
Evan Cheng
1d76864df3 Handle llvm.x86.sse2.maskmov.dqu in 64-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64240 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-10 22:06:28 +00:00
Evan Cheng
7403eeaa88 80 col violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64237 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-10 21:39:44 +00:00
Evan Cheng
a0eedac226 Implement FpSET_ST1_*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64186 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-09 23:32:07 +00:00
Dan Gohman
333014e256 Use doxygen comment syntax. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64150 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-09 18:12:09 +00:00
Evan Cheng
dc54d317e7 Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty 
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64124 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-09 07:14:22 +00:00
Chris Lattner
be685cc72a add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64093 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-08 20:44:19 +00:00
Dale Johannesen
6f38cb61a9 Use getDebugLoc forwarder instead of getNode()->getDebugLoc. 
No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64026 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 19:59:05 +00:00
Dan Gohman
1fdbc1dd4e Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing 
ScheduleDAG's TLI member to use const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 16:15:20 +00:00
Dale Johannesen
b300d2aa3e Get rid of the last non-DebugLoc versions of getNode! 
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base.  There's no
sensible way to associate debug info with these.  I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. 
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 00:55:49 +00:00
Dan Gohman
2d0a1cc416 Refactor some repeated logic into a separate function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63989 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 00:43:41 +00:00
Dan Gohman
288b824cef Make a comment a doxygen comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 00:42:54 +00:00
Dale Johannesen
e8d7230f48 Remove more non-DebugLoc getNode variants. Use 
getCALLSEQ_{END,START} to permit passing no DebugLoc
there.  UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 23:05:02 +00:00
Dale Johannesen
de06470330 Remove more non-DebugLoc versions of getNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63969 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 21:50:26 +00:00
Bill Wendling
ac06d004a0 Record debug location information in the Dwarf writer. 
A simple test program shows that debugging works. :-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63968 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 21:45:08 +00:00
Dan Gohman
9036d80d7b Use .size and .type on ELF systems; this helps tools that map 
addresses to symbols.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63962 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 21:15:52 +00:00
Evan Cheng
770bcc7b15 Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63938 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 17:43:24 +00:00
Evan Cheng
4350eb86a7 Add TargetInstrInfo::isSafeToMoveRegisterClassDefs. It returns true if it's safe to move an instruction which defines a value in the register class. Replace pre-splitting specific IgnoreRegisterClassBarriers with this new hook. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63936 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 17:17:30 +00:00
Dale Johannesen
ed2eee63a6 Get rid of one more non-DebugLoc getNode and 
its corresponding getTargetNode.  Lots of
caller changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 01:31:28 +00:00
Evan Cheng
b3379fbc60 A few more isAsCheapAsAMove. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63852 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-05 08:42:55 +00:00
Dale Johannesen
33c960f523 Remove non-DebugLoc versions of getLoad and getStore. 
Adjust the many callers of those versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63767 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 20:06:27 +00:00
Chris Lattner
e6c1473e56 Bill implemented this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63752 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 19:09:07 +00:00
Chris Lattner
8dfdf5d62d add a note, this is why we're faster at SciMark-MonteCarlo with 
SSE disabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63751 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 19:08:01 +00:00
Dan Gohman
37eed798a9 Minor code cleanups; no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63740 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 17:28:58 +00:00
Mon P Wang
7bcaefaf59 Fixes a case where we generate an incorrect mask for pshfhw in the presence 
of undefs and incorrectly determining if we have punpckldq.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63702 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 01:16:59 +00:00
Dale Johannesen
dd64c417c0 Patch up omissions in DebugLoc propagation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63693 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 00:33:20 +00:00
Dale Johannesen
eacf2dc4bb Need this file too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63674 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 22:26:34 +00:00
Dale Johannesen
0f502f6f44 Add some DL propagation to places that didn't 
have it yet.  More coming.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63673 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 22:26:09 +00:00
Dale Johannesen
d839254888 DebugLoc propgation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63664 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 21:48:12 +00:00
Dale Johannesen
e4d209dcb8 DebugLoc propagation. done with file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63656 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 20:21:25 +00:00
Dale Johannesen
ace1610df5 DebugLoc propagation. 2/3 through file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63650 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 19:33:06 +00:00
Dan Gohman
605679f0cd Tevert part of the x86 subtarget logic changes: when -march=x86-64 
is given, override the subtarget settings and enable 64-bit support.
This restores the earlier behavior, and fixes regressions on
Non-64-bit-capable x86-32 hosts.

This isn't necessarily the best approach, but the most obvious
alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used
with -march=x86-64 when the host doesn't have 64-bit support. This
makes things little more consistent, but it's less convenient, and
it has the practical drawback of requiring lots of test changes, so
I opted for the above approach for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63642 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 18:53:21 +00:00
Bill Wendling
9bc96a5720 Create DebugLoc information in FastISel. Several temporary methods were 
created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63584 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 00:55:04 +00:00
Dan Gohman
f75e5b4d8c Change Feature64Bit to not imply FeatureSSE2. All x86-64 hardware has 
SSE2, however it's possible to disable SSE2, and the subtarget support
code thinks that if 64-bit implies SSE2 and SSE2 is disabled then
64-bit should also be disabled. Instead, just mark all the 64-bit
subtargets as explicitly supporting SSE2.

Also, move the code that makes -march=x86-64 enable 64-bit support by
default to only apply when there is no explicit subtarget. If you
need to specify a subtarget and you want 64-bit code, you'll need to
select a subtarget that supports 64-bit code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63575 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 00:04:43 +00:00
Torok Edwin
b68a88bd48 Only force SSE level if it is not correct. 
Add an assert to check HasX86_64 status.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63552 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-02 21:57:34 +00:00
Torok Edwin
38870ed13c remove #if 0 code on Bill's request. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63542 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-02 20:23:02 +00:00
Evan Cheng
97d0e0e314 ADD / SUB / SMUL / UMUL with overflow second result top bits must be zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63509 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-02 09:15:04 +00:00
Evan Cheng
961d6d4ac0 Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63506 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-02 08:19:07 +00:00
Evan Cheng
67ad9db15b Teach LowerBRCOND to recognize (xor (setcc x), 1). The xor inverts the condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63505 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-02 08:07:36 +00:00
Torok Edwin
3f142c36ad Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for 
var-args, and don't allow FP return values


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63495 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-01 18:15:56 +00:00
Duncan Sands
b0d5cdd52e Fix PR3453 and probably a bunch of other potential 
crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63494 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-01 18:06:53 +00:00
Dale Johannesen
7d2ad624fa Make LowerCallTo and LowerArguments take a DebugLoc 
argument.  Adjust all callers and overloaded versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 23:10:59 +00:00
Bill Wendling
7581bfa275 Get rid of the non-DebugLoc-ified getNOT() method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 23:03:19 +00:00
Mon P Wang
7ad9b51278 When PerformBuildVectorCombine, avoid creating a X86ISD::VZEXT_LOAD of 
an illegal type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63380 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 07:07:40 +00:00
Dan Gohman
e5af2d3a22 Make x86's BT instruction matching more thorough, and add some 
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-29 01:59:02 +00:00
Mon P Wang
e91a000889 Fixed lowering of v816 shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63252 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 23:11:14 +00:00
Duncan Sands
1465d61bdd Rename getAnalysisToUpdate to getAnalysisIfAvailable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63198 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 13:14:17 +00:00
Evan Cheng
1632782fe9 The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63195 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 08:35:02 +00:00
Mon P Wang
3becd093cc Add shuffle splat pattern for x86 sse shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63193 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 08:12:05 +00:00
Dan Gohman
d3f184906d Reformat the allocation-order arrays to a more conventional style. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63121 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 19:25:38 +00:00
Dan Gohman
c03e9a1040 Simplify findNonImmUse; return the result using the return value 
instead of via a by-reference argument. No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63118 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 19:04:30 +00:00
Evan Cheng
6a86bd71df Implement multiple with overflow by 2 with an add instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63090 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 03:30:42 +00:00
Dan Gohman
e8ecf4876a Eliminate unnecessary operands-list traversals. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63088 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 02:37:43 +00:00
Dan Gohman
336b636dd7 Fix the Red Zone calculation for functions with frame pointers. 
Don't use the Red Zone when dynamic stack realignment is needed.
This could be implemented, but most x86-64 ABIs don't require
dynamic stack realignment so it isn't urgent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63074 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 00:40:06 +00:00
Dan Gohman
92f4f16a19 Implement Red Zone utilization on x86-64. This is currently 
disabled by default; I'll enable it when I hook it up with
the llvm-gcc flag which controls it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63056 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 22:22:31 +00:00
Evan Cheng
5b2e5893c6 Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63022 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 18:43:34 +00:00
Dan Gohman
e7852d0144 Take the next steps in making SDUse more consistent with LLVM Use, and 
tidy up SDUse and related code.
 - Replace the operator= member functions with a set method, like
   LLVM Use has, and variants setInitial and setNode, which take
   care up updating use lists, like LLVM Use's does. This simplifies
   code that calls these functions.
 - getSDValue() is renamed to get(), as in LLVM Use, though most
   places can either use the implicit conversion to SDValue or the
   convenience functions instead.
 - Fix some more node vs. value terminology issues.

Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62995 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 04:35:06 +00:00
Nate Begeman
c2fd67f697 De-identifying per sabre review 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 03:15:31 +00:00
Nate Begeman
51a0437b16 Map address space 256 to gs; similar mappings could be supported for the 
other x86 segments.  address space 0 is stack/default, 1-255 are reserved for
client use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62980 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 01:24:32 +00:00
Nate Begeman
740ab03f12 Support pattern matching various x86 sse shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62979 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 00:52:55 +00:00
Torok Edwin
afb564c697 should have removed the + when manually applying a patch! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62973 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-25 20:29:34 +00:00
Torok Edwin
c8ad2d2abf revert this patch for now, because Codegen does still want to generate SSE code, 
for example in the case of va-args. XFAIL associated tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62972 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-25 20:21:24 +00:00
Torok Edwin
7f1d5252c7 If user explicitly asks not to use SSE, don't force it. This fixes LLVM part of PR3402. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62967 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-25 17:58:56 +00:00
Nate Begeman
9b99485074 Fix an indent and a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62940 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-24 22:12:48 +00:00
Chris Lattner
91387de8ce hopefully address PR3379 by making the P modifier work in x86 inline asm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62887 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-23 22:33:40 +00:00
Bob Wilson
4c24546238 Add SelectionDAG::getNOT method to construct bitwise NOT operations, 
corresponding to the "not" and "vnot" PatFrags.  Use the new method
in some places where it seems appropriate.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62768 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-22 17:39:32 +00:00
Evan Cheng
536ab130ec Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62762 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-22 09:10:11 +00:00
Dan Gohman
dbf5f2557e Recognize inline asm for bswap on x86-64 GLIBC. This allows it 
to be supported in the JIT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62730 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 23:40:54 +00:00
Evan Cheng
a095c972cc Also favors NOT64r. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62710 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 19:45:31 +00:00
Dan Gohman
1ef4d8f7ee Fix a recent regression. ClrOpcode is not set for i8; for i8, if 
we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62691 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 14:50:16 +00:00
Evan Cheng
aaf414c92c Favors generating "not" over "xor -1". For example. 
unsigned test(unsigned a) {
  return ~a;
}
llvm used to generate:
movl    $4294967295, %eax
xorl    4(%esp), %eax

Now it generates:
movl      4(%esp), %eax
notl      %eax

It's 3 bytes shorter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62661 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 02:09:05 +00:00
Evan Cheng
04ee5a1d92 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-20 19:12:24 +00:00
Evan Cheng
2722e7b139 DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62519 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-19 19:06:11 +00:00
Evan Cheng
50c3dfefd9 Minor tweak to LowerUINT_TO_FP_i32. Bias (after scalar_to_vector) has two uses so we should make it the second source operand of ISD::OR so 2-address pass won't have to be smart about commuting. 
%reg1024<def> = MOVSDrm %reg0, 1, %reg0, <cp#0>, Mem:LD(8,8) [ConstantPool + 0]
%reg1025<def> = MOVSD2PDrr %reg1024
%reg1026<def> = MOVDI2PDIrm <fi#-1>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack-1 + 0]
%reg1027<def> = ORPSrr %reg1025<kill>, %reg1026<kill>
%reg1028<def> = MOVPD2SDrr %reg1027<kill>
%reg1029<def> = SUBSDrr %reg1028<kill>, %reg1024<kill>
%reg1030<def> = CVTSD2SSrr %reg1029<kill>
MOVSSmr <fi#0>, 1, %reg0, 0, %reg1030<kill>, Mem:ST(4,4) [FixedStack0 + 0]
%reg1031<def> = LD_Fp32m80 <fi#0>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack0 + 0]
RET %reg1031<kill>, %ST0<imp-use,kill>

The reason 2-addr pass isn't smart enough to commute the ORPSrr is because it can't look pass the MOVSD2PDrr instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62505 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-19 08:19:57 +00:00
Evan Cheng
a06ec9efe1 Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't 
optimize it to a SINT_TO_FP when the sign bit is known zero. X86 isel should perform the optimization itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62504 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-19 08:08:22 +00:00
Bill Wendling
030939c87b Extend thi 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62415 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 07:40:19 +00:00
Evan Cheng
8e27826649 Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62413 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 07:09:27 +00:00
Bill Wendling
f6a4e2edb0 Temporarily revert my last change. It is causing a bootstrap failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62405 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 04:23:51 +00:00
Bill Wendling
8b8a636843 Implement a special algorithm for converting uint_to_fp for i32 values on 
X86. This code:

void f() {
  uint32_t x;
  float y = (float)x;
}

used to be:

     movl     %eax, -8(%ebp)
     movl     [2^52 double], -4(%ebp)
     movsd    -8(%ebp), %xmm0
     subsd    [2^52 double], %xmm0
     cvtsd2ss %xmm0, %xmm0

Is now:

   movsd        [2^52 double], %xmm0
   movsd        %xmm0, %xmm1
   movd         %ecx, %xmm2
   orps         %xmm2, %xmm1
   subsd        %xmm0, %xmm1
   cvtsd2ss     %xmm1, %xmm0

This is faster on X86. Note that there's an extra load of %xmm0 into %xmm1. That
will be fixed in a later coalescer fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62404 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 03:56:04 +00:00
Bill Wendling
64e87326d9 Add support for non-zero __builtin_return_address values on X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62338 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-16 19:25:27 +00:00
Mon P Wang
f0fcdd8e26 Expand insert/extract of a <4 x i32> with a variable index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62281 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 21:10:20 +00:00
Rafael Espindola
bb46f52027 Add the private linkage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 20:18:42 +00:00
Dan Gohman
79ce276083 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph 
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 19:20:50 +00:00
Dan Gohman
41b762a75e Add load-folding table entries for BT*ri8 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62267 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 17:57:09 +00:00
Dan Gohman
c13cf130c4 Make getWidenVectorType const. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62265 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 17:34:08 +00:00
Dan Gohman
0746392cc2 BT appears to be available on all >= i386 chips. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62196 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:27:15 +00:00
Dan Gohman
286575c65c Don't use a BT instruction if the AND has multiple uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62195 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:25:30 +00:00
Dan Gohman
f31408d75c Disable the register+memory forms of the bt instructions for now. Thanks 
to Eli for pointing out that these forms don't ignore the high bits of
their index operands, and as such are not immediately suitable for use
by isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62194 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:23:30 +00:00
Dan Gohman
4afe15b131 Add bt instructions that take immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62180 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 20:33:23 +00:00
Dan Gohman
0c89b7e61e Fix a few more JIT encoding issues in the BT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62179 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 20:32:45 +00:00
Devang Patel
83489bb770 Use DebugInfo interface to lower dbg_* intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62127 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 00:35:13 +00:00
Duncan Sands
ceb4d1aecb Rename getABITypeSize to getTypePaddedSize, as 
suggested by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-12 20:38:59 +00:00
Evan Cheng
f2accb5c9e 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62024 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-10 03:33:22 +00:00
Misha Brukman
9b8f542e27 Removed trailing whitespace from Makefiles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-09 16:44:42 +00:00
Dan Gohman
5446274bd2 Add load-folding table entries for MOVDQA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61972 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-09 02:40:34 +00:00
Dan Gohman
b134709a58 Whitespace and other minor adjustments to make SSE instructions have 
the same formatting as their corresponding SSE2 instructions, for
consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61971 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-09 02:27:34 +00:00
Devang Patel
eb3fc28914 Convert DwarfWriter into a pass. 
Now Users request DwarfWriter through getAnalysisUsage() instead of creating an instance of DwarfWriter object directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61955 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-08 23:40:34 +00:00
Dan Gohman
fbb7486560 Add patterns to match conditional moves with loads folded 
into their left operand, rather than their right. Do this
by commuting the operands and inverting the condition.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61842 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 01:00:24 +00:00
Dan Gohman
b33fc7b063 Add load-folding table entries for cmovno too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61841 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 00:44:53 +00:00
Dan Gohman
305fceb56c Define instructions for cmovo and cmovno. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61836 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 00:35:10 +00:00
Dan Gohman
653456c351 X86_COND_C and X86_COND_NC are alternate mnemonics for 
X86_COND_B and X86_COND_AE, respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61835 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 00:15:08 +00:00
Dan Gohman
cca2983291 Revert r42653 and forward-port the code that lets INC64_32r be 
converted to LEA64_32r in x86's convertToThreeAddress. This
replaces code like this:
   movl  %esi, %edi
   inc   %edi
with this:
   lea   1(%rsi), %edi
which appears to be beneficial.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61830 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-06 23:34:46 +00:00
Bill Wendling
d60de51878 Revert r61415 and r61484. Duncan was correct that these weren't needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61765 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-05 22:53:45 +00:00
Dan Gohman
d68a07650c Tidy up #includes, deleting a bunch of unnecessary #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-05 17:59:02 +00:00
Devang Patel
8a84e4402a squash warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-05 17:31:22 +00:00
Evan Cheng
7877112775 Atom and Core i7 do not have same model number after all. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61686 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-05 08:45:01 +00:00
Evan Cheng
0be6d3fb2a Add Intel processors core i7 and atom. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61603 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-03 04:24:44 +00:00
Evan Cheng
5b925c031d Fix PR3210: Detect more Intel processors. Patch by Torok Edwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61602 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-03 04:04:46 +00:00
Evan Cheng
ccb6976a69 Do not isel load folding bt instructions for pentium m, core, core2, and AMD processors. These are significantly slower than a load followed by a bt of a register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61557 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-02 05:35:45 +00:00
Evan Cheng
018b7ee91a Fix x86 CPU id detection to identify Penryn (and future processors). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61556 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-02 05:29:20 +00:00
Evan Cheng
52ceafa5c7 Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61555 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-02 05:29:08 +00:00
Duncan Sands
5480c0469e Fix PR3274: when promoting the condition of a BRCOND node, 
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType.  In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-01 15:52:00 +00:00
Bill Wendling
998dee96d3 Linux wants the FDE initial location and address range to be forced to 32-bit. 
Darwin doesn't. Make this optional for platforms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61484 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-29 22:12:11 +00:00
Chris Lattner
e55484eb45 Add a simple pattern for matching 'bt'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61426 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-25 05:34:37 +00:00
Chris Lattner
f1e9fd5676 Fix some JIT encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61425 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-25 01:32:49 +00:00
Chris Lattner
d1e3229e4b BT memory operands load from their address operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61424 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-25 01:27:10 +00:00
Chris Lattner
1c39d4cfaa translateX86CC can never fail. Simplify it based on this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61423 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-24 23:53:05 +00:00
Bill Wendling
722f5f1cfb Darwin likes for the EH frame to be non-local. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61420 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-24 08:05:17 +00:00
Bill Wendling
d4121bef3c GCC doesn't emit DW_EH_PE_sdata4 for the FDE encoding on Darwin. I'm not sure 
about other platforms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61415 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-24 05:25:49 +00:00
Dan Gohman
82779704ff Fix a compiler-abort on a testcase where the stack-pointer is added to 
a symbolic constant. This is unlikely to be intentional, but it
shouldn't crash the compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61408 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-24 00:27:51 +00:00
Chris Lattner
4328708bad indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61407 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-24 00:11:37 +00:00
Chris Lattner
4c78e0286a simplify some control flow and reduce indentation, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61404 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 23:42:27 +00:00
Dan Gohman
c7a37d4ff2 Add instruction patterns and encodings for the x86 bt instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61400 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 22:45:23 +00:00
Devang Patel
fd1c6c3123 Silence unused variable warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61392 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 21:56:28 +00:00
Dan Gohman
0b1d4a798d Clean up the atomic opcodes in SelectionDAG. 
This removes all the _8, _16, _32, and _64 opcodes and replaces each
group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode
is now used to carry the size information. In tablegen, the size-specific
opcodes are replaced by size-independent opcodes that utilize the
ability to compose them with predicates.

This shrinks the per-opcode tables and makes the code that handles
atomics much more concise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61389 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 21:37:04 +00:00
Mon P Wang
62c75ea397 Fixed code generation for v8i16 and v16i8 splats on X86. 
Fixed lowering of v8i16 shuffles for v8i16 when we fall back to extract/insert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61365 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 04:03:27 +00:00
Dan Gohman
15a3a49e19 Make the fuse-failed debug output human-readable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61356 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 00:19:20 +00:00
Dan Gohman
b12b1a27f5 Fix fast-isel to not emit invalid assembly when presented with a 
constant shift count that doesn't fit in the shift instruction's
immediate field. This fixes PR3242.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61281 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-20 17:19:40 +00:00
Dan Gohman
018a34c576 Move the patterns which have i8 immediates before the patterns 
that have i32 immediates so that they get selected first. This
currently only matters in the JIT, as assemblers will
automatically use the smallest encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61250 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-19 18:25:21 +00:00
Chris Lattner
a33649e98c Fix some release-assert warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61244 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-19 17:03:38 +00:00
Rafael Espindola
2f6fea90a5 Fix bug 3202. 
The EH_frame and .eh symbols are now private, except for darwin9 and earlier.
The patch also fixes the definition of PrivateGlobalPrefix on pcc linux.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61242 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-19 10:55:56 +00:00
Dan Gohman
bfd23c9961 When emitting instructions that define EFLAGS and the EFLAGS value isn't 
used, mark the defs as dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61215 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-18 22:03:42 +00:00
Dan Gohman
34d6ad73e1 When setting up the frame pointer, add it as a live-in register to all 
non-entry blocks, so that it doesn't appear use-before-def anywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61214 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-18 22:01:52 +00:00
Mon P Wang
af9b952627 Fixed x86 code generation of multiple for v2i64. It was incorrect for SSE4.1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61211 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-18 21:42:19 +00:00
Dan Gohman
a32b7ac86f Mark the x86 fp stack registers as "reserved". This tells LiveVariables 
and the RegisterScavenger not to expect traditional liveness 
techniques are applicable to these registers, since we don't fully
modify the effects of push and pop after stackification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61179 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-18 01:05:09 +00:00
Dan Gohman
8749b61178 Add initial support for back-scheduling address computations, 
especially in the case of addresses computed from loop induction
variables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61075 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-16 03:35:01 +00:00
Bill Wendling
d350e02e19 - Use patterns instead of creating completely new instruction matching patterns, 
which are identical to the original patterns.

- Change the multiply with overflow so that we distinguish between signed and
  unsigned multiplication. Currently, unsigned multiplication with overflow
  isn't working!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60963 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-12 21:15:41 +00:00
Mon P Wang
9e5ecb8f8f Added support for SELECT v8i8 v4i16 for X86 (MMX) 
Added support for TRUNC v8i16 to v8i8 for X86 (MMX)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60916 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-12 01:25:51 +00:00
Bill Wendling
ab55ebda1c Redo the arithmetic with overflow architecture. I was changing the semantics of 
ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.

Similar for SUB and MUL instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60915 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-12 00:56:36 +00:00
Evan Cheng
6bb14ca775 Some code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60850 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-10 21:49:05 +00:00
Bill Wendling
9a90132af4 Only perform SETO/SETC to JO/JC conversion if extractvalue is coming from an arithmetic with overflow instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60844 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-10 19:44:24 +00:00
Evan Cheng
5788d1a169 Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids some overflow issues. Patch by Thomas Jablin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60828 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-10 02:32:19 +00:00
Bill Wendling
bc5e15eafb Whitespace changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60826 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-10 02:01:32 +00:00
Bill Wendling
30a64a7649 Implement fast-isel conversion of a branch instruction that's branching on an 
overflow/carry from the "arithmetic with overflow" intrinsics. It searches the
machine basic block from bottom to top to find the SETO/SETC instruction that is
its conditional. If an instruction modifies EFLAGS before it reaches the
SETO/SETC instruction, then it defaults to the normal instruction emission.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60807 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-09 23:19:12 +00:00
Bill Wendling
74c3765291 Add sub/mul overflow intrinsics. This currently doesn't have a 
target-independent way of determining overflow on multiplication. It's very
tricky. Patch by Zoltan Varga!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60800 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-09 22:08:41 +00:00
Bill Wendling
c065b3f5ec Correct my English. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60753 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-09 07:55:31 +00:00
Bill Wendling
52370a1089 Add initial support for fast-isel of the [SU]ADDO intrinsics. It isn't 
complete. For instance, it lowers the common case into this less-than-optimal
code:

        addl    %ecx, %eax
        seto    %cl
        testb   %cl, %cl
        jne     LBB1_2  ## overflow

instead of:

        addl    %ecx, %eax
        jo      LBB1_2  ## overflow

That will come in a future commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60737 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-09 02:42:50 +00:00
Dan Gohman
55fdaec36a Fix a couple of mistaken switch case fall-throughs. Thanks to Bill 
for spotting these!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60728 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-08 23:50:06 +00:00
Evan Cheng
e4d1082b2c Re-apply 60689 now my head is screwed on right. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60711 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-08 19:29:03 +00:00
Dan Gohman
2d4e9bc922 Revert 60689. It caused many regressions on Darwin targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60705 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-08 17:38:02 +00:00
Dan Gohman
c8a1a3c426 Factor out the code for sign-extending/truncating gep indices 
and use it in x86 address mode folding. Also, make
getRegForValue return 0 for illegal types even if it has a
ValueMap for them, because Argument values are put in the
ValueMap. This fixes PR3181.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60696 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-08 07:57:47 +00:00
Evan Cheng
dda346aa71 Perform cheap checks first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60689 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-08 06:52:43 +00:00
Nick Lewycky
6ecf5ce3e3 Fix typo, psuedo -> pseudo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60651 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-07 03:49:52 +00:00
Chris Lattner
f96ca79cf3 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60632 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-06 22:49:05 +00:00
Dale Johannesen
368eb2b22d Forgot a file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60609 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-05 21:55:35 +00:00
Dale Johannesen
203af58aea Make LoopStrengthReduce smarter about hoisting things out of 
loops when they can be subsumed into addressing modes.

Change X86 addressing mode check to realize that
some PIC references need an extra register.
(I believe this is correct for Linux, if not, I'm sure
someone will tell me.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60608 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-05 21:47:27 +00:00
Evan Cheng
650d7f3ff4 Reason #3 from 60595 doesn't hold true. If we can fold a PIC load from constpool into a use, the rewrite happens at time of spill (not in VirtRegMap). Later on, if the GlobalBaseReg is spilled, the spiller can see the use uses GlobalBaseReg and do the right thing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60596 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-05 17:41:31 +00:00
Evan Cheng
84100ba83d Effectively undo 60461 in PIC mode which simply transform V_SET0 / V_SETALLONES into a load from constpool in order to fold into restores. This is not safe to do when PIC base is being used for a number of reasons: 
1. GlobalBaseReg may have been spilled.
2. It may not be live at the use.
3. Spiller doesn't know this is happening so it won't prevent GlobalBaseReg from being spilled later (That by itself is a nasty hack. It's needed because we don't insert the reload until later).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60595 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-05 17:23:48 +00:00
Evan Cheng
ae94e59416 Re-did 60519. It turns out Darwin's handling of hidden visibility symbols are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60571 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-05 01:06:39 +00:00
Bill Wendling
a8103dad4e Temporarily revert r60519. It was causing a bootstrap failure: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -DHAVE_CONFIG_H -I. -I../../../llvm-gcc.src/libgomp -I. -I../../../llvm-gcc.src/libgomp/config/posix -I../../../llvm-gcc.src/libgomp -Wall -pthread -Werror -O2 -g -O2 -MT barrier.lo -MD -MP -MF .deps/barrier.Tpo -c ../../../llvm-gcc.src/libgomp/barrier.c  -fno-common -DPIC -o .libs/barrier.o
checking for sys/file.h... /var/folders/zG/zGE-ZJOGFiGjv0B5cs5oYE+++TM/-Tmp-//cc34Jg5P.s:13:non-relocatable subtraction expression, "_gomp_tls_key" minus "L1$pb"
/var/folders/zG/zGE-ZJOGFiGjv0B5cs5oYE+++TM/-Tmp-//cc34Jg5P.s:13:symbol: "_gomp_tls_key" can't be undefined in a subtraction expression
make[4]: *** [barrier.lo] Error 1
make[4]: *** Waiting for unfinished jobs....
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -DHAVE_CONFIG_H -I. -I../../../llvm-gcc.src/libgomp -I. -I../../../llvm-gcc.src/libgomp/config/posix -I../../../llvm-gcc.src/libgomp -Wall -pthread -Werror -O2 -g -O2 -MT alloc.lo -MD -MP -MF .deps/alloc.Tpo -c ../../../llvm-gcc.src/libgomp/alloc.c -o alloc.o >/dev/null 2>&1
yes
checking for sys/param.h... make[3]: *** [all-recursive] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libgomp] Error 2
make[1]: *** Waiting for unfinished jobs....



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60527 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-04 04:07:00 +00:00
Evan Cheng
eb83dfde66 Visibility hidden GVs do not require extra load of symbol address from the GOT or non-lazy-ptr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60519 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-04 01:56:50 +00:00
Evan Cheng
62fb4f2e1c Use mmx (punpckldq VR64, (mmx_v_set0)) to clear high 32-bits of a VR64 register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60499 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 19:38:05 +00:00
Dan Gohman
c54baa2d43 Split foldMemoryOperand into public non-virtual and protected virtual 
parts, and add target-independent code to add/preserve
MachineMemOperands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60488 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 18:43:12 +00:00
Dan Gohman
15511cf166 Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60487 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 18:15:48 +00:00
Dan Gohman
8cf7713753 Extend X86's addFrameReference to add a MachineMemOperand for 
the frame reference. This will help post-RA scheduling determine
that spills to distinct stack slots are independent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60486 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 18:11:40 +00:00
Rafael Espindola
952b839ce9 Fix bug 3140. 
Print a single parameter .file directive if we have an ELF target.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60480 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 11:01:37 +00:00
Evan Cheng
370e5340a5 Refactor code. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60478 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 08:38:43 +00:00
Bill Wendling
0ea25cb941 CC should only be a ConstantSDNode at this point. Just use 'cast' instead of 'dyn_cast'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60477 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 08:32:02 +00:00
Dan Gohman
62c939d7d5 Mark x86's V_SET0 and V_SETALLONES with isSimpleLoad, and teach X86's 
foldMemoryOperand how to "fold" them, by converting them into constant-pool
loads. When they aren't folded, they use xorps/cmpeqd, but for example when
register pressure is high, they may now be folded as memory operands, which
reduces register pressure.

Also, mark V_SET0 isAsCheapAsAMove so that two-address-elimination will
remat it instead of copying zeros around (V_SETALLONES was already marked).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60461 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 05:21:24 +00:00
Dan Gohman
c5a1a220ea Fix this comment to reflect that it applies to types other 
than just i32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60455 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 01:39:44 +00:00
Dan Gohman
e4300e271a Fix byval arguments in the fastcc calling convention. The fastcc convention 
delegates to the regular x86-32 convention which handles byval, but only
after it handles a few cases, and it's necessary to handle byval before
handling those cases. This fixes PR3122 (and rdar://6400815), llvm-gcc
miscompiling LLVM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60453 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 01:28:04 +00:00
Bill Wendling
61edeb5ed2 Second stab at target-dependent lowering of everyone's favorite nodes: [SU]ADDO 
- LowerXADDO lowers [SU]ADDO into an ADD with an implicit EFLAGS define. The
  EFLAGS are fed into a SETCC node which has the conditional COND_O or COND_C,
  depending on the type of ADDO requested.

- LowerBRCOND now recognizes if it's coming from a SETCC node with COND_O or
  COND_C set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60388 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-02 01:06:39 +00:00
Bill Wendling
9f24874f2e Reapply r60382. This time, don't mark "ADC" nodes with "implicit EFLAGS". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60385 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-02 00:07:05 +00:00
Bill Wendling
e3b3c00454 Temporarily revert r60382. It caused CodeGen/X86/i2k.ll and others to fail. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60383 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-01 23:44:08 +00:00
Bill Wendling
a047bcacf2 - Have "ADD" instructions return an implicit EFLAGS. 
- Add support for seto, setno, setc, and setnc instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60382 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-01 23:30:42 +00:00
Duncan Sands
aaffa05d0a There are no longer any places that require a 
MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60349 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-01 11:41:29 +00:00
Duncan Sands
1607f05cb7 Change the interface to the type legalization method 
ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60348 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-01 11:39:25 +00:00
Eli Friedman
91db5271d2 A couple small cleanups, plus a new potential optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60286 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-30 07:52:27 +00:00
Duncan Sands
f9a67a8943 Fix build with gcc-4.4: it doesn't like PICStyle 
being both a namespace and a variable name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60208 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-28 09:29:37 +00:00
Bill Wendling
109872e360 Comment out code that isn't entirely correct. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60156 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-27 07:18:35 +00:00
Evan Cheng
884c70c912 On x86 favors folding short immediate into some arithmetic operations (e.g. add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size. 
e.g.
movl 4(%esp), %eax
addl $4, %eax

is 2 bytes shorter than

movl $4, %eax
addl 4(%esp), %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60139 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-27 00:49:46 +00:00
Bill Wendling
3fafd93560 Generate something sensible for an [SU]ADDO op when the overflow/carry flag is 
the conditional for the BRCOND statement. For instance, it will generate:

    addl %eax, %ecx
    jo LOF

instead of

    addl %eax, %ecx
    ; About 10 instructions to compare the signs of LHS, RHS, and sum.
    jl LOF



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60123 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-26 22:37:40 +00:00
Dan Gohman
25a1b47cc3 Fish kill flag annotations in PUSH instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60095 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-26 06:39:12 +00:00
Bill Wendling
41ea7e7eb3 - Make lowering of "add with overflow" customizable by back-ends. 
- Mark "add with overflow" as having a custom lowering for X86. Give it a null
  lowering representation for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59971 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-24 19:21:46 +00:00
Evan Cheng
027fdbe3ba Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59953 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-24 07:34:46 +00:00
Mon P Wang
9f22a4aaaf Added missing description for -disable-mmx option. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59929 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-24 02:10:43 +00:00
Duncan Sands
03228089d5 Rename SetCCResultContents to BooleanContents. In 
practice these booleans are mostly produced by SetCC,
however the concept is more general.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-23 15:47:28 +00:00
Mon P Wang
3c81d35e7d Added -disable-mmx using a patch from Preston Gurd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59901 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-23 04:37:22 +00:00
Anton Korobeynikov
7751ad92da Make a convenient helper for printing offsets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59872 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-22 16:15:34 +00:00
Mon P Wang
07239f13cd Allow XMM2 and XMM3 to be used for non ABI compliant code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59720 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-20 07:48:19 +00:00
Evan Cheng
eda60a8364 Eliminate a compile time warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59677 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-19 23:21:11 +00:00
Stuart Hastings
be362abe9c <rdar://problem/6351057> 
Discourage (allocate last) use of x86_64 R12 and R13 due to their
longer instruction encodings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59644 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-19 17:19:35 +00:00