Chris Lattner
6a28456e18
add a high-priority SSE issue from sgefa
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25787 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:14:47 +00:00
Chris Lattner
b638cd89db
add a missed optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25786 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:08:15 +00:00
Reid Spencer
2ce5b263ba
Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a
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few stores under certain conditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25777 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:48:25 +00:00
Chris Lattner
0fc9c26e7d
remove now-dead code, the legalizer takes care of this for us
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25776 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:45:31 +00:00
Chris Lattner
44d9b9bb86
The FP stack doesn't support UNDEF, ask the legalizer to legalize it
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instead of lying and saying we have it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25775 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:44:22 +00:00
Chris Lattner
a54aa94197
Targets all now request ConstantFP to be legalized into TargetConstantFP.
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'fpimm' in .td files is now TargetConstantFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25771 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:26:08 +00:00
Jeff Cohen
b8643ac476
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25760 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 03:45:35 +00:00
Jeff Cohen
c4013d6772
Flesh out AMD family/models.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25755 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 20:30:18 +00:00
Jeff Cohen
216d281d0a
Correctly determine CPU vendor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25754 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 19:48:34 +00:00
Jeff Cohen
a349640b7f
Use union instead of reinterpret_cast.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:47:32 +00:00
Jeff Cohen
7617717496
Fix recognition of Intel CPUs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25750 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:38:20 +00:00
Chris Lattner
c2fad16155
Is64Bit reflects the capability of the chip, not an aspect of the target os
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25749 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:23:48 +00:00
Chris Lattner
dabbc98396
Fix a bunch of JIT failures with the new isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25748 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:19:37 +00:00
Jeff Cohen
41adb0d679
Improve X86 subtarget support for Windows and AMD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25747 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:09:06 +00:00
Chris Lattner
6b2469c1ad
silence a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25745 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 10:34:47 +00:00
Chris Lattner
1e39a15b42
make this work on non-native hosts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25734 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 06:05:41 +00:00
Evan Cheng
d41e9e5e7a
A bit of wisdom from Chris on the last entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25715 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:54:32 +00:00
Evan Cheng
85214ba3cc
AT&T assembly convention: registers are in lower case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:53:29 +00:00
Chris Lattner
104988a16a
initialize all instance vars
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25711 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:37:09 +00:00
Evan Cheng
e826a018b9
Added notes about a x86 isel deficiency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25706 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:11:01 +00:00
Evan Cheng
dbd38d7f64
Added a temporary option -enable-x86-sse to enable sse support. It is used by
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llc-beta.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25701 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:49:34 +00:00
Evan Cheng
8e44f0756f
Bye bye Pattern ISel, hello DAG ISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25700 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:26:54 +00:00
Nate Begeman
ee625573b5
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
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the same functionality. This addresses another piece of bug 680. Next,
on to fixing Alpha VAARG, which I broke last time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:09:22 +00:00
Evan Cheng
b3a7e21b7e
A better workaround
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25692 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 19:30:30 +00:00
Chris Lattner
9f96a32831
force sse/3dnow off until they work. This fixes all the x86 failures last night
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25690 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 18:30:50 +00:00
Chris Lattner
c2493c45a0
Unbreak the JIT with SSE
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25688 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 18:27:18 +00:00
Evan Cheng
559806f575
x86 CPU detection and proper subtarget support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25679 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 08:10:46 +00:00
Chris Lattner
cedc6f4b30
PHI and INLINEASM are now built-in instructions provided by Target.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25674 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 01:46:15 +00:00
Jeff Cohen
9471c8a93b
Improve compatibility with VC2005, patch by Morten Ofstad!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25661 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 20:41:32 +00:00
Chris Lattner
38f7373018
Improve compatibility with VC2005, patch by Morten Ofstad!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25653 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 19:55:20 +00:00
Evan Cheng
97c7fc351e
Added preliminary x86 subtarget support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25645 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 09:53:06 +00:00
Evan Cheng
67caa39e4c
Work around some x86 Darwin assembler bugs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25638 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 02:27:43 +00:00
Evan Cheng
9bba894596
When trying to fold X86::SETCC into a Select, make a copy if it has more than
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one use. This allows more CMOV instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25634 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 02:13:10 +00:00
Evan Cheng
71fb9ad5d9
Remove the uses of STATUS flag register. Rely on node property SDNPInFlag,
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SDNPOutFlag, and SDNPOptInFlag instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25629 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 00:29:36 +00:00
Nate Begeman
acc398c195
First part of bug 680:
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Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 18:21:52 +00:00
Evan Cheng
0b2afbd58a
X86 prefer scheduling for reduced register pressure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25602 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 09:15:17 +00:00
Evan Cheng
0d718e9afc
Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25596 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 09:05:09 +00:00
Chris Lattner
31e63881b3
Loosen up these checks to allow direct uses of ESP
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25595 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 08:00:36 +00:00
Chris Lattner
91cacc810b
use ESP directly, not a copy of ESP into some other register for fastcc calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25584 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-24 06:14:44 +00:00
Chris Lattner
af63bb03c5
Emit the copies out of call return registers *after* the ISD::CALLSEQ_END
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node, fixing fastcc and the case where a function has a frame pointer due
to dynamic allocas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25580 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-24 05:17:12 +00:00
Chris Lattner
6da23db69f
Allow jit-beta to work
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25578 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-24 04:50:48 +00:00
Chris Lattner
2c2c6c61f1
Add explicit #includes of <iostream>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-22 23:41:00 +00:00
Evan Cheng
86556a5f42
Rename fcmovae to fcmovnb and fcmova to fcmovnbe (following Intel manual).
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Some assemblers can't recognize the aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25494 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-21 02:55:41 +00:00
Chris Lattner
1f16ff6f0a
LowerReturn now doesn't have to handle f32 returns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25484 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-20 18:41:25 +00:00
Evan Cheng
98f5dab8a7
Stop doing that accidental commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25474 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-20 01:14:05 +00:00
Evan Cheng
21d5443934
A few more SH{L|R}D peepholes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25473 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-20 01:13:30 +00:00
Evan Cheng
cce47faf52
Didn't mean to commit the last one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25469 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 23:27:08 +00:00
Evan Cheng
956044cf03
Added i16 SH{L|R}D patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25468 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 23:26:24 +00:00
Evan Cheng
dc8d2ab3e9
Avoid generating a redundant setcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25457 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 08:52:46 +00:00
Evan Cheng
41b6dc8dbe
adc and sbb need an incoming flag to ensure it reads the carry flag
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from add / sub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25444 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 06:53:20 +00:00
Evan Cheng
68b951a5e5
Two peepholes:
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(or (x >> c) | (y << (32 - c))) ==> (shrd x, y, c)
(or (x << c) | (y >> (32 - c))) ==> (shld x, y, c)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25438 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 01:56:29 +00:00
Evan Cheng
d9c45e9af9
Didn't mean to check that in.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25436 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 01:52:56 +00:00
Evan Cheng
b7b5706340
A obvious typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25435 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 01:46:14 +00:00
Evan Cheng
99fa0a102a
SRA shift amount must be in i8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25416 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-18 09:26:46 +00:00
Evan Cheng
68e5d084f1
If a call return type is i1, insert a truncate from X86::AL to i1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25415 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-18 08:08:38 +00:00
Evan Cheng
357c58efde
Fix lowering of calls which return f32 values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25413 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-17 21:58:21 +00:00
Evan Cheng
e5d9343377
Zero extending load from i1 to i8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25391 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-17 07:02:46 +00:00
Evan Cheng
6892f28e99
SSE does not support i64 SINT_TO_FP (FP stack doesn't either, but we custom
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expand it), so ask legalizer to expand i32 UINT_TO_FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25386 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-17 02:32:49 +00:00
Evan Cheng
2059f884aa
Added a FIXME comment about why FST is currently flagged to fpGETRESULT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25381 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-17 00:37:42 +00:00
Evan Cheng
42ef0bc6fb
Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should
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read a flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25378 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-17 00:19:47 +00:00
Evan Cheng
b5d0b0bae5
More typo's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25375 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-16 23:26:53 +00:00
Evan Cheng
8a3f4c75fa
Some typo's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-16 22:48:46 +00:00
Evan Cheng
0cc3945efe
Fix FP_TO_INT**_IN_MEM lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25368 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-16 21:21:29 +00:00
Chris Lattner
1db4b4f5c4
transfer some notes from my email to somewhere useful.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25361 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-16 17:53:00 +00:00
Evan Cheng
cf74a7c762
Added patterns for 8-bit multiply
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25338 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-15 10:05:20 +00:00
Chris Lattner
e112552b5a
Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25333 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-15 09:00:21 +00:00
Chris Lattner
b47fad9892
silence a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25322 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-14 20:11:13 +00:00
Nate Begeman
d88fc03602
bswap implementation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25312 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-14 03:14:10 +00:00
Evan Cheng
e3703d44e9
A typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25307 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-14 01:18:49 +00:00
Evan Cheng
b8414333ac
Add truncstore i1 patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25296 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 21:45:19 +00:00
Chris Lattner
052d2ff5dd
Fix a bug in my last X86 checkin, pointed out by cozmic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25293 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 20:19:44 +00:00
Evan Cheng
e90da97f3e
LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be
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flipped around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25290 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 19:51:46 +00:00
Chris Lattner
9edba7605e
Enable X86 support for savestack/restorestack
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25278 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 18:00:54 +00:00
Chris Lattner
b99329e8a0
expand unsupported stacksave/stackrestore nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25272 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 02:42:53 +00:00
Evan Cheng
e08c270623
Minor update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25263 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 01:20:42 +00:00
Evan Cheng
80ebe38118
More typo's. I need new eye glasses...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25261 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 01:17:24 +00:00
Evan Cheng
189d01e8cc
Oops. Typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25260 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 01:06:49 +00:00
Evan Cheng
1bcee3602e
Fix a SETCC / BRCOND folding bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25259 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 01:03:02 +00:00
Evan Cheng
a3195e8643
Fix sint_to_fp (fild*) support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25257 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 22:54:21 +00:00
Evan Cheng
77e9043b84
Specify transformation from GlobalAddress to TargetGlobalAddress and
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ExternalSymbol to TargetExternalSymbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25253 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 19:36:31 +00:00
Evan Cheng
5ee4ccce5b
X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be
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linked together).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25247 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 08:27:59 +00:00
Evan Cheng
002fe9baf2
* Materialize GlobalAddress and ExternalSym with MOV32ri rather than
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LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25246 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 07:56:47 +00:00
Evan Cheng
eb422a7234
Added ROTL and ROTR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25232 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 23:20:05 +00:00
Evan Cheng
67f92a7649
Support for MEMCPY and MEMSET.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25226 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 22:15:48 +00:00
Evan Cheng
38262cad0a
Select DYNAMIC_STACKALLOC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25225 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 22:15:18 +00:00
Nate Begeman
35ef913ec2
Add bswap, rotl, and rotr nodes
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Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25222 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 21:21:00 +00:00
Evan Cheng
8700e14ba1
* Add special entry code main() (to set x87 to 64-bit precision).
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* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
call parmater passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25207 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 06:09:51 +00:00
Chris Lattner
92cb0af675
implement FP_REG_KILL insertion for the dag-dag instruction selector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25192 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 01:15:34 +00:00
Chris Lattner
a2b694ce35
Fit into 80 cols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25191 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 00:46:55 +00:00
Evan Cheng
4a46080fe0
SSE cmov support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25190 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 00:33:36 +00:00
Evan Cheng
f710062bfb
* fp to sint patterns.
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* fiadd, fisub, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25189 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-10 22:22:02 +00:00
Evan Cheng
aaca22ca91
FP_TO_INT*_IN_MEM and x87 FP Select support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25188 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-10 20:26:56 +00:00
Evan Cheng
510e478098
* Added undef patterns.
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* Some reorg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25163 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 23:10:28 +00:00
Evan Cheng
910cd3cfa2
More typos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25162 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 22:29:54 +00:00
Evan Cheng
82a24b9813
typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25160 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 20:49:21 +00:00
Evan Cheng
e3413160ca
Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25158 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 18:33:28 +00:00
Evan Cheng
948f343a2f
* Added integer div / rem.
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* Fixed a load folding bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25136 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 23:19:29 +00:00
Evan Cheng
0114e94903
ISEL code for MULHU, MULHS, and UNDEF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25132 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 20:36:21 +00:00
Chris Lattner
cb83374bd9
silence a bogus gcc warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25129 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 17:56:38 +00:00
Evan Cheng
cfa260b2ab
Addd (shl x, 1) ==> (shl x, x) peepholes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25123 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 02:31:59 +00:00
Evan Cheng
da95a84a11
fold (shl x, 1) -> (add x, x)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25120 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 01:06:31 +00:00
Evan Cheng
d9558e0ba6
* Fast call support.
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* FP cmp, setcc, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25117 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 00:43:03 +00:00
Evan Cheng
650d688db6
Added ConstantFP patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25108 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 02:08:37 +00:00
Jim Laskey
e0bce71c42
Had expand logic backward.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 01:47:43 +00:00
Jim Laskey
abf6d1784b
Added initial support for DEBUG_LABEL allowing debug specific labels to be
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inserted in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25104 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 01:25:28 +00:00
Evan Cheng
d90eb7fb24
DAG based isel call support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 00:27:02 +00:00
Chris Lattner
f31d193cce
Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25024 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-27 03:02:18 +00:00
Evan Cheng
2b4ea795a2
Added field noResults to Instruction.
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Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-26 09:11:45 +00:00
Evan Cheng
e4672aa5b4
Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25004 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-24 09:48:35 +00:00
Evan Cheng
171049d10f
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
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* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 22:14:32 +00:00
Evan Cheng
38bcbaf23e
More X86 floating point patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24990 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 07:31:11 +00:00
Chris Lattner
21f66859e4
make sure bit_convert's are expanded
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24979 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 05:15:23 +00:00
Evan Cheng
5bc4da4893
Bye bye HACKTROCITY.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24935 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-22 02:26:21 +00:00
Evan Cheng
3a03ebb377
* Fix a GlobalAddress lowering bug.
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* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 23:05:39 +00:00
Evan Cheng
793ca4caa4
Oops. Accidentally deleted RET pattern. It's still needed for return void;
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24920 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 22:22:16 +00:00
Jim Laskey
e81aecbae6
Disengage DEBUG_LOC from non-PPC targets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24919 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 20:51:37 +00:00
Evan Cheng
d5781fca4f
* Added support for X86 RET with an additional operand to specify number of
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bytes to pop off stack.
* Added support for X86 SETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24917 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 20:21:51 +00:00
Chris Lattner
c515ad18f8
This was meant to go in
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24900 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 07:50:26 +00:00
Chris Lattner
58fe459e36
Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns
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that were overloaded to work before and after the stackifier runs. With the
new clean world, it is possible to write patterns for these instructions: woo!
This also adds a few simple patterns here and there, though there are a lot
still missing. These should be easy to add though. :)
See the comments under "Floating Point Stack Support" for more details on
the new world order.
This patch as absolutely no effect on the generated code, woo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24899 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 07:47:04 +00:00
Chris Lattner
9fb2422c49
Wrap some long lines: no functionality change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24898 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 05:34:58 +00:00
Evan Cheng
8263c5e920
Remove ISD::RET select code. Now tblgen'd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24889 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 02:41:57 +00:00
Evan Cheng
b077b842b6
* Added lowering hook for external weak global address. It inserts a load
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for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
value (or store / fld / copy to ST(0) for floating point value). This
eliminate the need to write C++ code to handle RET with variable number
of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24888 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 02:39:21 +00:00
Evan Cheng
bbc8ddbea3
SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24886 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20 22:59:51 +00:00
Evan Cheng
a5386b0823
Added X86 readport patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24879 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20 07:38:38 +00:00
Evan Cheng
7226158d7e
Added a hook to print out names of target specific DAG nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24877 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20 06:22:03 +00:00
Evan Cheng
898101c15f
X86 conditional branch support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24870 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 23:12:38 +00:00
Evan Cheng
fcaa9957c9
It's essential we clear CodeGenMap after isel every basic block!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24867 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 22:36:02 +00:00
Chris Lattner
4543251834
eliminate some redundancy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24781 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:47:05 +00:00
Evan Cheng
bdce7b4090
Darwin API issue: indirect load of external and weak symbols.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24775 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 09:13:43 +00:00
Evan Cheng
433dbdaa63
Remove a few lines of dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24768 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:18:44 +00:00
Evan Cheng
98abbfb2ef
Added an idea about any_extend for performance tuning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24763 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 06:54:43 +00:00
Evan Cheng
45f37bc527
Added truncate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24760 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 02:02:50 +00:00
Evan Cheng
1aabc4ea15
Added anyext, modelled as zext on X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24759 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:47:57 +00:00
Evan Cheng
8dee8cca3a
Added some isel ideas.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24757 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:25:19 +00:00
Evan Cheng
aed7c721df
Added support for cmp, test, and conditional move instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24756 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:24:02 +00:00
Evan Cheng
56323c761a
Only lower SELECT when using DAG based isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24755 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:22:13 +00:00
Evan Cheng
7df96d6672
X86 lowers SELECT to a cmp / test followed by a conditional move.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:21:05 +00:00
Chris Lattner
272f998f6f
Don't globalize internal functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24727 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 00:07:30 +00:00
Evan Cheng
cb17bac3a3
* Promote all 1 bit entities to 8 bit.
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* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24726 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 19:49:23 +00:00
Evan Cheng
502c5bb428
Added frameindex, constpool, globaladdr, and externalsym as root nodes of
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leaaddr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24724 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 08:31:04 +00:00
Evan Cheng
def941b41f
Handling zero extension of 1 bit value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24722 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 01:02:48 +00:00
Evan Cheng
f6036a3f1b
Use MOV8rm to load 1 bit value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24721 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 00:59:17 +00:00
Evan Cheng
74164098ff
Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24717 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:28:18 +00:00
Evan Cheng
7a7e8375a9
Added sext and zext patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24705 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:22:27 +00:00
Evan Cheng
85dd889ed6
Add load + store folding srl and sra patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24696 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 07:24:22 +00:00
Chris Lattner
d1239b7c69
Use the shared asmprinter code for printing special llvm globals
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24695 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 06:32:50 +00:00
Chris Lattner
a046e0d79f
Add ELF and darwin support for static ctors and dtors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24693 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 04:53:51 +00:00
Evan Cheng
c937ffafba
Beautify a few patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24690 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 02:40:18 +00:00
Evan Cheng
763b029b28
Some shl patterns which do load + store folding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24689 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 02:34:51 +00:00
Evan Cheng
605c415046
A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24688 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:57:51 +00:00
Evan Cheng
0ef3a77bdf
Add and, or, and xor patterns which fold load + stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24687 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:41:36 +00:00
Evan Cheng
6cad276c90
Add inc + dec patterns which fold load + stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24686 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:02:47 +00:00
Evan Cheng
5ce4edb967
Add neg and not patterns which fold load + stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24685 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:54:44 +00:00
Evan Cheng
5a38e0210d
Missed a couple redundant explicit type casts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24684 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:25:07 +00:00
Evan Cheng
9b6b642647
Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24683 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:14:11 +00:00
Evan Cheng
b3558540b6
* Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands.
...
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24682 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:01:09 +00:00
Evan Cheng
f281e02cbd
Add some integer mul patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 23:47:46 +00:00
Evan Cheng
d160d48a2b
Add some sub patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24675 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 21:54:05 +00:00
Evan Cheng
e5280536a3
When SelectLEAAddr() fails, it shouldn't cause the side effect of having the
...
base or index operands being selected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24674 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 21:49:40 +00:00
Evan Cheng
cbd6ed4d6b
For ISD::RET, if # of operands >= 2, try selection the real data dep. operand
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first before the chain.
e.g.
int X;
int foo(int x)
{
x += X + 37;
return x;
}
If chain operand is selected first, we would generate:
movl X, %eax
movl 4(%esp), %ecx
leal 37(%ecx,%eax), %eax
rather than
movl $37, %eax
addl 4(%esp), %eax
addl X, %eax
which does not require %ecx. (Due to ADD32rm not matching.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24673 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:32:18 +00:00
Chris Lattner
a763969837
remove some never-completed and now-obsolete code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24671 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:12:20 +00:00
Evan Cheng
ee93f9db87
Add a few more add / store patterns. e.g. ADD32mi8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24670 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 19:45:23 +00:00
Evan Cheng
b51a059b2c
* Added X86 store patterns.
...
* Added X86 dec patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 00:48:20 +00:00
Evan Cheng
ab24ed2a32
Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24648 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:48:48 +00:00
Evan Cheng
670fd8f8dd
Added explicit type field to ComplexPattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:15:07 +00:00
Evan Cheng
ec693f77c0
* Added intelligence to X86 LEA addressing mode matching routine so it returns
...
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:01:35 +00:00
Chris Lattner
e80242a948
X86 doesn't support sextinreg for 8-bit things either.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07 17:59:14 +00:00
Evan Cheng
8d202230b4
Remove unnecessary let hasCtrlDep=1 now it can be inferred.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24611 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:09:43 +00:00
Chris Lattner
3d36a9f6f4
Several things:
...
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly. The port number really
*is* a 16-bit value, but the patterns should only match if the number
is 0-255. Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
i8, not an i16 as they were believed to be before. This previous fib
stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:40:25 +00:00
Evan Cheng
d35b8c1adb
Added isel patterns for RET, JMP, and WRITEPORT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:19:43 +00:00
Chris Lattner
df65de42cf
Fix PR672 another way which should be more robust
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 06:03:50 +00:00
Chris Lattner
a027ba885a
Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.
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This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on. Given a clean nightly tester run, we should be able to turn it
on by default!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24578 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-03 07:15:55 +00:00
Chris Lattner
865874c88a
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24572 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-02 00:11:20 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Evan Cheng
640f299b44
Proper support for shifts with register shift value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24559 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:43:55 +00:00
Chris Lattner
350d22e14d
SelectNodeTo now returns its result, we must pay attention to it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24550 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 22:59:19 +00:00
Nate Begeman
85a168a734
Fix a typo in my latest change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24542 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:57:39 +00:00
Nate Begeman
391c5d231a
No longer track value types for asm printer operands, and remove them as
...
an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:54:35 +00:00
Chris Lattner
5b9bbc8792
Fix a bug in a recent patch that broke shifts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24526 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 05:11:18 +00:00
Evan Cheng
bd3d25c6b1
Added support to STORE and shifts to DAG to DAG isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24525 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 02:51:20 +00:00
Evan Cheng
345c3f370d
Fixed a minor bug: - -offset != offset iff offset == MININT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24522 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 01:59:00 +00:00
Evan Cheng
f0701842f7
Add more X86 ISel patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24520 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 19:38:52 +00:00
Chris Lattner
f73bae1b73
No targets support line number info yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24513 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 06:16:21 +00:00
Chris Lattner
1e4ed93599
Add a missed optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24495 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-28 04:52:39 +00:00
Chris Lattner
ac2902bcb5
Use HasDotTypeDotSizeDirective instead of forELF
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24481 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 23:06:54 +00:00
Chris Lattner
9787c6443f
Remove a level of indentation by using a continue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24479 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:48:18 +00:00
Chris Lattner
d460f57d65
Simplify the subtarget info, allow the asmwriter to do some target sensing
...
based on TargetType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24478 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:43:58 +00:00
Chris Lattner
a35a8e87fa
Use subtarget information computed by X86Subtarget instead of rolling our own.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24477 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:39:40 +00:00
Chris Lattner
e5600e5509
Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin,
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or native Win32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24476 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:31:58 +00:00
Chris Lattner
5df14ca0a1
Add a forELF flag, allowing the removal of forCygwin and simplification of
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conditionals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24475 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:19:48 +00:00
Chris Lattner
8fccc97b0b
simplify and genericize this code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24473 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 19:50:31 +00:00
Chris Lattner
69191f8f05
prune #include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24468 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:33:17 +00:00
Chris Lattner
d939f6c85d
Switch to using the shared constant pool printer, along with using shorter
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CPI ids
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24467 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:32:23 +00:00
Chris Lattner
8b8b9515d6
Adjust to capitalized AsmPrinter method names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24456 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:51:23 +00:00
Chris Lattner
64965ba8b0
Use PrivateGlobalPrefix for basic block labels. This allows the x86 darwin
...
port to properly use L for the bb prefix instead of .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24454 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:43:59 +00:00
Chris Lattner
7b6e53cde7
convert the rest of this over to use SwitchSection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24448 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:16:34 +00:00
Chris Lattner
224cfc2eac
Start using the AsmPrinter shared SwitchSection code. This allows the X86
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backend to implement global variables in sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24447 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:11:11 +00:00
Chris Lattner
62cbf2aab9
Rename SwitchSection -> switchSection to avoid conflicting with a future
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change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24443 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:55:27 +00:00
Chris Lattner
c41cc83117
Naturally align doubles in the constant pool, set PrivateGlobalPrefix on
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darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24440 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:46:22 +00:00
Chris Lattner
81f803df80
Lower READCYCLECOUNTER correctly, preserving the chain result
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24438 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:57:19 +00:00
Chris Lattner
441b223c9b
encode rdtsc correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24435 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:13:18 +00:00
Chris Lattner
81363c3871
use chain operands to ensure the copies don't wander from the rdtsc instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24434 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:01:40 +00:00
Andrew Lenharth
b873ff322c
The second patch of X86 support for read cycle counter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24430 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 21:41:10 +00:00
Chris Lattner
6adaf79ad7
Teach the x86 backend about the register constraints of its addressing mode.
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Patch by Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24423 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 07:01:30 +00:00
Chris Lattner
f9ce9fb49b
Add load and other support to the dag-dag isel. Patch contributed by Evan
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Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24419 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 02:11:08 +00:00
Chris Lattner
f124d5e500
add more patterns, patch by Evan Cheng.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24406 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-18 01:04:42 +00:00
Chris Lattner
78432feff8
Add patterns for some 16-bit immediate instructions, patch contributed by
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Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24384 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 02:01:55 +00:00
Chris Lattner
7a12537843
Add patterns for several simple instructions that take i32 immediates.
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Patch contributed by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24382 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 22:59:19 +00:00
Chris Lattner
c961eea6cb
initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
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by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24371 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 01:54:32 +00:00
Chris Lattner
dbdbf0ce2e
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
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contributed by Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24358 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-15 00:40:23 +00:00
Chris Lattner
ce8eb0c16b
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24233 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08 02:11:51 +00:00
Chris Lattner
ffff6175ef
add a note that Nate mentioned last week
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23898 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 21:44:59 +00:00
Chris Lattner
1171ff4fd7
Put some of my random notes somewhere public
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23897 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 19:52:42 +00:00
Nate Begeman
405e3ecb56
Invert the TargetLowering flag that controls divide by consant expansion.
...
Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 00:02:42 +00:00
Nate Begeman
34f342e36f
Remove some dead code now that the dag combiner exists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:08:02 +00:00
Nate Begeman
14e2cf62f4
Properly split f32 and f64 into separate register classes for scalar sse fp
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fixing a bunch of nasty hackery
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:06:00 +00:00
Chris Lattner
3cf8760dc5
silence some warnings
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 16:29:36 +00:00
Chris Lattner
56bcae0de9
simplify this code using the new regclass info passed in
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23557 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:12:38 +00:00
Chris Lattner
97d5e6461a
Pass extra regclasses into spilling code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 01:29:42 +00:00
Chris Lattner
3e2bafd640
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
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Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23505 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 22:29:17 +00:00
Chris Lattner
a92aab74dd
Implement the isLoadFromStackSlot interface
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23387 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-19 05:23:44 +00:00
Chris Lattner
43ef1318c6
give all operands names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23356 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-14 21:10:24 +00:00
Chris Lattner
3452d23c34
fix a major regression from my patch this afternoon
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23347 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-14 06:06:45 +00:00
Chris Lattner
82da52299c
This code is no longer needed, it is moved to the target-indep code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23332 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-13 19:31:44 +00:00
Chris Lattner
fb8b8a75ff
Handle any_extend like zext
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23202 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 00:16:09 +00:00
Jim Laskey
b1e1180ca0
1. Use SubtargetFeatures in llc/lli.
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2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-01 21:38:21 +00:00
Reid Spencer
dd22dc85ea
Adjust to member variable name change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23119 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-27 19:09:48 +00:00
Chris Lattner
143b675393
Fix a bug in my previous checkin
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23082 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 17:18:44 +00:00
Chris Lattner
5839bf2b3b
Change ConstantPoolSDNode to actually hold the Constant itself instead of
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putting it into the constant pool. This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23081 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 17:15:30 +00:00
Chris Lattner
7cad4f2089
Fix a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23031 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-25 00:05:15 +00:00
Chris Lattner
d177579860
Adjust to new livevars interface
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22991 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 23:41:14 +00:00
Chris Lattner
76eb08bcda
Simplify this code by using LiveVariables::KillsRegister
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22988 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 22:49:55 +00:00
Chris Lattner
ecbce617ca
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 19:13:20 +00:00
Chris Lattner
03ba7b9f25
Put register classes into namespaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22925 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:51:57 +00:00
Chris Lattner
2505d6b727
The simple isel being gone makes this dead!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:32:03 +00:00
Chris Lattner
9d9dc816d0
add a few missing cases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22891 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:41:29 +00:00
Chris Lattner
b822abade7
Give ADJCALLSTACKDOWN/UP the correct operands.
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Give a whole bunch of other stuff variable operands, particularly FP. The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable. This will have to be fixed before we can dag->dag
the X86 backend. The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22890 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:38:22 +00:00
Chris Lattner
679c408768
The variable SAR's only take one operand too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22888 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:31:37 +00:00
Chris Lattner
fd444b2a69
Stop adding bogus operands to variable shifts on X86. These instructions
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only take one operand. The other comes implicitly in through CL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22887 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:16:17 +00:00
Nate Begeman
73bfa71524
Remove the X86 and PowerPC Simple instruction selectors; their time has
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passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:53:15 +00:00
Chris Lattner
707ebc5dd6
update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22807 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 21:56:37 +00:00
Nate Begeman
7cbd525ba8
Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
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fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 19:49:35 +00:00
Nate Begeman
889f2c1acf
Fix last night's X86 regressions by putting code for SSE in the if(SSE)
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block. nur.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-14 18:37:02 +00:00
Nate Begeman
875f360e22
Fix FP_TO_UINT with Scalar SSE2 now that the legalizer can handle it. We
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now generate the relatively good code sequences:
unsigned short foo(float a) { return a; }
_foo:
movss 4(%esp), %xmm0
cvttss2si %xmm0, %eax
movzwl %ax, %eax
ret
and
unsigned bar(float a) { return a; }
_bar:
movss .CPI_bar_0, %xmm0
movss 4(%esp), %xmm1
movapd %xmm1, %xmm2
subss %xmm0, %xmm2
cvttss2si %xmm2, %eax
xorl $-2147483648, %eax
cvttss2si %xmm1, %ecx
ucomiss %xmm0, %xmm1
cmovb %ecx, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-14 04:36:51 +00:00
Chris Lattner
88ac32ca26
Update the targets to the new SETCC/CondCodeSDNode interfaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22729 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-09 20:21:10 +00:00
Chris Lattner
8c4a8735ec
adjust to change in getSubtarget() api
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22687 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-05 21:54:27 +00:00
Nate Begeman
8c00f8cdc7
Add Subtarget support to PowerPC. Next up, using it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22644 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-04 07:12:09 +00:00
Nate Begeman
1c73c7be9d
Scalar SSE: load +0.0 -> xorps/xorpd
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Scalar SSE: a < b ? c : 0.0 -> cmpss, andps
Scalar SSE: float -> i16 needs to be promoted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-03 23:26:28 +00:00
Chris Lattner
0561b3ff9f
Update to use the new MathExtras.h support for log2 computation.
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Patch contributed by Jim Laskey!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-02 19:26:06 +00:00
Jeff Cohen
d29b6aa608
Keep tabs and trailing spaces out.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22565 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-30 18:33:25 +00:00