Evan Cheng
4a8b7d030b
Add R12 to the list of registers clobbered by 16-bit Thumb calls as a pre-caution. r12 could be live once we have mixed 32-bit and 16-bit instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76728 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 06:37:28 +00:00
Evan Cheng
3b6627b944
Fix a obvious copy-n-paste bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 06:12:40 +00:00
Evan Cheng
8295d99bff
Get rid one of the getRegisterNumbering. Also add D16 - D31.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76725 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 05:55:18 +00:00
Eli Friedman
3dae284f5e
Add support for MMX VSETCC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76713 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 01:06:52 +00:00
Sean Callanan
5292588ad4
Added the unconditional JMP with an 8-bit relocation for the
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assembler / disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76712 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 01:05:20 +00:00
Evan Cheng
064a6eacab
Add an entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:58:27 +00:00
Chris Lattner
f1581564b6
inline the two MergeableConstSection implementations into their
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only caller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76710 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:47:11 +00:00
Chris Lattner
828f704c10
set the ELF "small" flag on objects that end up in .rodata.cst4 consistently,
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updating a mips testcase to expect it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:41:56 +00:00
Chris Lattner
2804616ba3
don't set the small flag yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:30:39 +00:00
Chris Lattner
298414ec18
remove the SelectSectionForMachineConst hook, replacing it with
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a new getSectionForMergableConstant hook. This removes one dependence
of TAI on Type, and provides the hook with enough info to make the
right decision based on whether the global has relocations etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:28:43 +00:00
Evan Cheng
fc6ad402fb
Let each target determines whether a machine instruction is dead. If true, that allows late codeine passes to delete it.
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This is considered a workaround. The problem is some targets are not modeling side effects correctly. PPC is apparently one of those. This patch allows ppc llvm-gcc to bootstrap on Darwin. Once we find out which instruction definitions are wrong, we can remove the PPCInstrInfo workaround.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76703 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:25:27 +00:00
Owen Anderson
e922c02019
Get rid of the Pass+Context magic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76702 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:24:57 +00:00
Chris Lattner
7cf12c7efd
reimplement Constant::ContainsRelocations as
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Constant::getRelocationInfo(), which has a much simpler
to use API. It still should not be part of libvmcore, but
is better than it was. Also teach it to be smart about
hidden visibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76700 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:05:44 +00:00
Evan Cheng
5d8f1cae76
Fixing cp island pass. Step 1: Determine whether the constant pool offset can be
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negative on an individual bases rather than basing on whether it's in thumb
mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:56:01 +00:00
Evan Cheng
7fdf962e5c
Fix comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:54:22 +00:00
Chris Lattner
b2fb9ccbb7
simplify code now that it is inlined.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76689 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:49:55 +00:00
Chris Lattner
97d2cae44b
Now that RelocBehaviour() is never overloaded, it doesn't need to be
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virtual. Just inline it into its two current call sites in preparation
for simplifying the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76686 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:47:11 +00:00
Chris Lattner
1a1b323504
this doesn't break any of the 4 ia64 tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76683 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:42:24 +00:00
Chris Lattner
9d8052f08f
alpha doesn't need to redefine this: it only supports PIC codegen anyway.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:41:35 +00:00
Chris Lattner
354c0165e7
no really, I can spell!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76679 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:36:01 +00:00
Chris Lattner
cb45963643
add an API so target-independent codegen can determine if a constant
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pool entry will require relocations against it. I implemented this
conservatively for ARM, someone who is knowledgable about it should
see if this can be improved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76678 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:34:23 +00:00
Chris Lattner
117c7e2a6a
remove the last bits of SectionFlagsForGlobal. There is some flag here that
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depends on XS1A, but I think the ReadOnlySection is already set up for this
and there is no testcase that this breaks. If this is really needed, we can
add the appropriate parameterization to TargetAsmInfo in the future to support
this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76667 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 22:42:37 +00:00
Chris Lattner
1ab78b03e8
don't mask out the small flag and then reapply it later.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76666 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 22:39:28 +00:00
Chris Lattner
27391795ac
if Xcore doesn't support TLS, it doesn't have to worry about thread local LLVM IR, it should be rejected by a front-end.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76665 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 22:37:38 +00:00
Chris Lattner
97ee12755d
remove the Xcore implementation of SelectSectionForGlobal. While you have
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to twist your brain to see it, I believe it is the same as ELFTargetAsmInfo::SelectSectionForGlobal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76664 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 22:36:53 +00:00
Chris Lattner
449e379bd7
simplify based on the fact that darwin always uses L/l.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76662 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 22:32:55 +00:00
Chris Lattner
939a8907ed
make some stuff private.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 22:30:39 +00:00
Chris Lattner
e1abeb478a
Remove the XCore custom implementation of MergeableConstSection, relying on
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the generic ELF version instead. This will result in its mergable constant
sections getting named ".rodata.cst4" instead of ".cp.const4", but the
linker looks at the section flags, not the name of the section AFAICT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76659 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 22:25:52 +00:00
Chris Lattner
7886ae9e3c
inline a trivial method into its only call site and fix indentation of cases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76654 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 21:29:08 +00:00
Chris Lattner
42b6418cc0
Remove some overridden functions in XCoreTargetAsmInfo that are
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implemented exactly the same way as its ELFTargetAsmInfo subclass
has them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76653 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 21:26:32 +00:00
Chris Lattner
7558f11849
minor cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76645 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 21:09:35 +00:00
Eli Friedman
e748285e1b
Missed a piece of the commit to remove the shift flavor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76635 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 20:15:24 +00:00
Eli Friedman
b3e7171926
Remove shift amount flavor. It isn't actually complete enough to
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be useful, and it's currently unused. (Some issues: it isn't actually
rich enough to capture the semantics on many architectures, and
semantics can vary depending on the type being shifted.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76633 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 20:12:16 +00:00
Eli Friedman
58bb61ae94
Remove a couple of already-implemented notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76631 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 20:05:43 +00:00
Evan Cheng
6762d91c05
Add fake v7 itineraries for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76612 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 18:54:14 +00:00
Chris Lattner
40bbebde9d
make AsmPrinter::doFinalization iterate over the global variables
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and call PrintGlobalVariable, allowing elimination and simplification
of various targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76604 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 18:38:57 +00:00
Evan Cheng
3ecadc816d
Do not select tSXTB / tSXTH in thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 18:15:26 +00:00
Chris Lattner
e4d8408c57
reduce indentation by using an early exit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76596 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:59:36 +00:00
Ted Kremenek
c55db82cd0
Update CMake files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76595 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:43:20 +00:00
Chris Lattner
b34e3a9b6b
whitespace cleanups, make the MipsAsmPrinter::doInitialization
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chain to the super class instead of initializing mangler directly.
This gives it .file and module level inline asm support among other
things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76593 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:39:48 +00:00
Chris Lattner
d3ffc06174
fix Sparc, SystemZ, and MSP430 to not override AsmPrinter::doInitialization.
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This eliminates redundancy setting up the mangler and adds support to them
for module-level inline asm and a .file directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76592 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:37:35 +00:00
Chris Lattner
90f8b7073d
Rename LessPrivateGlobalPrefix -> LinkerPrivateGlobalPrefix to match the
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LLVM IR concept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76590 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:30:51 +00:00
Chris Lattner
1010c21e4e
fix indentation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76587 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:25:13 +00:00
Chris Lattner
da6c240423
remove an unneeded override.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:23:41 +00:00
Chris Lattner
a46cb523ca
more random whitespace cleanup, eliminate #define, avoid copying
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vectors needlessly, doxygenify comments, improve constness, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:20:18 +00:00
Chris Lattner
dc47146a25
some simple whitespace cleanup, avoid copying vectors for no reason
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as much, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76578 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 16:44:47 +00:00
Daniel Dunbar
92645acd33
Add missing include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 08:58:44 +00:00
Daniel Dunbar
bda9653f5b
Switch this API to StringRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76554 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 08:57:31 +00:00
Daniel Dunbar
a8f0af5e0e
Remove some unused code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76541 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 07:08:59 +00:00
Bruno Cardoso Lopes
68491c1217
Support adding relocations for data sections, handling the cases where
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global declared symbols are initialized with references from other global
symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76540 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 06:51:32 +00:00
Evan Cheng
77159e39a6
Add jumps with 8-bit relocation for assembler / disassembler. Patch by Sean Callanan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76536 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 06:00:18 +00:00
Bill Wendling
7239b51694
Add the following functions:
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- SYSCALL (normal fast system call instruction) [0f 05]
- SYSENTER (system call entry instruction) [0f 34]
- SYSEXIT (system call exit instruction) [0f 35]
- SYSEXIT64 (system call exit instruction to 64-bit user code) [REX.W 0f 35]
- SYSRET (system call return instruction) [0f 07]
Patch by Sean Callanan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76528 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 01:07:24 +00:00
Evan Cheng
af9e7a7c20
Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 00:31:12 +00:00
Dale Johannesen
60b3ba0472
revert 76503 while I figure out what's going on
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76517 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 00:12:29 +00:00
Dale Johannesen
71bbebdac9
Make sure a global matching asm 'i' constraint gets its
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flags set properly. (hasMemory is clearly irrelevant
when matching 'i', I don't understand what this was
supposed to be doing.)
gcc.apple/asm-block-25.c (test passed before by
accident, but generated code was wrong)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76503 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 23:39:13 +00:00
Chris Lattner
b3e7189353
clean up some formatting, indent by 2 instead of 4.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76490 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 22:23:48 +00:00
David Goodwin
c27a4547a3
CMP and TST define CPSR, not use it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76489 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 22:13:31 +00:00
David Greene
76081c4ef7
Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes
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next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76486 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 22:02:59 +00:00
Bill Wendling
ecc2da8efd
Simplify the code in DarwinTargetAsmInfo::emitUsedDirectiveFor so that humans can understand it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76480 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 21:38:26 +00:00
Bill Wendling
4cef584860
Pass in the unfortunately named "LessPrivatePrefix" for the
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"LinkerPrivatePrefix". It seems to have been used in only one place before I
started this "linker_private" business. I'm thinking that a rename is in
order...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76479 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 21:30:28 +00:00
Daniel Dunbar
dbd692a66e
Add MCAsmLexer interface.
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- This provides the AsmLexer interface to the target specific assembly parsers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76460 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 20:01:54 +00:00
Evan Cheng
753480ad20
Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76458 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 19:47:55 +00:00
Bill Wendling
5c0ba804c0
Rename Mangler linkage enums to something less gross.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76456 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 19:41:27 +00:00
Daniel Dunbar
a3af370dc1
Add MCAsmParser interface.
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- This provides the AsmParser interface to the target specific assembly
parsers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76453 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 18:55:04 +00:00
Chris Lattner
1902fd9605
remove TargetAsmInfo::ExpandInlineAsm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76445 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 17:59:32 +00:00
Chris Lattner
b810565152
Copy ExpandInlineAsm to TargetLowering from TargetAsmInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76441 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 17:51:36 +00:00
Chris Lattner
83757c7fb5
rename TargetAsmInfo::getASDirective -> getDataASDirective
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76431 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 17:12:46 +00:00
David Goodwin
31e7eba06f
Use t2LDRri12 for frame index loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76424 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 15:55:39 +00:00
Bruno Cardoso Lopes
0a38dc5fda
For PC relative relocations where symbols are defined in the same section they
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are referenced, ignore the relocation entry and patch the relocatable field with
the computed symbol offset directly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76414 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 08:52:02 +00:00
Evan Cheng
f6fe957950
Fix PR4567. Thumb1 target was using the wrong instruction to handle sp = sub fp, #c.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76401 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 06:59:32 +00:00
Evan Cheng
91449a883d
Model fpscr to prevent fcmped / fcmpezs etc from being deleted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76390 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 02:12:31 +00:00
Bill Wendling
3d10a5a757
Add plumbing for the `linker_private' linkage type. This type is meant for
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"private" symbols which the assember shouldn't strip, but which the linker may
remove after evaluation. This is mostly useful for Objective-C metadata.
This is plumbing, so we don't have a use of it yet. More to come, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76385 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 01:03:30 +00:00
Daniel Dunbar
3f189a3eb4
CMake support for SystemZ.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76384 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 00:24:17 +00:00
Eli Friedman
a786c7b90c
Don't override LowerArguments in the SPARC backend. In addition to
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being more consistent with other backends, this makes the SPARC backend
deal with functions with arguments with illegal types correctly, which
fixes some tests in test/CodeGen/Generic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76375 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 19:53:46 +00:00
Evan Cheng
b46aaa3874
Fix a regression from 76124. Thumb1 instructions default to S bit being true.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76374 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 19:16:46 +00:00
Daniel Dunbar
cfb8a1bea1
Fix some minor MSVC compiler warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76356 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 01:38:38 +00:00
Daniel Dunbar
c6465511d1
Unbreak build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76354 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 01:33:04 +00:00
Eli Friedman
796492dc4b
Switch Alpha over to the new call lowering style. New code mostly
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copied from the SystemZ target. I don't think this causes any
significant changes to the output (I compared the assembly, and the
results appeared to be essentially unchanged), although I don't actually
have an Alpha to test on.
I would appreciate if anyone with the appropriate hardware could test
this. I'm not sure if that includes anyone subscribed to llvm-commits,
though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76353 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 01:11:32 +00:00
Daniel Dunbar
10b547c638
SystemZ *does* have a CodeGen/AsmPrinter split.
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- What it doesn't have is the rest of its cmake files...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76352 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 00:46:44 +00:00
Daniel Dunbar
07598d72f0
Tweak cmake files for the four targets that don't split CodeGen out.
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- We should canonicalize this and get rid of the cmake and llvm-config hacks to
support both variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76350 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 00:26:46 +00:00
Daniel Dunbar
b384c85877
Add dependencies from TargetInfo onto .td generation.
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- Shouldn't really be necessary, but currently .inc files get included into
some main target headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76349 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 00:21:12 +00:00
Bruno Cardoso Lopes
e2b0ecd8be
Use R_X86_64_32S to handle Jump Table Index relocation entries. Hide TAI usage inside getSection* functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76347 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 23:24:01 +00:00
Daniel Dunbar
edcb540496
Add some missing includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76346 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 23:22:46 +00:00
Daniel Dunbar
4cb1e13769
Put Target definitions inside Target specific header, and llvm namespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76344 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 23:03:22 +00:00
Bruno Cardoso Lopes
617dd7baa6
Use a better name for the label relocations while emitting them for Jump Tables
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76334 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 20:52:11 +00:00
Bruno Cardoso Lopes
171375f73a
Add support to properly reference private symbols on relocation entries.
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Use proper relocation type to build relocations for JumpTables (rodata
sections).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 19:30:09 +00:00
Anton Korobeynikov
b1f61e24d1
Add carry producing / using versions of add / sub
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76316 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 14:16:06 +00:00
Anton Korobeynikov
6323a83e2c
Expand frem
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76315 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 13:44:25 +00:00
Anton Korobeynikov
6d94eff354
Turn abort() into unreachable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76314 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 13:34:59 +00:00
Anton Korobeynikov
31e874490a
Turn few asserts into errors / unreachable's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76313 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 13:33:17 +00:00
Anton Korobeynikov
87e412b921
Handle vector returns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76312 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 12:51:06 +00:00
Anton Korobeynikov
0cca06905b
Provide expansion for ct* intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76311 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 12:26:13 +00:00
Anton Korobeynikov
e37a37de77
Expand sext_inreg for i1
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76310 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 12:20:36 +00:00
Evan Cheng
5248468473
Enable cross register class coalescing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76281 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 02:10:10 +00:00
Evan Cheng
3837b64f41
Revert 76177 for now. It's messing up ARM asm printing. Also this significant debate about its efficiency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 01:43:53 +00:00
Evan Cheng
47e9fab158
Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76248 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 22:13:25 +00:00
Chris Lattner
e2cf37b88c
Untangle a snarl that I discovered when updating the mangler,
...
starting in getCurrentFunctionEHName. Among other problems,
we would try to privative a "foo.eh" label, but end up emitting
the label as _Lfoo.eh instead of L_foo.eh on darwin. This is really
bad, and the linker has always tolerated these labels existing.
For now, just emit them as _foo.eh.
This patch also fixes problems with ".eh" labels on unnamed
functions and eliminates two strangely defined TargetAsmInfo
hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76231 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 20:46:40 +00:00
Daniel Dunbar
092a9dda2d
Sketch support for target specific assembly parser.
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- Not fully enabled yet, need a configure regeneration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 20:42:00 +00:00
Daniel Dunbar
4b9e165904
Start generating AsmMatcher.inc for X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76213 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 18:55:26 +00:00
Jeffrey Yasskin
75402822d6
r76102 added the MachineCodeEmitter::processDebugLoc call and called it from
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the X86 Emitter. This patch extends that to the rest of the targets that can
write to a MachineCodeEmitter: ARM, Alpha, and PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 18:49:39 +00:00
Anton Korobeynikov
bb496a358e
Add missed return
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76209 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 18:28:59 +00:00
David Greene
ab9238e876
Add logic to align instruction operands to columns for pretty-printing.
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No target uses this currently. This patch only adds the mechanism so
that local installations can choose to enable this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76177 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 14:24:46 +00:00
Duncan Sands
3e11988c42
Avoid a compiler warning when assertions are turned off.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 12:25:14 +00:00
Eli Friedman
d8f7a36270
Oops, accidentally set a legal operation to expand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76165 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 07:34:23 +00:00
Eli Friedman
e4ce880dfa
Expand misc operations from test/CodeGen/Generic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76163 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 07:28:06 +00:00
Eli Friedman
ed224949ed
Handle void in XCoreTargetLowering::isLegalAddressingMode. Triggers in
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test/CodeGen/Generic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76162 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 07:16:38 +00:00
Eli Friedman
e91bf2c993
Remove some unnecessary expansion markings. Add a few expansion
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markings that show up in test/CodeGen/Generic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76160 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 07:03:00 +00:00
Eli Friedman
5427d71be8
Add operation expansion/promotion for a bunch of operations, many of
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which show up in test/CodeGen/Generic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 06:36:24 +00:00
Evan Cheng
a6e4322ccc
Fix tSUBspi operand definition. It reads and writes sp, which is a high register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76155 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 05:43:12 +00:00
Eli Friedman
18d643abe5
Set an operation expansion, noticed while running
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llc over test/CodeGen/Generic with -march=alpha.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76154 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 05:23:03 +00:00
Eli Friedman
6055a6adb7
One more operation expansion for MIPS, from test/CodeGen/Generic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76149 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 04:07:24 +00:00
Daniel Dunbar
53448652e4
Make sure CWriter's Context get's initialized.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76147 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 03:43:21 +00:00
Eli Friedman
10a3659101
Expand a bunch of illegal operations on MIPS (found by
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inspection and running over CodeGen/Generic).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76146 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 02:28:12 +00:00
Daniel Dunbar
19c29f53f2
Fix 'may be used uninitialized' warning.
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- Anton, please review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 02:19:26 +00:00
Anton Korobeynikov
b8e9ac834a
Emit cross regclass register moves for thumb2.
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Minor code duplication cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 23:26:06 +00:00
Evan Cheng
a82b22c667
GV with ghost linkage (module being lazily streamed in in JIT lazy compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 22:53:10 +00:00
Jakob Stoklund Olesen
93e55deeba
Silence warning in Linux builds:
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X86InstrInfo.cpp:2272: warning: suggest explicit braces to avoid ambiguous 'else'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76105 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 21:24:13 +00:00
Jeffrey Yasskin
32360a7e21
Add line numbers to OProfile. To do this, I added a processDebugLoc()
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call to the MachineCodeEmitter interface and made copying the start
line of a function not conditional on whether we're emitting Dwarf
debug information. I'll propagate the processDebugLoc() calls to the
non-X86 targets in a followup patch.
In the long run, it'll probably be better to gather this information
through the DwarfWriter, but the DwarfWriter currently depends on the
AsmPrinter and TargetAsmInfo, and fixing that would be out of the way
for this patch.
There's a bug in OProfile 0.9.4 that makes it ignore line numbers for
addresses above 4G, and a patch fixing it at
http://thread.gmane.org/gmane.linux.oprofile/7634
Sample output:
$ sudo opcontrol --reset; sudo opcontrol --start-daemon; sudo opcontrol --start; `pwd`/Debug/bin/lli fib.bc; sudo opcontrol --stop
Signalling daemon... done
Profiler running.
fib(40) == 165580141
Stopping profiling.
$ opreport -g -d -l `pwd`/Debug/bin/lli|head -60
Overflow stats not available
CPU: Core 2, speed 1998 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000
vma samples % linenr info image name symbol name
00007f67a30370b0 25489 61.2554 fib.c:24 10946.jo fib_left
00007f67a30370b0 1634 6.4106 fib.c:24
00007f67a30370b1 83 0.3256 fib.c:24
00007f67a30370b9 1997 7.8348 fib.c:24
00007f67a30370c6 2080 8.1604 fib.c:27
00007f67a30370c8 988 3.8762 fib.c:27
00007f67a30370cd 1315 5.1591 fib.c:27
00007f67a30370cf 251 0.9847 fib.c:27
00007f67a30370d3 1191 4.6726 fib.c:27
00007f67a30370d6 975 3.8252 fib.c:27
00007f67a30370db 1010 3.9625 fib.c:27
00007f67a30370dd 242 0.9494 fib.c:27
00007f67a30370e1 2782 10.9145 fib.c:28
00007f67a30370e5 3768 14.7828 fib.c:28
00007f67a30370eb 615 2.4128 (no location information)
00007f67a30370f3 6558 25.7287 (no location information)
00007f67a3037100 15603 37.4973 fib.c:29 10946.jo fib_right
00007f67a3037100 1646 10.5493 fib.c:29
00007f67a3037101 45 0.2884 fib.c:29
00007f67a3037109 2372 15.2022 fib.c:29
00007f67a3037116 2234 14.3178 fib.c:32
00007f67a3037118 612 3.9223 fib.c:32
00007f67a303711d 622 3.9864 fib.c:32
00007f67a303711f 385 2.4675 fib.c:32
00007f67a3037123 404 2.5892 fib.c:32
00007f67a3037126 634 4.0633 fib.c:32
00007f67a303712b 870 5.5759 fib.c:32
00007f67a303712d 62 0.3974 fib.c:32
00007f67a3037131 1848 11.8439 fib.c:33
00007f67a3037135 2840 18.2016 fib.c:33
00007f67a303713a 1 0.0064 fib.c:33
00007f67a303713b 1023 6.5564 (no location information)
00007f67a3037143 5 0.0320 (no location information)
000000000080c1e4 15 0.0360 MachineOperand.h:150 lli llvm::MachineOperand::isReg() const
000000000080c1e4 6 40.0000 MachineOperand.h:150
000000000080c1ec 2 13.3333 MachineOperand.h:150
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76102 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 21:07:26 +00:00
Evan Cheng
2b48ab947c
With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 18:44:05 +00:00
Anton Korobeynikov
7df8462038
Unbreak
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76064 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:36:52 +00:00
Anton Korobeynikov
c975180624
Temporary disable 16 bit bswap
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76063 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:35:57 +00:00
Anton Korobeynikov
6d4b270e38
Add instruction formats and few opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76062 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:35:20 +00:00
Anton Korobeynikov
6ff3f2c710
Add bswap patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:34:52 +00:00
Anton Korobeynikov
21ddf779bf
Provide crazy pseudos for regpairs spills / reloads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76060 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:34:15 +00:00
Anton Korobeynikov
9de2848fac
Handle long-disp stuff more consistently
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:33:52 +00:00
Anton Korobeynikov
74e2dc446c
All FP instructions have 12 bit memory displacement field
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76058 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:33:27 +00:00
Anton Korobeynikov
f1106c4247
Another predicate routine
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:33:01 +00:00
Anton Korobeynikov
27bf677e59
More helpers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:32:41 +00:00
Anton Korobeynikov
ae46db85a9
Add bunch of branch folding stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76055 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:32:19 +00:00
Anton Korobeynikov
27766b548f
Add missed opcodes to short => long displacement conversion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:31:52 +00:00
Anton Korobeynikov
c3e48b06fb
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:31:32 +00:00
Anton Korobeynikov
54681eca69
Fix logic inversion for RI-mode address selection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:31:14 +00:00
Anton Korobeynikov
bb8a04806d
Expand 32-bit bitconverts via memory
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:30:29 +00:00
Anton Korobeynikov
f2fd8ea1c9
Fix incomin arg stack frame offset in case we need to generate stack frame
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:29:57 +00:00
Anton Korobeynikov
8b75813687
Fix instruction mnemonics for some fp_to_sint operations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76048 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:29:26 +00:00
Anton Korobeynikov
c1a1e4adb7
i32 values are passed extended also on stack. Handle this in generic way
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76047 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:29:05 +00:00
Anton Korobeynikov
159ac63ba1
We definitely have 1-0 bools
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76046 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:28:46 +00:00
Anton Korobeynikov
5dd38de2c2
Revert the commit, it just hides the real bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:28:26 +00:00
Anton Korobeynikov
361a78756b
Out GR128 regclass is not a 'real' i128 one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76044 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:27:53 +00:00
Anton Korobeynikov
628d419520
Add missed condbranch opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:27:26 +00:00
Anton Korobeynikov
05a0b8bc66
Handle bitconverts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:27:01 +00:00
Anton Korobeynikov
b6831cb044
Unbreak mvi and friends - emit only 'significant' part of the operand
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76041 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:26:38 +00:00
Anton Korobeynikov
98db78a28b
Expand fp_to_uint too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76040 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:26:06 +00:00
Anton Korobeynikov
20d062fcc1
We don't have FP truncstores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76039 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:25:46 +00:00
Anton Korobeynikov
a89430e468
Expand uint_to_fp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76038 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:25:30 +00:00
Anton Korobeynikov
4971e1ebb7
Emit proper rounding mode for fp_to_sint
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76037 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:25:12 +00:00
Anton Korobeynikov
3a9959fd4e
f32/f64 regs are stored on stack if we're short in FP regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:57 +00:00
Anton Korobeynikov
75eef89ddb
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:41 +00:00
Anton Korobeynikov
1ada84daaf
Make FP zero to be legal FP immediate via LOAD ZERO
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76034 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:16 +00:00
Anton Korobeynikov
5753f47f5b
Loads are not two-address in any way
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76033 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:01 +00:00
Anton Korobeynikov
a61a4f669b
Add LOAD NEGATIVE instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76032 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:23:44 +00:00
Anton Korobeynikov
03f60001df
LOAD COMPLEMENT instruction is not really two-addr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76031 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:23:30 +00:00
Anton Korobeynikov
6495063386
Add multiple add/sub instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76030 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:23:16 +00:00
Anton Korobeynikov
1733124507
Handle FP callee-saved regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76029 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:23:01 +00:00
Anton Korobeynikov
85c5c3f138
Proper FP extloads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76028 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:22:46 +00:00
Anton Korobeynikov
299dc78d67
Add proper PWS impdef's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76027 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:22:30 +00:00
Anton Korobeynikov
da723d7d91
Propagate FP select_cc to dag inserters
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76026 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:22:15 +00:00
Anton Korobeynikov
55e96fb1c6
Implement fp_to_sint
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:21:57 +00:00
Anton Korobeynikov
92ac82abb4
Implement FP regs spills / restores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:21:41 +00:00
Anton Korobeynikov
c79465df08
Add fabs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76023 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:21:27 +00:00
Anton Korobeynikov
f1e82ce480
Add fneg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:21:12 +00:00
Anton Korobeynikov
9b4ae577ce
We don't have native sine / cosine instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76021 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:20:56 +00:00
Anton Korobeynikov
1d0ec0b4fc
More sint_to_fp stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:20:39 +00:00
Anton Korobeynikov
7aa03ac827
Add bunch of FP instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:20:24 +00:00
Anton Korobeynikov
23eff5c75a
We don't have any FP extloads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:20:08 +00:00
Anton Korobeynikov
10c086cd77
Implement all comparisons
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76017 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:19:54 +00:00
Anton Korobeynikov
ae53567de1
Add constpool lowering / printing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76016 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:19:35 +00:00
Anton Korobeynikov
0e31d5cf80
Allow FP arguments pass / return
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76015 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:19:16 +00:00
Anton Korobeynikov
2c97ae8826
Register FP regclasses
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76014 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:19:02 +00:00
Anton Korobeynikov
b13057bafa
Add FP regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76013 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:18:48 +00:00
Anton Korobeynikov
81d533c76a
Fix fallout from prev. patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76012 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:18:31 +00:00
Anton Korobeynikov
8bd0db7615
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:18:17 +00:00
Anton Korobeynikov
09e39001da
Use divide single for 32 bit signed divides
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76010 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:17:52 +00:00
Anton Korobeynikov
cd3dfafef1
Add missed operands types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76009 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:17:07 +00:00
Anton Korobeynikov
e1c9aabd77
Missed part of prev. patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:16:45 +00:00
Anton Korobeynikov
9b812b0131
Another attempt to fix prologue emission
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76007 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:16:26 +00:00
Anton Korobeynikov
6fe326c713
Implement 'large' PIC model
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:16:05 +00:00
Anton Korobeynikov
48e8b3cc58
Implement shifts properly (hopefilly - finally!)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76005 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:15:24 +00:00
Anton Korobeynikov
e3a7f7a2b2
Remove redundand register move
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76004 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:14:54 +00:00
Anton Korobeynikov
0a42d2b437
Properly handle divides. As a bonus - implement memory versions of them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76003 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:14:33 +00:00
Anton Korobeynikov
d20af96f5b
Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76002 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:14:01 +00:00
Anton Korobeynikov
c097d5cc74
32 bit rotate is not twoaddr instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76001 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:13:43 +00:00
Anton Korobeynikov
014d4639d8
32 bit shifts have only 12 bit displacements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76000 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:13:24 +00:00
Anton Korobeynikov
54cea741ca
Add proper register aliases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75999 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:12:54 +00:00
Anton Korobeynikov
c3a5196133
Properly generate stack frame
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75998 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:12:36 +00:00
Anton Korobeynikov
0ba60d9658
Unbreak indirect branches
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75997 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:12:18 +00:00
Anton Korobeynikov
78085ee80c
Unbreak
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:12:00 +00:00
Anton Korobeynikov
66f1b378bc
Do not forget to save R15 when we allocate stack frame
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75995 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:11:40 +00:00
Anton Korobeynikov
c94fdf76dd
All calls clobbers R14
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75994 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:11:22 +00:00
Anton Korobeynikov
6f66f0556c
Unbreak calls to vararg functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75993 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:11:03 +00:00
Anton Korobeynikov
2bbbd5bc59
Stupid typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:10:49 +00:00
Anton Korobeynikov
4656760d9c
Typos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:10:35 +00:00
Anton Korobeynikov
1ed1e3ecd4
Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75990 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:10:17 +00:00
Anton Korobeynikov
5a11e02fbd
Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75989 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:09:56 +00:00
Anton Korobeynikov
720e3b00b8
Add support for 12 bit displacements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:09:35 +00:00
Anton Korobeynikov
078e007c07
We already have reserved call frame regardless whether variable sized frame objects were present or not
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75987 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:09:04 +00:00
Anton Korobeynikov
980d5503c3
Emit proper lowering of load from arg stack slot
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:08:42 +00:00
Anton Korobeynikov
c772c4408e
Implement dynamic allocas
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75985 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:08:15 +00:00
Anton Korobeynikov
c16cdc5de7
Add jump tables
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:07:50 +00:00
Anton Korobeynikov
983d3a1ee5
Exapnd br_jt into indirect branch. Provide pattern for indirect branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75983 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:07:24 +00:00
Anton Korobeynikov
57b04e6fa7
Implement 64 bit immediates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75982 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:07:06 +00:00
Anton Korobeynikov
759205d1ac
Add rotates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75981 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:49 +00:00
Anton Korobeynikov
cfca8b1f62
Add patterns for integer negate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:27 +00:00
Anton Korobeynikov
8c993e1632
Provide proper patterns for and with imm instructions. Tune the tests accordingly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:00 +00:00
Anton Korobeynikov
25af73303f
Add 32 bit and reg-imm and disable invalid patterns for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:05:32 +00:00
Anton Korobeynikov
747052c1a5
Add z9 and z10 target processors. Mark z10-only instructions as such.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75977 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:05:00 +00:00
Anton Korobeynikov
71fd2600f4
Fix MUL64rm instruction asmprinting
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:04:38 +00:00
Anton Korobeynikov
70f717f0b7
Preliminary asmprinting of globals
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75975 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:04:22 +00:00
Anton Korobeynikov
ed00212f43
Implement asmprinting for odd-even regpairs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75974 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:04:01 +00:00
Anton Korobeynikov
3166a9ac5c
32-bit ri addressing mode has only 12-bit displacement
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:03:41 +00:00
Anton Korobeynikov
501f55d841
Forgot to add
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:03:24 +00:00
Anton Korobeynikov
f366beca48
Do not put bunch of target-specific stuff into common namespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75971 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:03:08 +00:00
Anton Korobeynikov
d3ba2f286d
Print signed imms properly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75970 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:02:45 +00:00
Anton Korobeynikov
4b730160bb
Provide hooks for spilling / restoring stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75969 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:01:27 +00:00
Anton Korobeynikov
4cc7ce0c01
Revert thinko
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:01:10 +00:00
Anton Korobeynikov
319f381bbc
Temporary workaround problem with signed 32-bit imm's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:00:42 +00:00
Anton Korobeynikov
64d52d4a5d
Implement InsertBranch() hook
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75966 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:00:10 +00:00
Anton Korobeynikov
c9d4a887f6
Pipehole pattern for i32 imm's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:59:49 +00:00
Anton Korobeynikov
ac16b181f1
Bunch of sext_inreg patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:59:18 +00:00
Anton Korobeynikov
e00f1a722f
Provide normal 32 bit load and store
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75963 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:58:43 +00:00
Anton Korobeynikov
22836d1b31
Proper lower 'small' results
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:58:24 +00:00
Anton Korobeynikov
eb68f1c661
Completel forgot about unconditional branches
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75961 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:57:52 +00:00
Anton Korobeynikov
bad769f11a
Lower addresses of globals
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75960 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:57:27 +00:00
Anton Korobeynikov
8d1837d9be
Provide "wide" muls and divs/rems
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75958 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:56:42 +00:00
Anton Korobeynikov
11275eba17
Fix thinko
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75957 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:56:11 +00:00
Anton Korobeynikov
338cf05f16
Fix epic bug with invalid regclass for R0D
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75956 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:55:51 +00:00
Anton Korobeynikov
3e980b4f11
More register pairs (now 32 bit ones)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75954 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:55:04 +00:00
Anton Korobeynikov
05a54ff12a
Add even-odd register pairs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75953 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:54:45 +00:00
Anton Korobeynikov
2fdecaf1d5
Unbreak due to mainline api change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:54:20 +00:00
Anton Korobeynikov
dd0239b42c
Preliminary mul lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75951 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:53:55 +00:00
Anton Korobeynikov
bf0221771f
More extloads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75950 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:53:35 +00:00
Anton Korobeynikov
7d1e39b7c6
SELECT_CC lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75948 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:52:51 +00:00
Anton Korobeynikov
4ec3e5ffd1
Conditional branches and comparisons
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75947 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:52:31 +00:00
Anton Korobeynikov
c7b71bede4
Emit correct offset for PseudoSourceValue
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:52:10 +00:00
Anton Korobeynikov
656ac6f0f6
Provide proper stack offsets for outgoing arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75945 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:51:53 +00:00
Anton Korobeynikov
4f9017f214
Change register allocation order to reduce amount of callee-saved regs to be spilled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75944 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:51:34 +00:00
Anton Korobeynikov
ef5decab53
Emit callee-saved regs spills / restores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75943 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:51:12 +00:00
Anton Korobeynikov
ba249e41f3
Some preliminary call lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75941 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:50:21 +00:00
Anton Korobeynikov
3c98c616c5
Prologue / epilogue emission
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:49:49 +00:00
Anton Korobeynikov
51f613fb2b
Add simple frame index elimination
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75939 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:49:25 +00:00
Anton Korobeynikov
c4368a1507
Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75937 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:48:42 +00:00
Anton Korobeynikov
3240740ef4
Do not truncate sign bits for negative imms
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75936 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:48:23 +00:00
Anton Korobeynikov
711d5b68e0
Add address computation stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75935 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:47:59 +00:00
Anton Korobeynikov
dfd0dffa36
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75934 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:47:36 +00:00
Anton Korobeynikov
c8301d17a8
Add mem-imm stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75933 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:47:14 +00:00
Anton Korobeynikov
30da5380e0
[PATCH 023/155] Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75932 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:45:22 +00:00
Anton Korobeynikov
961bb6f430
Add stores and truncstores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75931 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:45:00 +00:00
Anton Korobeynikov
dc28955b3f
Add patterns for various extloads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75930 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:44:30 +00:00
Anton Korobeynikov
3360da9772
Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75929 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:44:00 +00:00
Anton Korobeynikov
4cad7d29fc
Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75928 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:43:40 +00:00
Anton Korobeynikov
9e4816e09f
Add shifts and reg-imm address matching
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75927 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:43:18 +00:00
Anton Korobeynikov
a51752cbea
Add bunch of 32-bit patterns... Uffff :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75926 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:42:31 +00:00
Anton Korobeynikov
e0167c1d5a
Add 32 bit subregs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75923 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:35:30 +00:00
Anton Korobeynikov
9342d3180a
Add another bunch of reg-imm patterns for add/or/and/xor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75922 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:35:08 +00:00
Anton Korobeynikov
da308c9a67
Add bunch of reg-imm movs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75921 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:34:50 +00:00
Anton Korobeynikov
fc9ceeaad8
Proper match halfword-imm operands for mov and add
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75920 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:34:24 +00:00
Anton Korobeynikov
89edcd0927
Provide masked reg-imm 'or' and 'and'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:33:57 +00:00
Anton Korobeynikov
e6220fb230
Add reg-reg and pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:32:49 +00:00
Anton Korobeynikov
bdc9081693
Add sub reg-reg pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75916 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:32:16 +00:00
Anton Korobeynikov
b573f99ab7
Add xor reg-reg pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75915 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:31:28 +00:00
Anton Korobeynikov
26ba0b1ec5
Add or reg-reg pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75914 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:30:53 +00:00
Anton Korobeynikov
0676d2887a
Add add reg-reg and reg-imm patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75913 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:30:15 +00:00
Anton Korobeynikov
1cc9dc7267
Add simple reg-reg and reg-imm moves
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75912 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:29:38 +00:00
Anton Korobeynikov
87a24e3ee4
Minimal lowering for formal_arguments / ret
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75911 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:28:59 +00:00
Anton Korobeynikov
4403b930f8
Let's start another backend :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75909 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:27:25 +00:00
Richard Osborne
db9e697725
Combine an unaligned store of unaligned load into a memmove.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75908 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 12:50:48 +00:00
Richard Osborne
787e90f862
Lower the threshold at which memcpy / memmove / memset stop being expanded
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inline in the XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75906 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 12:41:34 +00:00
Richard Osborne
ff4149b903
Fix typo in last commit on expansion of unaligned loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75903 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 10:48:47 +00:00
Richard Osborne
ccb7e96ef0
Expand unaligned 32 bit loads from an address which is a constant
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offset from a 32 bit aligned base as follows:
ldw low, base[offset >> 2]
ldw high, base[(offset >> 2) + 1]
shr low_shifted, low, (offset & 0x3) * 8
shl high_shifted, high, 32 - (offset & 0x3) * 8
or result, low_shifted, high_shifted
Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75902 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 10:42:35 +00:00
Richard Osborne
7f47ce9662
Custom lower unaligned 32 bit stores and loads into libcalls. This is
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a big code size win since before they were expanding to upto 16
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75901 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 10:21:18 +00:00
Evan Cheng
378445303b
Let callers decide the sub-register index on the def operand of rematerialized instructions.
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Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 09:20:10 +00:00
Chris Lattner
6ef40b11f8
use SUBREG_TO_REG instead of INSERT_SUBREG, this way the code
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generator can know the top bits are zero, not undefined.
Thanks to Dan for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75899 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 06:31:37 +00:00
Chris Lattner
c2b443a698
fix some casts that I improperly refactored, patch by Artur Pietrek!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 04:34:33 +00:00
Daniel Dunbar
64cc972123
Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink
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variables.
- Module initialization functions supplanted the need for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 01:55:13 +00:00
Chris Lattner
fe2fe7094e
fix section switching to ensure that stubs are emitted to the right
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section on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75881 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 01:23:26 +00:00
Daniel Dunbar
5d77cad60b
Lift addAssemblyEmitter into LLVMTargetMachine.
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- No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75859 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 23:34:19 +00:00
Daniel Dunbar
1e1f8ba28c
Register AsmPrinter for XCore, MSP430, and PIC16 targets.
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- Switch to standard addAssemblyEmitter logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75854 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 23:17:20 +00:00
Daniel Dunbar
cfe9a605ee
Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
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- No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 22:33:19 +00:00
Daniel Dunbar
f05522974b
Remove old style hacks to register AsmPrinter into TargetMachine.
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- No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75843 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 22:01:32 +00:00
Owen Anderson
a90b3dc2f1
Move a few more convenience factory functions from Constant to LLVMContext.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75840 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 21:51:10 +00:00
Chris Lattner
7add5ff1d1
move createAlphaLLRPPass out of addAssemblyEmitter to make Alpha
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more like other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75839 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 21:40:24 +00:00
Ted Kremenek
1935629829
Lexically order files in CMakeLists.txt files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75831 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 21:08:16 +00:00
Daniel Dunbar
f1459cf1f2
Remove unused function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75829 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 20:59:20 +00:00
Bruno Cardoso Lopes
4b70fab658
use std::vector instead of std::list for both Section and Symbol lists because
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we care more about random access than insertion/deletion of elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75828 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 20:49:10 +00:00
Daniel Dunbar
f0a5ec0934
Update CMakeLists for reapplication.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75825 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 20:34:36 +00:00
Daniel Dunbar
51b198af83
Reapply TargetRegistry refactoring commits.
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--- Reverse-merging r75799 into '.':
U test/Analysis/PointerTracking
U include/llvm/Target/TargetMachineRegistry.h
U include/llvm/Target/TargetMachine.h
U include/llvm/Target/TargetRegistry.h
U include/llvm/Target/TargetSelect.h
U tools/lto/LTOCodeGenerator.cpp
U tools/lto/LTOModule.cpp
U tools/llc/llc.cpp
U lib/Target/PowerPC/PPCTargetMachine.h
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U lib/Target/PowerPC/PPCTargetMachine.cpp
U lib/Target/PowerPC/PPC.h
U lib/Target/ARM/ARMTargetMachine.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/ARM/ARMTargetMachine.h
U lib/Target/ARM/ARM.h
U lib/Target/XCore/XCoreTargetMachine.cpp
U lib/Target/XCore/XCoreTargetMachine.h
U lib/Target/PIC16/PIC16TargetMachine.cpp
U lib/Target/PIC16/PIC16TargetMachine.h
U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U lib/Target/Alpha/AlphaTargetMachine.cpp
U lib/Target/Alpha/AlphaTargetMachine.h
U lib/Target/X86/X86TargetMachine.h
U lib/Target/X86/X86.h
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.h
U lib/Target/CppBackend/CPPTargetMachine.h
U lib/Target/CppBackend/CPPBackend.cpp
U lib/Target/CBackend/CTargetMachine.h
U lib/Target/CBackend/CBackend.cpp
U lib/Target/TargetMachine.cpp
U lib/Target/IA64/IA64TargetMachine.cpp
U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U lib/Target/IA64/IA64TargetMachine.h
U lib/Target/IA64/IA64.h
U lib/Target/MSIL/MSILWriter.cpp
U lib/Target/CellSPU/SPUTargetMachine.h
U lib/Target/CellSPU/SPU.h
U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U lib/Target/CellSPU/SPUTargetMachine.cpp
U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U lib/Target/Mips/MipsTargetMachine.cpp
U lib/Target/Mips/MipsTargetMachine.h
U lib/Target/Mips/Mips.h
U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U lib/Target/Sparc/SparcTargetMachine.cpp
U lib/Target/Sparc/SparcTargetMachine.h
U lib/ExecutionEngine/JIT/TargetSelect.cpp
U lib/Support/TargetRegistry.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75820 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 20:24:03 +00:00
Xerxes Ranby
908e058b85
Fix cmake build, add TargetMachineRegistry.cpp that got restored in r75807
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 19:58:35 +00:00
Stuart Hastings
823d9914a1
Restore file lost during reversion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75807 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 18:30:44 +00:00
Stuart Hastings
2286f8dc4c
Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
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Will revert 75770 in the llvm-gcc trunk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75799 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 17:27:11 +00:00
Richard Osborne
1d05b237a5
Fix pattern for LD16S_3r, add basic tests to check load / store instructions
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are being properly selected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75797 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 17:06:59 +00:00
David Goodwin
7ecc850cf1
Thumb-2 only support [base_reg + offset_reg] addressing, not [base_reg - offset_reg].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75789 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 15:50:19 +00:00
Richard Osborne
3af282f16a
Fix XCoreTargetLowering::isLegalAddressingMode to handle non simple VTs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75788 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 15:46:56 +00:00
Richard Osborne
f301c2299c
Remove the xcore-file-directive option now that LLVM has proper support for
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emitting file directives with one parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 15:36:37 +00:00
Daniel Dunbar
f3f4715ac1
Replace large swaths of copy-n-paste code with obvious helper function...
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- Which was already present in the module!
- I skipped this xform for Alpha, since it runs an extra pass during assembly
emission, but not when emitting assembly via the DumpAsm flag.
- No functionality change.
--
ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
18 - PM.add(AsmPrinterCtor(ferrs(), *this, true));
18 - assert(AsmPrinterCtor && "AsmPrinter was not linked in");
18 - if (AsmPrinterCtor)
18 - if (DumpAsm) {
18 - }
ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
18 + addAssemblyEmitter(PM, OptLevel, true, ferrs());
18 + if (DumpAsm)
--
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75782 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 12:49:15 +00:00
Duncan Sands
8cb6626df1
Remove StringConstantPrefix now that the only user
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(llvm-gcc) has gone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 12:39:48 +00:00
Daniel Dunbar
6c05796294
Kill off old (TargetMachine level, not Target level) match quality functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75780 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 12:26:05 +00:00
Xerxes Ranby
baaf1178e9
Fix cmake build lib/Target/TargetMachineRegistry.cpp removed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75779 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 12:19:36 +00:00
Daniel Dunbar
03f4bc5d6c
Provide TargetMachine implementations with reference to Target they were created
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from.
- This commit is almost entirely propogating the reference through the
TargetMachine subclasses' constructor calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 12:11:05 +00:00
Daniel Dunbar
6501145ec6
Kill off unused TargetMachineRegistry methods and ivars.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75774 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 11:48:36 +00:00
Daniel Dunbar
4d1be777f8
Include the Target& in the TargetMachineRegisterEntry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75772 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 11:23:49 +00:00