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6674 Commits

Author SHA1 Message Date
Chris Lattner
cbce2f6c1b add a nate note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30399 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-15 20:31:36 +00:00
Evan Cheng
c45a2c72cc Remove a unnecessary check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30382 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 23:55:02 +00:00
Chris Lattner
f0613e1e7c add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30377 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 20:56:30 +00:00
Anton Korobeynikov
b74ed07bfd Adding dllimport, dllexport and external weak linkage types. 
DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30374 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 18:23:27 +00:00
Chris Lattner
08c33011d1 add note about switch lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 23:37:16 +00:00
Evan Cheng
80543c8305 Skip over first operand when determining REX prefix for two-address code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30300 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 19:07:28 +00:00
Chris Lattner
bfd68a7858 Turn X < 0 -> TEST X,X js 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30294 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 17:04:54 +00:00
Chris Lattner
7a6366de86 The sense of this branch was inverted :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30293 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 16:56:12 +00:00
Rafael Espindola
3ad5e5cf99 add shifts to addressing mode 1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30291 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 12:09:43 +00:00
Chris Lattner
0f27fc34f7 Fix a regression in the 32-bit port from the 64-bit port landing. 
We now compile CodeGen/X86/lea-2.ll into:

_test:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        leal -5(%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl 4(%esp), %eax
        leal (,%eax,4), %eax
        addl 8(%esp), %eax
        addl $4294967291, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30288 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 04:45:25 +00:00
Chris Lattner
d1468d3332 new note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30286 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 04:19:50 +00:00
Chris Lattner
95af34e33f new note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30285 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:54:54 +00:00
Chris Lattner
f95705163f Compile X > -1 -> text X,X; js dest 
This implements CodeGen/X86/jump_sign.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30283 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:22:10 +00:00
Evan Cheng
c356a572e3 Reflects MachineConstantPoolEntry changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 21:04:05 +00:00
Chris Lattner
adaa38f13d add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30271 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 06:36:01 +00:00
Chris Lattner
0bfd7fde43 Testcase noticed from PR906 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30269 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 23:00:56 +00:00
Chris Lattner
2a33a3f08d add compilable testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30268 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 22:57:51 +00:00
Rafael Espindola
817e7fdb8b implement SRL and MUL 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30262 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 19:24:19 +00:00
Rafael Espindola
1b3956b516 add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30261 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 19:23:32 +00:00
Rafael Espindola
7cca7c5317 partial implementation of the ARM Addressing Mode 1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30252 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 17:25:40 +00:00
Rafael Espindola
ff59d22232 call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30246 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 12:49:38 +00:00
Evan Cheng
f47d167c3b Updates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30245 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 05:35:17 +00:00
Evan Cheng
0f4aa6ee20 Update README file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 05:25:15 +00:00
Evan Cheng
734503be59 X86ISD::CMP now produces a chain as well as a flag. Make that the chain 
operand of a conditional branch to allow load folding into CMP / TEST
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 02:19:56 +00:00
Nate Begeman
019f851ab2 Behold, more work on relocations. Things are looking pretty good now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30240 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 23:03:44 +00:00
Anton Korobeynikov
f369dd26fb Removed unnecessary Mangler creation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30239 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 21:17:03 +00:00
Chris Lattner
1e14289ef9 Add cbe support for powi 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30226 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 06:17:12 +00:00
Nate Begeman
94be248dbb First pass at supporting relocations. Relocations are written correctly to 
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30207 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 22:42:09 +00:00
Evan Cheng
6f34b43292 Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex 
in addition to immediate operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30205 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 21:08:13 +00:00
Rafael Espindola
0a200600e7 implement shl and sra 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30191 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 17:36:23 +00:00
Chris Lattner
40f4ba5e71 Use __USER_LABEL_PREFIX__ to get the prefix added by the current host. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30190 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 17:03:56 +00:00
Rafael Espindola
4e30764d55 add the eor (xor) instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30189 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 16:59:47 +00:00
Jim Laskey
f45c25f720 Missing tab 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30188 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 13:06:56 +00:00
Rafael Espindola
5c2aa0a4d8 implement unconditional branches 
fix select.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30186 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 12:47:03 +00:00
Evan Cheng
36978b9c61 Remove TEST64mr. It's same as TEST64rm since and is commutative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30178 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:56:55 +00:00
Evan Cheng
25ab690a43 Committing X86-64 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:48:29 +00:00
Nate Begeman
6fe6084ebf We actually do support object file writing, so don't return true (error) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30173 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 03:42:15 +00:00
Evan Cheng
8cf723d8eb - Identify a vector_shuffle that can be turned into an undef, e.g. 
shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
  optimal code by failing to identify MOVL (move to lowest element of a
  vector).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 01:50:06 +00:00
Jim Laskey
fde1b3bb2f 1. Remove condition on delete. 
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30169 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 23:39:26 +00:00
Chris Lattner
2dd538c2d2 add a new value for the command line optn 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30165 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:32:28 +00:00
Chris Lattner
cdb341dcfa Fix a cross-build issue. The asmsyntax shouldn't be affected by the build 
host, it should be affected by the target.  Allow the command line option to
override in either case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30164 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:29:41 +00:00
Jim Laskey
a0f3d17daa Make target asm info a property of the target machine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30162 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:06:40 +00:00
Jim Laskey
8e8de8f776 Break out target asm info into separate files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30161 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:05:02 +00:00
Chris Lattner
ffc0b2663e Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns 
using test, which provides nice simplifications like:

-       movl %edi, %ecx
-       andl $2, %ecx
-       cmpl $0, %ecx
+       testl $2, %edi
        je LBB1_11      #cond_next90

There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 20:33:45 +00:00
Chris Lattner
b14ca605d7 Some notes on better load folding we could do 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30155 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 20:32:01 +00:00
Evan Cheng
ec3bc39413 Consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30152 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 19:03:48 +00:00
Jim Laskey
05a059d5d8 Make the x86 asm flavor part of the subtarget info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30146 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 12:23:47 +00:00
Evan Cheng
95971c51b0 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30140 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 01:17:57 +00:00
Evan Cheng
48ff2fb129 Watch out for variable_ops instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30135 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 20:32:45 +00:00
Evan Cheng
3530bafe00 Variable ops instructions may ignore the last few operands for code emission. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30134 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 20:24:14 +00:00
Jim Laskey
7c95ad4fb0 Oops - forgot to update banner. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30131 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 19:21:41 +00:00
Jim Laskey
ec0d9fe2b2 Separate target specifc asm properties from asm printers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30127 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 18:35:33 +00:00
Jim Laskey
563321a258 Separate target specific asm properties from the asm printers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30126 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 18:34:40 +00:00
Rafael Espindola
b52b54d4af add the orr instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30125 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 18:03:12 +00:00
Chris Lattner
6cdb1ea610 Bugfix to work with the two-addr changes that have been made in the tree recently 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30121 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 20:27:32 +00:00
Evan Cheng
2f5993bcf1 Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30113 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 08:32:49 +00:00
Evan Cheng
23b3122c44 JIT encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30112 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 05:59:25 +00:00
Chris Lattner
0e42d81a83 Update the X86 JIT to make it work with the new two-addr changes. This also 
adds assertions that check to make sure every operand gets emitted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30110 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:52:35 +00:00
Chris Lattner
09e460662a Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:31:13 +00:00
Chris Lattner
2926869b4a Fix a long-standing wart in the code generator: two-address instruction lowering 
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:12:02 +00:00
Andrew Lenharth
89c0b4a90e jmp_bufs are this big on alpha. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30107 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 00:22:25 +00:00
Rafael Espindola
3a02f020eb add support for returning 64bit values 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30103 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 19:05:01 +00:00
Chris Lattner
2130b99eb2 Fix some X86 JIT failures. This should really come from TargetJITInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30102 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 18:48:41 +00:00
Duraid Madina
2a0013f59f add setJumpBufSize() and setJumpBufAlignment() to target-lowering. 
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30095 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 06:21:35 +00:00
Chris Lattner
1911fd4f85 Completely rearchitect the interface between targets and the pass manager. 
This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 04:14:57 +00:00
Chris Lattner
dd842e12e1 Add accessor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30080 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 04:08:58 +00:00
Chris Lattner
3199af2874 remove #include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30078 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 04:06:01 +00:00
Chris Lattner
c4fa386471 Simplify target construction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30070 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 18:44:02 +00:00
Rafael Espindola
bc4cec9a62 add the SETULT condition code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30067 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 13:19:16 +00:00
Rafael Espindola
5f450d2948 add more condition codes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30056 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-02 20:24:25 +00:00
Evan Cheng
1453de5aa9 Oops. Bad typo. Without the check of N1.hasOneUse() bad things can happen. 
Suppose the TokenFactor can reach the Op:

       [Load chain]
           ^
           |
         [Load]
         ^    ^
         |    |
        /      \-
       /         |
      /          [Op]
     /          ^ ^
     |        ..  |
     |       /    |
   [TokenFactor]  |
       ^          |
       |          |
        \        /
         \      /
         [Store]

If we move the Load below the TokenFactor, we would have created a cycle in
the DAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30040 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 22:52:28 +00:00
Chris Lattner
aca36b9329 Use a couple of multiclass patterns to factor some integer ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30039 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 22:28:02 +00:00
Chris Lattner
1662239a5e remove a bunch of comments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30038 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 22:16:22 +00:00
Evan Cheng
c9676deb23 Minor asm fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29965 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 22:14:48 +00:00
Evan Cheng
4a888584ea Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29962 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 21:42:58 +00:00
Evan Cheng
780413d462 Don't performance load/op/store transformation if op produces a floating point 
or vector result. X86 does not have load/mod/store variants of those
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29957 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 18:37:37 +00:00
Evan Cheng
e50794adda - Enable x86 isel preprocessing by default unless -fast is specified. 
- Also disable isel load folding if -fast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29956 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 18:28:33 +00:00
Jim Laskey
ce50a165c7 Handle callee saved registers in dwarf frame info (lead up to exception 
handling.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29954 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 16:24:26 +00:00
Jim Laskey
85aaf9088e Tidy up options. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29953 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 15:13:10 +00:00
Evan Cheng
82a35b34fb Avoid making unneeded load/mod/store transformation which can hurt performance. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29952 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 06:44:17 +00:00
Nate Begeman
06abd22b1a Make ppc64 jit kinda work right. About 2/3 of Olden passes with this, 
there are clearly some encoding bugs lurking in there somewhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29949 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 02:30:59 +00:00
Evan Cheng
67afeceaf0 On Mac, print jump table entries after the function to work around a linker issue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29946 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-28 22:14:16 +00:00
Evan Cheng
70e674e95e Add an optional pass to preprocess the DAG before x86 isel to allow selecting more load/mod/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29943 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-28 20:10:17 +00:00
Reid Spencer
3a9ec2463d For PR387: 
Close out this long standing bug by removing the remaining overloaded
virtual functions in LLVM. The -Woverloaded-virtual option is now turned on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29934 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-28 01:02:49 +00:00
Chris Lattner
a4f0b3a084 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 12:54:02 +00:00
Evan Cheng
0b828e08f9 Do not use getTargetNode() and SelectNodeTo() which takes more than 3 
SDOperand arguments. Use the variants which take an array and number instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29907 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 08:14:06 +00:00
Chris Lattner
16c7fe5ca3 Fix target matching weights, so that ppc-darwin modules are codegen with the 
ppc target, not the itanium target, when run on an itanium machine.
This should fix the CodeGen/PowerPC regtest failures on itanium.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29903 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 21:33:05 +00:00
Evan Cheng
95514bae73 SelectNodeTo now returns a SDNode*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29901 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 08:00:10 +00:00
Evan Cheng
9ade218533 Select() no longer require Result operand by reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29898 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 05:34:46 +00:00
Evan Cheng
6da2f3268d Match tblgen changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29895 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 01:07:58 +00:00
Evan Cheng
0469990e79 Match tblgen changes; clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29894 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 01:05:16 +00:00
Chris Lattner
8d3e1d6613 Give a good error message when we try to jit inline asm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29891 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 00:47:03 +00:00
Evan Cheng
1822ffbab7 Add a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 23:29:06 +00:00
Evan Cheng
b9ca92661c Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The 
asm printer will print it as offset*4. e.g. bne cr0, $+8.

The PPC code emitter was expecting the offset to be number of instructions, not
number of bytes. This fixes a whole bunch of JIT failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29885 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 21:54:44 +00:00
Jim Laskey
4c2c9031ac Fix some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29880 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 19:40:59 +00:00
Rafael Espindola
755be9b3de use @ for comments 
store LR in an arbitrary stack slot
add support for writing varargs functions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29876 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 17:55:16 +00:00
Chris Lattner
bf16982e86 We compile this into: 
_swap_16:
        slwi r2, r3, 24
        rlwimi r2, r3, 8, 8, 15
        srwi r3, r2, 16
        blr

now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29864 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 23:06:02 +00:00
Chris Lattner
ad69970c4a Owen implemented this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29863 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 23:03:33 +00:00
Rafael Espindola
cdda88cd12 add the "eq" condition code 
implement a movcond instruction


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29857 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 17:19:08 +00:00
Rafael Espindola
6f602de3b6 create a generic bcond instruction that has a conditional code argument 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29856 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 16:13:15 +00:00
Rafael Espindola
687bc49d1a initial support for branches 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29854 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 13:45:55 +00:00
Nate Begeman
eb883af390 Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it 
does emit linkable .o files in very simple cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29850 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-23 21:08:52 +00:00
Rafael Espindola
f4d40050f1 add a README.txt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29814 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-22 12:22:46 +00:00
Rafael Espindola
3c000bf817 initial support for select 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29802 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-21 22:00:32 +00:00
Rafael Espindola
a5dfc835d4 add the and instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29793 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-21 13:58:59 +00:00
Rafael Espindola
3717ca965b call computeRegisterProperties 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29780 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-20 01:49:49 +00:00
Chris Lattner
5ea64fd9eb Constify some methods. Patch provided by Anton Vayvod, thanks! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29756 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 22:00:08 +00:00
Chris Lattner
5ea7a68e15 Revert this patch, the front-end has been fixed to make it unneccesary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29752 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 18:43:24 +00:00
Chris Lattner
b5bc04d38a 'g' is handled by the front-end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29751 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 18:12:28 +00:00
Andrew Lenharth
ad1ed016ce Fix handling of 'g'. Closes 883 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29750 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 17:50:12 +00:00
Rafael Espindola
f3a335cedf add a "load effective address" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29748 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 17:09:40 +00:00
Andrew Lenharth
d337295fb0 Add the 'c' constraint as needed by the linux kernel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29747 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 16:07:50 +00:00
Andrew Lenharth
c63e56ee5f Add support for S and D constraints, as needed to compile the linux kernel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29746 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 15:35:43 +00:00
Evan Cheng
eb8730d131 Doh. Incorrectly inverted condition. Also add a isOnlyUse check to match tablegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29741 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 23:59:00 +00:00
Rafael Espindola
ec46ea34dc Declare the callee saved regs 
Remove the hard coded store and load of the link register
Implement ARMFrameInfo


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29727 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 14:43:33 +00:00
Evan Cheng
23329f5e03 SelectNodeTo() may return a SDOperand that is different from the input. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29726 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 07:30:09 +00:00
Evan Cheng
4b790573f7 RET_FLAG has an optional input flag, but it does not produce a flag result. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29725 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 07:28:58 +00:00
Chris Lattner
5c36d78462 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29722 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 02:47:44 +00:00
Chris Lattner
ccbe2ec890 Fix PowerPC/2006-08-15-SelectionCrash.ll and simplify selection code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29715 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-15 23:48:22 +00:00
Rafael Espindola
61369da0e5 select code like 
ldr rx, [ry, #offset]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29664 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-14 19:01:24 +00:00
Nate Begeman
52a51e38dc Emit .set directives for jump table entries when possible, which reduces 
the number of relocations in object files, shrinkifying them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29650 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-12 21:29:52 +00:00
Chris Lattner
f6e190fae0 Fix a bug in a recent refactoring that broke a bunch of stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29649 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-12 07:20:05 +00:00
Chris Lattner
2b5a82fe1d eliminate extraneous blank line 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29627 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 21:08:16 +00:00
Chris Lattner
e219945348 Eliminate use of getNode that takes a vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29614 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 17:38:39 +00:00
Chris Lattner
8742867f95 elimiante use of getNode that takes vector of operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29612 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 17:22:35 +00:00
Chris Lattner
e0e42d457e eliminate use of getNode that takes vector of operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29611 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 17:21:12 +00:00
Chris Lattner
e21492bc4e eliminate use of getNode that takes vector<SDOperand>. Wrap a really long line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29610 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 17:19:54 +00:00
Chris Lattner
79e490aa23 Convert vectors to fixed sized arrays and smallvectors. Eliminate use of getNode that takes a vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29609 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 17:18:05 +00:00
Chris Lattner
325f0a129e Fix miscompilation of float vector returns. Compile code to this: 
_func:
        vsldoi v2, v3, v2, 12
        vsldoi v2, v2, v2, 4
        blr

instead of:

_func:
        vsldoi v2, v3, v2, 12
        vsldoi v2, v2, v2, 4
***     vor f1, v2, v2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29607 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 16:47:32 +00:00
Evan Cheng
64a752f7c7 Match tablegen changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29604 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 09:08:15 +00:00
Evan Cheng
bb7b844bec CALLSEQ_* produces chain even if that's not needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29603 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 09:03:33 +00:00
Evan Cheng
311ace0391 Convert more calls of getNode() that takes a vector to pass in the start of an array. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29601 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 07:35:45 +00:00
Rafael Espindola
a1ab92d8b7 correctly set LocalAreaOffset of TargetFrameInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29589 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-09 17:37:45 +00:00
Rafael Espindola
7a53bd0890 fix the spill code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29583 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-09 16:41:12 +00:00
Rafael Espindola
2c8cdc6c1a fix the loading of the link register in emitepilogue 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29580 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-09 13:15:47 +00:00
Rafael Espindola
46adf8119d change the addressing mode of the str instruction to reg+imm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29571 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-08 20:35:03 +00:00
Rafael Espindola
1a00946817 initial support for variable number of arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29567 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-08 13:02:29 +00:00
Chris Lattner
bd564bfc63 Start eliminating temporary vectors used to create DAG nodes. Instead, pass 
in the start of an array and a count of operands where applicable.  In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap.  In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.

I updated a lot of code calling getNode that takes a vector, but ran out of
time.  The rest of the code should be updated, and these methods should be
removed.

We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.

It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-08 02:23:42 +00:00
Evan Cheng
f4b4c416d3 Eliminate reachability matrix. It has to be calculated before any instruction 
selection is done. That's rather expensive especially in situations where it
isn't really needed.
Move back to a searching the predecessors, but make use of topological order
to trim the search space.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29559 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-08 00:31:00 +00:00
Evan Cheng
2ef88a09b7 Match tablegen isel changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29549 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-07 22:28:20 +00:00
Evan Cheng
e46e1a5da7 Make XMM, FP register dwarf register numbers consistent with gcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29543 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-07 21:02:39 +00:00
Rafael Espindola
341b864c8d use a 'register pressure reducing' scheduler 
make sure only one move is used in a hello world


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29520 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-04 12:48:42 +00:00
Rafael Espindola
6312da0fc7 Bug fix: always generate a RET_FLAG in LowerRET 
fixes ret_null.ll and call.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29519 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-03 22:50:11 +00:00
Chris Lattner
fb1fcf08c9 remove some more dead sparcv9 support stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29506 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-03 18:55:44 +00:00
Chris Lattner
7a2144b060 remove a dead proto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29505 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-03 18:51:04 +00:00
Jim Laskey
6b59a36564 Get darwin intel debugging up and running. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29504 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-03 17:27:09 +00:00
Rafael Espindola
f4fda80403 add and use ARMISD::RET_FLAG 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29499 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-03 17:02:20 +00:00
Evan Cheng
4876dc5b13 Reflect change to AssignTopologicalOrder(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29480 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-02 22:01:32 +00:00
Evan Cheng
686c4a18f1 Use of vector<bool> causes some horrendous compile time regression (2x)! 
Looks like libstdc++ implementation does not scale very well. Switch back
to using directly managed arrays.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29469 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-02 09:18:33 +00:00
Nate Begeman
83a6d49102 Update the readme to remove duplicate information and clarify the loop 
problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29468 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-02 05:31:20 +00:00
Nate Begeman
8f74680c78 Disable LSR at -fast 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29467 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-02 05:29:40 +00:00
Rafael Espindola
1ed3af11b5 start comments with # 
move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29451 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 18:53:10 +00:00
Rafael Espindola
06c1e7eacb implement LowerConstantPool and LowerGlobalAddress 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29433 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 12:58:43 +00:00
Evan Cheng
db3cc3d7d6 Factor topological order code to SelectionDAG. Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29430 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 08:17:22 +00:00
Chris Lattner
f76d180c95 Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll. 
The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29420 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-31 23:26:50 +00:00
Rafael Espindola
6d581e8d15 handle GlobalValue::InternalLinkage in doFinalization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29417 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-31 20:38:13 +00:00
Evan Cheng
ca3202893c Remove a duplicate pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29414 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-31 18:43:10 +00:00
Evan Cheng
043eb829cc Remove a duplicate pattern/ 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29413 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-31 18:42:49 +00:00
Chris Lattner
dacbe7b171 Make functions with an "asm" name propagate that asm name into the cbe.c file. 
This fixes link errors on programs with these on targets with prefixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29390 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 20:58:47 +00:00
Chris Lattner
0d72a20630 Fix some ppc64 issues with vector code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29384 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 16:45:47 +00:00
Evan Cheng
37e1803a66 Can't spell. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29383 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 06:33:41 +00:00
Evan Cheng
ba27731f35 Some clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29382 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 06:05:06 +00:00
Evan Cheng
f2dfafcbc1 Rename IsFoldableBy to CanBeFoldedleBy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29376 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 01:03:48 +00:00
Evan Cheng
2584d93acf Node selected into address mode cannot be folded. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29374 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 00:49:31 +00:00
Evan Cheng
2641cad180 Remove InFlightSet hack. No longer needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 00:47:19 +00:00
Evan Cheng
63ce5682e2 Another duh. Determine topological order before any target node is added. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29371 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 00:10:59 +00:00
Evan Cheng
0e2c36fcc2 Brain cramp.. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29370 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 23:35:40 +00:00
Evan Cheng
b3c334674d Allocating too large an array for ReachibilityMatrix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29367 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 22:35:40 +00:00
Evan Cheng
5fa5de80e2 Calculate the portion of reachbility matrix on demand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29366 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 22:10:00 +00:00
Evan Cheng
8cbc93aadb isNonImmUse is replaced by IsFoldableBy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29365 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 21:19:10 +00:00
Evan Cheng
f141cc46fa Resolve BB references with relocation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29351 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 18:21:10 +00:00
Evan Cheng
7e6e441394 synchronizeICache removeed from TargetJITInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29348 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 17:33:48 +00:00
Evan Cheng
a8df1b4296 Use reachbility information to determine whether a node can be folded into another during isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29346 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 16:44:36 +00:00
Rafael Espindola
b01c4bbb45 emit global constants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29344 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 11:38:51 +00:00
Evan Cheng
33e9ad96c8 Remove NodeDepth 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29338 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 06:40:15 +00:00
Jim Laskey
ea348585c8 Use the predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29322 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 02:05:13 +00:00
Nate Begeman
2f1ae88445 Support jump tables when in PIC relocation model 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 01:13:04 +00:00
Jim Laskey
30ffe1b776 Prevent creation of MachineDebugInfo for intel unless it is darwin. RC842. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29317 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 01:12:23 +00:00
Evan Cheng
ae1d33f82d New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29310 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-26 21:49:52 +00:00
Chris Lattner
35d86fef1f Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29307 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-26 21:12:04 +00:00
Evan Cheng
55fc28076f - Refactor the code that resolve basic block references to a TargetJITInfo 
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
  of code is emitted to flush the icache. This ensures correct execution
  on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29276 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-25 20:40:54 +00:00
Evan Cheng
55371739de Can't commute shufps. The high / low parts elements come from different vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29275 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-25 20:25:40 +00:00
Rafael Espindola
fac00a93a9 implement function calling of functions with up to 4 arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29274 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-25 20:17:20 +00:00
Evan Cheng
46cd65dfa6 Done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29262 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 23:07:23 +00:00
Rafael Espindola
44819cb20a implemented sub 
correctly update the stack pointer in the prologue and epilogue


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 12:26:16 +00:00
Evan Cheng
625518002d This opt is now handled in DAG combine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29243 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 08:26:46 +00:00
Evan Cheng
1e1a88e8cc A splat of a vector constant of all zero or all one is the vector constant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29234 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 23:09:47 +00:00
Evan Cheng
3c62934268 Missing a space. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29233 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 22:52:28 +00:00
Evan Cheng
cbac2fa23a Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29228 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 21:37:39 +00:00
Evan Cheng
abb4d7829f New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29215 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 21:29:30 +00:00
Jim Laskey
c06fe8a5ac Do once flag never set to true. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29214 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 19:33:08 +00:00
Jim Laskey
613f1f83fd Tidy up a few things. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29213 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 19:32:06 +00:00
Jim Laskey
f19807cecb Reduce size of routine. Shrinks .o by 37%. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29210 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 17:53:32 +00:00
Chris Lattner
2a785500e0 bswapped load/store instructions are only availble in indexed addressing form. 
As such, use xoaddr (indexed only), not xaddr for address selection.

This fixes CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll, a crash compiling lencod.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29208 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 17:15:36 +00:00
Jim Laskey
e29c2f5ca0 Bug#834 ICE (crash in code generator?) when building PCH . 
Missing Darwin check in Intel ATT ASM printer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29204 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 11:54:50 +00:00
Evan Cheng
1c96953d2d Misc. new entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29202 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 06:06:24 +00:00
Evan Cheng
1693e489e6 INC / DEC instructions have shorter code size than ADD32ri8, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29194 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 00:27:29 +00:00
Evan Cheng
e6f32034db Add code size to target instruction use it as the 3rd isel sorting tie-breaker. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29193 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 00:24:41 +00:00
Rafael Espindola
355746359e initial prologue and epilogue implementation. Need to define add and sub before finishing it :-) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29175 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-18 17:00:30 +00:00
Chris Lattner
303c695529 Make the implicit def instructions look like other instrs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29174 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-18 16:33:26 +00:00
Rafael Espindola
84b19be6ab skeleton of a lowerCall implementation for ARM 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29159 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-16 01:02:57 +00:00
Chris Lattner
ba4733d901 Remove what little AIX support we have. It has never been tested and isn't 
complete.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-15 01:24:23 +00:00
Chris Lattner
a3b5939caa Add an out-of-line virtual method for X86DwarfWriter to give it a home. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29153 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-14 23:05:05 +00:00
Chris Lattner
518f9c7ad0 Add missing PPC64 extload/truncstores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29140 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-14 04:42:02 +00:00
Chris Lattner
1eeedaea59 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29139 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-14 04:07:29 +00:00
Chris Lattner
a606b70cf5 Another fix in the rotate encodings, needed when the first two operands are not 
the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29136 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-13 21:52:41 +00:00
Chris Lattner
45c04fc676 Print negative immediates as negative values instead of large constants 
when using the immshifted addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29130 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 23:24:02 +00:00
Chris Lattner
b2c0650ad3 Fix encoding of rotates, such as rldicl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29128 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 22:08:13 +00:00
Chris Lattner
3bc8a765a9 Implement PPC64 relocations types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29125 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 21:23:20 +00:00
Chris Lattner
3d6721a4a1 An overaggressive #ifdef allows a function to fall off the bottom of the 
function instead of returning a value.  This sometimes allowed the ppc32 jit
to be used in 64-bit mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29123 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 20:42:10 +00:00
Chris Lattner
6d3465793f Add information preventing several register class constraints from working. 
This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29118 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 16:59:49 +00:00
Chris Lattner
be6a039ad4 The PPC64 JIT needs register numbers to encode instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29114 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 20:53:55 +00:00
Evan Cheng
f7eb5d0b02 Emit inc / dec of registers as one byte instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29110 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 19:49:49 +00:00
Jim Laskey
16d42c6ac6 It was pointed out that DEBUG() is only available with -debug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29106 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 18:25:13 +00:00
Jim Laskey
e37fe9b3a1 Ensure that dump calls that are associated with asserts are removed from 
non-debug build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 17:58:07 +00:00
Rafael Espindola
a4e64359aa add the memri memory operand 
this makes it possible for ldr instructions with non-zero immediate


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29103 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 11:36:48 +00:00
Chris Lattner
f4dff84c86 Implement the inline asm 'A' constraint. This implements PR825 and 
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29101 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 02:54:03 +00:00
Chris Lattner
804e067042 In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29096 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 00:48:23 +00:00
Evan Cheng
20adf47dbc New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29091 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 21:42:16 +00:00
Evan Cheng
1e60c098cc Fixed stack objects do not specify alignments, but their offsets are known. 
Use that information when doing the transformation to merge multiple loads
into a 128-bit load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29090 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 21:37:44 +00:00
Chris Lattner
d998938459 Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps 
into i16/i32 load/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29089 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 20:56:58 +00:00
Chris Lattner
5c5f4ca6f1 Mark internal function static 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29085 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 19:53:12 +00:00
Rafael Espindola
aefe14299a create the raddr addressing mode that matches any register and the frame index 
use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 01:41:35 +00:00
Evan Cheng
206ee9d86c X86 target specific DAG combine: turn build_vector (load x), (load x+4), 
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).

e.g.

__m128 test(float a, float b, float c, float d) {
  return _mm_set_ps(d, c, b, a);
}

_test:
        movups 4(%esp), %xmm0
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-07 08:33:52 +00:00
Chris Lattner
90ac1c0775 Undisable ppc64 jit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29011 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-06 17:10:42 +00:00
Evan Cheng
152ed05353 Added option -code-model to set code model (only used in 64-bit) mode. Valid 
values include small, kernel, medium, large, and default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29009 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-06 01:53:36 +00:00
Evan Cheng
60c07e1aea Reorg. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28999 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-05 22:17:51 +00:00
Evan Cheng
507b0aa062 Fix JIT on non MacOS X i386 systems. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28992 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-05 07:09:13 +00:00
Andrew Lenharth
441a57041d These are already implemented 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28990 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-03 18:00:29 +00:00
Andrew Lenharth
78c252c93d 0 offsets for memory operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28989 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-03 17:57:34 +00:00
Evan Cheng
775ff18257 Should just use xorps to clear XMM registers for all data types. pxor is also one byte longer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28984 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 18:04:54 +00:00
Evan Cheng
be33dd95d8 Let X86CompilationCallback pass previous frame and return address to X86CompilationCallback2. Remove alloca hack. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28982 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 01:48:36 +00:00
Evan Cheng
09c545790d Add shift and rotate by 1 instructions / patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28980 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 00:36:51 +00:00
Evan Cheng
a8e83ec8c3 Always use xorps to clear XMM registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28979 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 00:34:23 +00:00
Evan Cheng
d3f6981174 Move .literal4 and .literal8 support into AsmPrinter.cpp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28978 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 00:33:06 +00:00
Chris Lattner
2c79de8018 Hide x86 symbols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28976 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 23:27:49 +00:00
Chris Lattner
9525528a7d Use hidden visibility to make symbols in an anonymous namespace get 
dropped.  This shrinks libllvmgcc.dylib another 67K


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28975 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 23:17:24 +00:00
Chris Lattner
2a41a98fb7 shrink libllvmgcc.dylib another 25K 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28971 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 22:00:36 +00:00
Evan Cheng
33c36f306a Doh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28963 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 17:56:43 +00:00
Evan Cheng
ee12e8f28d Oops. Need to keep CP index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28958 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 07:55:24 +00:00
Evan Cheng
07103d312a Darwin puts float and double literal constants into literal4 and literal8 sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28957 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 07:35:41 +00:00
Andrew Lenharth
7794bd3f94 this case isn't handled 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28948 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 23:19:14 +00:00
Rafael Espindola
49e4415587 handle the "mov reg1, reg2" case in isMoveInstr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 21:52:45 +00:00
Chris Lattner
cccef1c6ff Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28944 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 21:08:52 +00:00
Chris Lattner
6b76b96c69 Fix ppc64 jump tables 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28941 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 20:46:17 +00:00
Evan Cheng
4df24f2caf Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28938 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 20:34:14 +00:00
Chris Lattner
9f029a61e9 Print stubs for external globals right. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28936 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 20:20:53 +00:00
Chris Lattner
f89437d049 Implement 64-bit select, bswap, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28935 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 20:14:52 +00:00
Chris Lattner
e4172be920 Add a pattern for i64 sra. Print 8-byte units with a space between the .quad 
and the data


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28934 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 20:07:26 +00:00
Chris Lattner
7ffa9abdad Fix rewriting frame offsets with ixaddr instructions, which implicitly shift 
the offset two bits to the left.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28933 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 18:55:49 +00:00
Chris Lattner
5f9faeaa78 PPC doesn't have bit converts to/from i64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28932 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 18:40:08 +00:00
Chris Lattner
2e6b77d803 Add 64-bit MTCTR so that indirect calls work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28931 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 18:36:44 +00:00
Chris Lattner
1fd81107f3 Fix an incorrect store pattern. This fixes em3d. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28930 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 18:22:50 +00:00
Chris Lattner
563ecfbf82 Implement 64-bit undef, sub, shl/shr, srem/urem 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28929 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 18:18:41 +00:00
Chris Lattner
7b0c58cd25 Use i32 for shift amounts instead of i64. This gets bisort working. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28927 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 17:34:57 +00:00
Chris Lattner
00659b1781 Add zextload from i32 -> i64, with this, perimeter works. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28926 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 17:30:08 +00:00
Chris Lattner
7e097e4633 Print darwin stub stuff correctly in 64-bit mode. With this, treeadd works in 
ppc64 mode!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28923 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 01:02:25 +00:00
Chris Lattner
529c233498 Fix variable shadowing issue 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28922 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 00:10:13 +00:00
Chris Lattner
c08f902bb7 Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but 
doesn't work right).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28921 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 00:04:13 +00:00
Chris Lattner
041e9d345f Rearrange compares, add ADDI8, add sext from 32-to-64 bit register 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28920 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-26 23:53:10 +00:00
Chris Lattner
c91a4757b6 Improve PPC64 calling convention support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28919 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-26 22:48:35 +00:00
Chris Lattner
924c576e9f Remove two more definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28918 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-26 22:47:37 +00:00
Chris Lattner
7b4e478768 remove two unused instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28917 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-26 22:44:13 +00:00
Evan Cheng
da08d2c39a Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28910 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-24 08:36:10 +00:00
Jim Laskey
89d67faf30 Add and sort "sections" in debug lines. This always stepping through 
code in sections other than ".text", including weak sections like ctors and
dtors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28909 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-23 12:51:53 +00:00
Evan Cheng
74cb064a35 Eliminate unneeded parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28907 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-22 00:02:55 +00:00
Evan Cheng
22f71315df variable_ops instructions such as call can have any number of operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28906 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 23:37:07 +00:00
Andrew Lenharth
df97cc67a6 Add memory operand and int regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28896 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 15:42:36 +00:00
Andrew Lenharth
1725599574 inline asm, at least for floats 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28895 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 13:37:27 +00:00
Andrew Lenharth
d1aab35d1a fix argument problem 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28893 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 01:00:43 +00:00
Chris Lattner
ef95710583 Correct returns of 64-bit values, though they seemed to work before... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28892 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 00:34:03 +00:00
Chris Lattner
7f7b346e3d Make these predicates correct in 64-bit mode too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28890 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:21:20 +00:00
Chris Lattner
b410dc9977 Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:18:58 +00:00
Chris Lattner
96dc5e5f6d remove unused flag 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28888 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:15:07 +00:00
Chris Lattner
f2c5bca165 add some logical ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28887 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:11:59 +00:00
Chris Lattner
4b25b40486 remove some unused patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28886 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:11:36 +00:00
Chris Lattner
3ae5eef027 Add some more immediate patterns. This allows us to compile: 
void test6() {
  Y = 0xABCD0123BCDE4567;
}

into:

_test6:
        lis r2, -21555
        lis r3, ha16(_Y)
        ori r2, r2, 291
        rldicr r2, r2, 32, 31
        oris r2, r2, 48350
        ori r2, r2, 17767
        std r2, lo16(_Y)(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28885 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:03:01 +00:00
Chris Lattner
eded521a17 Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is 
set, so disable the pattern in that case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28884 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 22:38:59 +00:00
Chris Lattner
0ea70b219a Add some 64-bit logical ops. 
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation.  For example, we now compile this:

static unsigned long long Y;
void test3() {
  Y = 0xF0F00F00;
}

into:

_test3:
        li r2, 3840
        lis r3, ha16(_Y)
        xoris r2, r2, 61680
        std r2, lo16(_Y)(r3)
        blr

GCC produces:

_test3:
        li r0,0
        lis r2,ha16(_Y)
        ori r0,r0,61680
        sldi r0,r0,16
        ori r0,r0,3840
        std r0,lo16(_Y)(r2)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28883 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 22:34:10 +00:00
Evan Cheng
e3db4daa16 __i386__, __i386, etc. are not defined for x86-64. Use __x86_64__. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28881 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 22:11:12 +00:00
Chris Lattner
dd58343857 64-bit bugfix: 0xFFFF0000 cannot be formed with a single lis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28880 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 21:39:30 +00:00
Chris Lattner
f27bb6de10 Add some patterns for globals, so we can now compile this: 
static unsigned long long X, Y;
void test1() {
  X = Y;
}

into:

_test1:
        lis r2, ha16(_Y)
        lis r3, ha16(_X)
        ld r2, lo16(_Y)(r2)
        std r2, lo16(_X)(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28879 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 21:23:06 +00:00
Chris Lattner
4e85e64007 Remove some now-unneeded casts from instruction patterns. With the casts 
removed, tblgen produces identical output to with them in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28867 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:39:56 +00:00
Chris Lattner
047854f2b7 Add some patterns for ppc64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28866 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:38:36 +00:00
Chris Lattner
30da68acce Remove some ugly now-redundant casts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28864 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:25:29 +00:00
Chris Lattner
a973993c0c Fix some mismatched type constraints 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28862 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:12:37 +00:00
Evan Cheng
b21495043e Minor clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28860 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-19 19:25:30 +00:00
Rafael Espindola
58421d7d08 initial implementation of ARMRegisterInfo::eliminateFrameIndex 
fixes test/Regression/CodeGen/ARM/ret_arg5.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-18 00:08:07 +00:00
Evan Cheng
357edf8a4f A new entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28848 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-17 00:45:49 +00:00
Chris Lattner
b1d26f6665 Implement the getPointerRegClass method, which is required for the ptr_rc 
magic to work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28847 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-17 00:01:04 +00:00
Evan Cheng
54edc84000 Later models likely to have Yonah like attributes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28843 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:58:49 +00:00
Chris Lattner
a24b7618f8 Upgrade some load/store instructions to use the proper addressing mode stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28841 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:29:41 +00:00
Chris Lattner
66d7ebb777 In 64-bit mode, addr mode operands use G8RC instead of GPRC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28840 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:29:03 +00:00
Chris Lattner
059ca0f5b7 fix some assumptions that pointers can only be 32-bits. With this, we can 
now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28839 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:01:35 +00:00
Chris Lattner
956f43c310 Split 64-bit instructions out into a separate .td file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28838 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 20:22:01 +00:00
Chris Lattner
8fa05dac39 Force 64-bit register availability in 64-bit mode. For real. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 20:05:06 +00:00
Chris Lattner
af89fa609b Remove the -darwin and -aix llc options, inferring darwinism and aixism from 
the target triple & subtarget info.  woo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:50:48 +00:00
Chris Lattner
1790d44d0d Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:22:52 +00:00
Chris Lattner
acbc07aa22 Remove ctor with each piece specifyable (which causes overload ambiguities), 
add a new init method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28828 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:11:26 +00:00
Chris Lattner
7c1fb5f08c Document the subtarget features better, make sure that 64-bit mode, 64-bit 
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 17:50:12 +00:00