Commit Graph

4741 Commits

Author SHA1 Message Date
Chris Lattner
f55366e3c2 set PrivateGlobalPrefix on darwin, use it when printing out CP references
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24441 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:47:58 +00:00
Chris Lattner
c41cc83117 Naturally align doubles in the constant pool, set PrivateGlobalPrefix on
darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24440 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:46:22 +00:00
Chris Lattner
81f803df80 Lower READCYCLECOUNTER correctly, preserving the chain result
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24438 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:57:19 +00:00
Chris Lattner
441b223c9b encode rdtsc correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24435 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:13:18 +00:00
Chris Lattner
81363c3871 use chain operands to ensure the copies don't wander from the rdtsc instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24434 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:01:40 +00:00
Andrew Lenharth
b873ff322c The second patch of X86 support for read cycle counter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24430 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 21:41:10 +00:00
Chris Lattner
6adaf79ad7 Teach the x86 backend about the register constraints of its addressing mode.
Patch by Evan Cheng


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24423 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 07:01:30 +00:00
Chris Lattner
be7a2ff2dd Capture more operand info, patch by Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24422 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 07:00:10 +00:00
Chris Lattner
f9ce9fb49b Add load and other support to the dag-dag isel. Patch contributed by Evan
Cheng!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24419 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 02:11:08 +00:00
Andrew Lenharth
f27b6145af prevent latent switch creation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24413 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-18 13:57:03 +00:00
Chris Lattner
f124d5e500 add more patterns, patch by Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24406 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-18 01:04:42 +00:00
Nate Begeman
69a2cf421b Also add the new vector value type here, for completeness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24405 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-18 00:53:32 +00:00
Chris Lattner
9542f9714e only use dyld stubs if not in ppc-static mode. This completes support for
non-static codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24403 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 19:40:30 +00:00
Chris Lattner
9ba13e4aef refactor call operand handling to eliminate special cases from printOp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24401 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 19:25:59 +00:00
Chris Lattner
3e7f86a037 disentangle call operands from branch operands a bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24400 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 19:16:08 +00:00
Chris Lattner
1d05cb47a9 add an option to generate completely non-pic code, corresponding to what
gcc -static produces on PPC.  This is used for building kexts and other things.

With this, materializing the address of a global looks like:

        lis r2, ha16(L_H$non_lazy_ptr)
        la r3, lo16(L_H$non_lazy_ptr)(r2)

we're still emitting stubs for functions, which is wrong.  That is next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24399 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:55:48 +00:00
Chris Lattner
1df747867c Fix a bug that resistor on IRC hit where we tried to create token factor
nodes of load results, not of their chain results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24398 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:30:17 +00:00
Chris Lattner
3eef4e377c Enable global address legalization, fixing a todo and allowing the removal
of some code.  This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner.  It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24397 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:26:56 +00:00
Chris Lattner
4f0f86de5f Teach the selector to fold lo(g) into load instruction immediate fields
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24396 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:02:16 +00:00
Chris Lattner
490ad08097 Generate LA and ADDIS when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24395 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 17:52:01 +00:00
Chris Lattner
1566613ca4 Use the right accessor to create this node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24394 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 17:51:38 +00:00
Chris Lattner
860e8862c1 Add an initial hack at legalizing GlobalAddress into the appropriate nodes
on Darwin to remove smarts from the isel.  This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file.  However, we can currently emit stuff like
this:  :)

        li r2, lo16(L_x$non_lazy_ptr)
        lis r3, ha16(L_x$non_lazy_ptr)
        lwzx r2, r3, r2

The obvious improvements will follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24390 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 07:30:41 +00:00
Chris Lattner
db40dc2d63 Add globaladdress and targetglobaladdress nodes for dag patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24389 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 07:20:15 +00:00
Chris Lattner
bae5b3c1c6 LI could theoretically be used for the lo-part of a global address, just like
lis can be used for the high part.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24388 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 07:04:43 +00:00
Chris Lattner
2823b3e70e When lowering direct calls, lower them to use a targetglobaladress directly
instead of a globaladdress.  This has no effect on the generated code at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24386 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 05:56:14 +00:00
Chris Lattner
78432feff8 Add patterns for some 16-bit immediate instructions, patch contributed by
Evan Cheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24384 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 02:01:55 +00:00
Chris Lattner
7a12537843 Add patterns for several simple instructions that take i32 immediates.
Patch contributed by Evan Cheng!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24382 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 22:59:19 +00:00
Andrew Lenharth
81b5a3c387 who would have thought you would want to write into globals too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24381 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 21:15:53 +00:00
Chris Lattner
c961eea6cb initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
by Evan Cheng!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24371 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 01:54:32 +00:00
Nate Begeman
422b0cee7a Patch to clean up function call pseudos and support the BLA instruction,
which branches to an absolute address.  This is required to support objc
direct dispatch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24370 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 00:48:01 +00:00
Chris Lattner
2c3d3d2a59 Make sure to use SwitchSection to switch sections so that we don't accidentally emit
functions into the .const section.  Whoops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24363 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-15 01:45:01 +00:00
Chris Lattner
dbdbf0ce2e Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
contributed by Evan Cheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24358 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-15 00:40:23 +00:00
Chris Lattner
ced704ba60 Handle globals with explicit alignment requests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24355 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-14 19:00:30 +00:00
Chris Lattner
ac7fd7fcc6 Teach the PPC asmwriter to honor globals with explicit section requests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24353 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-14 18:52:46 +00:00
Duraid Madina
889649e78e add FP select. next up - divide!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24346 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-14 01:17:30 +00:00
Chris Lattner
773a959523 unbreak the build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24339 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-13 01:45:23 +00:00
Andrew Lenharth
ea2fdf9380 enable LSR by default on alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24337 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-12 19:21:08 +00:00
Andrew Lenharth
6467dfa40d fix more regressions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24335 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-12 19:06:28 +00:00
Andrew Lenharth
82a698ce6a fix READCYCLECOUNTER
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24334 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-12 19:04:09 +00:00
Andrew Lenharth
b921f1b731 fix yet more regressions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24308 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-11 23:08:46 +00:00
Andrew Lenharth
2729e614fa generate chain result
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24307 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-11 23:02:55 +00:00
Andrew Lenharth
c2c64fd3c6 Fix a bunch more alpha regressions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24304 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-11 19:52:25 +00:00
Andrew Lenharth
51b8d54922 continued readcyclecounter support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24300 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-11 16:47:30 +00:00
Chris Lattner
5684598f3f Make BB and CPI labels use the function number, not the function name as a
uniquing id.  This makes things happy when the function name is quoted,
preventing labels like LBB"foo"_2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24295 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 21:59:25 +00:00
Chris Lattner
ba9c6434b9 do not allow '.' in symbol names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24292 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 21:39:29 +00:00
Chris Lattner
85eac0d941 Darwin supports quoted labels. This implements:
test/Regression/CodeGen/PowerPC/darwin-labels.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24287 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 19:33:43 +00:00
Chris Lattner
36c975c023 Call this method with the object we have
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24279 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 18:53:25 +00:00
Chris Lattner
3459bfbc39 Make the aix asm printer interface properly with the parent class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24274 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 18:20:29 +00:00
Andrew Lenharth
7b441dc966 fix a bunch of regressions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24269 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 16:59:55 +00:00
Andrew Lenharth
5cefc5e64d whatever. Intermediate patch to see what breaks. Seems ok.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24260 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-09 19:17:08 +00:00
Chris Lattner
df2e425f2a Add a new option to indicate we want the code generator to emit code quickly,
not spending tons of time microoptimizing it.  This is useful for an -O0
style of build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24235 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08 02:12:47 +00:00
Chris Lattner
ce8eb0c16b Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24233 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08 02:11:51 +00:00
Duraid Madina
d525df3c27 add support for storing and returning bools
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24228 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-07 03:11:02 +00:00
Duraid Madina
00873ebc1f just some random hacking - calls (particularly indirect) need a lot of
love (especially with -sched=simple)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24225 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 13:43:30 +00:00
Nate Begeman
ae232e7a10 Add the necessary support to the ISel to allow targets to codegen the new
alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 09:00:38 +00:00
Duraid Madina
21687e8f63 ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and
a bunch of other things) but is currently ignored by the code
generator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24206 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 04:29:30 +00:00
Chris Lattner
ae4664a9f2 add a case Nate sent me
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24195 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 08:57:56 +00:00
Duraid Madina
764fe71e12 oops, forgot to load GP for indirect calls, though the old code now commented
out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)

would fix this but it's 3am! :O


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24186 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 17:55:53 +00:00
Duraid Madina
b97cc99058 kill redundant SP/GP/RP save/restores across calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24183 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 10:01:10 +00:00
Duraid Madina
9f7290633a add support for loading bools
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24182 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 09:59:06 +00:00
Duraid Madina
49fcc4006c fun with predicates! (add TRUNC i64->i1, AND i1 i1, fix XOR i1 i1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24175 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 00:57:56 +00:00
Duraid Madina
0e5e0d14a8 add pattern to load constant 0 into a predicate reg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24164 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-03 10:09:32 +00:00
Chris Lattner
61bc60fc4f Fix a bug that prevented this pattern from matching
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24161 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-03 05:45:34 +00:00
Chris Lattner
bad13eb189 Fix a QOI issue noticed by Markus F.X.J. Oberhumer.
This fixes PR641


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24154 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 17:42:58 +00:00
Duraid Madina
056728f192 "fix" support for FP constants (this code asserts in the scheduler,
though)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24152 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 07:32:59 +00:00
Duraid Madina
a2df2aee81 add F0 and F1 to the FP register class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24151 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 07:30:39 +00:00
Chris Lattner
cb2583e17d This works now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24150 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 06:49:37 +00:00
Duraid Madina
5966955445 add support for SELECT to TargetSelectionDAG.td, add support for
selecting ints to IA64, and a few other ia64 bits and pieces


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24147 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 02:37:18 +00:00
Duraid Madina
93856802ae add support for loading FP constants +0.0 and +1.0 to the dag isel,
stop pretending -0.0 and -1.0 are machine constants


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24146 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 02:35:04 +00:00
Jim Laskey
6cee630070 Allow itineraries to be passed through the Target Machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24139 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 20:06:59 +00:00
Duraid Madina
7a8ef3a0d4 heh, scheduling was easy?
need to send chris, jim and sampo a box of fish each


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24135 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 05:49:08 +00:00
Duraid Madina
dc9549b52c FORTRAN!!! :( and other similarly unfortunate things mean that on ia64
one sometimes needs to pass FP args in both FP *and* integer registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24134 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 05:46:16 +00:00
Duraid Madina
aba8457125 so tablegen was thinking I might want to convert FPs to predicates.
clever little tablegen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24133 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 03:32:15 +00:00
Duraid Madina
e2fd9e2d9d add support for int->FP and FP->int ops, and add ia64 patterns for these
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24132 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 03:07:25 +00:00
Duraid Madina
d1eda6d155 add zeroextend predicate->integer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24131 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 01:29:55 +00:00
Chris Lattner
5b0ac99c96 Add a flag to enable a darwin linker optimization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24130 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 00:12:36 +00:00
Chris Lattner
bb69e39b5b Make constant pool entries use private labels. This is important when you're
not compiling a whole program at a time :)


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2005-10-31 22:12:06 +00:00
Duraid Madina
363aff2f3c add FP compares and implicit register defs to the dag isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24118 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-31 01:42:11 +00:00
Chris Lattner
c1d6f67e8e If the module has no t-t and the host is an alpha, default to using the Alpha BE
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2005-10-30 16:44:01 +00:00
Duraid Madina
5c2c64e567 fix some broken comparisons, this affected the Pattern isel too.
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2005-10-30 10:14:19 +00:00
Chris Lattner
b685af3e60 This is implemented
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2005-10-30 06:42:12 +00:00
Chris Lattner
f519fe07e0 Make -time-passes output prettier
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2005-10-29 16:45:02 +00:00
Duraid Madina
25d0a88eb8 add some FP stuff, some mix.* stuff, and constant pool support to the
DAG instruction selector, which should be destroyed one day (in the pattern
isel also) since ia64 can pack any constant in the instruction stream


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2005-10-29 16:08:30 +00:00
Chris Lattner
72fe0af68f remove reference to this pass
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2005-10-29 05:28:34 +00:00
Duraid Madina
274ecfb782 add shladd
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2005-10-29 04:13:40 +00:00
Nate Begeman
167f1e2651 New case to handle someday
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2005-10-28 23:26:57 +00:00
Chris Lattner
7d7b96746c Don't emit "32" for unordered comparison
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2005-10-28 22:58:07 +00:00
Chris Lattner
ed048c067d add a hack to get code with ordered comparisons working. This hack is
tracked as PR642


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2005-10-28 20:49:47 +00:00
Chris Lattner
6df2507121 add support for branch on ordered/unordered.
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2005-10-28 20:32:44 +00:00
Chris Lattner
f02a916d82 Do not globalize internal symbols
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2005-10-28 18:44:07 +00:00
Chris Lattner
aee436bcc0 These are autogenerated
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2005-10-28 18:26:52 +00:00
Duraid Madina
f2db9b88da DAG->DAG instruction selection for ia64! "hello world" works, not much else.
use -enable-ia64-dag-isel to turn this on

TODO: delete lowering stuff from the pattern isel
    : get operations on predicate bits working
    : get other bits of pseudocode going
    : use sampo's mulh/mull-using divide-by-constant magic
    : *so* many patterns ("extr", "tbit" and "dep" will be fun :)
    : add FP
    : add a JIT!
    : get it working 100%

in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.

OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.


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2005-10-28 17:46:35 +00:00
Chris Lattner
4bd4a54d57 remove dead stuff
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2005-10-28 04:58:24 +00:00
Chris Lattner
a411bef105 Eliminate getClass, it is not needed
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2005-10-28 04:57:11 +00:00
Chris Lattner
0195910558 a bad case for bitfield insert
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2005-10-28 00:20:45 +00:00
Andrew Lenharth
2012cc013c int comparison patterns
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2005-10-26 18:44:45 +00:00
Jim Laskey
2cbc207c76 Typo made worse x 2 - take 2.
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2005-10-26 18:07:50 +00:00
Chris Lattner
85fd97dc88 Fix an assert compiling MallocBench/gs
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2005-10-26 18:01:11 +00:00
Jim Laskey
ff2fcee846 Typo x 2
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2005-10-26 17:50:22 +00:00
Andrew Lenharth
641b64aa4b Simplify instinfo, set random bits on more fp insts, and fix 1 opcode
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2005-10-26 17:41:46 +00:00
Jim Laskey
581a8f79bc Give full control of subtarget features over to table generated code.
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2005-10-26 17:30:34 +00:00
Jim Laskey
f0c2be4d2b Add attribute name and type to SubtargetFeatures.
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2005-10-26 17:28:23 +00:00
Chris Lattner
1f426deade Add nodes for CondCodeSDNode and setcc, and add a bunch of pattern fragments
to make it easy to use them.  This lets you write patterns like:

(set PRRC:$rd, (setne GPRC:$rS, imm:$SH))

and stuff.


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2005-10-26 17:00:25 +00:00
Nate Begeman
5cd61ce1be Add a note about some bitfield stuff we could be doing better.
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2005-10-25 23:50:02 +00:00
Nate Begeman
ae749a9bb5 Correctly Expand or Promote FP_TO_UINT based on the capabilities of the
machine.  This allows us to generate great code for i32 FP_TO_UINT now on
targets with 64 bit extensions.


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2005-10-25 23:48:36 +00:00
Chris Lattner
6e61ca6fa7 autogen undef
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2005-10-25 21:03:41 +00:00
Chris Lattner
978982628a Add undef
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2005-10-25 21:03:14 +00:00
Chris Lattner
3075a4e94d Allow pseudos to have patterns, no functionality change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23988 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 20:58:43 +00:00
Chris Lattner
9c73f095bb Autogen fsel
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2005-10-25 20:55:47 +00:00
Chris Lattner
eb255f2b83 Expose the fextend on the DAG instead of doing it in the matcher
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2005-10-25 20:54:57 +00:00
Chris Lattner
e6115b370a Autogen a few new ppc-specific nodes
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2005-10-25 20:41:46 +00:00
Chris Lattner
8ecedbe2c3 The dag isel generator generates this now
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2005-10-25 20:36:10 +00:00
Chris Lattner
99ea9da872 Be a bit more paranoid about calling SelectNodeTo
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2005-10-25 20:26:41 +00:00
Chris Lattner
3393e80a06 Fix a couple of minor bugs. The first fixes povray, the second fixes things
if the dag combiner isn't run


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2005-10-25 19:32:37 +00:00
Jim Laskey
34bd5d5d87 Preparation of supporting scheduling info. Need to find info based on selected
CPU.


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2005-10-25 15:15:28 +00:00
Chris Lattner
08a6b3cf7e do not wrap this whole file in namespace llvm
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2005-10-24 06:38:35 +00:00
Chris Lattner
02d608bd5f Make this build with GCC 4.1, patch contributed by Vladimir A. Merzliakov!
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2005-10-24 04:51:35 +00:00
Chris Lattner
f36aeedaa3 DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now
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2005-10-24 02:26:13 +00:00
Chris Lattner
aa9b596c5d only build .a version of this library
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2005-10-24 02:14:49 +00:00
Chris Lattner
635df00b02 There is no need to build an archive version of this library
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2005-10-24 02:09:03 +00:00
Chris Lattner
11686f1c07 This file is hopelessly out of date
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2005-10-24 02:07:08 +00:00
Chris Lattner
2224dcc88c Simplify this, matching changes in the tblgen emitter
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2005-10-23 22:34:25 +00:00
Chris Lattner
8ec9f331d2 Simplify this due to changes in the tblgen side
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2005-10-23 22:33:22 +00:00
Chris Lattner
aa38be17c8 mark this as beta
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2005-10-23 22:23:45 +00:00
Chris Lattner
3e808a45b3 If a user requests help, give them help on both features and processors
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2005-10-23 22:23:13 +00:00
Chris Lattner
ed465f5407 Autogen subtarget information from .td files.
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2005-10-23 22:15:34 +00:00
Chris Lattner
5882e40ded Add subtarget feature/processor defns to the .td file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23903 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 22:08:45 +00:00
Chris Lattner
c8d28890f6 rearrange things a bit so that instructions can use subtarget features in the
future.


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2005-10-23 22:08:13 +00:00
Chris Lattner
f690e6f3f6 add a marker
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2005-10-23 22:07:20 +00:00
Chris Lattner
ffff6175ef add a note that Nate mentioned last week
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2005-10-23 21:44:59 +00:00
Chris Lattner
1171ff4fd7 Put some of my random notes somewhere public
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2005-10-23 19:52:42 +00:00
Chris Lattner
ba76c21858 Improve help output.
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2005-10-23 05:33:39 +00:00
Chris Lattner
2e1f823aed improve -help output
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2005-10-23 05:28:51 +00:00
Chris Lattner
54195c1a9d Move static functions from .h file, reduce #includes, pass strings by const&,
use LowercaseString from StringExtras.h, remove extraneous space from help
output.


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2005-10-23 05:26:26 +00:00
Andrew Lenharth
8b7f14e970 Add several things.
loads
branches
setcc
working calls
Global address
External addresses

now I can manage malloc calls.


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2005-10-23 03:43:48 +00:00
Andrew Lenharth
756fbeb905 Well, the Constant matching pattern works. Can't say much about calls or globals yet.
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2005-10-22 22:06:58 +00:00
Chris Lattner
5ef4d8dd6d This file is entirely ifdef'd out
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2005-10-22 19:37:08 +00:00
Jim Laskey
5476b9bfce Add g3 back to the mix and reorder to irritate them anal folk. Actually, it's
to group appropriately and provide cues to maintainers that the lists don't
need to be ordered.


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2005-10-22 08:04:24 +00:00
Chris Lattner
4245f1d790 64-bit reg support should not be enabled by default, as support isn't complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23878 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 22:15:43 +00:00
Chris Lattner
dabb8291e8 Instead of aborting if not a case we can handle specially, break out and
let the generic code handle it.  This fixes CodeGen/Generic/2005-10-21-longlonggtu.ll on ppc.

also, reindent this code


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2005-10-21 21:17:10 +00:00
Jim Laskey
f5fc2cbd6b Plugin new subtarget backend into the build.
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2005-10-21 19:05:19 +00:00
Chris Lattner
d2fc54edc4 silence a release mode warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23868 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 16:01:26 +00:00
Nate Begeman
ae1641c39f Match rotate. This does actually match the rotates in an rc5 cipher, but I
haven't seen it fire on our testsuite.


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2005-10-21 06:36:18 +00:00
Nate Begeman
d5ce204c5f Don't generate operations that aren't yet supported
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23858 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 01:52:45 +00:00
Nate Begeman
0b2973aef2 Kill some now-dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23857 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 01:52:20 +00:00
Andrew Lenharth
fe9234db9b byte zap not immediate goodness
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23855 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 01:24:05 +00:00
Nate Begeman
405e3ecb56 Invert the TargetLowering flag that controls divide by consant expansion.
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.


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2005-10-21 00:02:42 +00:00
Andrew Lenharth
1f347a318c Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight
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2005-10-20 23:58:36 +00:00
Chris Lattner
eae6d648da Use a literal to define ineg instead of immzero
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2005-10-20 23:30:37 +00:00
Andrew Lenharth
964b6aacb4 added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh
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2005-10-20 19:39:24 +00:00
Andrew Lenharth
d684e1a64d add cttz and ctpop
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2005-10-20 19:38:11 +00:00
Andrew Lenharth
892ade722a Sounds good, finish the intop conversion.
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2005-10-20 14:42:48 +00:00
Nate Begeman
12a923408c Add some more patterns for i64 on ppc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23842 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 07:51:08 +00:00
Chris Lattner
ae4be981b1 Add some pattern fragments to simplify the repetitive parts of the patterns
for some common ops and use them for a few examples.  Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.


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2005-10-20 04:21:06 +00:00
Chris Lattner
d7cc4c407d simplify this a bit by using immediates
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2005-10-20 03:57:03 +00:00
Nate Begeman
6957523b9d Move the target constant divide optimization up into the dag combiner, so
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.


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2005-10-20 02:15:44 +00:00
Andrew Lenharth
d97591a961 forgot this one
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23833 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 00:29:02 +00:00
Andrew Lenharth
4907d22a90 ret 0; works, not much else
still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23832 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 00:28:31 +00:00
John Criswell
9811ea4567 This fixes PR638:
Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23831 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 20:07:15 +00:00
Jim Laskey
538421411a Added InstrSchedClass to each of the PowerPC Instructions.
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23830 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 19:51:16 +00:00
Nate Begeman
2d5aff761d Write patterns for the various shl and srl patterns that don't involve
doing something clever.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23824 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 18:42:01 +00:00
Jim Laskey
0de8796e68 Push processor descriptions to the top of target and add command line info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23820 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 13:34:52 +00:00
Chris Lattner
f6cd147471 now that tblgen is smarter, use integers directly. This should help Andrew too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23818 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 04:32:04 +00:00
Chris Lattner
14c09b81ea teach ppc backend these are copies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23813 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:50:36 +00:00
Chris Lattner
8be1fa5dc5 Convert these cases to patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23811 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:38:02 +00:00
Nate Begeman
8d94832394 Woo, it kinda works. We now generate this atrociously bad, but correct,
code for long long foo(long long a, long long b) { return a + b; }

_foo:
        or r2, r3, r3
        or r3, r4, r4
        or r4, r5, r5
        or r5, r6, r6
        rldicr r2, r2, 32, 31
        rldicl r3, r3, 0, 32
        rldicr r4, r4, 32, 31
        rldicl r5, r5, 0, 32
        or r2, r3, r2
        or r3, r5, r4
        add r4, r3, r2
        rldicl r2, r4, 32, 32
        or r4, r4, r4
        or r3, r2, r2
        blr


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2005-10-19 01:12:32 +00:00
Chris Lattner
e5468305a0 apply some tblgen majik to simplify the X register definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 00:17:55 +00:00
Nate Begeman
da32c9eed6 Make a new reg class for 64 bit regs that aliases the 32 bit regs. This
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.


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2005-10-19 00:05:37 +00:00
Nate Begeman
4a95945fa5 Add the ability to lower return instructions to TargetLowering. This
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).


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2005-10-18 23:23:37 +00:00
Jim Laskey
21f587ca24 Simple edits; remove unimplimented cases and clarify long haul SLU cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:59:23 +00:00
Chris Lattner
841d12d9ac Fix the JIT encoding of LWA, LD, STD, and STDU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:51:22 +00:00
Jim Laskey
076866c50f Checking in first round of scheduling tablegen files. Not tied in as yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:23:40 +00:00
Chris Lattner
3d8df55fed add a case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23785 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 06:30:51 +00:00
Nate Begeman
9d2b817fcb Do the right thing and enable 64 bit regs under the control of a subtarget
option.  Currently the only way to enable this is to specify the
64bitregs mattr flag.  It is never enabled by default on any config yet.


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2005-10-18 00:56:42 +00:00
Nate Begeman
1d9d7427c4 First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is
purely mechanical.


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2005-10-18 00:28:58 +00:00
Nate Begeman
21e463b2bf More PPC32 -> PPC changes, as well as merging some classes that were
redundant after the change.


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2005-10-16 05:39:50 +00:00
Nate Begeman
34f342e36f Remove some dead code now that the dag combiner exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:08:02 +00:00
Chris Lattner
4cb5a1b896 Remove some dead code: the ORI/ORIS cases are autogen'd. This makes
SelectIntImmediateExpr dead.


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2005-10-15 22:06:18 +00:00
Chris Lattner
de123822e5 prune #includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23752 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:58:54 +00:00
Chris Lattner
75c9f67370 These instructions are now autogenerated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23751 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:56 +00:00
Chris Lattner
e0b2e6372f Add a pattern for FSQRTS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23750 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:15 +00:00
Chris Lattner
651dea74f6 remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23749 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:40:12 +00:00
Chris Lattner
d242419e17 remove broken SRA/rlwimi case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23746 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 19:04:48 +00:00
Chris Lattner
16e71f2f70 Rename PPC32*.h to PPC*.h
This completes the grand PPC file renaming


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2005-10-14 23:59:06 +00:00
Chris Lattner
b9459b731a Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfo
and PPC32JITInfo classes should be merged.


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2005-10-14 23:53:41 +00:00
Chris Lattner
2668959b88 Rename PowerPC*.h to PPC*.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23743 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:51:18 +00:00
Chris Lattner
26bd0d48a1 Rename PowerPCInstrBuilder.h -> PPC*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23742 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:45:43 +00:00
Chris Lattner
ec4b73cb09 Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine
still should be merged into the PPC32TargetMachine class


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2005-10-14 23:44:05 +00:00
Chris Lattner
f379997adc Rename PowerPC*.td -> PPC*.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23740 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:40:39 +00:00
Chris Lattner
f1ed100bc4 These are dead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23739 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:38:51 +00:00
Chris Lattner
4c7b43b43f Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23738 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:37:35 +00:00
Chris Lattner
e87bc1f3a8 Like the comment says...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23737 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:48:24 +00:00
Chris Lattner
617742b1b8 Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions
from the .td file that correspond to it


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23736 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:44:13 +00:00
Nate Begeman
14e2cf62f4 Properly split f32 and f64 into separate register classes for scalar sse fp
fixing a bunch of nasty hackery


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2005-10-14 22:06:00 +00:00
Nate Begeman
e0de44adba Remove an unnecsesary file. PPC32 and PPC64 share architected registers.
We will decide with subtarget support whether we ever use an i64 register
class.


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2005-10-14 18:58:46 +00:00
Chris Lattner
444215dddc add the integer truncate/extension operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23733 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 06:40:20 +00:00
Chris Lattner
3f31d4304c These are now autogenerated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23731 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 06:26:29 +00:00
Chris Lattner
7cb6491a0d Add patterns for FP round/extend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23727 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 04:55:50 +00:00
Chris Lattner
13664a6194 add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend in terms of it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23726 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 04:55:10 +00:00
Chris Lattner
7b1fe15de0 These definitions have been moved to common code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-10 06:01:00 +00:00
Chris Lattner
17f2cf05b3 Pull DAG ISel generation nodes out of the PowerPC backend to where they
can be used by other targets.  For those targets that want to use it,
have at.  :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23680 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-10 06:00:30 +00:00
Andrew Lenharth
fa08fb2c78 This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23676 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-09 20:11:35 +00:00
Chris Lattner
65a419a104 Disable formation of rlwinm instructions from SRA bases. This fixes
the 177.mesa failure from last night, and fixes the
CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added.
If this code cannot be fixed, it should be removed for good, but I'll leave
it to Nate to decide its fate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23670 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-09 05:36:17 +00:00
Nate Begeman
7d47a61496 Remove another unused file. Preparing for the great "enable i64 on ppc32"
merge, and using subtarget info for ptr size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23668 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-08 01:32:34 +00:00
Nate Begeman
02f77d1e83 Remove a file that is no longer used
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23666 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-08 01:21:27 +00:00
Chris Lattner
cf01a70550 When preselecting, favor things that have low depth to select first. This
is faster and uses less stack space.  This reduces our stack requirement
enough to compile sixtrack, and though it's a hack, should be enough until
we switch to iterative isel


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2005-10-07 22:10:27 +00:00
Chris Lattner
eb5d47d99d Fix a CQ regression from my patch to split F32/F64 into seperate register
classes on PPC.  We were emitting fmr instructions to do fp extensions, which
weren't getting coallesced.  This fixes Regression/CodeGen/PowerPC/fpcopy.ll


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2005-10-07 05:00:52 +00:00
Chris Lattner
7a7c979ddd Fix CodeGen/Generic/bool-to-double.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-07 04:50:48 +00:00
Chris Lattner
6a16f6a14f Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 19:07:45 +00:00
Chris Lattner
222adac30a Pull out setcc, this reduces stack frame size from 7520 to 6032 bytes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23649 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 19:03:35 +00:00
Chris Lattner
2b63e4c5e2 Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23648 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 18:56:10 +00:00
Chris Lattner
bd937b98f4 Add a recursive-iterative hybrid stage to attempt to reduce stack space, this
helps but not enough.

Start pulling cases out of PPC32DAGToDAGISel::Select.  With GCC 4, this function
required 8512 bytes of stack space for each invocation (GCC 3 required less
than 700 bytes).  Pulling this first function out gets us down to 8224.  More
to come :(


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2005-10-06 18:45:51 +00:00
Andrew Lenharth
f3fb71bfd7 This is suppose to work now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23644 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 16:54:29 +00:00
Andrew Lenharth
d5613debf9 remove VAX compatibility instruction, we will never use this
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23643 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 16:53:32 +00:00
Chris Lattner
f5c6e6b745 silence some warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-05 17:15:09 +00:00
Chris Lattner
ccc8ed7bb5 Add a forward def
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23621 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-04 05:09:20 +00:00
Chris Lattner
8ca02914e5 Speed up the asm printer a lot by not printing formatted LLVM asm output
for globals


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2005-10-03 07:08:36 +00:00
Chris Lattner
3cf8760dc5 silence some warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 16:29:36 +00:00
Chris Lattner
123557fcf0 silence a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23593 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 16:27:59 +00:00
Chris Lattner
dff06f4348 add patterns for float binops and fma ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:46:28 +00:00
Chris Lattner
080a4b1637 Sort the cpu and features table, so that the alpha backend doesn't fail EVERY
compile with an assertion that the tables are not sorted!


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2005-10-02 07:13:52 +00:00
Chris Lattner
43f07a4bbc another solution to the fsel issue. Instead of having 4 variants, just force
the comparison to be 64-bits.  This is fine because extensions from float
to double are free.


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2005-10-02 07:07:49 +00:00
Chris Lattner
867940d1b7 fsel can take a different FP type for the comparison and for the result. As such
split the FSEL family into 4 things instead of just two.


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2005-10-02 06:58:23 +00:00
Chris Lattner
7c0d664c21 fix an f32/f64 type mismatch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23587 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:37:13 +00:00
Chris Lattner
a916dd8888 Adjust to change in ctor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:23:51 +00:00
Chris Lattner
ca0a4778a8 Minor tweak to the branch selector. When emitting a two-way branch, and if
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.


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2005-10-01 23:06:26 +00:00
Chris Lattner
b91956e7f8 like the comment says, enable this
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23581 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 23:02:40 +00:00
Chris Lattner
2c1760f636 fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23578 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 02:51:36 +00:00
Chris Lattner
919c032fa4 Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
These are used to represent float and double values, and the two regclasses
contain the same physical registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 01:35:02 +00:00
Jim Laskey
242f2557cc Should be using flag and not chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23572 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 23:43:37 +00:00
Nate Begeman
2b5e66fc6e Remove some now-dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23571 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 21:28:27 +00:00
Andrew Lenharth
ac35cd207f subtarget support for CIX and FIX extentions (the only 2 I care about right now)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23569 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 20:24:38 +00:00
Chris Lattner
0f21fd5204 Rename MRegisterDesc -> TargetRegisterDesc for consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23564 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:49:27 +00:00
Chris Lattner
863914feb5 trim down the target info structs now that we have a preferred spill register class for each callee save register
Why is V9 maintaining these tables manually? ugh!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23561 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:38:36 +00:00
Chris Lattner
5802be13e0 constant fold these calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23558 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:16:59 +00:00
Chris Lattner
56bcae0de9 simplify this code using the new regclass info passed in
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23557 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:12:38 +00:00
Chris Lattner
e4047188e7 stub out a virtual method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23554 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 06:55:18 +00:00
Chris Lattner
d174fe0ec3 CR registers are not used by this "target"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23552 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 06:43:58 +00:00
Chris Lattner
0a37960d32 these registers don't belong to any register classes, so don't mark them
as callee save.  They can never be generated by the compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23551 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 06:42:24 +00:00
Chris Lattner
ef242b1ccc Now that self referential classes are supported, get rid of a work-around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23544 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 04:13:23 +00:00
Chris Lattner
b48d2cf5eb pass extra args
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23539 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 01:31:52 +00:00
Chris Lattner
0ffb1a56ff these methods get extra args
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23538 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 01:30:55 +00:00
Chris Lattner
97d5e6461a Pass extra regclasses into spilling code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 01:29:42 +00:00
Chris Lattner
ff201eebea Use the 32-bit version for now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23534 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 00:05:05 +00:00
Chris Lattner
67ab118a6d Add a bunch of patterns for F64 FP ops, add some more integer ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23533 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 23:34:24 +00:00
Chris Lattner
237733e933 Remove code for patterns that are autogenerated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23532 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 23:33:31 +00:00
Andrew Lenharth
120ab480ab begining alpha subtarget support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23531 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 22:54:56 +00:00
Chris Lattner
c7a37a52cd tblgen autogens this pattern now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23530 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 22:37:24 +00:00
Andrew Lenharth
68fd4866de copy and paste error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23528 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 21:11:57 +00:00
Chris Lattner
221e53caea now that tblgen is smarter, this pattern is not needed. Also, tblgen
now inverts commuted versions of ANDC/ORC with the current .td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23527 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 19:29:15 +00:00