Bruno Cardoso Lopes
03560600b4
Simple refactoring of SSE4.1 instructions, making room for the AVX forms
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107540 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 23:27:59 +00:00
Bruno Cardoso Lopes
f5cd8c51e3
- Add support for the rest of AVX SSE3 instructions
...
- Fix VEX prefix to be emitted with 3 bytes whenever VEX_5M
represents a REX equivalent two byte leading opcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107523 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 22:06:54 +00:00
Evan Cheng
98ec91ea80
- Two-address pass should not assume unfolding is always successful.
...
- X86 unfolding should check if the instructions being unfolded has memoperands.
If there is no memoperands, then it must assume conservative alignment. If this
would introduce an expensive sse unaligned load / store, then unfoldMemoryOperand
etc. should not unfold the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 20:36:18 +00:00
Bruno Cardoso Lopes
f12ad66741
Shrink down SSE3 code by more multiclass refactoring
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 23:10:49 +00:00
Bruno Cardoso Lopes
944facac2e
Shrink down SSE3 code by some multiclass refactoring - 1st part
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107438 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 22:33:18 +00:00
Bruno Cardoso Lopes
c6fcdeb8f9
Move SSE3 Move patterns to a more appropriate section
...
Add AVX SSE3 packed horizontal and & sub instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 17:35:02 +00:00
Bruno Cardoso Lopes
7144821c61
Add AVX SSE3 packed addsub instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 17:08:18 +00:00
Dan Gohman
20d4be151b
Enable on-demand fast-isel.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 02:58:57 +00:00
Dan Gohman
abd1d859b3
Fix X86FastISel's add folding to actually work, and not fall back
...
to SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 02:58:21 +00:00
Bruno Cardoso Lopes
79b634c244
Add AVX SSE3 replicate and convert instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107375 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 02:33:39 +00:00
Dan Gohman
5c87bf64d6
Teach X86FastISel to fold constant offsets and scaled indices in
...
the same address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107373 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 02:27:15 +00:00
Bruno Cardoso Lopes
6596a62076
- Add AVX SSE2 Move doubleword and quadword instructions.
...
- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
in the .td file now have a AVX encoded form already working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107365 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 01:20:06 +00:00
Bruno Cardoso Lopes
7ac7ed868a
Move MOVD/MODQ code around, creating sections for each of them
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107308 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 18:49:10 +00:00
Bruno Cardoso Lopes
e26f14d150
Add AVX SSE2 mask creation and conditional store instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 18:38:10 +00:00
Bruno Cardoso Lopes
130acd15fc
Fix a bug introduced in r107211 where instructions with memory operands are declared as commutable
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107300 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 18:06:01 +00:00
Bruno Cardoso Lopes
1e4b723b20
Add AVX SSE2 packed integer extract/insert instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 17:03:03 +00:00
Gabor Greif
e1c2b9cc3d
use ArgOperand API
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 13:03:37 +00:00
Bruno Cardoso Lopes
876085dcfa
Add AVX SSE2 integer unpack instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107246 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 04:06:39 +00:00
Bruno Cardoso Lopes
d252fec7ae
Add AVX SSE2 packed integer shuffle instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107245 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 03:47:56 +00:00
Bruno Cardoso Lopes
555bea62dd
Small refactoring of SSE2 packed integer shuffle instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 03:29:36 +00:00
Bruno Cardoso Lopes
6d5d2b5de2
Add AVX SSE2 pack with saturation integer instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 02:30:25 +00:00
Bruno Cardoso Lopes
c0ea94a37c
Add AVX SSE2 integer packed compare instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107240 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 02:21:09 +00:00
Bruno Cardoso Lopes
5a3a476750
- Add AVX form of all SSE2 logical instructions
...
- Add VEX encoding bits to x86 MRM0r-MRM7r
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107238 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 01:58:37 +00:00
Bruno Cardoso Lopes
6c9fa43716
Add *several* AVX integer packed binop instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107225 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 23:47:49 +00:00
Bruno Cardoso Lopes
2c818072cc
Move SSE2 Packed Integer instructions around, and create specific sections for each of them
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107211 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 22:12:16 +00:00
Bruno Cardoso Lopes
8d3cebca8e
Add AVX Move Aligned/Unaligned packed integers
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 21:25:12 +00:00
Bruno Cardoso Lopes
147b7cad2f
Add AVX ld/st XCSR register.
...
Add VEX encoding bits for MRMXm x86 form
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 20:35:48 +00:00
Bruno Cardoso Lopes
721ef73d88
Add AVX non-temporal stores
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 18:22:01 +00:00
Bruno Cardoso Lopes
de173ca1fb
Move non-temporal movs to their own section
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 17:42:37 +00:00
Bruno Cardoso Lopes
ea86423cbd
Add sqrt, rsqrt and rcp AVX instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107166 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 17:26:30 +00:00
Duncan Sands
78337b4d4d
Remove pointless and unused variables.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 12:48:49 +00:00
Bruno Cardoso Lopes
b22dc70a5c
Refactoring of arithmetic instruction classes with unary operator
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 01:33:09 +00:00
Bruno Cardoso Lopes
4548260ab5
Described the missing AVX forms of SSE2 convert instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 00:36:02 +00:00
Bill Wendling
c25ccf85e5
Reduce indentation via early exit. NFC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107067 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-28 21:08:32 +00:00
Gabor Greif
1cfe44a460
use ArgOperand API
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106944 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-26 11:51:52 +00:00
Jakob Stoklund Olesen
4f5d84e4ad
When creating X86 MUL8 and DIV8 instructions, make sure we don't produce
...
CopyFromReg nodes for aliasing registers (AX and AL). This confuses the fast
register allocator.
Instead of CopyFromReg(AL), use ExtractSubReg(CopyFromReg(AX), sub_8bit).
This fixes PR7312.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106934 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-26 00:39:23 +00:00
Bruno Cardoso Lopes
bdffc16d65
Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:47:23 +00:00
Bruno Cardoso Lopes
161476ec34
Reapply r106896:
...
Add several AVX MOV flavors
Support VEX encoding for MRMDestReg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:33:42 +00:00
Bruno Cardoso Lopes
95325b08a3
revert this now, it's using avx instead of sse :)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106906 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:04:29 +00:00
Bruno Cardoso Lopes
544a95d716
Add several AVX MOV flavors
...
Support VEX encoding for MRMDestReg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106896 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 22:27:51 +00:00
Dale Johannesen
1784d160e4
The hasMemory argument is irrelevant to how the argument
...
for an "i" constraint should get lowered; PR 6309. While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 21:55:36 +00:00
Dan Gohman
ca5b8553ea
pcmpeqd and friends are Commutable.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 21:05:35 +00:00
Bill Wendling
730c07e50d
- Reapply r106066 now that the bzip2 build regression has been fixed.
...
- 2010-06-25-CoalescerSubRegDefDead.ll is the testcase for r106878.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106880 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 20:48:10 +00:00
Bruno Cardoso Lopes
39afa908de
Move the last piece of SSE2 convert instructions to the Convert Instructions section
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106877 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 20:29:27 +00:00
Bruno Cardoso Lopes
6560ed35b4
More SSE refactoring, this time with different types of MOVs
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106876 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 20:22:12 +00:00
Bruno Cardoso Lopes
0491e132fc
Refactoring of more SSE conversion instructions. Also add some AVX instrinsics Int_V... placeholders
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 18:06:22 +00:00
Bruno Cardoso Lopes
a0ae87fd5d
Add some AVX convert instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 00:39:30 +00:00
Bruno Cardoso Lopes
8b94297727
Refactoring of SSE convert intrinsics
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106808 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 23:37:07 +00:00
Bruno Cardoso Lopes
f241b26792
Refactoring of SSE conversion instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:22:21 +00:00
Bruno Cardoso Lopes
e0c437333e
Refactor SSE cmp intrinsics and declare the same for AVX
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106796 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:04:40 +00:00
Bruno Cardoso Lopes
788184365a
- Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}.
...
- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106787 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 20:48:23 +00:00
Dale Johannesen
e5ff9ef195
Disallow matching "i" constraint to symbol addresses when
...
address requires a register or secondary load to compute
(most PIC modes). This improves "g" constraint handling. 8015842.
The test from 2007 is attempting to test the fix for PR1761,
but since -relocation-model=static doesn't work on Darwin
x86-64, it was not testing what it was supposed to be testing
and was passing erroneously. Fixed to use Linux x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106779 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 20:14:51 +00:00
Dan Gohman
4e39e9da0f
Reapply r106634, now that the bug it exposed is fixed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 14:30:44 +00:00
Chris Lattner
645b209c4a
Teach the x86 mc assembler that %dr6 = %db6, this implements
...
rdar://8013734
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106725 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:29:18 +00:00
Chris Lattner
adabe1a92c
more cleanups
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106724 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:18:14 +00:00
Chris Lattner
02758a44e4
reduce indentation
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106723 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:16:25 +00:00
Dan Gohman
6b13cbca61
Fix a bug in the code which determines when it's safe to use the
...
bt instruction, which was exposed by r106263.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 02:07:59 +00:00
Eric Christopher
37106afe02
Add a couple more quick comments.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106717 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 02:07:57 +00:00
Bruno Cardoso Lopes
6539dc6e6c
Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106705 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 00:32:06 +00:00
Bruno Cardoso Lopes
34a491bd8e
Move SSE and AVX shuffle, unpack and compare code to more appropriate places
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106702 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 00:15:50 +00:00
Bruno Cardoso Lopes
e93e300ad0
Add AVX MOVMSK{PS,PD}rr instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106683 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:30:27 +00:00
Bruno Cardoso Lopes
428256b818
Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106678 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:10:57 +00:00
Eric Christopher
749bb7e2d9
Update according to feedback.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:49:35 +00:00
Bruno Cardoso Lopes
7dbfd07e32
Add AVX SHUF{PS,PD}{rr,rm} instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106672 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:07:15 +00:00
Nico Weber
50b9efc2a8
Add support for the x86 instructions "pusha" and "popa".
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:00:58 +00:00
Daniel Dunbar
cbe762b5d1
Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 17:09:26 +00:00
Jim Grosbach
f1ab49e83a
The generic DAG combiner can now fold atomic fences when needed, so switch
...
to using that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106633 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 16:25:07 +00:00
Eric Christopher
18ebf74781
Update uses, defs, and comments for darwin tls patterns.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106621 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 08:01:49 +00:00
Daniel Dunbar
d24c9d5f91
Revert r106066, "Create a more targeted fix for not sinking instructions into a range where it"... it causes bzip2 to be miscompiled by Clang.
...
Conflicts:
lib/CodeGen/MachineSink.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 00:48:25 +00:00
Bruno Cardoso Lopes
62a76c6401
Add AVX compare packed instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106600 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:37:59 +00:00
Bruno Cardoso Lopes
0caca3967b
Reapply support for AVX unpack and interleave instructions, with
...
testcases this time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106593 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:02:38 +00:00
Bruno Cardoso Lopes
c3d57b179c
Add AVX MOV{SS,SD}{rr,rm} instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 22:38:56 +00:00
Bill Wendling
19d8597bca
Fix the formatting of the switch statement and add a missing break.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106586 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 22:16:17 +00:00
Jim Grosbach
dd11ee2273
fix typo
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106574 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 20:52:02 +00:00
Bruno Cardoso Lopes
d3a067bbc2
Reorganize logical and arithmetic SSE 1 & 2 instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 18:17:40 +00:00
Bruno Cardoso Lopes
f23919b3e9
Reorganize SSE instructions, making easier to see oportunities for refactoring
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 18:09:32 +00:00
Dan Gohman
fe60104ac9
Use pre-increment instead of post-increment when the result is not used.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106542 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 15:08:57 +00:00
Bruno Cardoso Lopes
c27d1e4d17
revert r106482
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106499 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 22:59:03 +00:00
Bruno Cardoso Lopes
b7cc3f6ae6
change parameter name to avoid confusion with global definition
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106486 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 21:28:07 +00:00
Bruno Cardoso Lopes
b44e8b2d11
Add unpack and interleave AVX instructions, encoding tests cooming soon
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106482 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 21:21:48 +00:00
Bruno Cardoso Lopes
c79e43aee3
Move part of SSE 1 & 2 compare, shuffle and unpack instructions closely. Preparing them for refactoring and to the addition of their AVX forms
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106437 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:36:04 +00:00
Bruno Cardoso Lopes
59bb6fae9a
Add AVX regular (non-aliased ones) and,or,xor,andn packed instructions. They are already tested in the MC framework, no test needed
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106436 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:22:54 +00:00
Eric Christopher
18fb00b4b9
Add some codegen patterns for x86_64-linux-gnu tls codegen matching.
...
Based on a patch by Patrick Marlier!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 18:21:27 +00:00
Rafael Espindola
c2b3e00cdf
Fix an unintentional commit. I think I typed "git svn dcommit" in the wrong branch.
...
I was trying to do some refactoring on the copyRegToReg, but this is realyl a work in progress and not generally useful yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 13:31:32 +00:00
Rafael Espindola
f0efafa61e
wip
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106408 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 02:17:34 +00:00
Nick Lewycky
2a3ee5e8e9
Fix warning in no-asserts build.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-20 20:27:42 +00:00
Bruno Cardoso Lopes
f6ff003043
Refactoring of regular logical packed instructions to prepare for AVX ones.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106375 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 04:09:22 +00:00
Bruno Cardoso Lopes
f4f4bad696
Refactor aliased packed logical instructions, also add
...
AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106374 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 02:44:01 +00:00
Bruno Cardoso Lopes
1e8d06282f
Move new sse 1 & 2 generic classes to a more appropriate place
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 01:32:46 +00:00
Bruno Cardoso Lopes
efc9b69deb
Remove unnecessary arguments
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106371 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 01:22:34 +00:00
Bruno Cardoso Lopes
17227db062
Add AVX packed intrinsics for MIN, MAX
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106370 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 01:17:05 +00:00
Eric Christopher
a938cfb13a
Finish ripping isTwoAddress out of X86. Some mindless formatting
...
and operand renaming to help.
The giant turn the constraints on and selectively turn it off
should probably be inverted at some point since it's just largely
50/50.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106367 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 00:37:40 +00:00
Bruno Cardoso Lopes
be4d595afd
Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106366 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 00:37:31 +00:00
Chris Lattner
617e595022
rip out dead code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106365 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 00:34:14 +00:00
Chris Lattner
1cf44fc051
fix rdar://7873482 by teaching the instruction encoder to emit
...
segment prefixes. Daniel wrote most of this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 00:34:00 +00:00
Bruno Cardoso Lopes
fda1acb389
Clean up: remove now unnecessary Constraints
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106361 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 00:09:27 +00:00
Bruno Cardoso Lopes
c82f199892
more refactoring! yay! big win over the intrinsics
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106359 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 00:00:22 +00:00
Eric Christopher
96ab7f494d
Remove isTwoAddress from here too.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 23:56:07 +00:00
Bruno Cardoso Lopes
ccf30bd984
Fix typo, SSE1 should be used by XS, not SSE2
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106357 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 23:53:27 +00:00
Eric Christopher
f6bc0b9d4b
Remove isTwoAddress from 64-bit files.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106356 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 23:51:21 +00:00
Dan Gohman
db4971259c
Teach regular and fast isel to set dead flags on unused implicit defs
...
on calls and similar instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 23:28:01 +00:00
Bruno Cardoso Lopes
8af5ed9e15
Apply some refactor to packed instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106349 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 23:13:35 +00:00
Bruno Cardoso Lopes
4b8921d1c7
Use the new 'defm' class inheritance in SSE
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106327 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 22:10:11 +00:00
Dan Gohman
1415a602ad
Make this comment less specific.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106311 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 20:45:41 +00:00
Dan Gohman
ea9f151cbc
Fix X86FastISel's address-mode folding to stay within the
...
original basic block. This avoids trouble with examining
instructions in other basic blocks which haven't been
assigned registers yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 20:44:47 +00:00
Dan Gohman
027657db7c
Change UpdateNodeOperands' operand and return value from SDValue to
...
SDNode *, since it doesn't care about the ResNo value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 15:30:29 +00:00
Dan Gohman
5ff12fc41a
Delete unused variables.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 14:32:32 +00:00
Dan Gohman
e368b460a2
Eliminate unnecessary uses of getZExtValue().
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 14:22:04 +00:00
Dan Gohman
7720cb3823
isValueValidForType can be a static member function.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106278 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 14:01:07 +00:00
Eric Christopher
f627dc37bf
Some assorted isTwoAddress -> Constraints cleanup.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106273 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 02:41:19 +00:00
Dan Gohman
e54081088e
Don't maintain a set of deleted nodes; instead, use a HandleSDNode
...
to track a node over CSE events. This fixes PR7368.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106266 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 01:24:29 +00:00
Bruno Cardoso Lopes
d7f9cc4de7
Add {mix,max}{ss,sd}{rr,rm} AVX forms.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106264 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 01:12:56 +00:00
Dan Gohman
8a7f7426ee
Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,
...
which is faster, simpler, and less surprising.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 01:05:21 +00:00
Bruno Cardoso Lopes
597ec8ed51
Use new tablegen resources in SSE tablegen code. This will
...
be done incrementally and intermixed with the adding of more
AVX instructions. This is a first step in that direction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106251 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17 23:05:30 +00:00
Stuart Hastings
3bf9125933
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
...
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17 22:43:56 +00:00
Eric Christopher
e98ad83543
Hack to let the move lowering handle dynamic-no-pic absolute moves of
...
TLVP:
movl _a@TLVP, %eax
Daniel: Please review if you get a chance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17 00:51:48 +00:00
Bill Wendling
d361a77f14
Create a more targeted fix for not sinking instructions into a range where it
...
will conflict with another live range. The place which creates this scenerio is
the code in X86 that lowers a select instruction by splitting the MBBs. This
eliminates the need to check from the bottom up in an MBB for live pregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106066 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15 23:46:31 +00:00
Eric Christopher
6102549737
For 32-bit non-pic tlv mach-o addressing we don't need a pic base or
...
a relative address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15 23:08:42 +00:00
Dale Johannesen
bf37850e42
Reapply 105986 with fix for bug pointed out by Jakob:
...
flag argument to addReg is not the same format as flags attached
to MachineOperand, although both have the same info. I don't
think this actually mattered; the bootstrap failure did not
reproduce on the next run anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106049 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15 21:36:43 +00:00
Chris Lattner
868ee9460c
fix fastisel to handle GS and FS relative pointers. Patch by
...
Nelson Elhage!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15 19:08:40 +00:00
Dale Johannesen
69ba5c6aa8
Revert 105986; looks like I'd better try bootstrapping.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105988 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15 04:55:06 +00:00
Dale Johannesen
4b559f070a
The form of BuildMI used for TAILJMPr was changing the register
...
containing the target address, an input, into an output. I don't
think this actually broke anything on x86 (it does on ARM), but
it's wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105986 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15 03:13:49 +00:00
Chris Lattner
6b601536ff
fix a nasty bug where we were not treating available_externally
...
symbols as declarations in the X86 backend. This would manifest
on darwin x86-32 as errors like this with -fvisibility=hidden:
symbol '__ZNSbIcED1Ev' can not be undefined in a subtraction expression
This fixes PR7353.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105954 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14 20:11:56 +00:00
Eli Friedman
e103194851
Add back some possible optimizations for va_arg, with wording that makes it
...
more clear what exactly is missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105934 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14 07:03:30 +00:00
Rafael Espindola
21d238fdba
Merge getStoreRegOpcode and getLoadRegOpcode.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105900 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 20:13:29 +00:00
Bruno Cardoso Lopes
2dcf6d6019
make the avx intrinsics 3 address
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105876 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 03:12:14 +00:00
Bruno Cardoso Lopes
11ae95c175
Add some basic fp intrinsics for AVX
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105873 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 02:38:32 +00:00
Bruno Cardoso Lopes
cf125d02a0
More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105870 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 01:53:48 +00:00
Bruno Cardoso Lopes
7be0d2c8e9
More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr
...
Handle OpSize TSFlag for AVX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 01:23:26 +00:00
Bruno Cardoso Lopes
e4f6907a7a
Add some comments about REX fields
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 00:03:52 +00:00
Bruno Cardoso Lopes
c902a59f4c
More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm)
...
Introduce the VEX_X field
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-11 23:50:47 +00:00
Eli Friedman
092f9c116a
A few new x86-64 specific README entries.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105674 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-09 02:43:17 +00:00
Kevin Enderby
09712b57ce
Incremental improvement to the handling of the x86 "Jump if rCX Zero"
...
instruction. Added the 64-bit version "jrcxz" so it is recognized and also
added the checks for incorrect uses of "jcxz" in 64-bit mode and "jrcxz" in
32-bit mode. Still to do is to correctly handle the encoding of the
instruction adding the Address-size override prefix byte, 0x67, when the width
of the count register is not the same as the mode the machine is running in.
Which for example means the encoding of "jecxz" depends if you are assembling
as a 32-bit target or a 64-bit target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105661 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-08 23:48:44 +00:00
Eric Christopher
497f1eb2b8
Split out these asserts so it's more apparent why we're not assembling
...
that rip-relative address when executing in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105656 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-08 22:57:33 +00:00
Bruno Cardoso Lopes
99405df044
Reapply r105521, this time appending "LLU" to 64 bit
...
immediates to avoid breaking the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105652 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-08 22:51:23 +00:00
Eric Christopher
544153653b
Ensure that mov and not lea are used to stick the address into
...
the register. While we're at it, make sure it's in the right one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105645 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-08 22:04:25 +00:00
Duncan Sands
431c3e7404
This bug is also present in MSVC10. Requested by Elrood on IRC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105527 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 12:40:43 +00:00
Chris Lattner
1087f54ddb
revert r105521, which is breaking the buildbots with stuff like this:
...
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105524 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
3eca98bb3a
Initial AVX support for some instructions. No patterns matched
...
yet, only assembly encoding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105521 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 03:53:24 +00:00
Dale Johannesen
88004c25c7
Fix some liveout handling related to tail calls, see comments.
...
I don't think this ever resulted in problems on x86, but it
would on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 00:30:45 +00:00
Eric Christopher
30ef0e5658
Add first pass at darwin tls compiler support.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105381 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03 04:07:48 +00:00
Eli Friedman
db1bf34178
Remove some already-fixed README entries.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03 01:47:31 +00:00
Eli Friedman
a04a2c0a50
Remove README entry which no longer compiles to something sane.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03 01:16:51 +00:00
Eli Friedman
2ad7e433c9
Remove a fixed item, update a couple partially-fixed items.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105375 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03 01:01:48 +00:00
Jakob Stoklund Olesen
9edf7deb37
Slightly change the meaning of the reMaterialize target hook when the original
...
instruction defines subregisters.
Any existing subreg indices on the original instruction are preserved or
composed with the new subreg index.
Also substitute multiple operands mentioning the original register by using the
new MachineInstr::substituteRegister() function. This is necessary because there
will soon be <imp-def> operands added to non read-modify-write partial
definitions. This instruction:
%reg1234:foo = FLAP %reg1234<imp-def>
will reMaterialize(%reg3333, bar) like this:
%reg3333:bar-foo = FLAP %reg333:bar<imp-def>
Finally, replace the TargetRegisterInfo pointer argument with a reference to
indicate that it cannot be NULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 22:47:25 +00:00
Rafael Espindola
42d075c4fb
Remove the TargetRegisterClass member from CalleeSavedInfo
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 20:02:30 +00:00
Eli Friedman
962f549d20
Fix comment so it doesn't include comments which are irrelevant to the x86
...
backend. Add a FIXME noting what can be fixed here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 19:35:46 +00:00
Dan Gohman
71c62a2977
Use comments to document non-obvious code rather than
...
mailing list archives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105341 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 19:13:40 +00:00
Rafael Espindola
691820a1a0
Remove unused function.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105325 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 15:44:20 +00:00
Eli Friedman
a993f0a45f
Don't try to custom-lower 64-bit add-with-overflow and friends on x86-32; the
...
x86 backend currently doesn't know how to handle them.
This doesn't really fix anything because LegalizeTypes doesn't know how to
handle them either. We do get a better error message, though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105305 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 00:27:18 +00:00
Eli Friedman
b242563741
Remove outdated README entries.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 00:10:36 +00:00
Dan Gohman
d8acddda58
Fix the allocation of shadow space for the Win64 calling convention
...
in X86FastISel. Patch by Jan Sjodin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105290 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-01 21:09:47 +00:00
Bruno Cardoso Lopes
7f5b0d8099
Refactor some SSE 2 unpack instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-01 17:02:50 +00:00
Evan Cheng
9c044674e6
Fix PR7193: if sibling call address can take a register, make sure there are enough registers available by counting inreg arguments.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105092 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-29 01:35:22 +00:00
Dale Johannesen
2f05cc06a2
Fix comment typos.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 23:24:28 +00:00
Bruno Cardoso Lopes
f39e0ce4ec
More SSE 1 & 2 merge, this time with logical instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105014 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 22:47:03 +00:00
Kevin Enderby
31cc9655b6
MC/X86: Add alias for movzx.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 21:20:21 +00:00
Kevin Enderby
5e394429ab
MC/X86: Add alias for fwait.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 20:59:10 +00:00
Kevin Enderby
31b6c5b2f3
Fix the use of x86 control and debug registers so that the assertion failure in
...
getX86RegNum() does not happen. Patch by Shantonu Sen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 19:01:27 +00:00
Kevin Enderby
bd658918df
MC/X86: Add aliases for Jcc variants.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 21:33:19 +00:00
Dale Johannesen
54feef2950
Mark some math lib intrinsic nodes Legal on SSE4.1.
...
No functional effect as these nodes are not generated yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 20:12:41 +00:00
Dan Gohman
4d3d6e1a0c
FastISel doesn't yet handle callee-pop functions.
...
To support this, move IsCalleePop from X86ISelLowering to X86Subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 18:43:40 +00:00
Bruno Cardoso Lopes
aa02ff1a2b
Merge basic binops SSE 1 & 2 instruction classes. This is a step towards refactoring
...
common code between SSE versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 18:17:40 +00:00
Daniel Dunbar
dcbab9cf5a
AsmMatcher/X86: Mark _REV instructions as "code gen only", they aren't expected
...
to be matched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104757 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 22:21:28 +00:00
Jakob Stoklund Olesen
160a3bf74d
Add StringRef::compare_numeric and use it to sort TableGen register records.
...
This means that our Registers are now ordered R7, R8, R9, R10, R12, ...
Not R1, R10, R11, R12, R2, R3, ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 21:47:28 +00:00
Kevin Enderby
b106543592
Fix the x86 move to/from segment register instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 20:10:45 +00:00
Daniel Dunbar
95506d40c5
MC: Change RelaxInstruction to only take the input and output instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104713 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 18:15:06 +00:00
Dan Gohman
d9c2af5409
Fix a typo in a comment that Gabor noticed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104711 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 18:03:53 +00:00
Daniel Dunbar
8488252855
MC: Simplify MayNeedRelaxation to not provide the fixups, so we can query it
...
before encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104707 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 17:45:29 +00:00
Jakob Stoklund Olesen
ca561ffcf3
Replace the SubRegSet tablegen class with a less error-prone mechanism.
...
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 17:27:12 +00:00
Daniel Dunbar
c90e30aa6f
MC: Eliminate MCAsmFixup, replace with MCFixup.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104699 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 15:18:56 +00:00
Daniel Dunbar
482ad802f1
MC: Use accessors for access to MCAsmFixup.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104697 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 15:18:31 +00:00
Daniel Dunbar
c9adb8c61e
MC: Change MCInst::dump_pretty to not include a trailing newline.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104696 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 15:18:13 +00:00
Zhongxing Xu
c2798a18a7
SRetReturnReg was set in LowerFormalArguments(). So only assert it here.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 08:10:02 +00:00
Jakob Stoklund Olesen
b555609e73
Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."
...
This reverts commit 104654.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104660 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 01:21:14 +00:00
Jakob Stoklund Olesen
6a45d681e5
Replace the SubRegSet tablegen class with a less error-prone mechanism.
...
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104654 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 00:28:19 +00:00
Kevin Enderby
cf50a5390c
Changed the encoding of X86 floating point stack operations where both operands
...
are st(0). These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0. To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used. To do this the same logical trick is use from the darwin assembler
in converting things like this:
fmul %st(0), %st
into this:
fmul %st(0)
by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand. This also has the add
benefit to allow things like:
fmul %st(1), %st
that llvm-mc did not assemble.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 20:52:34 +00:00
Jakob Stoklund Olesen
b53985239c
Separate unrelated cases that once shared a numeric value
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104629 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 19:49:40 +00:00
Jakob Stoklund Olesen
4fda9670f0
Remove NumberHack entirely.
...
SubRegIndex instances are now numbered uniquely the same way Register instances
are - in lexicographical order by name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104627 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 19:49:33 +00:00
Daniel Dunbar
39e2dd7bab
MC/X86: Add a hack to allow recognizing 'cmpltps' and friends.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 19:49:32 +00:00
Daniel Dunbar
79373680ed
MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104622 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 18:40:53 +00:00
Kevin Enderby
04ac770be9
The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required
...
for the 64-bit version of the Bit Test instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104621 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 18:16:58 +00:00
Eric Christopher
7e2f5aaa67
Make sure aeskeygenassist uses an unsigned immediate field.
...
Fixes rdar://8017638
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104617 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 17:33:22 +00:00
Jakob Stoklund Olesen
48d0c163fb
Ignore NumberHack and give each SubRegIndex instance a unique enum value instead.
...
This passes lit tests, but I'll give it a go through the buildbots to smoke out
any remaining places that depend on the old SubRegIndex numbering.
Then I'll remove NumberHack entirely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104615 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 17:21:04 +00:00
Jakob Stoklund Olesen
22c0e97c56
Use enums instead of literals for X86 subregisters.
...
The cases in getMatchingSuperRegClass cannot be broken up until the enums have
unique values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104611 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 17:04:16 +00:00
Jakob Stoklund Olesen
33276d95ef
Switch SubRegSet to using symbolic SubRegIndices
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104571 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 23:03:18 +00:00
Jakob Stoklund Olesen
09bc029865
Replace the tablegen RegisterClass field SubRegClassList with an alist-like data
...
structure that represents a mapping without any dependencies on SubRegIndex
numbering.
This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 21:46:58 +00:00
Dan Gohman
e350690e3b
Fix an mmx movd encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104552 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 20:51:08 +00:00
Kevin Enderby
ca956dc0f6
MC/X86: Add aliases for CMOVcc variants.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104549 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 20:32:23 +00:00
Jakob Stoklund Olesen
3458e9e4df
Rename X86 subregister indices to something shorter.
...
Use the tablegen-produced enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104493 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 14:48:17 +00:00
Jakob Stoklund Olesen
73ea7bf450
Add the SubRegIndex TableGen class.
...
This is the beginning of purely symbolic subregister indices, but we need a bit
of jiggling before the explicit numeric indices can be completely removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104492 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 14:48:12 +00:00
Daniel Dunbar
62e4c671b6
MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example:
...
addw $0xFFFF, %ax
should match the same as
addw $-1, %ax
but we used to match it to the longer encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 21:02:33 +00:00
Daniel Dunbar
54ddf3d9c7
tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses instead of just one.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104452 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 21:02:29 +00:00
Daniel Dunbar
4c361972fd
MC/X86: Add alias for setz, setnz, jz, jnz.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 06:37:33 +00:00
Evan Cheng
2457f2c661
Implement @llvm.returnaddress. rdar://8015977.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 01:47:14 +00:00
Kevin Enderby
9d31d79493
Added retl for 32-bit x86 and added retq for 64-bit x86.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 23:01:38 +00:00
Evan Cheng
1015ba7018
- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs
...
that are aliases of the specified register.
- Rename modifiesRegister to definesRegister since it's looking a def of the
specific register or one of its super-registers. It's not looking for def of a
sub-register or alias that could change the specified register.
- Added modifiesRegister to look for defs of aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 20:53:24 +00:00
Dale Johannesen
acbf6348b1
Previous commit message should refer to 104308.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 18:44:47 +00:00
Dale Johannesen
e39859a838
Fix two bugs in 104348:
...
Case where MMX is disabled wasn't handled right.
MMX->MMX bitconverts are Legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104336 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 18:40:15 +00:00
Chris Lattner
a26a8471bd
now that fp reg kill insertion stuff happens as a separate
...
pass after isel instead of being interlaced with it, we can
trust that all the code for a function has been isel'd before
it is run.
The practical impact of this is that we can scan for machine
instr phis instead of doing a fuzzy match on the LLVM BB for
phi nodes. Doing the fuzzy match required knowing when isel
would produce an fp reg stack phi which was gross. It was
also wrong in cases where select got lowered to a branch
tree because cmovs aren't available (PR6828).
Just do the scan on machine phis which is simpler, faster
and more correct. This fixes PR6828.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 18:17:54 +00:00
Chris Lattner
d596c90030
Use less evil form of switch stmt.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104331 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 18:02:42 +00:00
Chris Lattner
d3d9ee1a4d
use continue to reduce nesting.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104330 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 18:01:24 +00:00
Chris Lattner
637e073181
pull a nested loop of this pass out to its own function,
...
eliminating the gymnastics around the ContainsFPCode var.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104328 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 17:57:03 +00:00
Chris Lattner
6f569aabb5
modernize this pass a bit, fit in 80 columns.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104326 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 17:49:07 +00:00
Matt Fleming
d8a33ddcfe
Currently, createMachOStreamer() is invoked directly in llvm-mc which
...
isn't ideal if we want to be able to use another object file format.
Add a createObjectStreamer() factory method so that the correct object
file streamer can be instantiated for a given target triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104318 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 12:54:43 +00:00
Matt Fleming
7efaef6b82
Split out the x86_32 an x86_64 ELF backends as they handle ELF
...
differently. This will make adding ELF support easier in the long run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 11:39:07 +00:00
Dale Johannesen
7d07b48b26
Fix i64->f64 conversion, x86-64, -no-sse. A bit
...
tricky since there's a 3rd 64-bit type, MMX vectors.
PR 7135.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104308 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 00:52:33 +00:00
Daniel Dunbar
4e7f8390c0
MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with movq.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104275 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 20:36:29 +00:00
Daniel Dunbar
1fe591da3e
X86: Model i64i32imm properly, as a subclass of all immediates.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104272 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 20:20:39 +00:00
Daniel Dunbar
0306e3ddbf
X86: Fix immediate type of FOO64i32 operations.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104271 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 20:20:35 +00:00
Dan Gohman
53e184980d
Delete MMX_MOVQ64gmr. It was the same as MMX_MOVQ64mr, but it didn't
...
have a pattern and it had an invalid encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104244 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 18:05:01 +00:00
Dan Gohman
e5e4ff974d
Fix assembly parsing and encoding of the pushf and popf family of
...
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104231 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 16:16:00 +00:00
Dan Gohman
100804f494
Set neverHasSideEffects on 64-bit pushf and popf, for consistency with
...
16-bit and 32-bit pushf and popf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104228 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 15:42:55 +00:00
Dan Gohman
14aaeac5cf
Define the x86 pause instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 01:35:50 +00:00
Dan Gohman
ee5673b622
Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it
...
doesn't have a register operand. Also, use I instead of PSI, for
consistency with mfence and lfence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104203 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 01:23:41 +00:00
Evan Cheng
211ffa1351
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 20:19:50 +00:00
Daniel Dunbar
d94406a940
MC/X86: Add missing entry for TAILJMP_1 to getRelaxedOpcode().
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104122 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 17:20:58 +00:00
Daniel Dunbar
52322e7b8b
MC/X86: Lower TAILCALLd[64] to JMP_1, to allow relaxation and to avoid same
...
prefix byte problem as in r104062.
- As a total hack to keep the TAILCALL markers in the output, which some tests depend on, this invents a new TAILJMP_1 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104120 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 15:26:43 +00:00
Daniel Dunbar
7d4bd203be
MC/X86: Strip spurious operands from TAILJMPr64 as we do for CALL64r and
...
CALL64pcrel32, for the same reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 08:07:12 +00:00
Daniel Dunbar
597f17d5f1
MC/X86: Lower MOV{8,16,32,64}{rm,mr} to fixed-register forms, as appropriate.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104112 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 06:20:44 +00:00
Daniel Dunbar
9248b3208a
MC/X86: Strip spurious operands from CALL64r as we do for CALL64pcrel32, to
...
avoid same prefix byte problem as in r104062.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 04:31:36 +00:00
Dan Gohman
7c2e03916c
Factor out the code for picking integer arithmetic with immediate
...
opcodes into a helper function. This fixes a few places in the code
which were not properly selecting the 8-bit-immediate opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104091 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 00:53:19 +00:00
Dan Gohman
f8c1ef0510
Teach mode load folding and unfolding code about CMP32ri8 and friends.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:54:15 +00:00
Dan Gohman
e5efbafdac
When converting a test to a cmp to fold a load, use the cmp that has an
...
8-bit immediate field rather than one with a wider immediate field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:42:03 +00:00
Chris Lattner
6db0363bdc
make mcinstlower remove all but the first operand to CALL64pcrel32.
...
The register use operands (e.g. the first argument is passed in a
register) is currently being modeled as a normal register use,
instead of correctly being an implicit use. This causes the operand
to get propagated onto the mcinst, which was causing the encoder to
emit a rex prefix byte, which generates an invalid call.
This fixes rdar://7998435
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104062 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:40:18 +00:00
Daniel Dunbar
3f40b31256
MC/X86: Implement custom lowering to make sure we match things like
...
X86::ADC32ri $0, %eax
to
X86::ADC32i32 $0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104030 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 17:22:24 +00:00
Eric Christopher
423c9e3e58
Add some section and constant support for darwin TLS.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 21:02:07 +00:00
Dale Johannesen
f7f5a2760a
Revert 103911; it broke a test that expects bitconvert
...
<1xi64> -> i64 to work in MMX registers on hosts where -no-sse
is the default (not mine). The right thing is
to accept this and make i64->f64 conversions go through memory,
but I don't have time right now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103914 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-16 20:19:04 +00:00
Dale Johannesen
f9b2242927
Make x86-64 64-bit bitconvert work when SSE is not available.
...
(This worked as of about 6 months ago and I didn't track down
exactly what broke it; I think this fix is appropriate.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-16 18:22:38 +00:00
Anton Korobeynikov
ded05e34b6
Add support for thiscall calling convention.
...
Patch by Charles Davis and Steven Watanabe!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-16 09:08:45 +00:00
Dale Johannesen
8d908ebd19
Fix uint64->{float, double} conversion to do rounding correctly in 32-bit.
...
The implementation in LegalizeIntegerTypes to handle this as
sint64->float + appropriate power of 2 is subject to double rounding,
considered incorrect by numerics people. Use this implementation only
when it is safe. This leads to using library calls in some cases
that produced inline code before, but it's correct now.
(EVTToAPFloatSemantics belongs somewhere else, any suggestions?)
Add a correctly rounding (though not particularly fast) conversion
that uses X87 80-bit computations for x86-32.
7885399, 5901940. This shows up in gcc.c-torture/execute/ieee/rbug.c
in the gcc testsuite on some platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103883 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-15 18:51:12 +00:00
Bill Wendling
f84d60b649
Several tail call tests apparently rely upon this being "adjusts stack" instead
...
of "has calls". That's probably wrong, but it needs further
investigation. Revert to the original behavior until this is settled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103824 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 21:58:35 +00:00
Bill Wendling
55ed945bfd
This should happen if there are no calls, not if it just doesn't adjust the
...
stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103813 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 21:38:44 +00:00
Bill Wendling
0fc546b053
Revert r103804. The comment is correct.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103808 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 21:28:24 +00:00
Bill Wendling
d33fa0f9e0
Fix comment.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 21:17:29 +00:00
Bill Wendling
b92187a410
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
...
the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 21:14:32 +00:00
Dan Gohman
71ea4e5b05
Lowering of atomic instructions can result in operands being
...
used more than once. If ISel had put a kill flag on one of them,
it's not valid to transfer the kill flag to each new instance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103799 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 21:01:44 +00:00
Kevin Enderby
c3ce05c594
Fix so "int3" is correctly accepted, added "into" and fixed "int" with an
...
argument, like "int $4", to not get an Assertion error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 19:16:02 +00:00
Dan Gohman
effc8c5269
Set isTerminator on TRAP instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103778 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 16:46:02 +00:00
Dan Gohman
7f357ec6d2
Add mayLoad and mayStore flags to instructions which missed them.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103776 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 16:34:55 +00:00
Oscar Fuentes
ed36aac081
CMake: fixes 64 bit Visual Studio IDE build. Fixes bug 4936.
...
Patch by Dimitry Andric!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103727 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 19:34:06 +00:00
Chris Lattner
b5505d0ee3
reapply r103668 with a fix. Never make "minor syntax changes"
...
after testing before committing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 00:02:47 +00:00
Chris Lattner
3519f9d7d1
revert r103668 for now, it is apparently breaking things.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 23:40:59 +00:00
Chris Lattner
0de8e3f10a
moffset forms of moves are x86-32 only, make the parser
...
lower them to the correct x86-64 instructions since we
don't have a clean way to handle this in td files yet.
rdar://7947184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103668 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 23:13:36 +00:00
Chris Lattner
2745f6e920
fix the encoding of the obscure "moffset" forms of moves, i386
...
part first. rdar://7947184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103660 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 22:48:24 +00:00
Daniel Dunbar
0481449a05
MC/X86: Extend suffix matching hack to match 'q' suffix.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103535 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 00:54:20 +00:00
Daniel Dunbar
a5f1d57f65
MC/Mach-O/x86_64: Add a new hook for checking whether a particular section can
...
be diced into atoms, and adjust getAtom() to take this into account.
- This fixes relocations to symbols in fixed size literal sections, for
example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103532 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 00:38:17 +00:00
Dan Gohman
a6cb641f48
Add initial kill flag support to FastISel.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 23:54:07 +00:00
Duncan Sands
16d8f8bd91
I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it
...
to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 20:16:09 +00:00
Dan Gohman
ff7a562751
Implement a bunch more TargetSelectionDAGInfo infrastructure.
...
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 17:31:57 +00:00
Dan Gohman
419e4f9263
Remove the TargetLowering::getSubtarget() virtual function, which
...
was unused. TargetMachine::getSubtarget() is used instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103474 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 16:21:03 +00:00
Nathan Jeffords
bb59732d18
updated handling dllexport in X86AsmPrinter
...
changed dllexport code to use EmitBytes instead of EmitRawText, and changed the export option to use /EXPORT: instead of -export: on the windows platform
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-09 08:40:06 +00:00
Nathan Jeffords
071de920a0
made COFF target dllexport logic apply to all subtargets
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103373 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-09 05:52:28 +00:00
Chris Lattner
b54b9ddaaf
break coff symbol definition stuff out into proper MCStreamer callbacks,
...
patch by Nathan Jeffords!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103346 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-08 19:54:22 +00:00
Devang Patel
ed66bf5125
Use overloaded operators instead of DIDescriptor::getNode()
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-07 18:19:32 +00:00
Chris Lattner
eb40a0fd98
switch MCSectionCOFF from a syntactic to semantic representation,
...
patch by Peter Housel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103267 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-07 17:17:41 +00:00
Dan Gohman
0d881042c0
When rematerializing, use the debug location of the original
...
instruction, rather than a location near where the new instruction
is being inserted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103232 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-07 01:28:10 +00:00
Daniel Dunbar
c26ae5ab7e
MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand.
...
- This fixes "leal 0, %eax", for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 22:39:14 +00:00
Chris Lattner
e1611f26e3
fix rdar://7947167 - llvm-mc doesn't match movsq
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 21:48:14 +00:00
Sean Callanan
1a8b789a4b
Eliminated the classification of control registers into %ecr_
...
and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 20:59:00 +00:00
Daniel Dunbar
a5d0b54ec1
MC/X86: Error out if we see a non-constant FK_Data_1 or FK_Data_2 fixup, since
...
we don't currently support relaxing them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 20:34:01 +00:00
Dan Gohman
34dcc6fadc
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
...
doesn't have to guess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 20:33:48 +00:00
Evan Cheng
746ad69e08
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 19:06:44 +00:00
Evan Cheng
b63387afc6
Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103172 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 06:36:08 +00:00
Eric Christopher
f865cb5c1f
Revert r103156 since it was breaking the build bots.
...
Reverse-merging r103156 into '.':
U lib/Target/ARM/ARMInstrNEON.td
U lib/Target/ARM/ARMRegisterInfo.h
U lib/Target/ARM/ARMBaseRegisterInfo.cpp
U lib/Target/ARM/ARMBaseInstrInfo.cpp
U lib/Target/ARM/ARMRegisterInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103159 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 02:29:06 +00:00
Sean Callanan
be192dd1e9
Fixed a sign-extension bug in the X86 disassembler
...
that was causing PC-relative branch targets to be
evaluated incorrectly. Also added support for
checking operand values to the llvm-mc tester.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103128 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 22:47:27 +00:00
Evan Cheng
d2c2d1809f
Trim include.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103103 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 18:27:57 +00:00
Eric Christopher
f4f06906b8
Revert 102941, we're going to do this via attr and can just
...
hack the code to turn it off when debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 07:35:59 +00:00
Eric Christopher
d2760d1cba
Update comment.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103057 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 22:13:03 +00:00
Daniel Dunbar
e9f0fb4179
MC/X86: Chris pointed that 'as' isn't consistent in accepting the long form of
...
instructions which have no direct register usage.
Darwin 'as' accepts:
add $0, (%rax)
but rejects
mov $0, (%rax)
for example.
Given that, only accept suffix matches which match exactly one form. We still
need to emit nice diagnostics for failures...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 17:31:02 +00:00
Daniel Dunbar
c918d6043b
MC/X86: Add "support" for matching ATT style mnemonic prefixes.
...
- The idea is that when a match fails, we just try to match each of +'b', +'w',
+'l'. If exactly one matches, we assume this is a mnemonic prefix and accept
it. If all match, we assume it is width generic, and take the 'l' form.
- This would be a horrible hack, if it weren't so simple. Therefore it is an
elegant solution! Chris gets the credit for this particular elegant
solution. :)
- Next step to making this more robust is to have the X86 matcher generate the
mnemonic prefix information. Ideally we would also compute up-front exactly
which mnemonic to attempt to match, but this may require more custom code in
the matcher than is really worth it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103012 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 16:12:42 +00:00
Kevin Enderby
a0161cd6f8
Fix to r102952. The MOV64toSDrm record in X86Instr64bit.td needed the opcode
...
changed to 0x7E from 0x6E as well as the previous change of RPDI to S3SI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 00:42:46 +00:00
Kevin Enderby
9d0838fba8
Changed llvm-mc to use the same suffixes with floating point compare
...
instructions as the Mac OS X darwin assembler. Some of which like 'fcoml'
assembled to different opcodes. While some of the suffixes were just different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102958 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 21:31:40 +00:00
Kevin Enderby
eb612347f4
Fixed the encoding of two of the X86 movq instuctions. The Move quadword from
...
mm to mm/m64 and the Move quadword from xmm2/mem64 to xmm1 had the incorrect
encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 21:03:31 +00:00
Kevin Enderby
3c979b06c0
Fixed the encoding of the x86 push instructions. Using a 32-bit immediate value
...
caused the a pushl instruction to be incorrectly encoding using only two bytes
of immediate, causing the following 2 instruction bytes to be part of the 32-bit
immediate value. Also fixed the one byte form of push to be used when the
immediate would fit in a signed extended byte. Lastly changed the names to not
include the 32 of PUSH32 since they actually push the size of the stack pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 20:45:05 +00:00
Eric Christopher
0b12348ddf
Add an option, defaulting to off, to disable the sse domain crossing opts.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102941 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 19:54:02 +00:00
Dan Gohman
af1d8ca44a
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
...
changes before doing phi lowering for switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01 00:01:06 +00:00
Dan Gohman
3335a22a37
Make this code less confusing. Instead of reassigning BB, just operate
...
on the original variables, so it's easier to see what is being done
to which blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102759 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-30 20:14:26 +00:00
Dan Gohman
71edb241a1
Remove the -disable-16bit command-line option, which is now obsolete.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102730 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-30 18:30:26 +00:00
Evan Cheng
1361796dd0
Another sibcall bug. If caller and callee calling conventions differ, then it's only safe to do a tail call if the results are returned in the same way.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102683 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-30 01:12:32 +00:00
Dan Gohman
ffce6f1343
Don't leave Base.FrameIndex uninitialized, so that it doesn't
...
print randomly in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102668 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-29 23:30:41 +00:00
Devang Patel
67a444ca36
Print variable scope name in DEBUG_VALUE comment. Useful in some cases. e.g.
...
##DEBUG_VALUE: runOnMachineFunction:this <- RDI+0
##DEBUG_VALUE: runOnMachineFunction:fn <- RSI+0
##DEBUG_VALUE: DeadDefs <- undef ## SimpleRegisterCoalescing.cpp:2706
##DEBUG_VALUE: getRegInfo:this <- [%rsp+$56]+$0
##DEBUG_VALUE: getTarget:this <- [%rsp+$56]+$0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-29 18:52:10 +00:00
Evan Cheng
3f54c64a98
Load folding tail call should not use ebp / rbp after it's popped. PEI
...
should use esp / rsp to reference frame instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-29 05:08:22 +00:00
Evan Cheng
8601a3d4de
Frame index can be negative.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102577 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-29 01:13:30 +00:00
Kevin Enderby
9ac7282117
Fixed the word sized Bit Scan Forward/Reverse instructions, they needed the
...
Operand size override prefix to be part of their records.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 23:20:40 +00:00
Jakob Stoklund Olesen
7261fb2a6f
Teach X86FloatingPoint that a register can be killed multiple times by the same
...
instruction.
This instruction would crash the pass:
INLINEASM <es:foo $0 $1>, 9, %FP0<kill>, 9, %FP0<kill>, 14, %EFLAGS<earlyclobber,def,dead>
Now it doesn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 18:28:37 +00:00
Evan Cheng
2bce5f4b56
Enable i16 to i32 promotion by default.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102493 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 08:30:49 +00:00
Evan Cheng
39cfeecae5
Unbreak the build. Only form shld / shrd after legalization.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102488 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 02:25:18 +00:00
Devang Patel
28ff35d030
Emit debug info for byval parameters.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102486 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 01:39:28 +00:00
Evan Cheng
8b1190a540
Rather than having a ton of patterns for double shift instructions, e.g. SHLD16rrCL, just perform custom dag combine to form x86 specific dag so they match to the same pattern. This also makes sure later dag combine do not cause isel to miss them (e.g. promoting i16 to i32).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102485 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 01:18:01 +00:00
Stuart Hastings
5a6a65be46
Tweak x86 INC/DEC generation to look for CopyToReg or SETCC. Radar 7866163.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102477 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 00:35:10 +00:00
Evan Cheng
1c45acf510
Fix obvious typos.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102467 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-27 21:46:03 +00:00
Evan Cheng
b3716e3e28
SRA promotion is also not free.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102456 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-27 19:48:31 +00:00
Chris Lattner
ee9eb411ff
on darwin empty functions need to codegen into something of non-zero length,
...
otherwise labels get incorrectly merged. We handled this by emitting a
".byte 0", but this isn't correct on thumb/arm targets where the text segment
needs to be a multiple of 2/4 bytes. Handle this by emitting a noop. This
is more gross than it should be because arm/ppc are not fully mc'ized yet.
This fixes rdar://7908505
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102400 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 23:37:21 +00:00
Evan Cheng
552f09a0d7
Promoting 16-bit cmp / test aren't free. Don't do it.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102366 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 19:06:11 +00:00
Evan Cheng
fc4d530ad6
Remove a redundant comment.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102326 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 08:16:57 +00:00
Evan Cheng
962021bc7f
- Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
...
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 07:38:55 +00:00
Dale Johannesen
f822e733af
Stop abusing EmitInstrWithCustomInserter for target-dependent
...
form of DEBUG_VALUE, as it doesn't have reasonable default
behavior for unsupported targets. Add a new hook instead.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102320 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-25 21:33:54 +00:00
Evan Cheng
c82c20b315
Avoid promoting a i16 node if it would eliminate a (store (op (load))) opportunity.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102237 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-24 04:44:57 +00:00
Stuart Hastings
e3ff9ba40c
Add some missing x86 patterns for movdq2q. Fixes two (LLVM-)GCC DejaGNU testcases. Radar 6881029.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-23 19:03:32 +00:00
Evan Cheng
2808ccb775
Fix X86ISD::CMP i16 to i32 promotion.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102192 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-23 18:21:16 +00:00
Dan Gohman
f81eca0ab9
Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
...
and into SelectionDAGBuilder and FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102123 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-22 20:46:50 +00:00
Evan Cheng
07c4e1085d
- It's not safe to promote rotates (at least not trivially).
...
- Some code refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102111 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-22 20:19:46 +00:00
Evan Cheng
e566763b19
Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
...
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 03:18:23 +00:00
Evan Cheng
5528e7bcb1
isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 01:47:12 +00:00
Evan Cheng
fe5dcbc27d
Trim include.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 01:39:06 +00:00
Bill Wendling
a040fffefb
Handle a displacement location in 64-bit as an RIP-relative displacement. It
...
fixes a bug (<rdar://problem/7880900>) in the JIT. This code wouldn't work:
target triple = "x86_64-apple-darwin"
define double @func(double %a) {
%tmp1 = fmul double %a, 5.000000e-01 ; <double> [#uses=1]
ret double %tmp1
}
define i32 @main() nounwind {
%1 = call double @func(double 4.770000e-04) ; <i64> [#uses=0]
ret i32 0
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101965 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 00:34:04 +00:00
Chris Lattner
d6139425f5
teach the x86 address matching stuff to handle
...
(shl (or x,c), 3) the same as (shl (add x, c), 3)
when x doesn't have any bits from c set.
This finishes off PR1135. Before we compiled the block to:
to:
LBB0_3: ## %bb
cmpb $4, %dl
sete %dl
addb %dl, %cl
movb %cl, %dl
shlb $2, %dl
addb %r8b, %dl
shlb $2, %dl
movzbl %dl, %edx
movl %esi, (%rdi,%rdx,4)
leaq 2(%rdx), %r9
movl %esi, (%rdi,%r9,4)
leaq 1(%rdx), %r9
movl %esi, (%rdi,%r9,4)
addq $3, %rdx
movl %esi, (%rdi,%rdx,4)
incb %r8b
decb %al
movb %r8b, %dl
jne LBB0_1
Now we produce:
LBB0_3: ## %bb
cmpb $4, %dl
sete %dl
addb %dl, %cl
movb %cl, %dl
shlb $2, %dl
addb %r8b, %dl
shlb $2, %dl
movzbl %dl, %edx
movl %esi, (%rdi,%rdx,4)
movl %esi, 8(%rdi,%rdx,4)
movl %esi, 4(%rdi,%rdx,4)
movl %esi, 12(%rdi,%rdx,4)
incb %r8b
decb %al
movb %r8b, %dl
jne LBB0_1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101958 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 23:18:40 +00:00
Dale Johannesen
7609017dc3
Because of the EMMS problem, right now we have to support
...
user-defined operations that use MMX register types, but
the compiler shouldn't generate them on its own. This adds
a Synthesizable abstraction to represent this, and changes
the vector widening computation so it won't produce MMX types.
(The motivation is to remove noise from the ABI compatibility
part of the gcc test suite, which has some breakage right now.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 22:34:09 +00:00
Chris Lattner
d7aba875c1
disable optimizations in this directory for MSVC9. This avoids
...
an optimizer infinite loop on the file, PR6866.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 01:11:32 +00:00
Eric Christopher
6d972fd087
Remove the palignr intrinsics now that we lower them to vector shuffles,
...
shifts and null vectors. Autoupgrade these to what we'd lower them to.
Add a testcase to exercise this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 00:59:54 +00:00
Evan Cheng
4c26e93e89
More progress on promoting i16 operations to i32 for x86. Work in progress.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101808 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19 19:29:22 +00:00
Chris Lattner
eef6d78be1
teach the x86 asm parser how to handle segment prefixes
...
in memory operands. rdar://7874844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101661 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 18:56:34 +00:00
Chris Lattner
89f94926b0
remove a dead variable, PR6856
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101648 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 17:28:00 +00:00
Dan Gohman
0d805c33d1
Add const qualifiers to TargetLoweringObjectFile usage.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 16:44:48 +00:00
Dan Gohman
82d5eaf23e
Use const_cast instead of a C-style cast to cast away const.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101639 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 16:43:55 +00:00
Dan Gohman
d858e90f03
Use const qualifiers with TargetLowering. This eliminates several
...
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 15:26:15 +00:00
Dan Gohman
1e93df6f0b
Move per-function state out of TargetLowering subclasses and into
...
MachineFunctionInfo subclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 14:41:14 +00:00
Chris Lattner
65de1b9eb3
a bunch of ssse3 instructions are misencoded to think they have an
...
i8 field when they really do not. This fixes rdar://7840289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101629 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 07:38:24 +00:00
Evan Cheng
e5b51ac770
More work to allow dag combiner to promote 16-bit ops to 32-bit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101621 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 06:13:15 +00:00
Eric Christopher
551754c495
Revert 101465, it broke internal OpenGL testing.
...
Probably the best way to know that all getOperand() calls have been handled
is to replace that API instead of updating.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101579 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 23:37:20 +00:00
Dan Gohman
53c5e42ab9
Add skeleton target-specific SelectionDAGInfo files.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 23:04:22 +00:00
Chris Lattner
aef1fea3d3
add a missing break back, patch by Nico Schmidt!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101538 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 21:15:15 +00:00
Dan Gohman
37f32ee7ff
Eliminate an unnecessary SelectionDAG dependency in getOptimalMemOpType.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 20:11:05 +00:00
Gabor Greif
4ec2258ffb
reapply r101434
...
with a fix for self-hosting
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101465 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 15:33:14 +00:00
Evan Cheng
64b7bf71e8
Adding support for dag combiner to promote operations for profit. This requires target specific queries. For example, x86 should promote i16 to i32 when it does not impact load folding.
...
x86 support is off by default. It can be enabled with -promote-16bit.
Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 06:14:10 +00:00
Gabor Greif
607a7ab3da
back out r101423 and r101397, they break llvm-gcc self-host on darwin10
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101434 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 01:16:20 +00:00
Gabor Greif
2ff961f668
reapply r101364, which has been backed out in r101368
...
with a fix
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101397 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 20:51:13 +00:00
Gabor Greif
9ee1720811
back out r101364, as it trips the linux nightlybot on some clang C++ tests
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101368 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 12:46:56 +00:00
Gabor Greif
165dac08d1
rotate CallInst operands, i.e. move callee to the back
...
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 10:49:53 +00:00
Dan Gohman
46510a73e9
Add const qualifiers to CodeGen's use of LLVM IR constructs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 01:51:59 +00:00
Eric Christopher
cff6f85454
Allow lowering for palignr instructions for mmx sized vectors. Add
...
patterns to handle the lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101331 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 01:40:20 +00:00
Dan Gohman
6465265ae1
Delete unneeeded arguments.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 20:17:22 +00:00
Dan Gohman
2520864773
Factor out EH landing pad code into a separate function, and constify
...
a bunch of stuff to support it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101273 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 19:53:31 +00:00
Douglas Gregor
533ae9b71d
Unbreak CMake build by improving the EnhancedDisassembly makefile a
...
bit (we're not trying to build a shared library yet) and generating
the X86GenEDInfo.inc and ARMGenEDInfo.inc files as necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101188 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 22:47:43 +00:00
Sean Callanan
9899f70a74
Fixed a nasty layering violation in the edis source
...
code. It used to #include the enhanced disassembly
information for the targets it supported straight
out of lib/Target/{X86,ARM,...} but now it uses a
new interface provided by MCDisassembler, and (so
far) implemented by X86 and ARM.
Also removed hacky #define-controlled initialization
of targets in edis. If clients only want edis to
initialize a limited set of targets, they can set
--enable-targets on the configure command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101179 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 21:21:57 +00:00
Evan Cheng
fc5a03e469
Re-apply 101075 and fix it properly. Just reuse the debug info of the branch instruction being optimized. There is no need to --I which can deref off start of the BB.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101162 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 18:50:27 +00:00
Eric Christopher
97e6992e3e
Temporarily revert r101075, it's causing invalid iterator assertions
...
in a nightly tester.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 18:37:58 +00:00
Dan Gohman
81bf03eb5c
Eliminate MachineBasicBlock::const_livein_iterator and make
...
MachineBasicBlock::livein_iterator a const_iterator, because
clients shouldn't ever be using the iterator interface to
mutate the livein set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 16:57:55 +00:00
Evan Cheng
82865a10f8
Use .set expression for x86 pic jump table reference to reduce assembly relocation. rdar://7738756
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101085 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-12 23:07:17 +00:00
Bill Wendling
2aae6ae572
Micro-optimization:
...
If we have this situation:
jCC L1
jmp L2
L1:
...
L2:
...
We can get a small performance boost by emitting this instead:
jnCC L2
L1:
...
L2:
...
This testcase shows an example of this:
float func(float x, float y) {
double product = (double)x * y;
if (product == 0.0)
return product;
return product - 1.0;
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101075 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-12 22:19:57 +00:00
Chris Lattner
74aae4726a
move elf section uniquing to MCContext. Along the way
...
merge XCore's section into MCSectionELF
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100812 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 21:26:26 +00:00
Chris Lattner
22772214de
remove the TargetLoweringObjectFileMachO::getMachoSection
...
api and update clients to use MCContext instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100808 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 20:40:11 +00:00
Evan Cheng
c3b0c341e7
Avoid using f64 to lower memcpy from constant string. It's cheaper to use i32 store of immediates.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100751 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 07:37:57 +00:00
Eric Christopher
419e223f5d
mpsadbw is not commutative.
...
Fixes PR3440.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100736 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 00:52:02 +00:00
Chris Lattner
75361b69f3
rename llvm::llvm_report_error -> llvm::report_fatal_error
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 22:58:41 +00:00
Sean Callanan
5edca81626
Fixed a bug where the disassembler would allow an immediate
...
argument that had to be between 0 and 7 to have any value,
firing an assert later in the AsmPrinter. Now, the
disassembler rejects instructions with out-of-range values
for that immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100694 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 21:42:19 +00:00
Dale Johannesen
375be7730a
Educate GetInstrSizeInBytes implementations that
...
DBG_VALUE does not generate code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 19:51:44 +00:00
John McCall
b1fb4497b0
Clean up some signedness oddities in this code noticed by clang.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 01:49:15 +00:00
Dale Johannesen
343b42e428
Move printing of target-indepedent DEBUG_VALUE comments
...
into AsmPrinter. Target-dependent form is still generated
by FastISel and still handled in X86 code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 01:15:14 +00:00
John McCall
795ee9dd1e
Fix a number of clang -Wsign-compare warnings that didn't have an obvious
...
solution. The only reason these don't fire with gcc-4.2 is that gcc turns off
part of -Wsign-compare in C++ on accident.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100581 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-06 23:35:53 +00:00
Dale Johannesen
49d915bb9a
Revert 100573, it's causing some testsuite problems.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100578 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-06 22:45:26 +00:00
Dale Johannesen
0a580d30e0
Move printing of DEBUG_VALUE comments to target-independent place.
...
There is probably a more elegant way to do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100573 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-06 22:21:07 +00:00
Jim Grosbach
fa85eb6237
Fix PR6696 and PR6663
...
When a frame pointer is not otherwise required, and dynamic stack alignment
is necessary solely due to the spilling of a register with larger alignment
requirements than the default stack alignment, the frame pointer can be both
used as a general purpose register and a frame pointer. That goes poorly, for
obvious reasons. This patch brings back a bit of old logic for identifying
the use of such registers and conservatively reserves the frame pointer
during register allocation in such cases.
For now, implement for X86 only since it's 32-bit linux which is hitting this,
and we want a targeted fix for 2.7. As a follow-on, this will be expanded
to handle other targets, as theoretically the problem could arise elsewhere
as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100559 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-06 20:26:37 +00:00
Jakob Stoklund Olesen
8ba1c6ab87
Don't try to collapse DomainValues onto an incompatible SSE domain.
...
This fixes the Bullet regression on i386/nocona.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100553 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-06 19:48:56 +00:00
Jakob Stoklund Olesen
fc8e1c3635
Properly enable load clustering.
...
Operand 2 on a load instruction does not have to be a RegisterSDNode for this to
work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100497 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 23:48:02 +00:00
Evan Cheng
18ac410f4f
Fix ADD32rr_alt instruction encoding bug. Patch by Marius Wachtler.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100480 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 22:21:09 +00:00
Eric Christopher
b6290a170f
Remove FIXME.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 21:14:32 +00:00
Chris Lattner
ed3a8067a6
unthread MMI from FastISel
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100416 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 06:05:26 +00:00
Chris Lattner
a267b0076e
remove the MMI pointer from MachineFrameInfo.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100415 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 05:57:52 +00:00
Jakob Stoklund Olesen
fddb7667ca
Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.
...
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.
This works well because TableGen resolves member references late:
class I : Instruction {
AddrMode AM = AddrModeNone;
let TSFlags{3-0} = AM.Value;
}
let AM = AddrMode4 in
def ADD : I;
TSFlags gets the expected bits from AddrMode4 in this example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 03:10:20 +00:00
Chris Lattner
d850ac79b5
fastisel doesn't need DwarfWriter, remove some tendricles.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100381 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 02:19:28 +00:00
Chris Lattner
90429c487f
just have all targets create the DwarfWriter.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 00:42:55 +00:00
Chris Lattner
8e680482c1
simplify various getAnalysisUsage implementations.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 00:38:44 +00:00
Chris Lattner
3d22513611
eliminate the magic AbsoluteDebugSectionOffsets MAI hook,
...
which is really a property of the section being referenced.
Add a predicate to MCSection to replace it.
Yay for reduction in magic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100367 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 23:22:29 +00:00
Jakob Stoklund Olesen
e0103f03f0
Clean up SSEDomainFix pass.
...
Restrict bit mask operations to the DomainValue class. Rename methods for
clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 21:27:26 +00:00
Chris Lattner
3f53c8398d
clean up the asmprinter header and privatize some stuff.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 18:52:31 +00:00
Jakob Stoklund Olesen
bbef815a3b
Switch SSEDomainFix to SpecificBumpPtrAllocator.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100332 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 18:00:21 +00:00
Chris Lattner
b23569aff0
Momentous day: remove the "O" member from AsmPrinter. Now all
...
"asm printering" happens through MCStreamer. This also
Streamerizes PIC16 debug info, which escaped my attention.
This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100327 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 08:18:47 +00:00
Chris Lattner
1ce3f565ef
streamerize printing of dbg_value, the x86 backend is now fully
...
streamerized for everything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100316 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:40:34 +00:00
Chris Lattner
bfbab35653
split DEBUG_VALUE printing stuff out to its own method.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100315 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:38:19 +00:00
Chris Lattner
c82d9c4e5c
mc'ize elf stub printing, convert cygwin stuff to EmitRawText,
...
which will abort in .o file writing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100314 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:35:04 +00:00
Chris Lattner
c75c028a15
fix PrintAsmOperand and PrintAsmMemoryOperand to pass down
...
raw_ostream to print to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:29:35 +00:00
Chris Lattner
e812d4c604
use predicates in DBG_VALUE printing code to simplify it.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:21:31 +00:00
Chris Lattner
88db786712
remove more implicit uses of "O".
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100311 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:19:20 +00:00
Chris Lattner
d374087be5
fix an ugly wart in the MCInstPrinter api where the
...
raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:04:31 +00:00
Chris Lattner
35c33bd772
change a ton of code to not implicitly use the "O" raw_ostream
...
member of AsmPrinter. Instead, pass it in explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 04:47:45 +00:00
Mon P Wang
20adc9dc46
Reapply address space patch after fixing an issue in MemCopyOptimizer.
...
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100304 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 03:10:48 +00:00
Chris Lattner
0c08d09204
asmstreamerize the .size directive for function bodies, force clients
...
of printOffset to pass in a stream to print to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100296 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-03 22:28:33 +00:00
Eric Christopher
b3500fd2f3
Rewrite aesimc handling. It only takes a single input and has a single
...
dest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100252 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 23:48:33 +00:00
Eric Christopher
6d1cd1cd04
Separate out the AES-NI instructions from the SSE4.2 instructions. Add
...
a new subtarget option for AES and check for the support. Add "westmere"
line of processors and add AES-NI support to the core i7.
Add a couple of TODOs for information I couldn't verify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100231 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 21:54:27 +00:00
Sean Callanan
a144c3f34d
Fixes to the X86 disassembler. The disassembler will now
...
return an error status in all failure cases, printing
messages to debugs() only when debugging is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100229 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 21:23:51 +00:00
Chris Lattner
c7f3ace20c
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100214 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 20:16:16 +00:00
Evan Cheng
f28f8bc40e
Correctly lower memset / memcpy of undef. It should be a nop. PR6767.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100208 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 19:36:14 +00:00
Mon P Wang
e754d3fb85
Revert r100191 since it breaks objc in clang
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 18:43:02 +00:00
Mon P Wang
e33c848fa4
Reapply address space patch after fixing an issue in MemCopyOptimizer.
...
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 18:04:15 +00:00
Eric Christopher
906af6f518
Remove FIXME - if there's a better way to do this it isn't here.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 04:32:37 +00:00
Dale Johannesen
93d6a7e9c2
Teach AnalyzeBranch, RemoveBranch and the branch
...
folder to be tolerant of debug info following the
branch(es) at the end of a block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 01:38:09 +00:00
Chandler Carruth
ae1d41c8ae
Disambiguate conditional expression for newer GCCs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 01:31:24 +00:00
Eric Christopher
1d8f83d0a0
Revert r100143.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100146 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-01 22:54:42 +00:00
Evan Cheng
3ea97550e3
In 64-bit mode, use i64 to lower memcpy / memset instead of f64.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-01 20:27:45 +00:00
Evan Cheng
42642d06c9
Add comments about DstAlign and SrcAlign.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100132 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-01 20:10:42 +00:00
Evan Cheng
94107ba9ce
- Avoid using floating point stores to implement memset unless the value is zero.
...
- Do not try to infer GV alignment unless its type is sized. It's not possible to infer alignment if it has opaque type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100118 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-01 18:19:11 +00:00
Evan Cheng
255f20f7f7
Fix sdisel memcpy, memset, memmove lowering:
...
1. Makes it possible to lower with floating point loads and stores.
2. Avoid unaligned loads / stores unless it's fast.
3. Fix some memcpy lowering logic bug related to when to optimize a
load from constant string into a constant.
4. Adjust x86 memcpy lowering threshold to make it more sane.
5. Fix x86 target hook so it uses vector and floating point memory
ops more effectively.
rdar://7774704
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100090 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-01 06:04:33 +00:00
Evan Cheng
48c58bb861
Nehalem unaligned memory access is fast.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100089 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-01 05:58:17 +00:00
Eric Christopher
ec306a9771
Add aeskeygenassist intrinsic and rename all of the aes intrinsics to
...
aes instead of sse4.2. Add a brief todo for a subtarget flag and rework
the aeskeygenassist instruction to more closely match the docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-01 03:05:45 +00:00
Chris Lattner
563d83ff53
reduce indentation, minor cleanups.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100042 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-31 20:32:51 +00:00
Jakob Stoklund Olesen
85ffee2c78
Use spaces, not tabs
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-31 20:05:12 +00:00
Bill Wendling
d93bf04a07
Comment the changes for r98218 and friends inside the source code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100033 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-31 18:48:58 +00:00
Jakob Stoklund Olesen
5f282b5dfd
Fix PR6750. Don't try to merge a DomainValue with itself.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100016 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-31 17:13:16 +00:00