Arnold Schwaighofer
448175fd02
Correction to tail call optimization code. The new return address
...
was stored to the acutal stack slot before the parameters were
lowered to their stack slot. This could cause arguments to be
overwritten by the return address if the called function had less
parameters than the caller function. The update should remove the
last failing test case of llc-beta: SPASS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43027 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-16 09:05:00 +00:00
Evan Cheng
87c8935fd5
LowerFP_TO_SINT must not create a stack object if it's not needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43004 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 20:11:21 +00:00
Evan Cheng
3644601563
Unbreak x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 10:09:39 +00:00
Arnold Schwaighofer
92226dd19f
Correcting the corrections. Bad bad baaad emacs!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42935 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:53:12 +00:00
Arnold Schwaighofer
48abc5cf6b
Corrected many typing errors. And removed 'nest' parameter handling
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for fastcc from X86CallingConv.td. This means that nested functions
are not supported for calling convention 'fastcc'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:30:57 +00:00
Duncan Sands
2e4d675d93
Due to the new tail call optimization, trampolines can no
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longer be created for fastcc functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42925 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 19:37:31 +00:00
Dan Gohman
f0d0089340
Mark vector ctpop, cttz, and ctlz as Expand on x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42905 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:09:42 +00:00
Dan Gohman
f96e4de403
Set ISD::FPOW to Expand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:21:31 +00:00
Arnold Schwaighofer
c85e1716f0
Added tail call optimization to the x86 back end. It can be
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enabled by passing -tailcallopt to llc. The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
elf/pic enabled + callee is in module + callee has
visibility protected or hidden
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 19:40:01 +00:00
Evan Cheng
3f41d66d75
Bug fix. X86 was emitting redundant setcc and test instructions before a conditional move.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42774 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 22:16:29 +00:00
Dan Gohman
525178cdbf
Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
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use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 18:33:35 +00:00
Evan Cheng
afa98bcf3d
Not needed any more.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42623 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:34:14 +00:00
Evan Cheng
e5f6204cd5
Enabling new condition code modeling scheme.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42459 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-29 00:00:36 +00:00
Rafael Espindola
068317bfa3
Refactor the memcpy lowering for the x86 target.
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The only generated code difference is that now we call memcpy when
the size of the array is unknown. This matches GCC behavior and is
better since the run time value can be arbitrarily large.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42433 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 12:53:01 +00:00
Dale Johannesen
2f42901dff
Enable codegen for long double abs, sin, cos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42368 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 21:10:55 +00:00
Evan Cheng
1a35edba13
translateX86CC updates the last two operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42333 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 00:45:55 +00:00
Dan Gohman
a37c9f7506
When both x/y and x%y are needed (x and y both scalar integer), compute
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both results with a single div or idiv instruction. This uses new X86ISD
nodes for DIV and IDIV which are introduced during the legalize phase
so that the SelectionDAG's CSE can automatically eliminate redundant
computations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42308 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 18:23:27 +00:00
Dan Gohman
c3b0b5ca1d
Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and
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the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42297 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 15:10:49 +00:00
Evan Cheng
0488db9b99
Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
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all the kinks are worked out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 01:57:46 +00:00
Dan Gohman
a5a403d766
Add support on x86 for having Legalize lower ISD::LOCATION to ISD::DEBUG_LOC
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instead of ISD::LABEL with a manual .debug_line entry when the assembler
supports .file and .loc directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42278 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 21:54:14 +00:00
Chris Lattner
9b4baf1692
claim that "st" is from the 80-bit register file. This causes x87-using inline
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asm to die with:
ScheduleDAG.cpp:269: failed assertion `false && "Couldn't find the register class"'
instead of:
failed assertion `RegMap->getRegClass(VReg) == RC && "Register class of operand and regclass of use don't agree!"'
yay.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42259 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 05:27:37 +00:00
Dale Johannesen
f1fc3a8fa6
Fix PR 1681. When X86 target uses +sse -sse2,
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keep f32 in SSE registers and f64 in x87. This
is effectively a new codegen mode.
Change addLegalFPImmediate to permit float and
double variants to do different things.
Adjust callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42246 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-23 14:52:20 +00:00
Rafael Espindola
a37ac9ff53
Don't add a default STACK_ALIGN (use the generic ABI alignment)
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Implement calls to functions with byval arguments on X86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42192 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 15:50:22 +00:00
Rafael Espindola
1242d28093
small cleanup: use LowerMemArgument in LowerFastCCArguments also
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42189 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 14:55:38 +00:00
Dale Johannesen
73328d14ac
More long double fixes. x86_64 should build now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42155 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 23:55:34 +00:00
Dan Gohman
5f6913cecd
Emit integer x<1 as x<=0, as comparisons with zero (now includeing
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64-bit) can use test instead of cmp with an immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42026 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 14:49:27 +00:00
Dale Johannesen
9e3d3abd93
Remove the assumption that FP's are either float or
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double from some of the many places in the optimizers
it appears, and do something reasonable with x86
long double.
Make APInt::dump() public, remove newline, use it to
dump ConstantSDNode's.
Allow APFloats in FoldingSet.
Expand X86 backend handling of long doubles (conversions
to/from int, mostly).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41967 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 22:26:36 +00:00
Rafael Espindola
7effac5475
Add support for functions with byval arguments on x86
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41953 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 15:48:13 +00:00
Dale Johannesen
3f6eb7419d
Add APInt interfaces to APFloat (allows directly
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access to bits). Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling
(untested, probably does not work).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41858 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 18:32:33 +00:00
Duncan Sands
f7331b3dd7
Fold the adjust_trampoline intrinsic into
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init_trampoline. There is now only one
trampoline intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 14:10:23 +00:00
Dale Johannesen
43421b3dd7
Next round of APFloat changes.
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Use APFloat in UpgradeParser and AsmParser.
Change all references to ConstantFP to use the
APFloat interface rather than double. Remove
the ConstantFP double interfaces.
Use APFloat functions for constant folding arithmetic
and comparisons.
(There are still way too many places APFloat is
just a wrapper around host float/double, but we're
getting there.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41747 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-06 18:13:44 +00:00
Anton Korobeynikov
3825262399
Reapply r41578 with proper fix
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41680 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-03 00:36:06 +00:00
Rafael Espindola
1b5dcc34b7
Initial support for calling functions with byval arguments on x86-64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41643 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-31 15:06:30 +00:00
Dale Johannesen
eaf089430e
Enhance APFloat to retain bits of NaNs (fixes oggenc).
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Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41632 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-31 04:03:46 +00:00
Dale Johannesen
f04afdbb48
Change LegalFPImmediates to use APFloat.
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Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41587 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 00:23:21 +00:00
Duncan Sands
ee46574931
Move getX86RegNum into X86RegisterInfo and use it
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in the trampoline lowering. Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41577 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-29 19:01:20 +00:00
Rafael Espindola
44c8265cf8
Add a comment about using libc memset/memcpy or generating inline code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41502 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-27 17:48:26 +00:00
Rafael Espindola
6b83b5d1ae
call libc memcpy/memset if array size is bigger then threshold.
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Coping 100MB array (after a warmup) shows that glibc 2.6.1 implementation on
x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41479 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-27 10:18:20 +00:00
Chris Lattner
48884cd80b
rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
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changing the interface to allow for future changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-25 00:47:38 +00:00
Rafael Espindola
21485be444
Partial implementation of calling functions with byval arguments:
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*) The needed information is propagated to the DAG
*) The X86-64 backend detects it and aborts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41179 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-20 15:18:24 +00:00
Anton Korobeynikov
a2780e11ef
Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixed
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hard to catch bugs with retaddr lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41104 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-15 17:12:32 +00:00
Evan Cheng
12914380ed
Fix a typo pointd out by Maarten ter Huurne.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41059 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-13 23:27:11 +00:00
Christopher Lamb
c59e52108b
Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41010 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 21:48:46 +00:00
Rafael Espindola
594d37e21a
propagate struct size and alignment of byval arguments to the DAG
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40986 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 14:44:42 +00:00
Dale Johannesen
5411a3937f
long double 9 of N. This finishes up the X86-32 bits
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(constants are still not handled). Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09 01:04:01 +00:00
Dale Johannesen
a996d52e37
Long double patch 7 of N, unless I lost count:).
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Last x87 bits for full functionality (not
thoroughly tested, and long doubles do not work
in SSE modes at all - use -mcpu=i486 for now)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40886 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07 01:17:37 +00:00
Dale Johannesen
59a587337e
Long double patch 4 of N: initial x87 implementation.
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Lots of problems yet but some simple things work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40847 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-05 18:49:15 +00:00
Dan Gohman
7f55fcbc6b
Fix the alignment requirements of several unpck and shuf instructions.
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Generalize isPSHUFDMask and add a unary SHUFPD pattern so that SHUFPD's
memory operand alignment can be tested as well, with a fix to avoid
breaking MMX's use of isPSHUFDMask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40756 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02 21:17:01 +00:00
Evan Cheng
5278784621
Can't handle offset and scale if rip-relative addressing is to be used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40703 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01 23:46:47 +00:00
Evan Cheng
4ebcc8c2f8
This isn't safe when there are uses of load's chain result.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40617 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-31 06:21:44 +00:00
Duncan Sands
b116fac90f
Trampoline codegen support for X86-32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40566 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-27 20:02:49 +00:00
Dan Gohman
d300622eba
Re-apply 40504, but with a fix for the segfault it caused in oggenc:
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Make the alignedload and alignedstore patterns always require 16-byte
alignment. This way when they are used in the "Fs" instructions, in which
a vector instruction is used for a scalar purpose, they can still require
the full vector alignment. And add a regression test for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40555 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-27 17:16:43 +00:00
Evan Cheng
3e22947d9a
Reverting 40504 for now. It's breaking oggenc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40547 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-27 01:37:47 +00:00
Dan Gohman
d3283832aa
Remove X86ISD::LOAD_PACK and X86ISD::LOAD_UA and associated code from the
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x86 target, replacing them with the new alignment attributes on memory
references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40504 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26 00:31:09 +00:00
Dan Gohman
a394117bc0
Use movaps to load a v4f32 build_vector of all-constant values into a
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register instead of loading each element individually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40478 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-24 22:55:08 +00:00
Dan Gohman
275769a77a
Fix some uses of dyn_cast to be uses of cast.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40443 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-23 20:24:29 +00:00
Evan Cheng
d4d01b71a7
Fix custom lowering of SSE FXOR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40071 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 23:36:01 +00:00
Anton Korobeynikov
2365f51ed0
Long live the exception handling!
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This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-14 14:06:15 +00:00
Dan Gohman
2038252c6a
Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp,
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in addition to the intrinsic forms. Add spill-folding entries for these new
instructions, and for the scalar min and max instrinsic instructions which
were missing. And add some preliminary ISelLowering code for using the new
non-intrinsic vector sqrt instruction, and fneg and fabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38478 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 00:05:58 +00:00
Anton Korobeynikov
4304bcc1ed
Proper flag __alloca call
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37923 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 20:36:08 +00:00
Dale Johannesen
e377d4d142
Refactor X87 instructions. As a side effect, all
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their names are changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37876 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-04 21:07:47 +00:00
Dale Johannesen
849f214a4e
Fix for PR 1505 (and 1489). Rewrite X87 register
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model to include f32 variants. Some factoring
improvments forthcoming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37847 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-03 00:53:03 +00:00
Evan Cheng
a72cb0ea09
No vector fneg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37786 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-29 00:18:15 +00:00
Evan Cheng
0db5862cb8
Type of vector extract / insert index operand should be iPTR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37784 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-29 00:01:20 +00:00
Dan Gohman
7f32156bb9
Generalize MVT::ValueType and associated functions to be able to represent
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extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.
This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 16:23:39 +00:00
Dan Gohman
ea859be53c
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
...
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 14:59:07 +00:00
Chris Lattner
52387be1e0
If a function is vararg, never pass inreg arguments in registers. Thanks to
...
Anton for half of this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37641 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 00:13:10 +00:00
Evan Cheng
49892af264
Look for VECTOR_SHUFFLE that's identity operation on either LHS or RHS. This can happen before DAGCombiner catches it.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37636 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 00:02:56 +00:00
Bill Wendling
a9e64f6f2d
Revert patch. It regresses:
...
define double @test2(i64 %A) {
%B = bitcast i64 %A to double
ret double %B
}
$ llvm-as < t.ll | llc -march=x86-64
before:
.align 4
.globl _test2
_test2:
movd %rdi, %xmm0
ret
after:
_test2:
subq $8, %rsp
movq %rdi, (%rsp)
movsd (%rsp), %xmm0
addq $8, %rsp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37617 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-16 23:57:15 +00:00
Bill Wendling
e81369f2a5
Fix a failure to bit_convert from integer GPR to MMX register.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37611 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-16 06:17:31 +00:00
Dan Gohman
51eaa86758
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 22:58:02 +00:00
Chris Lattner
fdbe720416
fix x86-64 mmx calling convention for real, which passes in integer gprs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37534 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-09 05:08:10 +00:00
Chris Lattner
6b7c21cc30
fix mmx handling bug
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37533 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-09 05:01:50 +00:00
Dan Gohman
237898ac1f
Add explicit qualification for namespace MVT members.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37320 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-24 14:33:05 +00:00
Dan Gohman
fa0f77d9b7
Use MVT::FIRST_VECTOR_VALUETYPE and MVT::LAST_VECTOR_VALUETYPE.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37234 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 18:44:07 +00:00
Evan Cheng
213d2cf94f
Fix a bogus check that prevented folding VECTOR_SHUFFLE to UNDEF; add an optimization to fold VECTOR_SHUFFLE to a zero vector.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37173 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 18:45:50 +00:00
Chris Lattner
07c70cd866
This is the correct fix for PR1427. This fixes mmx-shuffle.ll and doesn't
...
cause other regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37160 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 17:13:13 +00:00
Anton Korobeynikov
f840202953
Revert patch for PR1427. It breaks almost all vector tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37159 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 07:50:14 +00:00
Chris Lattner
da66472ea6
Fix PR1427 and test/CodeGen/X86/mmx-shuffle.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37141 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 03:29:42 +00:00
Chris Lattner
709fd414e2
fix subtle bugs in inline asm operand selection
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37065 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-15 01:28:08 +00:00
Chris Lattner
dc43a88b81
Fix two classes of bugs:
...
1. x86 backend rejected (&gv+c) for the 'i' constraint when in static mode.
2. the matcher didn't correctly reject and accept some global addresses.
the right predicate is GVRequiresExtraLoad, not "relomodel = pic".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36670 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 16:52:29 +00:00
Anton Korobeynikov
ce3b46552a
Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux
...
with non-llvm-compiled (e.g. "native") unwind runtime.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36647 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 19:53:33 +00:00
Bill Wendling
2f9bb1a0a4
Support for the special case of a vector with the canonical form:
...
vector_shuffle v1, v2, <2, 6, 3, 7>
I.e.
vector_shuffle v, undef, <2, 2, 3, 3>
MMX only has a shuffle for v4i16 vectors. It needs to use the unpackh for
this type of operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36403 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 21:16:55 +00:00
Lauro Ramos Venancio
7d2cc2b983
X86 TLS: fix and optimize the implementation of "initial exec" model.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36355 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-22 22:50:52 +00:00
Lauro Ramos Venancio
2c5c111b6c
X86 TLS: Implement review feedback.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36318 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-21 20:56:26 +00:00
Lauro Ramos Venancio
b3a0417cad
Implement "general dynamic", "initial exec" and "local exec" TLS models for
...
X86 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36283 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 21:38:10 +00:00
Anton Korobeynikov
e060b5385f
Add comment
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36213 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 19:34:00 +00:00
Chris Lattner
d15dff24c6
rename X86FunctionInfo to X86MachineFunctionInfo to match the header file
...
it is defined in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36196 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 17:21:52 +00:00
Anton Korobeynikov
57fc00d5cf
Implemented correct stack probing on mingw/cygwin for dynamic alloca's.
...
Also, fixed static case in presence of eax livin. This fixes PR331
PS: Why don't we still have push/pop instructions? :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36195 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 09:20:00 +00:00
Anton Korobeynikov
bed2946a96
Removed tabs everywhere except autogenerated & external files. Add make
...
target for tabs checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 18:10:23 +00:00
Chris Lattner
6c284d716e
Fix mmx paddq, add support for the 'y' register class, though it isn't tested.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35940 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 04:14:49 +00:00
Chris Lattner
eb8c74ddf2
remove some dead hooks
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35845 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 23:31:19 +00:00
Chris Lattner
b445d0cbb9
remove some dead target hooks, subsumed by isLegalAddressingMode
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 22:27:04 +00:00
Chris Lattner
0f65cad57f
move a bunch of register constraints from being handled by
...
getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint. This allows us to let the llvm register allocator
allocate, which gives us better code. For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:
_run_init_process:
subl $4, %esp
movl %ebx, (%esp)
xorl %ebx, %ebx
movl $11, %eax
movl %ebx, %ecx
movl %ebx, %edx
# InlineAsm Start
push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
# InlineAsm End
Now we get:
_run_init_process:
xorl %ecx, %ecx
movl $11, %eax
movl %ecx, %edx
# InlineAsm Start
push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
# InlineAsm End
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35804 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 05:49:22 +00:00
Chris Lattner
e5a24ec782
implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 values
...
used with x constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35803 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 05:31:48 +00:00
Chris Lattner
ad043e85f8
implement CodeGen/X86/inline-asm-x-scalar.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35799 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 05:11:28 +00:00
Chris Lattner
c9addb7488
implement the new addressing mode description hook.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35521 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 23:15:24 +00:00
Bill Wendling
a80d7bd665
Remove cruft I put in there...
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35394 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 01:02:54 +00:00
Bill Wendling
826f36ff80
Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35392 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 00:57:11 +00:00
Bill Wendling
ccc44add81
Fix so that pandn is emitted instead of an xor/and combo. Add integer
...
comparison operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35385 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 20:22:40 +00:00
Bill Wendling
ab5b49d92e
Promote to v1i64 type...
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35353 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 08:03:33 +00:00
Bill Wendling
eebc8a1bc5
Add support for the v1i64 type. This makes better code for this:
...
#include <mmintrin.h>
extern __m64 C;
void baz(__v2si *A, __v2si *B)
{
*A = C;
_mm_empty();
}
We get this:
_baz:
call "L1$pb"
"L1$pb":
popl %eax
movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
movq (%eax), %mm0
movl 4(%esp), %eax
movq %mm0, (%eax)
emms
ret
GCC gives us this:
_baz:
pushl %ebx
call L3
"L00000000001$pb":
L3:
popl %ebx
subl $8, %esp
movl L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
movl (%eax), %edx
movl 4(%eax), %ecx
movl 16(%esp), %eax
movl %edx, (%eax)
movl %ecx, 4(%eax)
emms
addl $8, %esp
popl %ebx
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35351 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 07:53:08 +00:00
Chris Lattner
4234f57fa0
switch TargetLowering::getConstraintType to take the entire constraint,
...
not just the first letter. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:14:49 +00:00
Chris Lattner
188b9fe834
enforce the proper range for the i386 N constraint.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35319 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 01:57:35 +00:00
Bill Wendling
a348c56fde
Support added for shifts and unpacking MMX instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35266 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 18:42:45 +00:00
Dale Johannesen
fa4bce2b76
repair x86 performance, dejagnu problems from previous change
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:51:52 +00:00
Chris Lattner
d435dbcbf9
fix a warning
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:39:32 +00:00
Devang Patel
84f7fd2483
Support 'I' inline asm constraint.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 00:13:28 +00:00
Bill Wendling
1b7a81d3ae
And now support for MMX logical operations.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 09:44:46 +00:00
Bill Wendling
74027e98f1
Multiplication support for MMX.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:24:36 +00:00
Evan Cheng
ba693005e9
Under X86-64 large code model, do not emit 32-bit pc relative calls.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35108 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 22:11:11 +00:00
Evan Cheng
a8a155e77f
More flexible TargetLowering LSR hooks for testing whether an immediate is
...
a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35073 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:28:50 +00:00
Evan Cheng
37e8856f74
Stupid bug: SSE2 supports v2i64 add / sub.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35070 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 22:58:52 +00:00
Bill Wendling
c1fb0473ed
Adding more arithmetic operators to MMX. This is an almost exact copy of
...
the addition. Please let me know if you have suggestions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35055 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-10 09:57:05 +00:00
Bill Wendling
2f88dcdfb3
Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that
...
moves, loads, etc. are recognized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 22:09:11 +00:00
Anton Korobeynikov
d0b82b301d
Refactoring of formal parameter flags. Enable properly use of
...
zext/sext/aext stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 16:25:09 +00:00
Bill Wendling
bc9bffa27b
Properly support v8i8 and v4i16 types. It now converts them to v2i32 for
...
load and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35002 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 05:43:18 +00:00
Bill Wendling
a31bd27f12
Add LOAD/STORE support for MMX.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34978 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 18:53:42 +00:00
Anton Korobeynikov
1d9baccc9b
Use new SDIselParamAttr enumeration. This removes "magick" constants
...
from formal attributes' flags processing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34963 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 08:12:33 +00:00
Evan Cheng
ae6421935b
X86-64 VACOPY needs custom expansion. va_list is a struct { i32, i32, i8*, i8* }.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34857 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-02 23:16:35 +00:00
Anton Korobeynikov
f7dcfa81c5
Simplify things
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34849 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-02 21:50:27 +00:00
Chris Lattner
82932a5e4a
argument lowering should copy from the vreg shadows of live-in arguments
...
passed in registers, not directly from the pregs themselves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34838 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-02 05:12:29 +00:00
Anton Korobeynikov
9dd9abd87f
Ensure that fastcall'ed function is correctly mangled & stack is
...
properly aligned
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34788 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-01 16:29:22 +00:00
Chris Lattner
eac6607d7c
remove dead option
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34754 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 18:39:53 +00:00
Chris Lattner
e32bbf61c0
use high-level functions in CCState
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34739 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 07:09:55 +00:00
Chris Lattner
638402b253
make use of helper functions in CCState for analyzing formals and calls.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34737 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 07:00:42 +00:00
Chris Lattner
f5d280a0a6
switch LowerFastCCCallTo over to using the new fastcall description.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34734 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 06:26:33 +00:00
Chris Lattner
fc664c1bc0
switch LowerFastCCArguments over to using the autogenerated Fastcall description.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34733 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 06:21:19 +00:00
Chris Lattner
fcf1a3de7a
rearrange code
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34731 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 06:10:12 +00:00
Chris Lattner
2db39b865e
remove fastcc (not fastcall) support
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34730 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 06:05:16 +00:00
Chris Lattner
f39f771b02
switch LowerCCCArguments over to using autogenerated CC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34729 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 05:46:49 +00:00
Chris Lattner
c0bdf3460c
simplify sret handling
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34728 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 05:39:26 +00:00
Chris Lattner
423c5f44f8
switch LowerCCCCallTo over to using an autogenerated callingconv
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34727 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 05:31:48 +00:00
Chris Lattner
59ed56b9ee
switch return value passing and the x86-64 calling convention information
...
over to being autogenerated from the X86CallingConv.td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34722 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 04:55:35 +00:00
Chris Lattner
9774c915f1
switch x86-64 return value lowering over to using same mechanism as argument
...
lowering uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34657 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 05:28:59 +00:00
Chris Lattner
13513b7a50
Minor refactoring of CC Lowering interfaces
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 05:13:54 +00:00
Chris Lattner
362e98a5f5
move CC Lowering stuff to its own public interface
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34655 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 04:43:02 +00:00
Chris Lattner
9c71ab77cd
refactor x86-64 argument lowering yet again, this time eliminating templates,
...
'clients', etc, and adding CCValAssign instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34654 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 04:18:15 +00:00
Chris Lattner
6e50f8cfe9
switch to smallvector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34633 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-26 07:59:53 +00:00
Chris Lattner
14dd4c9735
initial hack at splitting the x86-64 calling convention info out from the
...
mechanics that process it. I'm still not happy with this, but it's a step
in the right direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34631 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-26 07:50:02 +00:00
Chris Lattner
cc7b07a0ff
the truncate must always be done, it's only the assert that is conditional.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34628 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-26 05:21:05 +00:00
Chris Lattner
df5cdb5288
in X86-64 CCC, i8/i16 arguments are already properly zext/sext'd on input.
...
Capture this so that downstream zext/sext's are optimized out. This
compiles:
int test(short X) { return (int)X; }
to:
_test:
movl %edi, %eax
ret
instead of:
_test:
movswl %di, %eax
ret
GCC produces this bizarre code:
_test:
movw %di, -12(%rsp)
movswl -12(%rsp),%eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34623 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-26 03:18:56 +00:00
Chris Lattner
c30654cc96
Fix an X86-64 abi bug. We now compile:
...
void foo(short);
void bar(unsigned short A) {
foo(A);
}
into:
_bar:
subq $8, %rsp
movswl %di, %edi
call _foo
addq $8, %rsp
ret
instead of:
_bar:
subq $8, %rsp
call _foo
addq $8, %rsp
ret
Testcase here: test/CodeGen/X86/x86-64-shortint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34615 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 23:10:46 +00:00
Chris Lattner
7e22977c0f
fix CodeGen/X86/2007-02-25-FastCCStack.ll, a regression from my patch last
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night: fastcc returns should only go in XMM0 if we have SSE2 or above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34613 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 22:23:46 +00:00
Chris Lattner
5e265b29ea
fastcc functions that return double values now return them in xmm0 on x86-32.
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This implements CodeGen/X86/fp-stack-ret.ll:test[23]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34592 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 09:31:16 +00:00
Chris Lattner
4dfccf4b48
allow vectors to be passed to stdcall/fastcall functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34590 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 09:14:25 +00:00
Chris Lattner
2a9bdd74f2
move LowerRET into the 'Return Value Calling Convention Implementation'
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section of the file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34589 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 09:12:39 +00:00
Chris Lattner
339b439d47
make all Lower*CallTo implementations use LowerCallResult to handle their
...
result value stuff. This eliminates a bunch of duplicated code and now
GetRetValueLocs is the sole place that decides where a value is returned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34588 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 09:10:05 +00:00
Chris Lattner
09c75a4372
pass the calling convention into Lower*CallTo, instead of using ad-hoc flags.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34587 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 09:06:15 +00:00
Chris Lattner
3085e15117
factor a bunch of code out of LowerCCCCallTo into a new LowerCallResult
...
function. This function now uses GetRetValueLocs to determine *where*
the result values are located and concerns itself with *how* to pull the
values out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34586 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 08:59:22 +00:00
Chris Lattner
2b02a4409f
move some code around, pass in calling conv, even though it is unused
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34585 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 08:29:00 +00:00
Chris Lattner
cb18656734
simplify result value lowering by splitting the selection of *where* to return
...
registers out from the logic of *how* to return them.
This changes X86-64 to mark EAX live out when returning a 32-bit value,
where before it marked RAX liveout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34582 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 08:15:11 +00:00
Chris Lattner
7d53a1c45e
make void-return not a special case
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34579 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 07:18:38 +00:00
Chris Lattner
5a88b837f2
eliminate a bunch more temporary vectors from X86 lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34578 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 07:10:00 +00:00
Chris Lattner
d96d072332
eliminate temporary vectors created during X86 lowering.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34577 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 06:40:16 +00:00
Chris Lattner
9cb9626abf
remove std::vector's in RET lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34576 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 06:21:57 +00:00
Jim Laskey
2ad9f17fee
Simplify lowering and selection of exception ops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34488 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-22 14:56:36 +00:00
Jim Laskey
62819f3144
Support to provide exception and selector registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-21 22:54:50 +00:00
Evan Cheng
f46847172a
ELF / PIC requires GOT be in the EBX register during calls via PLT GOT pointer.
...
Add implicit uses of EBX to calls to ensure liveintervalanalysis does not treat
the GOT in EBX move as dead upon definition.
This should fix PR1207.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34470 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-21 21:18:14 +00:00
Anton Korobeynikov
b25fe82671
Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only
...
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33752 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 08:39:52 +00:00
Nate Begeman
bcc5f36765
Finish off bug 680, allowing targets to custom lower frame and return
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address nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33636 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-29 22:58:52 +00:00
Nick Lewycky
5310897884
Fix compile error "jump to case label crosses initialization".
...
What compiler are people using that accepts this code?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33603 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-28 15:39:16 +00:00
Anton Korobeynikov
b10308e440
Propagate changes from my local tree. This patch includes:
...
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.
NOTEs: 1. Documentation will be updated soon.
2. llvm-upgrade should be improved to translate csret => sret.
Before this, there will be some unexpected test fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33597 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-28 13:31:35 +00:00
Jim Laskey
1ee2925742
Make LABEL a builtin opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 14:34:52 +00:00
Evan Cheng
706535db86
Linux GOT indirect reference is only necessary in PIC mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33441 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-22 21:34:25 +00:00
Anton Korobeynikov
7f70559bc4
* PIC codegen for X86/Linux has been implemented
...
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33136 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-12 19:20:47 +00:00
Evan Cheng
73d6cf12ad
- FCOPYSIGN custom lowering bug. Clear the sign bit of operand 0 first before
...
or'ing in the sign bit of operand 1.
- Tweaking: rather than left shift the sign bit, fp_extend operand 1 first
before taking its sign bit if its type is smaller than that of operand 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32932 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-05 21:37:56 +00:00
Evan Cheng
1722eeeaa4
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32902 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-05 08:32:24 +00:00
Evan Cheng
68c47cba35
With SSE2, expand FCOPYSIGN to a series of SSE bitwise operations.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32900 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-05 07:55:56 +00:00
Reid Spencer
aff9387168
Fix a comment that referred to the now defunct ubyte type.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32840 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-03 17:24:59 +00:00
Anton Korobeynikov
317848f4a1
Really big cleanup.
...
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32833 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-03 11:43:14 +00:00
Reid Spencer
47857812e2
For PR950:
...
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
type of an function parameter was used to determine whether it should
be sign extended or zero extended before the call. This information is
now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
the parameter attribute information. Although it would have been
convenient to pass in the FunctionType itself, there isn't always one
present in the caller. Consequently, a signedness indication for the
result type and for each parameter was provided for in the interface
to this method. All implementations were changed to make the adjustment
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32788 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-31 05:55:36 +00:00
Anton Korobeynikov
2b2bc68884
Refactored JIT codegen for mingw32. Now we're using standart relocation
...
type for distinguish JIT & non-JIT instead of "dirty" hacks :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32745 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-22 22:29:05 +00:00
Evan Cheng
21b76123e5
f64 <-> i64 bit_convert using movq in 64-bit mode.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32587 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-14 21:55:39 +00:00
Anton Korobeynikov
d27a258d2d
Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
...
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-10 23:12:42 +00:00
Chris Lattner
f3597a13ae
If we have ScalarSSE, we can select bitconvert into single instructions.
...
This compiles bitcast.ll:test3/test4 into:
_test3:
movd %xmm0, %eax
ret
_test4:
movd %edi, %xmm0
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32230 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-05 18:45:06 +00:00
Chris Lattner
399610a2e6
Fix PR1033 and CodeGen/X86/bitcast.ll, by expanding bitcast to a load/store pair.
...
This could be better, readme entry pending.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32228 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-05 18:22:22 +00:00
Chris Lattner
af21f4f6f9
Fix typo noticed by Lauro Ramos Venancio, thanks!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32223 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-05 17:29:40 +00:00
Evan Cheng
19f2ffce45
- Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit
...
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32215 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-05 04:01:03 +00:00
Chris Lattner
98ae09ca5d
Add support for 64-bit 'r' constraint. Patch by by Rafael ~Avila de EspÃndol!
...
This fixes PR1029 and Regression/CodeGen/X86/x86-64-asm.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32206 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-04 22:38:21 +00:00
Evan Cheng
0085a28d13
- Use a different wrapper node for RIP-relative GV, etc.
...
- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32046 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-30 21:55:46 +00:00
Evan Cheng
c8306bde15
In PIC mode, GV not requiring an extra load can be used as address immediate.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32028 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 23:48:14 +00:00
Evan Cheng
d0ff02cf6f
Fix for PR1018 - Better support for X86-64 Linux in small code model.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32026 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 23:19:46 +00:00
Evan Cheng
3fa9dff2c9
Custom lower READCYCLECOUNTER for x86-64.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32017 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 08:28:13 +00:00
Evan Cheng
c0f64ffab9
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
...
of opcode and number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27 23:37:22 +00:00
Anton Korobeynikov
12c49af81e
Refactored *GVRequiresExtraLoad() to Subtarget method.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31887 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-21 00:01:06 +00:00
Anton Korobeynikov
a59868519b
We should perform extra load for dllimported calls
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31874 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-20 10:46:14 +00:00
Evan Cheng
7ce4578353
Matches MachineInstr changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-13 23:36:35 +00:00
Evan Cheng
5cd3e9f4b7
Add implicit use / def operands to created MI's.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31676 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 10:21:44 +00:00
Evan Cheng
8ca29326e1
Don't dag combine floating point select to max and min intrinsics. Those
...
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.
This fixes PR996.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31645 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 21:43:37 +00:00
Anton Korobeynikov
df78611726
Fixing PR990: http://llvm.org/PR990 .
...
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31613 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 00:48:11 +00:00
Evan Cheng
6e56e2c602
Fixed a bug which causes x86 be to incorrectly match
...
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.
Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31519 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-07 22:14:24 +00:00
Reid Spencer
3ed469ccd7
For PR786:
...
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02 20:25:50 +00:00
Chris Lattner
22aaf1d61c
allow the address of a global to be used with the "i" constraint when in
...
-static mode. This implements PR882.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31326 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31 20:13:11 +00:00
Chris Lattner
1a60aa7bc1
handle "st" as "st(0)"
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31320 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31 19:42:44 +00:00
Anton Korobeynikov
ab4022f196
1. Clean up code due to changes in SwitchTo*Section(2)
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2. Added partial debug support for mingw\cygwin targets (the same as
Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
for storing debug info by default, thus many (runtime) libraries has
this information included. These formats shouldn't be mixed in one binary
('stabs' & 'DWARF'), otherwise binutils tools will be confused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31311 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31 08:31:24 +00:00
Reid Spencer
02b8511364
Add debug support for X86/ELF targets (Linux). This allows llvm-gcc4
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generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31299 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-30 22:32:30 +00:00
Evan Cheng
c35497fc2a
All targets expand BR_JT for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31294 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-30 08:02:39 +00:00
Evan Cheng
f686d9b71f
Fixed a significant bug where unpcklpd is incorrectly used to extract element 1 from a v2f64 value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31228 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27 21:08:32 +00:00
Evan Cheng
6bdb3f6c8f
Fix for PR968: expand vector sdiv, udiv, srem, urem.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31220 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27 18:49:08 +00:00
Evan Cheng
9eca5e814d
During vector shuffle lowering, we sometimes commute a vector shuffle to try
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to match MOVL (movss, movsd, etc.). Don't forget to commute it back and try
unpck* and shufp* if that doesn't pan out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31186 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-25 21:49:50 +00:00
Evan Cheng
9bbbb98a60
Remove -disable-x86-shuffle-opti
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31183 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-25 20:48:19 +00:00
Chris Lattner
7fbe9723e3
Implement branch analysis/xform hooks required by the branch folding pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31065 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-20 17:42:20 +00:00
Evan Cheng
d9b8e40ab3
Avoid getting into an infinite loop when -disable-x86-shuffle-opti is specified.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30974 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16 06:36:00 +00:00
Evan Cheng
8b2794aeff
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 21:14:26 +00:00
Evan Cheng
cf12ec4897
Some X86ISD::CMP were created with wrong ValueType's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30913 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12 19:12:56 +00:00
Evan Cheng
23425f5c74
Don't convert to MOVLP if using shufps etc. may allow load folding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30847 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 21:39:25 +00:00
Evan Cheng
466685d41a
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 20:57:25 +00:00
Evan Cheng
786225adf0
Make use of getStore().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 23:01:46 +00:00
Chris Lattner
1907a7b37b
Lower some min/max idioms to minss/maxss when unsafe fp math is enabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30748 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 04:11:26 +00:00
Evan Cheng
e111303408
Added option -disable-x86-shuffle-opti to disable X86 specific vector shuffle optimizations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30723 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 18:33:38 +00:00
Chris Lattner
83e6c9925e
Pattern match min/max nodes when we have sse. This implements
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CodeGen/X86/scalar_sse_minmax.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30719 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 06:57:07 +00:00
Evan Cheng
c548428c5d
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
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extra operand to LOADX to specify the exact value extension type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 00:56:09 +00:00
Chris Lattner
13bf6c1350
Fix PR933 and CodeGen/X86/2006-10-02-BoolRetCrash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30703 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-03 17:18:42 +00:00
Chris Lattner
f38f543e01
silence warnings in release build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30631 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-27 18:29:38 +00:00
Chris Lattner
e87e1154a1
Various random and minor code cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30608 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-26 03:57:53 +00:00
Nick Lewycky
70084fd53a
Fix compile error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30553 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-21 02:08:31 +00:00
Anton Korobeynikov
f824868ed9
Adding codegeneration for StdCall & FastCall calling conventions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30549 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-20 22:03:51 +00:00
Anton Korobeynikov
bcb9770efe
Added some eye-candy for Subtarget type checking
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Added X86 StdCall & FastCall calling conventions. Codegen will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30446 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-17 20:25:45 +00:00
Anton Korobeynikov
93c2b37340
Small fixes for supporting dll* linkage types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30441 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-17 13:06:18 +00:00
Anton Korobeynikov
b74ed07bfd
Adding dllimport, dllexport and external weak linkage types.
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DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-14 18:23:27 +00:00
Chris Lattner
bfd68a7858
Turn X < 0 -> TEST X,X js
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30294 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-13 17:04:54 +00:00
Chris Lattner
7a6366de86
The sense of this branch was inverted :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30293 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-13 16:56:12 +00:00
Chris Lattner
f95705163f
Compile X > -1 -> text X,X; js dest
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This implements CodeGen/X86/jump_sign.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30283 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-13 03:22:10 +00:00
Evan Cheng
c356a572e3
Reflects MachineConstantPoolEntry changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-12 21:04:05 +00:00
Evan Cheng
734503be59
X86ISD::CMP now produces a chain as well as a flag. Make that the chain
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operand of a conditional branch to allow load folding into CMP / TEST
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30241 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-11 02:19:56 +00:00
Evan Cheng
25ab690a43
Committing X86-64 support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 06:48:29 +00:00
Evan Cheng
8cf723d8eb
- Identify a vector_shuffle that can be turned into an undef, e.g.
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shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
optimal code by failing to identify MOVL (move to lowest element of a
vector).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30171 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 01:50:06 +00:00
Chris Lattner
ffc0b2663e
Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns
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using test, which provides nice simplifications like:
- movl %edi, %ecx
- andl $2, %ecx
- cmpl $0, %ecx
+ testl $2, %edi
je LBB1_11 #cond_next90
There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 20:33:45 +00:00
Chris Lattner
5ea7a68e15
Revert this patch, the front-end has been fixed to make it unneccesary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29752 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 18:43:24 +00:00
Chris Lattner
b5bc04d38a
'g' is handled by the front-end.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 18:12:28 +00:00
Andrew Lenharth
ad1ed016ce
Fix handling of 'g'. Closes 883
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29750 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 17:50:12 +00:00
Andrew Lenharth
d337295fb0
Add the 'c' constraint as needed by the linux kernel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29747 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 16:07:50 +00:00
Andrew Lenharth
c63e56ee5f
Add support for S and D constraints, as needed to compile the linux kernel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29746 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 15:35:43 +00:00
Chris Lattner
e219945348
Eliminate use of getNode that takes a vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29614 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:38:39 +00:00
Evan Cheng
64a752f7c7
Match tablegen changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29604 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 09:08:15 +00:00
Evan Cheng
311ace0391
Convert more calls of getNode() that takes a vector to pass in the start of an array.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29601 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 07:35:45 +00:00
Chris Lattner
bd564bfc63
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
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in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 02:23:42 +00:00
Chris Lattner
f76d180c95
Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll.
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The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29420 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 23:26:50 +00:00
Chris Lattner
35d86fef1f
Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29307 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-26 21:12:04 +00:00
Evan Cheng
625518002d
This opt is now handled in DAG combine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29243 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 08:26:46 +00:00
Evan Cheng
1e1a88e8cc
A splat of a vector constant of all zero or all one is the vector constant.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29234 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-20 23:09:47 +00:00
Chris Lattner
6d3465793f
Add information preventing several register class constraints from working.
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This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29118 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 16:59:49 +00:00
Chris Lattner
f4dff84c86
Implement the inline asm 'A' constraint. This implements PR825 and
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CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29101 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 02:54:03 +00:00
Evan Cheng
1e60c098cc
Fixed stack objects do not specify alignments, but their offsets are known.
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Use that information when doing the transformation to merge multiple loads
into a 128-bit load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29090 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 21:37:44 +00:00
Chris Lattner
5c5f4ca6f1
Mark internal function static
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29085 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 19:53:12 +00:00
Evan Cheng
206ee9d86c
X86 target specific DAG combine: turn build_vector (load x), (load x+4),
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(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).
e.g.
__m128 test(float a, float b, float c, float d) {
return _mm_set_ps(d, c, b, a);
}
_test:
movups 4(%esp), %xmm0
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-07 08:33:52 +00:00
Evan Cheng
60c07e1aea
Reorg. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28999 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-05 22:17:51 +00:00
Evan Cheng
da08d2c39a
Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-24 08:36:10 +00:00
Evan Cheng
015188ffbc
Type of vector extract / insert index operand should be iPTR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28796 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:14:54 +00:00
Evan Cheng
b69d113201
Add argument registers to the end of call operand list (partial fix).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28783 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 18:17:40 +00:00
Evan Cheng
b12223e284
Minor compilation speed improvement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28736 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-09 06:24:42 +00:00
Evan Cheng
e8bd0a332a
Added X86FunctionInfo subclass of MachineFunction to record whether the
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function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28703 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-06 23:30:24 +00:00
Evan Cheng
2675534b7f
Typos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28617 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 05:53:27 +00:00
Evan Cheng
04b2562502
Remove a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28607 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 00:30:39 +00:00
Evan Cheng
8f692e2457
Remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28581 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-31 00:50:42 +00:00
Evan Cheng
6848be1a27
Change RET node to include signness information of the return values. i.e.
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RET chain, value1, sign1, value2, sign2, ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 23:10:12 +00:00
Evan Cheng
3fddf241d8
Vector argument must be passed in memory location aligned on 16-byte boundary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28505 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 20:37:47 +00:00
Evan Cheng
1d6a9b3b6c
Mac OS X ABI document lied. The first four XMM registers are used to pass
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vector arguments, not three.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28504 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 19:22:06 +00:00
Evan Cheng
052fb5110f
Minor update to make the code more clear
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28499 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:39:59 +00:00
Evan Cheng
f9d62dc6e5
Update more comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28498 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:37:16 +00:00
Evan Cheng
f9ff7c54be
Fix some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28497 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:25:43 +00:00
Evan Cheng
6f707999a1
No need to handle illegal types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28496 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:22:49 +00:00
Evan Cheng
cc1fc220a0
Consistency
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28488 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 23:31:23 +00:00
Evan Cheng
25e71d10a0
Some clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28483 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 22:38:31 +00:00
Evan Cheng
a9bb445db0
Remove some dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28481 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 22:25:52 +00:00
Evan Cheng
6b5783d0b1
Build breakage.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28475 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 18:56:34 +00:00
Evan Cheng
32fe1035a7
Switch X86 over to a call-selection model where the lowering code creates
...
the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28463 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 00:59:30 +00:00
Chris Lattner
c6d0567324
Fix file header comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28441 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 23:20:42 +00:00
Evan Cheng
4db3af3511
Better way to check for vararg.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28440 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 21:08:24 +00:00
Evan Cheng
25caf63cd2
Remove PreprocessCCCArguments and PreprocessFastCCArguments now that
...
FORMAL_ARGUMENTS nodes include a token operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28439 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 21:06:34 +00:00
Chris Lattner
2d2970905c
Implement an annoying part of the Darwin/X86 abi: the callee of a struct
...
return argument pops the hidden struct pointer if present, not the caller.
For example, in this testcase:
struct X { int D, E, F, G; };
struct X bar() {
struct X a;
a.D = 0;
a.E = 1;
a.F = 2;
a.G = 3;
return a;
}
void foo(struct X *P) {
*P = bar();
}
We used to emit:
_foo:
subl $28, %esp
movl 32(%esp), %eax
movl %eax, (%esp)
call _bar
addl $28, %esp
ret
_bar:
movl 4(%esp), %eax
movl $0, (%eax)
movl $1, 4(%eax)
movl $2, 8(%eax)
movl $3, 12(%eax)
ret
This is correct on Linux/X86 but not Darwin/X86. With this patch, we now
emit:
_foo:
subl $28, %esp
movl 32(%esp), %eax
movl %eax, (%esp)
call _bar
*** addl $24, %esp
ret
_bar:
movl 4(%esp), %eax
movl $0, (%eax)
movl $1, 4(%eax)
movl $2, 8(%eax)
movl $3, 12(%eax)
*** ret $4
For the record, GCC emits (which is functionally equivalent to our new code):
_bar:
movl 4(%esp), %eax
movl $3, 12(%eax)
movl $2, 8(%eax)
movl $1, 4(%eax)
movl $0, (%eax)
ret $4
_foo:
pushl %esi
subl $40, %esp
movl 48(%esp), %esi
leal 16(%esp), %eax
movl %eax, (%esp)
call _bar
subl $4, %esp
movl 16(%esp), %eax
movl %eax, (%esi)
movl 20(%esp), %eax
movl %eax, 4(%esi)
movl 24(%esp), %eax
movl %eax, 8(%esi)
movl 28(%esp), %eax
movl %eax, 12(%esi)
addl $40, %esp
popl %esi
ret
This fixes SingleSource/Benchmarks/CoyoteBench/fftbench with LLC and the
JIT, and fixes the X86-backend portion of PR729. The CBE still needs to
be updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28438 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 18:50:38 +00:00
Chris Lattner
cdbaeb52ae
CSRet allows varargs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28409 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-19 21:34:04 +00:00
Evan Cheng
4ac8974d02
Should pass by reference.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28357 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 19:07:40 +00:00
Chris Lattner
aa9406b0c4
Implement the custom lowering hook right, returning values for all of the
...
arguments at once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28327 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 17:14:26 +00:00
Chris Lattner
e7746c9084
Fix a bug I introduced yesterday, which broke functions with *no* arguments.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28326 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 17:08:35 +00:00
Evan Cheng
069287d460
X86 integer register classes naming changes. Make them consistent with FP, vector classes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28324 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 07:21:53 +00:00
Chris Lattner
8c0c10c2b9
Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend,
...
it doesn't currently use/maintain the chain properly. Also, make the
X86ISelLowering.cpp file 80-col clean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28320 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 06:45:34 +00:00
Chris Lattner
03ea4c8326
Dead variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28265 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12 21:12:22 +00:00
Chris Lattner
80a7ecc923
Teach the X86 backend about non-i32 inline asm register classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28139 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 00:29:37 +00:00
Chris Lattner
bd04aa5796
Teach the code generator to use cvtss2sd as extload f32 -> f64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28131 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:35:18 +00:00
Owen Anderson
a69571c799
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
...
This fixes PR 759.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 01:29:57 +00:00
Evan Cheng
347d5f789a
Initial caller side support (for CCC only, not FastCC) of 128-bit vector
...
passing by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28015 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 21:29:37 +00:00
Evan Cheng
43f3bd310b
Implement four-wide shuffle with 2 shufps if no more than two elements come
...
from each vector. e.g.
shuffle(G1, G2, 7, 1, 5, 2)
==>
movaps _G2, %xmm0
shufps $151, _G1, %xmm0
shufps $216, %xmm0, %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28011 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 07:03:38 +00:00
Evan Cheng
020c41f21e
TargetLowering::LowerArguments should return a VBIT_CONVERT of
...
FORMAL_ARGUMENTS SDOperand in the return result vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28009 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 05:25:15 +00:00
Evan Cheng
fea89c14ec
Make x86 isel lowering produce tailcall nodes. They are match to normal calls
...
for now.
Patch contributed by Alexander Friedman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27994 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 08:40:39 +00:00
Evan Cheng
2fdd95eee7
Support for passing 128-bit vector arguments via XMM registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27992 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 08:31:10 +00:00
Evan Cheng
5fb03ce905
Oops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27989 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 05:44:50 +00:00
Evan Cheng
85e3800e42
Bug fix: not updating NumIntRegs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27988 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 05:35:28 +00:00
Evan Cheng
eda65fa20b
- Clean up formal argument lowering code. Prepare for vector pass by value work.
...
- Fixed vararg support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27985 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 01:32:22 +00:00
Evan Cheng
9191dbba8e
Fix fastcc failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-26 18:21:31 +00:00
Evan Cheng
1bc7804e4c
Switching over FORMAL_ARGUMENTS mechanism to lower call arguments.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-26 01:20:17 +00:00
Evan Cheng
0db9fe6775
Separate LowerOperation() into multiple functions, one per opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27972 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 20:13:52 +00:00
Evan Cheng
37d1d9bc66
Special case handling two wide build_vector(0, x).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27961 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 22:58:52 +00:00
Evan Cheng
c78d3b43f5
A little bit more build_vector enhancement for v8i16 cases.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27959 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 18:01:45 +00:00
Evan Cheng
9293451e3f
MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27953 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-23 06:35:19 +00:00
Nate Begeman
37efe67645
JumpTable support! What this represents is working asm and jit support for
...
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 18:53:45 +00:00
Evan Cheng
1900c012f5
Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimization for shuffle of undef.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27946 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 08:34:05 +00:00
Evan Cheng
a083af14c8
Fix a performance regression. Use {p}shuf* when there are only two distinct elements in a build_vector.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 06:21:46 +00:00
Evan Cheng
ba05f728b5
Revamp build_vector lowering to take advantage of movss and movd instructions.
...
movd always clear the top 96 bits and movss does so when it's loading the
value from memory.
The net result is codegen for 4-wide shuffles is much improved. It is near
optimal if one or more elements is a zero. e.g.
__m128i test(int a, int b) {
return _mm_set_epi32(0, 0, b, a);
}
compiles to
_test:
movd 8(%esp), %xmm1
movd 4(%esp), %xmm0
punpckldq %xmm1, %xmm0
ret
compare to gcc:
_test:
subl $12, %esp
movd 20(%esp), %xmm0
movd 16(%esp), %xmm1
punpckldq %xmm0, %xmm1
movq %xmm1, %xmm0
movhps LC0, %xmm0
addl $12, %esp
ret
or icc:
_test:
movd 4(%esp), %xmm0 #5.10
movd 8(%esp), %xmm3 #5.10
xorl %eax, %eax #5.10
movd %eax, %xmm1 #5.10
punpckldq %xmm1, %xmm0 #5.10
movd %eax, %xmm2 #5.10
punpckldq %xmm2, %xmm3 #5.10
punpckldq %xmm3, %xmm0 #5.10
ret #5.10
There are still room for improvement, for example the FP variant of the above example:
__m128 test(float a, float b) {
return _mm_set_ps(0.0, 0.0, b, a);
}
_test:
movss 8(%esp), %xmm1
movss 4(%esp), %xmm0
unpcklps %xmm1, %xmm0
xorps %xmm1, %xmm1
movlhps %xmm1, %xmm0
ret
The xorps and movlhps are unnecessary. This will require post legalizer optimization to handle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27939 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 23:03:30 +00:00
Evan Cheng
017dcc6e55
Now generating perfect (I think) code for "vector set" with a single non-zero
...
scalar value.
e.g.
_mm_set_epi32(0, a, 0, 0);
==>
movd 4(%esp), %xmm0
pshufd $69, %xmm0, %xmm0
_mm_set_epi8(0, 0, 0, 0, 0, a, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
==>
movzbw 4(%esp), %ax
movzwl %ax, %eax
pxor %xmm0, %xmm0
pinsrw $5, %eax, %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27923 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 01:05:10 +00:00
Evan Cheng
39623daef6
- Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1>
...
to a vector shuffle.
- VECTOR_SHUFFLE lowering change in preparation for more efficient codegen
of vector shuffle with zero (or any splat) vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27875 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 08:58:49 +00:00
Evan Cheng
72cd9a9439
Handle v2i64 BUILD_VECTOR custom lowering correctly. v2i64 is a legal type,
...
but i64 is not. If possible, change a i64 op to a f64 (e.g. load, constant)
and then cast it back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27849 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 00:11:39 +00:00
Evan Cheng
94fe5eb14a
isSplatMask() bug: first element can be an undef.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27847 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 23:28:59 +00:00
Evan Cheng
80d428c370
- Added support to do aribitrary 4 wide shuffle with no more than three
...
instructions.
- Fixed a commute vector_shuff bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27845 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 22:48:17 +00:00
Evan Cheng
533a0aa9ba
Commute vector_shuffle to match more movlhps, movlp{s|d} cases.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 20:35:22 +00:00
Evan Cheng
cdfc3c82a7
Use movss to insert_vector_elt(v, s, 0).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27782 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 22:45:49 +00:00
Evan Cheng
5edb8d270c
Use two pinsrw to insert an element into v4i32 / v4f32 vector.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27779 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 22:04:06 +00:00
Evan Cheng
c575ca22ea
Implement v8i16, v16i8 splat using unpckl + pshufd.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27768 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 20:43:08 +00:00
Chris Lattner
b2be4032c5
implement returns of a vector, testcase here: CodeGen/X86/vec_return.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27767 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 20:32:50 +00:00
Evan Cheng
5001ea1078
FP SETOLT, SETOLT, SETUGE, SETUGT conditions were implemented incorrectly
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27755 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 07:24:10 +00:00
Evan Cheng
57ebe9fbf0
Silly bug
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27719 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-15 05:37:34 +00:00
Evan Cheng
39fc145995
Do not use movs{h|l}dup for a shuffle with a single non-undef node.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27718 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-15 03:13:24 +00:00
Evan Cheng
d953947d26
Last few SSE3 intrinsics.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27711 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:59:03 +00:00
Evan Cheng
f99898453d
X86 SSE2 supports v8i16 multiplication
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27644 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13 05:10:25 +00:00
Evan Cheng
2c3ae37213
All "integer" logical ops (pand, por, pxor) are now promoted to v2i64.
...
Clean up and fix various logical ops issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27633 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 21:21:57 +00:00
Evan Cheng
91b740da12
Promote v4i32, v8i16, v16i8 load to v2i64 load.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27612 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 17:12:36 +00:00
Evan Cheng
d6d1cbd692
Added support for _mm_move_ss and _mm_move_sd.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27575 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 00:19:04 +00:00
Evan Cheng
f7c378e9ea
Conditional move of vector types.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27556 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-10 07:23:14 +00:00
Evan Cheng
c5cdff2341
Code clean up.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27501 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-07 21:53:05 +00:00
Evan Cheng
5ced1d812e
- movlp{s|d} and movhp{s|d} support.
...
- Normalize shuffle nodes so result vector lower half elements come from the
first vector, the rest come from the second vector. (Except for the
exceptions :-).
- Other minor fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27474 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 23:23:56 +00:00
Evan Cheng
6be2c58c8c
Support for comi / ucomi intrinsics.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27444 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 23:38:46 +00:00
Evan Cheng
1d5a8cca00
Handle canonical form of e.g.
...
vector_shuffle v1, v1, <0, 4, 1, 5, 2, 6, 3, 7>
This is turned into
vector_shuffle v1, <undef>, <0, 0, 1, 1, 2, 2, 3, 3>
by dag combiner.
It would match a {p}unpckl on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27437 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 07:20:06 +00:00
Evan Cheng
865f0606f7
Bogus assert
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27434 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 06:11:20 +00:00
Evan Cheng
278158b487
Fallthrough to expand if a VECTOR_SHUFFLE cannot be custom lowered.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27433 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 06:09:26 +00:00
Evan Cheng
c21a053729
Handle v8i16 shuffle that must be broken into a pair of pshufhw / pshuflw.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27427 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 01:47:37 +00:00
Evan Cheng
20e3ed102b
Use movlpd to: store lower f64 extracted from v2f64.
...
Use movhpd to: store upper f64 extracted from v2f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27382 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 22:30:54 +00:00
Evan Cheng
11e15b38e9
- More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc.
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- Some bug fixes and naming inconsistency fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27377 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 20:53:28 +00:00
Evan Cheng
653159f4aa
Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed
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INSERT_VECTOR_ELT to insert a 16-bit value in a 128-bit vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27314 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 21:55:24 +00:00
Evan Cheng
b067a1e7e6
Add support to use pextrw and pinsrw to extract and insert a word element
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from a 128-bit vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27304 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 19:22:53 +00:00
Evan Cheng
33e85ca7b6
Expand all INSERT_VECTOR_ELT (obviously bad) for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27275 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 01:30:39 +00:00
Evan Cheng
fb47a9b1c8
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27272 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 00:33:57 +00:00
Evan Cheng
ef698ca30d
Ok for vector_shuffle mask to contain undef elements.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27271 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 00:30:29 +00:00
Evan Cheng
7d9061e300
Make sure all possible shuffles are matched.
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Use pshufd, pshuhw, and pshulw to shuffle v4f32 if shufps doesn't match.
Use shufps to shuffle v4f32 if pshufd, pshuhw, and pshulw don't match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27259 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-30 19:54:57 +00:00
Evan Cheng
506d3dfa90
- Added some SSE2 128-bit packed integer ops.
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- Added SSE2 128-bit integer pack with signed saturation ops.
- Added pshufhw and pshuflw ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27252 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 23:07:14 +00:00
Evan Cheng
691c923e47
Need to special case splat after all. Make the second operand of splat
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vector_shuffle undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27250 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 19:02:40 +00:00
Evan Cheng
475aecf467
- More shuffle related bug fixes.
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- Whenever possible use ops of the right packed types for vector shuffles /
splats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27246 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 03:04:49 +00:00
Evan Cheng
4f5633883b
- Only use pshufd for v4i32 vector shuffles.
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- Other shuffle related fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 01:30:51 +00:00
Evan Cheng
36b27f3cde
Fixing buggy code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27239 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 23:41:33 +00:00
Jim Laskey
2d2a6131da
Added missing paren on behalf of Ramana Radhakrishnan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27223 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 10:17:11 +00:00
Evan Cheng
ed4ca7f6c3
Missed X86::isUNPCKHMask
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27222 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 08:27:15 +00:00
Evan Cheng
2064a2b47e
* Prefer using operation of matching types. e.g unpcklpd rather than movlhps.
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* Bug fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27218 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 06:50:32 +00:00
Evan Cheng
4fcb922c70
- Clean up / consoladate various shuffle masks.
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- Some misc. bug fixes.
- Use MOVHPDrm to load from m64 to upper half of a XMM register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27210 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 02:43:26 +00:00
Evan Cheng
0038e59803
Model unpack lower and interleave as vector_shuffle so we can lower the
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intrinsics as such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27200 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 00:39:58 +00:00
Evan Cheng
a0b3afbe14
Use pcmpeq to generate vector of all ones.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27167 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-27 07:00:16 +00:00
Nate Begeman
f15485a8d0
SelectionDAGISel can now natively handle Switch instructions, in the same
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manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.
This functionality is currently only enabled on x86, but should be safe for
every target. In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-27 01:32:24 +00:00
Evan Cheng
ffea91e522
Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes / cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27150 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-26 09:53:12 +00:00
Evan Cheng
c60bd97b94
Build arbitrary vector with more than 2 distinct scalar elements with a
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series of unpack and interleave ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27119 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-25 09:37:23 +00:00
Evan Cheng
7b1d34bc6c
Added 128-bit packed integer subtraction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-25 01:33:37 +00:00
Evan Cheng
bc4832bc64
Support for scalar to vector with zero extension.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 23:15:12 +00:00
Evan Cheng
386031a06f
Handle BUILD_VECTOR with all zero elements.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27056 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 07:29:27 +00:00
Chris Lattner
9d5da1d96c
Gabor points out that we can't spell. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27049 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 07:12:19 +00:00
Evan Cheng
5217a5b58c
All v2f64 shuffle cases can be handled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27044 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 06:40:32 +00:00
Evan Cheng
2c0dbd01d2
More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27040 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 02:58:06 +00:00
Evan Cheng
14aed5e66b
Handle more shuffle cases with SHUFP* instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27024 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 01:18:28 +00:00
Evan Cheng
8fc23cd0e9
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26997 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23 20:26:04 +00:00
Evan Cheng
a971f6f967
Add 128-bit integer vector load and add (for testing).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26967 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23 01:57:24 +00:00
Evan Cheng
ca6e8eafd2
Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do
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64-bit vector shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26964 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 22:07:06 +00:00
Evan Cheng
a88973f826
Some clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26957 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 19:22:18 +00:00
Evan Cheng
1bffadd7fb
- Supposely movlhps is faster / better than unpcklpd.
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- Don't forget pshufd is only available with sse2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26956 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 19:16:21 +00:00
Evan Cheng
0188ecba85
- Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support
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splat and PSHUFD cases.
- Clean up shuffle / splat matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26954 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 18:59:22 +00:00
Evan Cheng
63d3300da1
- VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches
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PSHUFD. We can make permutes entries which point to the undef pointing
anything we want.
- Change some names to appease Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26951 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 08:01:21 +00:00
Chris Lattner
6df1154644
fix a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26941 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 04:18:34 +00:00
Evan Cheng
b9df0ca67b
Some splat and shuffle support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26940 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 02:53:00 +00:00
Evan Cheng
48090aa814
- Use movaps to store 128-bit vector integers.
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- Each scalar to vector v8i16 and v16i8 is a any_extend followed by a movd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 23:01:21 +00:00
Chris Lattner
9b3bd467d0
These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 20:51:05 +00:00
Chris Lattner
39afef3150
Add a build_vector node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20 06:18:01 +00:00
Chris Lattner
a064d28843
rename these nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26848 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-19 01:13:28 +00:00
Evan Cheng
df57fa0c7d
Darwin should use _setjmp/_longjmp instead of setjmp/longjmp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26833 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 20:31:41 +00:00
Chris Lattner
89fad2c3b2
Disable x86 fastcc from passing args in registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 17:27:47 +00:00
Chris Lattner
1c636e9d98
Parameterize the number of integer arguments to pass in registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26818 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 05:10:20 +00:00
Nate Begeman
81e8097377
Remove BRTWOWAY*
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Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26814 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 01:40:33 +00:00
Evan Cheng
2221de9cc1
Bug fix: condition inverted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26804 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 22:02:48 +00:00
Evan Cheng
714554d707
Added a way for TargetLowering to specify what values can be used as the
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scale component of the target addressing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26802 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 21:47:42 +00:00
Evan Cheng
30b37b5f29
Add LSR hooks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26740 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13 23:18:16 +00:00
Evan Cheng
ff909926e2
Use rep/stosl; and Count 0x3; rep/stosb for memset with 4 byte aligned dest.
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and variable value.
Similarly for memcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26603 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07 23:29:39 +00:00
Evan Cheng
3c992d291b
Enable Dwarf debugging info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26581 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07 02:02:57 +00:00
Chris Lattner
9601a86a64
Copysign needs to be expanded everywhere. Note that Alpha and IA64 should
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implement copysign as a native op if they have it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26541 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-05 05:08:37 +00:00
Evan Cheng
62bec2ca4c
MEMSET / MEMCPY lowering bugs: we can't issue a single WORD / DWORD version of
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rep/stos and rep/mov if the count is not a constant. We could do
rep/stosl; and $count, 3; rep/stosb
For now, I will lower them to memset / memcpy calls. We will revisit this after
a little bit experiment.
Also need to take care of the trailing bytes even if the count is a constant.
Since the max. number of trailing bytes are 3, we will simply issue loads /
stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26517 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-04 02:48:56 +00:00
Evan Cheng
8df346b4e8
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26512 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-04 01:12:00 +00:00
Chris Lattner
41edaa0529
remove the read/write port/io intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26479 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03 00:19:58 +00:00
Evan Cheng
d30bf01e90
Vector op lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26438 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01 01:11:20 +00:00
Evan Cheng
bbbb2fbbde
Added a common about the need for X86ISD::Wrapper.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26372 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 09:55:19 +00:00
Evan Cheng
020d2e8e7a
- Clean up the lowering and selection code of ConstantPool, GlobalAddress,
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and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
mentioned leaf nodes. Do not mutate and nodes and do not record the
selection in CodeGenMap. These nodes should be safe to duplicate. This is
a performance win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26335 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 20:41:18 +00:00
Evan Cheng
a0ea0539e3
PIC related bug fixes.
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1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26324 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 02:43:52 +00:00
Evan Cheng
4c1aa86657
- Added option -relocation-model to set relocation model. Valid values include static, pic,
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dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26315 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 20:19:42 +00:00
Evan Cheng
470a6adc78
Added MMX, SSE1, and SSE2 vector instructions and some simple patterns.
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Fixed some existing bugs (wrong predicates, prefixes) at the same time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 02:26:30 +00:00
Chris Lattner
1efa40f6a4
split register class handling from explicit physreg handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 00:56:39 +00:00
Chris Lattner
4217ca8dc1
Updates to match change of getRegForInlineAsmConstraint prototype
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 23:11:00 +00:00
Evan Cheng
45af8fd8c2
If SSE3 is available, promote FP_TO_UINT i32 to FP_TO_SINT i64 to take
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advantage of fisttpll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26288 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 07:26:17 +00:00
Evan Cheng
7ccced634a
x86 / Darwin PIC support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26273 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 00:15:05 +00:00
Chris Lattner
c2fe97e726
unbreak the build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26260 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 07:09:27 +00:00
Evan Cheng
5298bcc722
Unbreak x86 be
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26259 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 07:01:52 +00:00
Nate Begeman
551bf3f800
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
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and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 05:43:56 +00:00
Nate Begeman
4c5dcf54ff
Kill the x86 pattern isel. boom.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26246 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 00:03:04 +00:00
Nate Begeman
368e18d56a
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
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and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 21:11:51 +00:00
Evan Cheng
18a8452f3d
A bit more memset / memcpy optimization.
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Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26224 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 00:21:07 +00:00
Evan Cheng
a03a5dc7ce
Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:38:30 +00:00
Evan Cheng
87ed716d21
Set maxStoresPerMemSet to 16. Ditto for maxStoresPerMemCpy and
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maxStoresPerMemMove. Although the last one is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26172 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:25:08 +00:00
Chris Lattner
94dd29216c
Switch targets over to using SelectionDAG::getCALLSEQ_START to create
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CALLSEQ_START nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26143 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-13 09:00:43 +00:00