Anton Korobeynikov
f5b6a47bb5
Handle visibility printing with all generality. Remove bunch of duplicate code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54540 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:25:07 +00:00
Evan Cheng
42ccc21ce7
Undo most of r54519.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54534 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 17:56:50 +00:00
Evan Cheng
711b6dce24
It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54519 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 06:56:16 +00:00
Anton Korobeynikov
0f3cc65738
Switch ARM to new section handling stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54458 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:54:23 +00:00
Dan Gohman
475871a144
Rename SDOperand to SDValue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27 21:46:04 +00:00
Evan Cheng
d1b3da621b
Teach ARM isLegalAddressingMode to handle unknown type without crashing. This fixes pr2589.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54004 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 00:55:17 +00:00
Dan Gohman
e8be6c6391
Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk
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replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 19:10:17 +00:00
Chris Lattner
78d60458d5
add support for returning i128, PR2532.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53472 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 20:53:00 +00:00
Dan Gohman
dc2fbddd9d
Trim unnecessary #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53471 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 20:38:31 +00:00
Dale Johannesen
f2452c5f48
Emit debug info for data-only files. ARM version.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53360 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-09 21:20:54 +00:00
Evan Cheng
526be70f94
Back out 53254. It broke ppc debug info codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53280 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-09 06:36:53 +00:00
Dale Johannesen
f71cb9b3ed
Make debug info come out in data-only files.
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This is a question of the debugging setup code not
being called at the right time, and it's called from
target-dependent code for some reason. I have only
attempted to fix Darwin, but I'm pretty sure it's
broken elsewhere; I'll leave that to people who can
test it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53254 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-08 21:56:22 +00:00
Dan Gohman
8e5f2c6f65
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
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MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-07 23:14:23 +00:00
Dan Gohman
4542611bb9
Minor const-correctness fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53196 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-07 20:06:06 +00:00
Dan Gohman
1002c02034
Add explicit keywords.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53179 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-07 18:00:37 +00:00
Duncan Sands
126d90770b
Rather than having a different custom legalization
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hook for each way in which a result type can be
legalized (promotion, expansion, softening etc),
just use one: ReplaceNodeResults, which returns
a node with exactly the same result types as the
node passed to it, but presumably with a bunch of
custom code behind the scenes. No change if the
new LegalizeTypes infrastructure is not turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53137 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-04 11:47:58 +00:00
Evan Cheng
9f1c8317a4
- Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
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- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53097 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-03 09:09:37 +00:00
Owen Anderson
f660c171c8
Make LiveVariables even more optional, by making it optional in the call to TargetInstrInfo::convertToThreeAddressInstruction
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Also, if LV isn't around, then TwoAddr doesn't need to be updating flags, since they won't have been set in the first place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53058 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-02 23:41:07 +00:00
Duncan Sands
4bdcb61af3
Add a new getMergeValues method that does not need
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to be passed the list of value types, and use this
where appropriate. Inappropriate places are where
the value type list is already known and may be
long, in which case the existing method is more
efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53035 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-02 17:40:58 +00:00
Dan Gohman
4406604047
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
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the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 00:05:16 +00:00
Dan Gohman
7f460203b0
Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect its
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purpose, and give it a custom SDNode subclass so that it doesn't
need to have line number, column number, filename string, and
directory string, all existing as individual SDNodes to be the
operands.
This was the only user of ISD::STRING, StringSDNode, etc., so
remove those and some associated code.
This makes stop-points considerably easier to read in
-view-legalize-dags output, and reduces overhead (creating new
nodes and copying std::strings into them) on code containing
debugging information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52924 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 20:59:49 +00:00
Evan Cheng
db8d56b825
Split scheduling from instruction selection.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52923 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 20:45:06 +00:00
Duncan Sands
f9516208e5
Revert the SelectionDAG optimization that makes
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it impossible to create a MERGE_VALUES node with
only one result: sometimes it is useful to be able
to create a node with only one result out of one of
the results of a node with more than one result, for
example because the new node will eventually be used
to replace a one-result node using ReplaceAllUsesWith,
cf X86TargetLowering::ExpandFP_TO_SINT. On the other
hand, most users of MERGE_VALUES don't need this and
for them the optimization was valuable. So add a new
utility method getMergeValues for creating MERGE_VALUES
nodes which by default performs the optimization.
Change almost everywhere to use getMergeValues (and
tidy some stuff up at the same time).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 10:19:09 +00:00
Duncan Sands
83ec4b6711
Wrap MVT::ValueType in a struct to get type safety
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and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 12:08:01 +00:00
Dale Johannesen
428ac54894
Add StringConstantPrefix to control what the
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assembler names of string constants look like.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51909 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-03 18:09:06 +00:00
Dale Johannesen
c215b3ef5d
Handle quoted names when constructing $stub's,
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$non_lazy_ptr's and $lazy_ptr's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51277 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-19 21:38:18 +00:00
Dan Gohman
c9f5f3f64f
Change target-specific classes to use more precise static types.
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This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51091 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 01:58:56 +00:00
Dan Gohman
844731a7f1
Clean up the use of static and anonymous namespaces. This turned up
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several things that were neither in an anonymous namespace nor static
but not intended to be global.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 00:00:25 +00:00
Chris Lattner
3bf6accfea
Match things like 'armv5tejl-unknown-linux-gnu' for PR2290
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50698 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 02:29:28 +00:00
Dan Gohman
1f13c686df
Fix the SVOffset values for loads and stores produced by
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memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 17:15:20 +00:00
Nicolas Geoffray
51cc3c13ea
Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function
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the stub will resolve.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49814 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-16 20:46:05 +00:00
Nicolas Geoffray
52e724ad7e
Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49809 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-16 20:10:13 +00:00
Dan Gohman
29e4bdbf27
Fix const-correctness issues with the SrcValue handling in the
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memory intrinsic expansion code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49666 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-14 17:55:48 +00:00
Dan Gohman
707e018423
Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
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on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.
Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.
This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.
Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.
This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-12 04:36:06 +00:00
Evan Cheng
110cf48752
Unbreak ARM / Thumb soft FP support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49012 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01 01:50:16 +00:00
Evan Cheng
ca1267c02b
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-31 20:40:39 +00:00
Chris Lattner
d27c991ceb
Fix "Control reaches the end of non-void function" warnings,
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patch by David Chisnall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48963 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-30 18:22:13 +00:00
Dan Gohman
950a4c40b8
Add explicit keywords.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48801 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 22:06:05 +00:00
Dan Gohman
cfbb2f074d
A quick nm audit turned up several fixed tables and objects that were
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marked read-write. Use const so that they can be allocated in a
read-only segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48800 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 21:45:14 +00:00
Evan Cheng
066114555d
Add \t after .set. Fix by Jay Freeman.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48753 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-24 23:36:49 +00:00
Duncan Sands
276dcbdc8d
Introduce a new node for holding call argument
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flags. This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines. There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness. As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48640 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 09:14:45 +00:00
Evan Cheng
da47e6e0d0
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-15 00:03:38 +00:00
Dan Gohman
bfae83139d
Use PassManagerBase instead of FunctionPassManager for functions
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that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 22:29:46 +00:00
Evan Cheng
d2cde68855
Default ISD::PREFETCH to expand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:38:10 +00:00
Dale Johannesen
b8cafe3427
Increase ISD::ParamFlags to 64 bits. Increase the ByValSize
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field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff. Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 02:17:22 +00:00
Evan Cheng
27b7db549e
Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 00:58:38 +00:00
Evan Cheng
6130f66eaa
Refactor code. Remove duplicated functions that basically do the same thing as
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findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47927 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 00:59:57 +00:00
Evan Cheng
fb8075d03f
Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 00:43:03 +00:00
Bill Wendling
6ef781f3ce
Final de-tabification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 06:33:05 +00:00
Evan Cheng
d36531249a
Spiller now remove unused spill slots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47657 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 03:04:06 +00:00
Bill Wendling
74ab84c31e
Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
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would have been a Godsend here!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 21:11:01 +00:00
Anton Korobeynikov
7c1c261272
Remove bunch of gcc 4.3-related warnings from Target
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47369 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-20 11:22:39 +00:00
Andrew Lenharth
d497d9fab6
I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47213 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-16 14:46:26 +00:00
Chris Lattner
ec321b4d64
Handle \n's in value names for more targets. The asm printers
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really really really need refactoring :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47171 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-15 19:04:54 +00:00
Duncan Sands
00fee65fd2
In TargetLowering::LowerCallTo, don't assert that
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the return value is zero-extended if it isn't
sign-extended. It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned". Currently
isSExt is set when signed, and nothing is
set otherwise. This should be right for all
calls to standard library routines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 17:28:50 +00:00
Nate Begeman
e179584f9b
Change how FP immediates are handled.
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1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
if it is legal.
This allows ConstantFP to be handled like Constant, allowing for
targets that can encode FP immediates as MachineOperands.
As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants! Hooray.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 08:57:00 +00:00
Dan Gohman
977a76fbb6
Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
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to pass the mask APInt by value, not by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47096 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 22:28:48 +00:00
Chris Lattner
9f72d1a730
don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS.
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DAGCombine is now quite good at zapifying them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47053 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 07:35:30 +00:00
Dan Gohman
fd29e0eb06
Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
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Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47039 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 00:35:47 +00:00
Dale Johannesen
3006c39e3a
__DATA not __DATA__ is the right segment name on darwin.
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Spotted by Nick Kledzik.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47037 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-12 23:35:09 +00:00
Nate Begeman
bf1caa9854
Remove some dead code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47036 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-12 22:54:40 +00:00
Dan Gohman
6f0d024a53
Rename MRegisterInfo to TargetRegisterInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-10 18:45:23 +00:00
Evan Cheng
5fd79d0560
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-08 21:20:40 +00:00
Dan Gohman
69de1932b3
Re-apply the memory operand changes, with a fix for the static
...
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-06 22:27:42 +00:00
Evan Cheng
4e3f5a4e9c
Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46724 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-04 23:06:48 +00:00
Nate Begeman
c451ac0a42
This method should be virtual
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46723 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-04 23:04:24 +00:00
Nate Begeman
48a65511d0
Eliminate some redundant code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46720 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-04 21:44:06 +00:00
Chris Lattner
3d62d780ab
explicitly include Compiler.h instead of getting it from tblgen in the middle of a class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46676 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-03 05:43:57 +00:00
Chris Lattner
a47b9bcbde
don't do ReplaceUses on a result that doesn't exist.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46673 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-03 03:20:59 +00:00
Evan Cheng
4eecdeb3fa
Get rid of the annoying blank lines before labels.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-02 08:39:46 +00:00
Evan Cheng
a844bdeab3
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
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Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-02 04:07:54 +00:00
Evan Cheng
334dc1f58d
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46623 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-31 21:00:00 +00:00
Dan Gohman
c6c391dadd
Create a new class, MemOperand, for describing memory references
...
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46585 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-31 00:25:39 +00:00
Evan Cheng
ff9b373e8f
Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert
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instruction at the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-30 18:18:23 +00:00
Dan Gohman
b625f2f896
Factor the addressing mode and the load/store VT out of LoadSDNode
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and StoreSDNode into their common base class LSBaseSDNode. Member
functions getLoadedVT and getStoredVT are replaced with the common
getMemoryVT to simplify code that will handle both loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46538 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-30 00:15:11 +00:00
Bill Wendling
200e90c74b
If the function has no machine instructions, then emit a "nop" so that
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the function label isn't associated with something it shouldn't be.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46449 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-28 09:15:03 +00:00
Duncan Sands
f9c98e650d
The last pieces needed for loading arbitrary
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precision integers. This won't actually work
(and most of the code is dead) unless the new
legalization machinery is turned on. While
there, I rationalized the handling of i1, and
removed some bogus (and unused) sextload patterns.
For i1, this could result in microscopically
better code for some architectures (not X86).
It might also result in worse code if annotating
with AssertZExt nodes turns out to be more harmful
than helpful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46280 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-23 20:39:46 +00:00
Dale Johannesen
25edeb32e7
Honor explicit section information on Darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46267 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-23 00:58:14 +00:00
Dale Johannesen
25a0195114
Revert the part of 45849 that treated weak globals
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as weak globals rather than commons. While not wrong,
this change tickled a latent bug in Darwin's strip,
so revert it for now as a workaround.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46147 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-17 23:36:04 +00:00
Chris Lattner
ddf89566a9
This commit changes:
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1. Legalize now always promotes truncstore of i1 to i8.
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
safe.
The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:
_foo:
fldt 20(%esp)
fldt 4(%esp)
faddp %st(1)
movl 36(%esp), %eax
fstps (%eax)
ret
instead of:
_foo:
subl $4, %esp
fldt 24(%esp)
fldt 8(%esp)
faddp %st(1)
fstps (%esp)
movl 40(%esp), %eax
movss (%esp), %xmm0
movss %xmm0, (%eax)
addl $4, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-17 19:59:44 +00:00
Chris Lattner
48be23cd65
rename SDTRet -> SDTNone.
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Move definition of 'trap' sdnode up from x86 instrinfo to targetselectiondag.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46017 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-15 22:02:54 +00:00
Owen Anderson
7047dd4d22
Remove DefInst from LiveVariables::VarInfo. Use the facilities on MachineRegisterInfo instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46016 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-15 22:02:46 +00:00
Chris Lattner
5080f4d991
rename MachineInstr::setInstrDescriptor -> setDesc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45871 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-11 18:10:50 +00:00
Dale Johannesen
12591d70f6
Weak zeroes don't go in bss on Darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45849 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-11 01:59:45 +00:00
Chris Lattner
9b37aaf04c
get def use info more correct.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45821 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-10 05:12:37 +00:00
Evan Cheng
325474e065
Only mark instructions that load a single value without extension as isSimpleLoad = 1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45727 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 23:56:57 +00:00
Chris Lattner
749c6f6b5e
rename TargetInstrDescriptor -> TargetInstrDesc.
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Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 07:27:27 +00:00
Chris Lattner
0ff23966fe
Rename all the M_* flags to be namespace qualified enums, and switch
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all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 06:42:05 +00:00
Chris Lattner
349c495200
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45680 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 03:13:06 +00:00
Chris Lattner
cc8cd0cbf1
remove MachineOpCode typedef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45679 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 02:48:55 +00:00
Chris Lattner
69244300b8
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
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that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 01:56:04 +00:00
Owen Anderson
43dbe05279
Move even more functionality from MRegisterInfo into TargetInstrInfo.
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Some day I'll get it all moved over...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 01:35:02 +00:00
Chris Lattner
834f1ce031
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 23:38:27 +00:00
Chris Lattner
2e48a70b35
rename isStore -> mayStore to more accurately reflect what it captures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45656 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 08:36:04 +00:00
Chris Lattner
13c6310866
remove explicit isStore flags that are now inferrable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45653 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 05:55:01 +00:00
Owen Anderson
d94b6a16fe
Move some more functionality from MRegisterInfo to TargetInstrInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45603 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-04 23:57:37 +00:00
Owen Anderson
f6372aa1cc
Move some more instruction creation methods from RegisterInfo into InstrInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-01 21:11:32 +00:00
Chris Lattner
6410552250
Fix a problem where lib/Target/TargetInstrInfo.h would include and use
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a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45475 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-01 01:03:04 +00:00
Owen Anderson
d10fd9791c
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
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Machine-level API cleanup instigated by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-31 06:32:00 +00:00
Chris Lattner
84bc5427d6
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
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that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-31 04:13:23 +00:00
Chris Lattner
8aa797aa51
Add new shorter predicates for testing machine operands for various types:
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-30 23:10:15 +00:00
Chris Lattner
9a1ceaedc2
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-30 20:49:49 +00:00
Chris Lattner
c8bd287f3c
use simplified operand addition methods.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45437 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-30 01:01:54 +00:00
Chris Lattner
4ee451de36
Remove attribution from file headers, per discussion on llvmdev.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 20:36:04 +00:00
Chris Lattner
fc643c5e88
remove attribution from lib Makefiles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45415 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 20:09:26 +00:00
Evan Cheng
6e141fd048
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 23:12:09 +00:00
Evan Cheng
1713d8bcff
Doh
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44694 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-08 01:01:07 +00:00
Evan Cheng
7658445fa6
Fix a compilation warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44692 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-08 01:00:31 +00:00
Evan Cheng
d64b5c82b9
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
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the stored register is killed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44600 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-05 03:14:33 +00:00
Evan Cheng
aee4af68ae
Remove redundant foldMemoryOperand variants and other code clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44517 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-02 08:30:39 +00:00
Evan Cheng
e62f97c094
Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44479 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-01 02:07:52 +00:00
Chris Lattner
a3f61df4ff
several entries got significantly better, though they still aren't done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44382 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-27 22:41:52 +00:00
Chris Lattner
f1b1c5ed1a
implement a trivial readme entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44380 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-27 22:36:16 +00:00
Chris Lattner
27a6c7380f
Several changes:
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1) Change the interface to TargetLowering::ExpandOperationResult to
take and return entire NODES that need a result expanded, not just
the value. This allows us to handle things like READCYCLECOUNTER,
which returns two values.
2) Implement (extremely limited) support in LegalizeDAG::ExpandOp for MERGE_VALUES.
3) Reimplement custom lowering in LegalizeDAGTypes in terms of the new
ExpandOperationResult. This makes the result simpler and fully
general.
4) Implement (fully general) expand support for MERGE_VALUES in LegalizeDAGTypes.
5) Implement ExpandOperationResult support for ARM f64->i64 bitconvert and ARM
i64 shifts, allowing them to work with LegalizeDAGTypes.
6) Implement ExpandOperationResult support for X86 READCYCLECOUNTER and FP_TO_SINT,
allowing them to work with LegalizeDAGTypes.
LegalizeDAGTypes now passes several more X86 codegen tests when enabled and when
type legalization in LegalizeDAG is ifdef'd out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44300 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-24 07:07:01 +00:00
Dale Johannesen
b97aec663b
Add parameter to getDwarfRegNum to permit targets
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to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 19:13:01 +00:00
Bill Wendling
c69107ca11
Unifacalize the CALLSEQ{START,END} stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44045 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 09:19:02 +00:00
Bill Wendling
0f8d9c04d9
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
...
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 00:44:25 +00:00
Owen Anderson
20ab29068d
Add a flag for indirect branch instructions.
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Target maintainers: please check that the instructions for your target are correctly marked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44012 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 07:39:39 +00:00
Anton Korobeynikov
f191c80cd7
Use TableGen to emit information for dwarf register numbers.
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This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-11 19:50:10 +00:00
Evan Cheng
cc41586b9d
Much improved pic jumptable codegen:
...
Then:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
imull $4, %ecx, %ecx
leal LJTI1_0-"L1$pb"(%eax), %edx
addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx
jmpl *%edx
.align 2
.set L1_0_set_3,LBB1_3-LJTI1_0
.set L1_0_set_2,LBB1_2-LJTI1_0
.set L1_0_set_5,LBB1_5-LJTI1_0
.set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
Now:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
jmpl *%eax
.align 2
.set L1_0_set_3,LBB1_3-"L1$pb"
.set L1_0_set_2,LBB1_2-"L1$pb"
.set L1_0_set_5,LBB1_5-"L1$pb"
.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 01:32:10 +00:00
Lauro Ramos Venancio
e0cb36b9fb
[ARM] Implement __builtin_thread_pointer.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43892 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-08 17:20:05 +00:00
Rafael Espindola
f1ba1cad38
Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
...
Thanks for the suggestions Bill :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 23:12:20 +00:00
Lauro Ramos Venancio
8699a97a2e
[ARM] Fix code generation for:
...
static __thread struct {
int a;
int b;
} teste = {0, 0};
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43722 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 18:33:37 +00:00
Duncan Sands
ca0ed74485
Eliminate the remaining uses of getTypeSize. This
...
should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43688 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 00:04:43 +00:00
Rafael Espindola
e0703c84dd
Make ARM and X86 LowerMEMCPY identical by moving the isThumb check into getMaxInlineSizeThreshold
...
and by restructuring the X86 version.
New I just have to move this to a common place :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43554 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-31 14:39:58 +00:00
Rafael Espindola
fc05f402ea
Make ARM an X86 memcpy expansion more similar to each other.
...
Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it.
This should not change generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43552 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-31 11:52:06 +00:00
Dale Johannesen
ca4571e79f
Support non-POSIX hosts by removing use of strncasecmp.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43364 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-25 21:54:43 +00:00
Evan Cheng
4102eb57bb
Fix memcpy lowering when addresses are 4-byte aligned but size is not multiple of 4.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43234 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-22 22:11:27 +00:00
Rafael Espindola
7b73a5d6de
split LowerMEMCPY into LowerMEMCPYCall and LowerMEMCPYInline in the ARM backend.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43176 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 14:35:17 +00:00
Chris Lattner
3a7c33a853
Add an easy microoptimization I noticed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43164 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 03:29:26 +00:00
Evan Cheng
f0a0cddbcd
- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
...
- Fix some copy+paste bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 22:40:57 +00:00
Evan Cheng
58184e6878
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 21:29:24 +00:00
Christopher Lamb
a4c791072f
Fix a misnamed parameter.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43145 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 19:29:45 +00:00
Chris Lattner
65a3323b0a
legalizing the ret operation on f64 shouldn't introduce a new
...
i64 bit convert needlessly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43116 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 06:17:07 +00:00
Evan Cheng
347d39f1fd
Revert 42908 for now.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 05:57:21 +00:00
Dan Gohman
8ddde0a151
Change the names used for internal labels to use the current
...
function symbol name instead of a codegen-assigned function
number.
Thanks Evan! :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:53:36 +00:00
Dan Gohman
f96e4de403
Set ISD::FPOW to Expand.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:21:31 +00:00
Dan Gohman
525178cdbf
Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
...
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 18:33:35 +00:00
Evan Cheng
66f0f64082
- Added a few target hooks to generate load / store instructions from / to any
...
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42621 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:32:41 +00:00
Dan Gohman
cb406c2597
Use empty() member functions when that's what's being tested for instead
...
of comparing begin() and end().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42585 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-03 19:26:29 +00:00
Gordon Henriksen
cd8bc05102
AsmPrinters overriding getAnalysisUsage should call super.
...
And not super's super, either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42482 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-30 13:39:29 +00:00
Evan Cheng
9efce638d3
Allow copyRegToReg to emit cross register classes copies.
...
Tested with "make check"!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:25:56 +00:00
Dan Gohman
677ccc6e8b
More explicit keywords.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42316 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 20:27:06 +00:00
Evan Cheng
76a4023096
Honor user-defined section specification of a global, ignores whether its initializer is null.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42182 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 00:41:19 +00:00
Evan Cheng
17207ddf38
Enable if-conversion for ARM by default.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42156 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 00:48:22 +00:00
Evan Cheng
e71bff7405
Avoid referencing deleted instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 21:48:07 +00:00
Dan Gohman
92dfe2001e
Remove isReg, isImm, and isMBB, and change all their users to use
...
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 20:33:02 +00:00
Bill Wendling
fe4afb17d3
Enable indirect encoding for the personality function
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41873 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 23:55:40 +00:00
Evan Cheng
071a279e94
Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 19:55:27 +00:00
Duncan Sands
f7331b3dd7
Fold the adjust_trampoline intrinsic into
...
init_trampoline. There is now only one
trampoline intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 14:10:23 +00:00
Evan Cheng
be36798bfe
80 col.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41812 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-10 22:22:23 +00:00
Chris Lattner
bf8ae84a21
Add some notes about better flag handling.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41808 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-10 21:43:18 +00:00
Owen Anderson
718cb665ca
Add lengthof and endof templates that hide a lot of sizeof computations.
...
Patch by Sterling Stein!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 04:06:50 +00:00
Dale Johannesen
eaf089430e
Enhance APFloat to retain bits of NaNs (fixes oggenc).
...
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41632 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-31 04:03:46 +00:00
Raul Herbster
8c132633c8
Instruction formats added used to generate multiply instructions of V5TE.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41629 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:34:14 +00:00
Raul Herbster
b94e60872e
Unused relocation type reloc_arm_absolute removed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41628 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:31:35 +00:00
Raul Herbster
9c1a3827ce
Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41627 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:29:26 +00:00
Raul Herbster
37fb5b154c
ARM instruction table was modified by adding information to generate multiply instruction of V5TE.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41626 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:25:47 +00:00
Raul Herbster
d05c04c169
JITInfo now resolves function addrs and also relocations. It always emits a stub.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41625 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:21:27 +00:00
Evan Cheng
35b35c5c32
Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41597 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 05:52:20 +00:00
Evan Cheng
0ff94f7fcc
Initial JIT support for ARM by Raul Fernandes Herbster.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40887 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07 01:37:15 +00:00
Dan Gohman
61e729e2e9
More explicit keywords.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40757 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02 21:21:54 +00:00
Evan Cheng
7fc77611ef
Indexed loads each has 2 outputs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40658 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01 00:12:08 +00:00
Dan Gohman
f452207d20
More explicit keywords.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40589 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-30 14:51:59 +00:00
Duncan Sands
36397f5034
Support for trampolines, except for X86 codegen which is
...
still under discussion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40549 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-27 12:58:54 +00:00
Dan Gohman
b8275a3f6f
Don't ignore the return value of AsmPrinter::doInitialization and
...
AsmPrinter::doFinalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40487 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-25 19:33:14 +00:00
Evan Cheng
ffbaccae02
No more noResults.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40132 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-21 00:34:19 +00:00
Evan Cheng
8bd6035750
Added -print-emitted-asm to print out JIT generated asm to cerr.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-20 21:56:13 +00:00
Evan Cheng
64d80e3387
Change instruction description to split OperandList into OutOperandList and
...
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 01:14:50 +00:00
Evan Cheng
4558b807a2
Only adjust esp around calls in presence of alloca.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40030 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 00:42:58 +00:00
Chris Lattner
c3dbe70ce7
no email addrs in file headers
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-17 05:56:43 +00:00
Anton Korobeynikov
2365f51ed0
Long live the exception handling!
...
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-14 14:06:15 +00:00
Dale Johannesen
66a2a8f878
ARM: make branch folder remove unconditional branches
...
following jump tables that it earlier inserted. This
would be OK on other targets but is needed for correctness
only on ARM (constant islands needs to find jump tables).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39782 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-12 16:45:35 +00:00
Dale Johannesen
5d9c4b6020
Fix hang compiling TimberWolf (allow for islands
...
of size other than 4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39743 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 18:32:38 +00:00
Evan Cheng
8202010364
Didn't mean the last commit. Revert.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38515 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 22:00:16 +00:00
Evan Cheng
c608ff22e7
Update.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38513 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 21:49:47 +00:00
Evan Cheng
13ab020ea0
Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38501 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 18:08:01 +00:00
Chris Lattner
87bdba6d6a
The various "getModuleMatchQuality" implementations should return
...
zero if they see a target triple they don't understand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38463 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-09 17:25:29 +00:00
Evan Cheng
9ad6f03166
No need for ccop anymore.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37965 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 23:34:09 +00:00
Evan Cheng
4b9cb7d135
Incorrect check.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 23:23:19 +00:00
Evan Cheng
06aae67b83
Do away with ImmutablePredicateOperand.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37961 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 23:22:46 +00:00
Evan Cheng
dfb2ebac29
Print the s bit if the instruction is toggled to its CPSR setting form.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37932 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 01:01:34 +00:00
Evan Cheng
04c813d00c
PredicateDefOperand -> OptionalDefOperand.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37931 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 01:00:49 +00:00
Evan Cheng
148b6a419f
Initial ARM JIT support by Raul Fernandes Herbster.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37926 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 21:15:40 +00:00
Evan Cheng
d54874a06d
Unbreak the build.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37914 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 17:13:19 +00:00
Gabor Greif
a99be51bf5
Here is the bulk of the sanitizing.
...
Almost all occurrences of "bytecode" in the sources have been eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37913 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 17:07:56 +00:00
Evan Cheng
0e1d37904a
Reflects the chanegs made to PredicateOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37898 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:18:20 +00:00
Evan Cheng
16b6598325
Added ARM::CPSR to represent ARM CPSR status register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37897 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:17:13 +00:00
Evan Cheng
ee568cf794
Unfortunately we now require C++ code to isel Bcc, conditional moves, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37896 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:15:27 +00:00
Evan Cheng
c85e832eb7
Each ARM use predicate operand is now made up of two components. The new component is the CPSR register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37895 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:13:32 +00:00
Evan Cheng
3b5b8368f3
Added ARM::CPSR to represent ARM CPSR status register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37894 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:11:03 +00:00
John Criswell
e644ef7b09
Convert .cvsignore files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37801 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-29 16:35:07 +00:00
Evan Cheng
e2446c6076
Silence a warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37737 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26 18:31:22 +00:00
Dan Gohman
d45eddd214
Revert the earlier change that removed the M_REMATERIALIZABLE machine
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instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).
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2007-06-26 00:48:07 +00:00
Owen Anderson
0819a9d386
Fix the build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37705 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 16:59:54 +00:00
Dan Gohman
ea859be53c
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
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TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
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2007-06-22 14:59:07 +00:00
Dale Johannesen
5411835165
Quote complex names for Darwin X86 and ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37700 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 00:54:56 +00:00
Evan Cheng
97e604e7d8
Be more conservative of duplicating blocks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37669 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 23:55:02 +00:00
Evan Cheng
277f0741c5
Allow predicated immediate ARM to ARM calls.
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2007-06-19 21:05:09 +00:00
Dan Gohman
82a87a0172
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
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with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.
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2007-06-19 01:48:05 +00:00
Evan Cheng
eaa91b0a1f
Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
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2007-06-19 01:26:51 +00:00
Evan Cheng
d42e56e166
Instructions with unique labels or embedded jumptables cannot be duplicated during ifcvt.
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2007-06-15 21:15:00 +00:00
Dale Johannesen
13e8b51e3e
Handle blocks with 2 unconditional branches in AnalyzeBranch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37571 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-13 17:59:52 +00:00
Evan Cheng
bfd2ec4a8e
Add a utility routine to check for unpredicated terminator instruction.
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2007-06-08 21:59:56 +00:00
Lauro Ramos Venancio
61718a6285
Define AsmTransCBE for ARM.
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2007-06-08 21:06:23 +00:00
Evan Cheng
1fc7cb695c
Fix ARM condition code subsumission check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37517 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08 09:14:47 +00:00
Evan Cheng
f81dea45b5
tBcc is not a barrier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37516 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08 09:13:23 +00:00
Evan Cheng
9328c1ac66
Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a compilation warning? I blame it on the FE folks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37484 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-07 01:37:54 +00:00
Evan Cheng
2c614c5c69
Mark these instructions clobbersPred. They modify the condition code register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37468 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-06 10:17:05 +00:00
Evan Cheng
5e148a37d3
Print predicate of the second instruction of the two-piece constant MI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37437 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-05 18:55:18 +00:00
Evan Cheng
341dcccb4e
PIC label asm printing cosmetic changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37434 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-05 07:36:38 +00:00
Chris Lattner
c621ae7bba
update this entry, now that Anton implemented shift/and lowering for
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switches. There is one really easy isel thing here with tst we are not
getting.
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2007-06-02 18:45:14 +00:00
Evan Cheng
c354334ac4
Opcode modifier s comes after condition code. e.g. addlts, not addslt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37388 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01 20:51:29 +00:00
Evan Cheng
144fd1ff0f
Set ARM ifcvt duplication limit to 3 for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37385 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01 08:28:59 +00:00
Evan Cheng
df4da14948
Make jumptable non-predicable for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37381 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01 00:56:15 +00:00
Chris Lattner
3a4205367d
Fix the asmprinter so that a globalvalue can specify an explicit alignment
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smaller than the preferred alignment, but so that the target can actually
specify a minimum alignment if needed. This fixes some objc protocol
failures Devang tracked down.
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2007-05-31 18:57:45 +00:00
Evan Cheng
c6f2f6fbb9
For VFP2 fldm, fstm instructions, the condition code is printed after the address mode and size specifier. e.g. fstmiaseq, not fstmeqias.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37351 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 23:34:19 +00:00
Evan Cheng
fd488edb1d
For ldrb, strh, etc., the condition code is before the width specifier. e.g. streqh, not strheq.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37349 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 23:32:06 +00:00
Evan Cheng
62ccdbf0b3
Add missing const qualifiers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37342 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 18:42:18 +00:00
Evan Cheng
69d555611a
Hooks for predication support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37308 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-23 07:22:05 +00:00
Evan Cheng
94679e66bb
Fix some -march=thumb regressions. tBR_JTr is not predicable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37272 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21 23:17:32 +00:00
Dale Johannesen
f23b8cf239
Use AXI3 not AXI2 for appropriate PIC PC-relative loads and stores. Cosmetic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37271 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21 22:42:04 +00:00
Dale Johannesen
86d4069666
Add some patterns for PIC PC-relative loads and stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37269 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21 22:14:33 +00:00
Evan Cheng
5a18ebc70c
BlockHasNoFallThrough() now returns true if block ends with a return instruction; AnalyzeBranch() should ignore predicated instructionsd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37268 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21 18:56:31 +00:00
Evan Cheng
dcc50a4aee
Mark calls non-predicable for now. Need to ensure it's the last instruction in the if-converted block or make sure it preserve condition code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37199 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 01:53:54 +00:00
Evan Cheng
e5e7ce458a
Silence some compilation warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37197 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 01:19:57 +00:00
Evan Cheng
9f8cbd147c
Set ARM if-conversion block size threshold to 10 instructions for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37194 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 00:19:34 +00:00
Evan Cheng
6ae3626a4f
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37193 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 00:18:17 +00:00
Dale Johannesen
8dd86c14d4
More effective breakdown of memcpy into repeated load/store. These are now
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in the order lod;lod;lod;sto;sto;sto which means the load-store optimizer
has a better chance of producing ldm/stm. Ideally you would get cooperation
from the RA as well but this is not there yet.
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2007-05-17 21:31:21 +00:00
Evan Cheng
3f8602cf20
ARM::tB is also predicable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37125 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 21:53:43 +00:00
Evan Cheng
02c602b333
PredicateInstruction returns true if the operation was successful.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37124 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 21:53:07 +00:00
Evan Cheng
75604f81b7
Move if-conversion after all passes that may use register scavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37120 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 20:52:46 +00:00
Evan Cheng
b5f8eff566
Removed isPredicable().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37119 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 20:50:23 +00:00
Evan Cheng
5ada199246
Make ARM::B isPredicable; Make Bcc and MOVCC condition option a normal operand so they are not predicable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 20:50:01 +00:00
Evan Cheng
aeafca0a25
Conditional branch is not a barrier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37103 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 07:45:54 +00:00
Evan Cheng
2706f9771d
Fix comment.
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2007-05-16 05:14:06 +00:00
Evan Cheng
9307292ae2
Hooks for predication support.
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2007-05-16 02:01:49 +00:00
Evan Cheng
44bec52b1b
Add PredicateOperand to all ARM instructions that have the condition field.
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2007-05-15 01:29:07 +00:00
Lauro Ramos Venancio
5d3d44a848
Fix previous patch. GOTOFF can be used only when the symbol has internal
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linkage or hidden visibility.
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2007-05-14 23:20:21 +00:00
Lauro Ramos Venancio
930d161ba2
Optimize PIC implementation. GOTOFF can be used when the symbol is defined
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and used in the same module.
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2007-05-14 18:46:23 +00:00
Lauro Ramos Venancio
69642f11ed
Enable aliases on arm-linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37042 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-14 18:32:56 +00:00
Evan Cheng
42d712b306
Switch BCC, MOVCCr, etc. to PredicateOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36948 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-08 21:08:43 +00:00
Lauro Ramos Venancio
356e72c4f1
Fix PR1390 in a better way.
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2007-05-07 23:15:16 +00:00
Evan Cheng
c4e600362e
This is no longer needed after enabling the DAG combiner xform.
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2007-05-07 21:29:41 +00:00
Lauro Ramos Venancio
8f57667a5d
Fix PR1390.
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Don't spill extra register to align the stack.
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2007-05-05 23:44:41 +00:00
Lauro Ramos Venancio
a8e9562906
Add a processor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36765 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-04 22:16:30 +00:00
Evan Cheng
97c9bb5cc6
On Mac OS X, GV requires an extra load only when relocation-model is non-static.
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2007-05-04 00:26:58 +00:00
Evan Cheng
bdc9869dbf
Should never see an indexed load / store with zero offset.
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2007-05-03 23:30:36 +00:00
Dale Johannesen
4ac075c859
Evan's patch to avoid FPreg->intreg copy for cvt; store to mem
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2007-05-03 20:54:42 +00:00
Lauro Ramos Venancio
e8e5495474
Debug support for arm-linux.
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Patch by Raul Herbster.
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2007-05-03 20:28:35 +00:00
Chris Lattner
388488d604
add support for printing offset from global
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36669 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 16:42:23 +00:00
Evan Cheng
0b0a9a90a4
Typo. It's checking if V is multiple of 4, not multiple of 3. :-)
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2007-05-03 02:00:18 +00:00
Devang Patel
1997473cf7
Drop 'const'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36662 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 01:11:54 +00:00
Chris Lattner
72939126d4
match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.ll
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2007-05-03 00:32:00 +00:00
Devang Patel
3e15bf33e0
Use 'static const char' instead of 'static const int'.
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
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2007-05-02 21:39:20 +00:00
Dale Johannesen
67cf561b7f
Add some support for (Darwin) code-generating directives in getInlineAsmLength.
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Support is incomplete, but more accurate than gcc's.
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2007-05-02 01:02:40 +00:00
Devang Patel
794fd75c67
Do not use typeinfo to identify pass in pass manager.
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2007-05-01 21:15:47 +00:00
Evan Cheng
1b20168433
Doh. PC displacement is between the constantpool and the add instruction.
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2007-05-01 20:27:19 +00:00
Evan Cheng
97de913821
eliminateFrameIndex() change.
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2007-05-01 09:13:03 +00:00
Evan Cheng
5c3885ce8e
Under normal circumstances, when a frame pointer is not required, we reserve
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argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.
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2007-05-01 00:52:08 +00:00
Dale Johannesen
9118dbc7bd
Remove item: thumb padding in constant islands
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2007-04-30 00:32:06 +00:00
Dale Johannesen
23c968478e
remove unused variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36585 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 00:30:48 +00:00
Lauro Ramos Venancio
0a1817392d
Enable protected visibility on ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36583 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 00:23:51 +00:00
Dale Johannesen
8593e41855
Rewrite of Thumb constant islands handling (exact allowance for padding
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around islands and jump tables).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36573 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29 19:19:30 +00:00
Dale Johannesen
8650199fbb
Make ARM-specific version of getInlineAsmLength
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36572 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29 19:17:45 +00:00
Dale Johannesen
caa8055cf5
change per review
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36519 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 00:36:37 +00:00
Dale Johannesen
25c1f9e125
Prevent Thumb code from generating ARM instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36518 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 22:17:18 +00:00
Lauro Ramos Venancio
4c6d20a096
add parenthesis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36514 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 20:10:08 +00:00
Evan Cheng
185ea1e2aa
Doh. ARM::LEApcrel is a single instruction MI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36513 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 18:27:13 +00:00
Lauro Ramos Venancio
fdc9692f97
In Thumb mode, the frame register must be R7.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36512 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 17:58:03 +00:00
Lauro Ramos Venancio
64f4fa5e0e
ARM TLS: implement "general dynamic", "initial exec" and "local exec" models.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36506 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 13:54:47 +00:00
Evan Cheng
b1df8f2750
Darwin runtime library does not have these.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36505 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 08:15:43 +00:00
Evan Cheng
768c9f725b
Special handling of LEApcrel and tLEApcrel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36504 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 08:14:15 +00:00
Evan Cheng
eec041a037
Back out previous check-in. Incorrect.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36503 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 07:50:02 +00:00
Evan Cheng
33fdc983fd
tLEApcrel is a AddrModeTs, i.e. pc relative.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36502 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 07:37:22 +00:00
Evan Cheng
faa510726f
Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36483 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 19:00:32 +00:00
Evan Cheng
6c087e5585
Match MachineFunction::UsedPhysRegs changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36452 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 22:13:27 +00:00
Lauro Ramos Venancio
305b8a5f62
remember to emit weak reference in one more case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36438 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 14:50:40 +00:00
Evan Cheng
1e341729dd
Relex assertions to account for additional implicit def / use operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36430 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 07:12:14 +00:00
Dale Johannesen
56c42ef3e4
Make Thumb funcs containing islands 4-byte aligned. Fix bugs maintaining
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BBOffsets and BBSizes when adjusting conditional branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36372 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-23 20:09:04 +00:00
Dale Johannesen
bd24f3f398
add Align field, and use when generating function alignment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36371 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-23 20:07:25 +00:00
Dale Johannesen
24fb52da3c
add isThumb (unused as yet)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36370 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-23 20:04:35 +00:00
Lauro Ramos Venancio
0ae4a3357a
Implement PIC for arm-linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36324 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-22 00:04:12 +00:00
Evan Cheng
ba647becb9
Specify S registers as D registers' sub-registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36280 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 21:20:10 +00:00
Chris Lattner
93305bc462
add a crazy idea
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36273 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 20:18:43 +00:00
Lauro Ramos Venancio
267bfb553e
Fix a bug in getFrameRegister.
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Reported by Raul Herbster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36262 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-19 14:09:38 +00:00
Chris Lattner
120fba91a3
dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36222 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 22:39:58 +00:00
Chris Lattner
3c30d10b04
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36203 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 18:03:00 +00:00
Anton Korobeynikov
bed2946a96
Removed tabs everywhere except autogenerated & external files. Add make
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target for tabs checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 18:10:23 +00:00
Chris Lattner
5a3d40d88f
arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 06:50:55 +00:00
Chris Lattner
e11529438c
Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35909 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 16:17:12 +00:00
Chris Lattner
eb13d1b710
restore support for negative strides
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35859 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10 03:48:29 +00:00
Chris Lattner
37caf8c68e
remove dead target hooks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35846 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 23:33:39 +00:00
Chris Lattner
b445d0cbb9
remove some dead target hooks, subsumed by isLegalAddressingMode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 22:27:04 +00:00
Evan Cheng
e21e39666e
Implement inline asm modifier P.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35640 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04 00:13:29 +00:00
Evan Cheng
0a7baa24d1
Typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35639 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04 00:06:07 +00:00
Evan Cheng
ed884f3a2f
Remove unused constant pool entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35635 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 23:39:48 +00:00
Evan Cheng
b03eacdbf3
Fixed a bug that causes codegen of noop like add r0, r0, #0 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35627 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 21:31:21 +00:00
Evan Cheng
3c5ad82ba2
Inverted logic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35619 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 06:44:25 +00:00
Chris Lattner
b2c594f350
Arm supports negative strides as well, add them. This lets us compile:
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CodeGen/ARM/arm-negative-stride.ll to:
LBB1_2: @bb
str r1, [r3, -r0, lsl #2 ]
add r0, r0, #1
cmp r0, r2
bne LBB1_2 @bb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35609 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 00:13:57 +00:00
Dale Johannesen
d959aa421a
fix off by 1 error in displacement computation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35602 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02 20:31:06 +00:00
Chris Lattner
6e0784da77
fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales
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to be folded into non-store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35601 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02 18:51:18 +00:00
Chris Lattner
c4e3f8e736
add support for the 'w' inline asm register class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35598 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02 17:24:08 +00:00
Lauro Ramos Venancio
9996663fc6
- Divides the comparisons in two types: comparisons that only use N and Z
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flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35573 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02 01:30:03 +00:00
Evan Cheng
3074d9df96
Add i16 address mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35551 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-01 08:06:46 +00:00
Chris Lattner
c9addb7488
implement the new addressing mode description hook.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35521 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 23:15:24 +00:00
Evan Cheng
87c6c9abb3
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35480 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29 21:40:13 +00:00
Evan Cheng
5e3c203cfd
Can't re-materialize mov r, imm in thumb since mov would clobber the condition code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35479 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29 21:38:31 +00:00
Evan Cheng
616cc663da
Add support for hidden visibility to darwin/arm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35448 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29 07:49:34 +00:00
Evan Cheng
caaf69107e
Remove isLegalAddressImmediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 01:53:55 +00:00
Lauro Ramos Venancio
b8a93a45f8
bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35381 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 16:19:21 +00:00
Evan Cheng
f6fa5ee5c2
findRegisterUseOperand() changed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35366 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 22:41:48 +00:00
Chris Lattner
4234f57fa0
switch TargetLowering::getConstraintType to take the entire constraint,
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not just the first letter. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:14:49 +00:00
Dale Johannesen
fa4bce2b76
repair x86 performance, dejagnu problems from previous change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:51:52 +00:00
Evan Cheng
a125cbe839
Updated.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35229 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 22:32:39 +00:00
Dale Johannesen
8e59e163db
do not share old induction variables when this would result in invalid
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instructions (that would have to be split later)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 21:54:54 +00:00
Lauro Ramos Venancio
64c88d741e
bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted:
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mov lr, pc
bx lr
So, the function was not called.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 17:57:23 +00:00
Evan Cheng
c70d1849b7
Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35207 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:11:30 +00:00
Evan Cheng
5603dcf21e
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35206 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:10:17 +00:00
Evan Cheng
bf2c8b3c96
Added MRegisterInfo hook to re-materialize an instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:09:38 +00:00
Chris Lattner
1719e13da0
fix indentation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35202 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 02:25:53 +00:00
Dale Johannesen
80dae195c7
fix obvious comment bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35196 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 00:30:56 +00:00
Evan Cheng
9f6636ff0c
Fix naming inconsistencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:48:02 +00:00
Evan Cheng
fa775d09c6
Special LDR instructions to load from non-pc-relative constantpools. These are
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rematerializable. Only used for constant generation for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:20:03 +00:00
Evan Cheng
a251570417
Constant generation instructions are re-materializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:09:02 +00:00
Lauro Ramos Venancio
368f20fda4
Only ARMv6 has BSWAP.
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Fix MultiSource/Applications/aha test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 22:54:16 +00:00
Evan Cheng
2770747216
Added isLegalAddressExpression(). Only allows X +/- C for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:43:56 +00:00
Evan Cheng
a13fd108f2
AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2 ]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35088 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 21:05:54 +00:00
Evan Cheng
961f879ed8
Zero is always a legal AM immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 20:37:59 +00:00
Evan Cheng
e8308df0b9
Implement getTargetLowering() or else LSR won't be using ARM specific hooks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35077 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 01:20:42 +00:00
Evan Cheng
b01fad6d19
Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:30:29 +00:00
Evan Cheng
1a9da0d66c
Minor stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35049 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:46:06 +00:00
Evan Cheng
44f4fca3c0
Add comments about LSR / ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:35:33 +00:00
Evan Cheng
2265b49193
Unfinished work and ideas related to register scavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35047 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:34:51 +00:00
Dale Johannesen
818c085232
apply comments from review of last patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35045 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:18:59 +00:00
Dale Johannesen
a6bc6fc170
Add some observations from CoreGraphics benchmark. Remove register
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scavenging todo item, since it is now implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35044 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 17:58:17 +00:00
Evan Cheng
23a9570494
Implement inline asm modifier c.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35035 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 22:42:46 +00:00
Evan Cheng
b582b1b1fc
Fix a typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35030 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 21:59:30 +00:00
Evan Cheng
032953d747
Putting more constants which do not contain relocations into .literal{4|8|16}
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35026 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 08:31:54 +00:00
Evan Cheng
bf822eb6a3
Change register allocation order to Dale's suggestion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35021 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 02:56:40 +00:00
Evan Cheng
11788fde93
Bug fix. Not advancing the register scavenger iterator correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35020 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 02:55:08 +00:00
Evan Cheng
98ded765c2
For Darwin, put constant data into .const, .const_data, .literal{4|8|16}
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sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35017 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 01:25:25 +00:00
Evan Cheng
603b83ebcd
Only safe to use a call-clobbered or spilled callee-saved register as scratch register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35010 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 20:30:36 +00:00
Anton Korobeynikov
d0b82b301d
Refactoring of formal parameter flags. Enable properly use of
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zext/sext/aext stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 16:25:09 +00:00
Evan Cheng
cb20998b3f
ARM always use register scavenger. No longer reserves R12.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34999 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 02:46:23 +00:00
Evan Cheng
0ea12ec848
Fix some brittle code. Watch out for cases where register scavenger is pointing to deleted instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34998 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 02:38:05 +00:00
Evan Cheng
3d06cf4584
Fix one more Thumb eliminateFrameIndex bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34990 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 00:12:18 +00:00
Evan Cheng
e6257632fc
Register scavenging is now on by default for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34987 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 22:02:53 +00:00
Evan Cheng
a90f3408b3
Make load / store optimizer use register scavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34986 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 21:59:20 +00:00
Evan Cheng
cc1c427266
Code clean up. Prepare to use register scavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34976 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 18:02:41 +00:00