Evan Cheng
a90f3408b3
Make load / store optimizer use register scavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34986 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 21:59:20 +00:00
Evan Cheng
cc1c427266
Code clean up. Prepare to use register scavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34976 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 18:02:41 +00:00
Evan Cheng
140e33cfd1
Scavenge a register using the register scavenger when needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34966 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 10:03:56 +00:00
Anton Korobeynikov
1d9baccc9b
Use new SDIselParamAttr enumeration. This removes "magick" constants
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from formal attributes' flags processing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34963 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 08:12:33 +00:00
Lauro Ramos Venancio
6d7dd8ef46
Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS.
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Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34931 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-05 17:59:58 +00:00
Dale Johannesen
9f8e50d4ed
eliminate unnecessary reset of SP in epilog on darwin
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34824 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-02 01:17:17 +00:00
Evan Cheng
c1c2de0ae7
Use a spilled free callee-saved register as scratch register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34785 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-01 08:57:52 +00:00
Evan Cheng
f49407b790
- Track which callee-saved registers are spilled.
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- Some code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34783 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-01 08:26:31 +00:00
Evan Cheng
cda067bad9
Switch from std::vector<bool> to BitVector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34781 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-01 07:52:44 +00:00
Bill Wendling
f1d6006ad6
Get rid of verboten <iostream> include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34777 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-01 06:05:39 +00:00
Dale Johannesen
b71aa2b6ca
Changes requested in review of last pass. Also pulled isThumb into a
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member, instead of resetting in every function that uses it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34764 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 23:20:38 +00:00
Evan Cheng
ad78ef2154
Doh. ARM::PC is obvious a reserved register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 23:12:34 +00:00
Dale Johannesen
f1b214d3ca
Add intelligence about where to break large blocks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34755 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 18:41:23 +00:00
Evan Cheng
36230cdda4
Make requiresRegisterScavenging determination on a per MachineFunction basis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34711 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 00:59:19 +00:00
Evan Cheng
41a4d562f7
Temporary: make R12 available in ARM mode if RegScavenger is being used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34709 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 00:22:44 +00:00
Evan Cheng
1b051fc6a4
Start making use of RegScavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34708 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 00:21:58 +00:00
Evan Cheng
5e6df4647e
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34707 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 00:21:17 +00:00
Evan Cheng
15991bf775
Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be livein to a function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34701 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 23:03:55 +00:00
Evan Cheng
5ef9226f30
Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve register kill info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34692 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 21:12:35 +00:00
Dale Johannesen
ce74de46dd
cosmetic changes from review of last patch. obvious
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34598 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 18:31:31 +00:00
Dale Johannesen
598270a68d
remove crediting of Evan Cheng and me.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34568 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 01:42:36 +00:00
Dale Johannesen
99c49a4b94
Removed WaterListOffset, inserted BBOffsets. Remove TODO item about this
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from README.
When no water available, use end of block if in range. (More to do here.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34563 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 00:47:03 +00:00
Lauro Ramos Venancio
acdfa445ac
bugfix: SP wasn't updated for varargs when frame pointer was eliminated.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-23 21:53:48 +00:00
Lauro Ramos Venancio
600c383e5c
Fix stack alignment in functions with varargs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34532 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-23 20:32:57 +00:00
Dale Johannesen
88e37ae366
rewrite of constant islands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34523 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-23 05:02:36 +00:00
Evan Cheng
04321f70f5
Added -march=thumb; removed -enable-thumb.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34521 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-23 03:14:31 +00:00
Evan Cheng
ead7590581
Add option to turn on register scavenger; By default, spills kills the register being stored.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34514 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-23 01:09:11 +00:00
Jim Laskey
2ad9f17fee
Simplify lowering and selection of exception ops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34488 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-22 14:56:36 +00:00
Jim Laskey
62819f3144
Support to provide exception and selector registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-21 22:54:50 +00:00
Evan Cheng
b371f457b0
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34428 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-19 21:49:54 +00:00
Reid Spencer
a284cbf667
For PR1207:
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Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34399 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-19 03:20:00 +00:00
Evan Cheng
eceada6728
Added getReservedRegs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34376 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-17 11:06:00 +00:00
Chris Lattner
d2b7cec527
Generalize TargetData strings, to support more interesting forms of data.
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Patch by Scott Michel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34266 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-14 05:52:17 +00:00
Lauro Ramos Venancio
7501605988
Add space between // and the comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34246 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-13 20:06:15 +00:00
Lauro Ramos Venancio
3630e78db9
Add ABI information to ARM subtarget.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-13 19:52:28 +00:00
Lauro Ramos Venancio
876eaf1135
According to ARM EABI, 8-bytes function arguments must be 8-bytes aligned.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34241 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-13 14:07:13 +00:00
Evan Cheng
e03cff6812
These vectors are frequently large. Use std::vector instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34109 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-09 23:59:14 +00:00
Evan Cheng
c99ef085b9
Add reference counting to constantpool entries. Delete the unused ones.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34105 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-09 20:54:44 +00:00
Evan Cheng
bd8251a9a6
isLowRegister() expects input is a physical register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34013 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 21:44:33 +00:00
Evan Cheng
403e4a4725
Rename.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34011 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 21:24:09 +00:00
Evan Cheng
5ebd10e5ac
If sp offset will be materialized in a register. Clear the offset field of str / ldr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34010 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 21:19:58 +00:00
Evan Cheng
8fdbe560a0
Get rid of references to iostream.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34009 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 21:18:32 +00:00
Evan Cheng
2ef02a220e
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34000 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 09:22:15 +00:00
Evan Cheng
8bed6c968f
In thumb mode, R3 is reserved, but it can be live in to the function. If
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that is the case, whenever we use it as a scratch register, save it to R12
first and then restore it after the use.
This is a temporary and truly horrible workaround!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33999 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 09:17:36 +00:00
Evan Cheng
1f253d6e97
Update
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33998 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 08:37:57 +00:00
Evan Cheng
7142f8755a
- If fp (r7) is used to reference stack objects, use [r, r] address mode.
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- If there is a dynamic alloca, in the epilogue, restore the value of sp
using r7 - offset.
- Other bug fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33997 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 08:37:31 +00:00
Evan Cheng
a01faf4a7a
eliminateFrameIndex() is even more complicated if frame ptr is used instead of SP when there are dynamic alloca's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33975 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 02:44:23 +00:00
Evan Cheng
8e59ea998f
Spill / restore should avoid modifying the condition register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33971 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 00:06:56 +00:00
Evan Cheng
8c1a73ad3f
Select add FI, c correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-06 09:11:20 +00:00
Evan Cheng
40984d7449
foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-06 06:13:29 +00:00
Evan Cheng
88b633165a
eliminateFrameIndex() bug when frame pointer is used as base register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33945 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-06 00:23:31 +00:00
Evan Cheng
ad0e465889
- Store val, [sp, c] must be selected to tSTRsp.
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- If c does not fit in the offset field, materialize sp + c into a register
using tADDhirr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33944 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-06 00:22:06 +00:00
Evan Cheng
b38cba928e
ARM callseq_end should have a input flag operand so it would be scheduled right after the call.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33832 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-03 09:11:58 +00:00
Evan Cheng
fc4034259f
Fix comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33831 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-03 08:53:01 +00:00
Evan Cheng
bd5d3dbdbe
- Branch max. displacement calculation bug.
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- Add debugging info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33811 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-03 02:08:34 +00:00
Lauro Ramos Venancio
4642ca6589
bugfix: SP isn't resetted when function has FP and there is no spills.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33800 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-02 23:08:40 +00:00
Evan Cheng
a21335dd76
Another thumb large stack offset codegen bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33795 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-02 21:08:39 +00:00
Evan Cheng
05cc424082
Use MBB.empty() instead of MBB.size() for speed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33789 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-02 19:09:19 +00:00
Evan Cheng
1dd6a606ad
Watch out for empty BB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33788 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-02 18:49:02 +00:00
Evan Cheng
f48ae3353e
Ugh. Only meant to do this in thumb mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33780 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-02 08:58:48 +00:00
Chris Lattner
2d1222c060
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33778 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-02 04:36:46 +00:00
Evan Cheng
9a2ef9509e
Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33775 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-02 01:53:26 +00:00
Evan Cheng
b0636156ef
Thumb does not have clz.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33773 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 23:34:03 +00:00
Lauro Ramos Venancio
c33f674ca3
Define PrivateGlobalPrefix for ARM Linux. (Fix CodeGen/ARM/large_stack.ll)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33763 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 21:43:53 +00:00
Evan Cheng
556f33c6e2
Pasto. Lots of it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33762 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 20:44:52 +00:00
Lauro Ramos Venancio
6f46e59d2a
Fix .thumb_func directive on linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33759 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 18:25:34 +00:00
Evan Cheng
b43216ee4a
- Off by one bugs in maximum displacement calculation / testing.
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- In thumb mode, a new constpool island BB size should be 4 + 2 to
compensate for the potential padding due to alignment requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33753 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 10:16:15 +00:00
Evan Cheng
e0c2b6b9a8
.set pc relative displacement bug: label should be moved down one instruction
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to just before the add r1, pc:
Before:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
Now:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
mov r1, #PCRELV0
LPCRELL0:
add r1, pc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33744 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 03:04:49 +00:00
Evan Cheng
736cefff85
Add a note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33743 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 02:46:20 +00:00
Evan Cheng
9312313a56
Also set alignment of stack-based structs to 4 in thumb mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33741 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 02:18:36 +00:00
Evan Cheng
9d945f78e5
Special epilogue for vararg functions. We cannot do a pop to pc because
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there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
pop {r4, r5, r6, r7}
pop {r3}
add sp, #3 * 4
bx r3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33739 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 01:49:46 +00:00
Evan Cheng
2021abe154
Pessmistically assume the .align 2 before the first constpool entry adds
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two bytes padding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33734 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 01:09:47 +00:00
Evan Cheng
5b49ab9996
Possible JT improvements.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33733 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 01:07:48 +00:00
Evan Cheng
3bf12d0460
Don't emit unnecessary .align directive.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33729 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 23:39:39 +00:00
Evan Cheng
a2e35588c6
Handle an interesting corner case: the constpool_entry being reference is two
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instructions away, i.e. its address is equal to PC.
%r0 = tLDRpci <cp#0>
bx
CONSTPOOL_ENTRY 0 <cp#0>, 4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33728 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 23:35:18 +00:00
Evan Cheng
7588ad478a
Don't want to add FramePtr to callee save spill list twice.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33727 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 23:17:29 +00:00
Evan Cheng
3548006a29
Darwin ABI requires FP to point to stack slot of prev FP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33724 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 22:25:33 +00:00
Evan Cheng
11a065e599
Add entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33723 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 22:11:38 +00:00
Evan Cheng
0fa10515ee
Thumb add sp, #imm requires the immediate value be multiple of 4. For now,
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change preferred alignment of short, byte, bool to 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33722 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 22:08:40 +00:00
Evan Cheng
86eb515359
Update comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33721 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 22:06:44 +00:00
Evan Cheng
3471b60e95
Thumb asm syntax does not want 's' suffix for flag setting opcodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33717 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 20:12:31 +00:00
Evan Cheng
c0dbec7e10
When determining whether a pc relative branch / load displacement fits in the
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instruction field, adjust it for PC value (4 for thumb, 8 for arm).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33711 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 19:57:44 +00:00
Evan Cheng
a9b8b8d62c
Some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33707 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 18:29:27 +00:00
Evan Cheng
934536dab2
ConstPool island bug: watch out for cases where UserMI is the last MI of the BB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33706 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 18:19:07 +00:00
Lauro Ramos Venancio
b5b84f92bf
ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33703 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 13:12:46 +00:00
Evan Cheng
193f850880
Specify the right CC for comparison libcalls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33702 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 09:30:58 +00:00
Evan Cheng
b6ab2547cb
Observe -soft-float.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33699 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 08:40:13 +00:00
Evan Cheng
0c61584d05
- Added Thumb constpool island support.
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- Islands are inserted right after the user MI since thumb LDR cannot encode
negative offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33690 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 02:22:22 +00:00
Evan Cheng
36640905e1
During PEI, if the immediate value of sp + offset is too large (i.e. something
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that would require > 3 instructions to materialize), load the immediate from a
constpool entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33667 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 23:01:46 +00:00
Evan Cheng
c60e76d139
- Fix codegen for pc relative constant (e.g. JT) in thumb mode:
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.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
- In thumb mode, it's not possible to use .set generate a pc relative stub
address. The stub is ARM code which is in a different section from the thumb
code. Load the value from a constpool instead.
- Some asm printing clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33664 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 20:37:08 +00:00
Reid Spencer
5cbf985dcb
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
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confusion with external linkage types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33663 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 20:08:39 +00:00
Evan Cheng
ad1b9a503c
Copy and paste bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33658 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 08:22:33 +00:00
Evan Cheng
b267ca17d1
Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33657 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 08:04:53 +00:00
Evan Cheng
c322a9ac14
Misseed thumb jumptable branch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 08:03:06 +00:00
Evan Cheng
236f677e48
In thumb mode, round up stack frame size to multiple of 4 since add/sub
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sp, imm instructions implicitly multiply the offset by 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33653 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 02:57:02 +00:00
Evan Cheng
5b91c7f69a
Thumb eliminateFrameIndex fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33652 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 02:36:01 +00:00
Evan Cheng
cea117d2de
Change the operand orders to t_addrmode_s* to make it easier to morph
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instructions that use these address modes to instructions that use
t_addrmode_sp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33651 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 02:35:32 +00:00
Evan Cheng
d1b2c1e88f
- In thumb mode, if size of MachineFunction is >= 2048, force LR to be
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spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
in thumb mode so it can be clobbered if it is properly spilled / restored
in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
spill by:
push lr -> delete
pop pc -> bx lr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33650 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 01:18:38 +00:00
Evan Cheng
225dfe973b
Use BL to implement Thumb far jumps.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33649 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 01:13:37 +00:00
Evan Cheng
29836c330f
Factor GetInstSize() out of constpool island pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-29 23:45:17 +00:00
Nate Begeman
bcc5f36765
Finish off bug 680, allowing targets to custom lower frame and return
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address nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33636 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-29 22:58:52 +00:00
Evan Cheng
24f7fb3267
Comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33633 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-29 22:23:02 +00:00
Evan Cheng
78268b9436
Remember if LR register has been spilled in this function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33632 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-29 22:22:24 +00:00
Anton Korobeynikov
b10308e440
Propagate changes from my local tree. This patch includes:
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1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.
NOTEs: 1. Documentation will be updated soon.
2. llvm-upgrade should be improved to translate csret => sret.
Before this, there will be some unexpected test fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33597 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-28 13:31:35 +00:00
Evan Cheng
198529aaf1
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33569 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-27 02:33:22 +00:00
Evan Cheng
d85ac4d079
Thumb jumptable support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33568 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-27 02:29:45 +00:00
Evan Cheng
53d7dbafc3
Thumb add / sub with carry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33562 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-27 00:07:15 +00:00
Lauro Ramos Venancio
ea9fc58bbf
Some asm directives fixes for ELF.
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Now we can compile llvm-gcc on arm-linux-gnueabi!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33558 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 23:24:43 +00:00
Evan Cheng
3fdadfc9ab
Represent tADDspi and tSUBspi as two-address instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33551 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 21:33:19 +00:00
Jim Laskey
44c3b9fdd4
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
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for debugging and exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33550 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 21:22:28 +00:00
Lauro Ramos Venancio
fce1765a19
Fix Data16bitsDirective for ELF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33549 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 21:20:45 +00:00
Evan Cheng
43aeab68a6
Conditional branch being fixed up is not the last MI in the BB, there is a
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unconditional branch following it. Simply invert the condition and swap
destinations if the conditional branch can reach the destination of the
unconditional branch:
beq L1
b L2
=>
bne L2
b L1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33548 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 20:38:26 +00:00
Lauro Ramos Venancio
1a92d941b3
If the constant pool value is a extern weak symbol, emit the weak reference.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33543 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 19:51:32 +00:00
Evan Cheng
b60c02e005
extload -> zextload
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33542 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 19:13:16 +00:00
Jim Laskey
1ee2925742
Make LABEL a builtin opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 14:34:52 +00:00
Evan Cheng
dd353b8ad7
SplitBlockBeforeInstr() insert a unconditional branch to the next BB. This
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is unnecessary when we are fixing up a conditional branch since we will be
adding a unconditional branch to the destination of the original branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33517 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 02:02:39 +00:00
Evan Cheng
7755facd76
Need to scan the function for branches even if there aren't any constants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33515 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 01:04:44 +00:00
Evan Cheng
a0bf794eb6
Forgot to update this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33512 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-25 23:31:04 +00:00
Evan Cheng
c285414988
Add comment, fix typo, reduce memory usage, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33510 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-25 23:18:59 +00:00
Evan Cheng
3df62bde9b
I am an idiot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33509 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-25 23:18:16 +00:00
Lauro Ramos Venancio
b1cc052823
Fix elf object definition.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33502 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-25 20:11:04 +00:00
Evan Cheng
743fa032a7
Doh. Skip JT branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33501 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-25 19:43:52 +00:00
Evan Cheng
af5cbcb809
Added (preliminary) branch shortening capability to constantpool island pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33497 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-25 03:12:46 +00:00
Evan Cheng
6318ffd736
Getting rid uses of evil std::set<>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33496 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-25 03:07:27 +00:00
Evan Cheng
012f2d97b7
Use PC relative ldr to load from a constantpool in Thumb mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33484 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-24 08:53:17 +00:00
Evan Cheng
e966d6415c
Allow [ fi#c, imm ] as ARM load / store addresses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33474 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-24 02:45:25 +00:00
Evan Cheng
79d4326b00
Various Thumb mode load / store isel bug fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33472 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-24 02:21:22 +00:00
Evan Cheng
c38f2bc3c2
- Reorg Thumb load / store instructions. Combine each rr and ri pair of
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instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
address is not an add, materialize a 0 immediate into a register and use
it as the offset field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33470 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-23 22:59:13 +00:00
Evan Cheng
a6f567c89e
Darwin HiddenDirective is .private_extern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33465 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-23 19:06:03 +00:00
Evan Cheng
367372a30c
PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33460 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-23 09:38:11 +00:00
Evan Cheng
dc77540d95
hasFP() is now a virtual method of MRegisterInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33455 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-23 00:57:47 +00:00
Evan Cheng
aa3e123ebb
ARM AAPCS abi (Linux, etc.) requires 8-byte double / long alignment; Mac
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requires 4-bytes alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33448 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-22 23:13:01 +00:00
Evan Cheng
d44ecd86e7
Double and Long preferred alignment is 4 for Darwin, 8 for Linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33440 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-22 21:24:13 +00:00
Evan Cheng
2576f13645
Use bl to call Thumb fuctions directly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33433 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-22 19:40:10 +00:00
Evan Cheng
515674c7b6
Round up stack to multiple of alignment only if it's a leaf function without alloca.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33401 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-20 10:22:33 +00:00
Evan Cheng
c1c7283047
Prologue and epilogue bugs for non-Darwin targets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33390 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-20 03:24:07 +00:00
Evan Cheng
75e18c403e
Clean up ARM PEI code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33389 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-20 02:09:25 +00:00
Evan Cheng
34b12d24a0
Code clean up. Use def : pat instead of defining new instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33368 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-19 20:27:35 +00:00
Evan Cheng
970a419633
isDarwin -> isTargetDarwin
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33366 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-19 19:28:01 +00:00
Evan Cheng
5be54b00bd
Restructure code a bit to make use of continue (simplifying things). Generalize
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the .zerofill directive emission to not be darwin-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33365 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-19 19:25:36 +00:00
Evan Cheng
e433ea9dce
Darwin doesn't support .bss, but it does have .zerofill
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33364 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-19 19:23:47 +00:00
Evan Cheng
1a3771e30e
Introduce TargetType's ELF and Darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33363 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-19 19:22:40 +00:00
Evan Cheng
8e1185bd5c
Modify emission of jump tables on darwin to emit an extra "l" label that
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delimits the boundaries of jump tables. This lets the linker's dead code
stripping optimization do a better job.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33362 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-19 18:59:56 +00:00
Lauro Ramos Venancio
471ffaffd8
Fix section definition.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33359 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-19 17:33:22 +00:00
Evan Cheng
a8e2989ece
ARM backend contribution from Apple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33353 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-19 07:51:42 +00:00
Lauro Ramos Venancio
5293e7d5d6
Don't add or sub zero to sp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33142 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-12 20:52:27 +00:00
Lauro Ramos Venancio
a38bbf7dd3
Build constants using instructions mov/orr or mvn/eor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33141 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-12 20:35:49 +00:00
Lauro Ramos Venancio
ca1f66db0d
Expand SELECT (f32/f64) and FCOPYSIGN (f32/f64).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32870 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-04 14:01:38 +00:00
Evan Cheng
c2b861da18
Fix naming inconsistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32823 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-02 21:33:40 +00:00
Rafael Espindola
9985f9f61e
implement missing compares
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patch by Lauro
bug fixed by me
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32795 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-31 18:52:39 +00:00
Reid Spencer
47857812e2
For PR950:
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Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
type of an function parameter was used to determine whether it should
be sign extended or zero extended before the call. This information is
now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
the parameter attribute information. Although it would have been
convenient to pass in the FunctionType itself, there isn't always one
present in the caller. Consequently, a signedness indication for the
result type and for each parameter was provided for in the interface
to this method. All implementations were changed to make the adjustment
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32788 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-31 05:55:36 +00:00
Rafael Espindola
0cc2bd12d2
fix comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32767 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-29 14:28:12 +00:00
Lauro Ramos Venancio
da4842e266
Define StaticCtorsSection and StaticDtorsSection for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32763 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-28 13:13:00 +00:00
Lauro Ramos Venancio
301009a0fc
Implement SELECT_CC (f32/f64) for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32762 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-28 13:11:14 +00:00
Rafael Espindola
6547c55988
remove duplicated line
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bug noticed by Lauro
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32761 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-28 12:51:40 +00:00
Lauro Ramos Venancio
a8f9f4af54
This patch defines extloadi1 and fixes an internal compiler error on
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arm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32760 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-26 19:30:42 +00:00
Chris Lattner
1a199de813
Fix for ARM weak symbols, patch by Lauro Ramos Venancio!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32740 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-21 22:59:58 +00:00
Chris Lattner
95b2c7da5e
eliminate static ctors for Statistic objects.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32703 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-19 22:59:26 +00:00
Rafael Espindola
3ef39ca6a1
macros -> Inline functions
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Lauros's patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32656 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-18 11:07:09 +00:00
Rafael Espindola
15404d060b
move ExtWeakSymbols to AsmPrinter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32648 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-18 03:37:18 +00:00
Rafael Espindola
8897a7b02e
avoid using a constant table when a constant can be used inline
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32580 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-14 18:58:37 +00:00
Rafael Espindola
15f17a7c47
Avoid creating invalid sub/add instructions on the prolog/epilog
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patch by Lauro
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32577 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-14 13:31:27 +00:00
Rafael Espindola
a898ce687a
more general matching of the MVN instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32484 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-12 17:10:13 +00:00
Rafael Espindola
2426775c81
don't use "ordinary" addressing mode 1 when mvn is appropriate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32482 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-12 14:03:29 +00:00
Rafael Espindola
f64945d83c
use MVN to handle small negative constants
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32459 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-12 01:03:11 +00:00
Rafael Espindola
450856d01b
add mvn
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32454 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-12 00:37:38 +00:00
Rafael Espindola
4dfab986ab
add note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32452 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-11 23:56:10 +00:00
Rafael Espindola
796cbd87b4
.align is in bits
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.comm is in bytes
:-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32408 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-10 02:53:14 +00:00
Rafael Espindola
0ec729ef2d
%progbits not @progbits
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32376 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-08 22:06:02 +00:00
Rafael Espindola
1366626e08
add \"aw\",@progbits" to ctors and dtors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32373 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-08 21:24:58 +00:00
Rafael Espindola
a43f3d4c96
fix truncstorei1
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32364 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-08 18:41:21 +00:00
Rafael Espindola
1c411dee4f
fix alignment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32337 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 22:38:06 +00:00
Bill Wendling
f5da13367f
What should be the last unnecessary <iostream>s in the library.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 22:21:48 +00:00
Rafael Espindola
7367d05cb7
make sure that we don't use a common symbol if a section was specified
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 18:33:58 +00:00
Chris Lattner
ac0b6ae358
Detemplatize the Statistic class. The only type it is instantiated with
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is 'unsigned'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-06 17:46:33 +00:00
Rafael Espindola
392b1b2ef3
print weak references
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32276 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-06 13:35:10 +00:00
Chris Lattner
d17aa4b1f1
These asm printers shouldn't use assembly/writer.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32262 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-06 06:13:25 +00:00
Rafael Espindola
97815c6b9c
expand memmove and memcpy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32226 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-05 17:57:23 +00:00
Rafael Espindola
462af9a2e0
add support for the "r" asm constraint
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patch by Lauro Ramos Venancio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32224 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-05 17:37:31 +00:00
Rafael Espindola
204b0c2ca0
add support for weak linkage
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32222 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-05 17:00:17 +00:00
Evan Cheng
c0f64ffab9
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
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of opcode and number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27 23:37:22 +00:00
Rafael Espindola
f819a4999a
implement load effective address similar to the alpha backend
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remove lea_addri and the now unused memri addressing mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31592 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 13:58:55 +00:00
Evan Cheng
0d53826f36
Match tblegen changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31571 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 20:34:28 +00:00
Rafael Espindola
6e8c6493f0
initial implementation of addressing mode 2
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TODO: fix lea_addri
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31552 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 17:07:32 +00:00
Chris Lattner
3751844b39
remove dead/redundant vars
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31435 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 23:48:56 +00:00
Rafael Espindola
f05696c1b5
revert previous patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31411 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 03:08:28 +00:00
Rafael Espindola
115bfcb574
add createCFGSimplificationPass to ARMTargetMachine::addInstSelector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31400 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 01:39:25 +00:00
Rafael Espindola
e931a37a4e
move ARMCondCodeToString to ARMAsmPrinter.cpp
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remove unused variables from lowerCall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31378 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02 15:00:02 +00:00
Rafael Espindola
560a8d0512
print null values in bss
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31349 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-01 14:26:44 +00:00
Rafael Espindola
9dca7ad78f
implement zextload bool and truncstore bool
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31348 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-01 14:13:27 +00:00
Rafael Espindola
b191e0ab51
add support for calling functions when the caller has variable sized objects
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31312 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31 13:03:26 +00:00
Evan Cheng
c35497fc2a
All targets expand BR_JT for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31294 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-30 08:02:39 +00:00
Rafael Espindola
7ae68ab3bc
initial support for frame pointers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31197 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-26 13:31:26 +00:00
Rafael Espindola
0e5e3aacbe
expand ISD::VACOPY
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31170 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24 20:15:21 +00:00
Rafael Espindola
3d7d39ab15
fix warning about missing newline at end of file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31162 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24 17:07:11 +00:00
Chris Lattner
578e64a041
implement uncond branch insertion, mark branches with isBranch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31160 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24 16:47:57 +00:00
Rafael Espindola
c391d16b49
implement STRB and STRH
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31138 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-23 20:34:27 +00:00
Rafael Espindola
d8ed7f8cde
expand ISD::MEMSET
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31137 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-23 20:08:22 +00:00
Reid Spencer
b83eb6447b
For PR950:
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This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31063 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-20 07:07:24 +00:00
Rafael Espindola
2435786414
use Pat to implement extloadi8 and extloadi16
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31052 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-19 17:05:03 +00:00
Rafael Espindola
20793115a8
implement undef
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31049 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-19 13:45:00 +00:00
Rafael Espindola
b97809c9a7
print common symbols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31048 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-19 13:30:40 +00:00
Rafael Espindola
3692c7ac17
implement extloadi8 and extloadi16
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31047 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-19 12:45:04 +00:00
Rafael Espindola
6495bdd8d2
expand SIGN_EXTEND_INREG
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31046 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-19 12:06:50 +00:00
Rafael Espindola
4749aa4ea3
expand brind so that we don't have to implement jump tables right now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31045 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-19 10:56:43 +00:00
Rafael Espindola
71d94d8817
add blx
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31037 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-18 16:21:43 +00:00
Rafael Espindola
70673a1a90
add isTerminatortto b and bcond
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31036 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-18 16:20:57 +00:00
Rafael Espindola
5f1b698aeb
implement CallingConv::Fast as CallingConv::C
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31034 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-18 12:03:07 +00:00
Rafael Espindola
226f8bc38c
expand ISD::SDIV, ISD::UDIV, ISD::SREM and ISD::UREM
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31014 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-17 21:05:33 +00:00
Rafael Espindola
04d88ffdb5
add the FPUnaryOp and DFPUnaryOp classes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31013 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-17 20:45:22 +00:00
Rafael Espindola
c01c87c8ba
add FABSS and FABSD
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31012 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-17 20:33:13 +00:00
Rafael Espindola
3f3a6f6c3b
remove extra [] in stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31008 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-17 18:29:14 +00:00
Rafael Espindola
32bd5f4f6a
initial implementation of addressing mode 5
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31002 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-17 18:04:53 +00:00
Rafael Espindola
0d479ecbb1
add the immediate to the Offset in eliminateFrameIndex
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30998 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-17 14:34:02 +00:00
Rafael Espindola
f621abca9e
add FSTD and FSTS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30996 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-17 13:36:07 +00:00
Rafael Espindola
199dd67c50
add FCPYS and FCPYD
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30995 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-17 13:13:23 +00:00
Rafael Espindola
a605be69c3
add fdivs e fdivd
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30988 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16 21:50:04 +00:00
Rafael Espindola
0505be03ad
expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30987 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16 21:10:32 +00:00
Rafael Espindola
27e469ef13
define the DFPBinOp class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30981 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16 18:39:22 +00:00
Rafael Espindola
a6f149d548
add the FPBinOp class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16 18:32:36 +00:00
Rafael Espindola
90057aaeb7
define the Addr1BinOp class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30979 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16 18:18:14 +00:00
Rafael Espindola
15a6c3e976
define the IntBinOp class and use it to implement the multiply instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30978 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16 17:57:20 +00:00
Rafael Espindola
bb1e2fbc68
fix assembly syntax
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30977 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16 17:38:12 +00:00
Rafael Espindola
82c678b83c
implement LDRB, LDRSB, LDRH and LDRSH
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30976 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16 17:17:22 +00:00
Rafael Espindola
bec2e38a91
implement smull and umull
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16 16:33:29 +00:00
Rafael Espindola
d2b5668208
expand ISD::BRCOND
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30963 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-14 17:59:54 +00:00
Rafael Espindola
6c5ae3edd3
fix some fp condition codes
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use non trapping comparison instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30962 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-14 13:42:53 +00:00
Evan Cheng
8b2794aeff
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 21:14:26 +00:00
Rafael Espindola
33d06bcfd4
add FNEGS and FNEGD
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 17:37:35 +00:00
Rafael Espindola
5395538307
add SBCS and SUBS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 17:19:20 +00:00
Rafael Espindola
26a76d1024
implement calls to functions that return long
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30929 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 16:47:22 +00:00
Rafael Espindola
42b62f3f81
implement unordered floating point compares
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30928 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 13:14:59 +00:00
Chris Lattner
65d8c1e8d4
mark call adjustments as modifying the SP
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12 18:00:26 +00:00
Evan Cheng
af9db75943
Add properties to ComplexPattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30891 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-11 21:03:53 +00:00
Rafael Espindola
493a7fc5c3
uint <-> double conversion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30862 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-10 20:38:57 +00:00
Rafael Espindola
667c349feb
add fp sub
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30859 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-10 19:35:01 +00:00
Rafael Espindola
b47e1d033c
add double <-> int conversion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30858 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-10 18:55:14 +00:00
Rafael Espindola
0d9fe764df
compare doubles
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30856 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-10 16:33:47 +00:00
Rafael Espindola
4b20fbc01d
initial support for fp compares. Unordered compares not implemented yet
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-10 12:56:00 +00:00
Evan Cheng
466685d41a
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 20:57:25 +00:00
Rafael Espindola
2dc0f2b55c
add float -> double and double -> float conversion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30835 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 17:50:29 +00:00
Rafael Espindola
ecdb9f93c4
add ADDS and ADCS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30830 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 17:18:28 +00:00
Rafael Espindola
48bc9fbf19
expand ISD::SELECT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30829 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 16:28:33 +00:00
Rafael Espindola
5af3a686a7
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30828 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 14:18:33 +00:00
Rafael Espindola
ad557f9d11
expand ISD::EXTLOAD
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30827 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 14:13:40 +00:00
Rafael Espindola
896f10c309
most ARM targets are little endian
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30826 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 14:12:15 +00:00
Rafael Espindola
e5bbd6d753
implement FUITOS and FUITOD
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30803 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 14:24:52 +00:00
Rafael Espindola
5aca927ae6
implement FLDD
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30802 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 14:03:39 +00:00
Rafael Espindola
d9ae778125
implement fadds, faddd, fmuls and fmuld
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30801 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 13:46:42 +00:00
Rafael Espindola
935b1f8fce
add optional input flag to FMRRD
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30774 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-06 20:33:26 +00:00
Rafael Espindola
614057b843
add support for calling functions that return double
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30771 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-06 19:10:05 +00:00
Rafael Espindola
af1dabef35
fix some bugs affecting functions with no arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30767 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-06 17:26:30 +00:00
Rafael Espindola
1b5076887e
fix the stack alignment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30766 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-06 14:29:47 +00:00
Rafael Espindola
4a408d46d4
add support for calling functions that have double arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30765 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-06 12:50:22 +00:00
Evan Cheng
786225adf0
Make use of getStore().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 23:01:46 +00:00
Rafael Espindola
39b5a21259
use a const ref for passing the vector to ArgumentLayout
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30756 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 17:46:48 +00:00
Rafael Espindola
a284584352
implement a ArgumentLayout class to factor code common to LowerFORMAL_ARGUMENTS and LowerCALL
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implement FMDRR
add support for f64 function arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30754 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 16:48:49 +00:00
Chris Lattner
1da31ee472
Pass the MachineFunction into EmitJumpTableInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30742 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 03:01:21 +00:00
Chris Lattner
6f6f69950f
Use getSectionForFunction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30740 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 02:49:23 +00:00
Rafael Espindola
cd71da5cf0
Implement floating point constants
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30704 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-03 17:27:58 +00:00
Rafael Espindola
9e071f0ae3
fix the names of the 64bit fp register
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initial support for returning 64bit floating point numbers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30692 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-02 19:30:56 +00:00
Rafael Espindola
27185190e6
add floating point registers
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implement SINT_TO_FP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30673 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-29 21:20:16 +00:00
Rafael Espindola
75645496fa
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30581 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-22 11:36:17 +00:00
Rafael Espindola
ebdabda708
more condition codes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30567 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-21 13:06:26 +00:00
Rafael Espindola
7246d33e2a
if a constant can't be an immediate, add it to the constant pool
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30566 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-21 11:29:52 +00:00
Rafael Espindola
4d4c021758
fix header
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add comments
untabify
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30486 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-19 16:41:40 +00:00
Rafael Espindola
71f3b94fa8
Implement a MachineFunctionPass to fix the mul instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30485 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-19 15:49:25 +00:00
Rafael Espindola
3ad5e5cf99
add shifts to addressing mode 1
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30291 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-13 12:09:43 +00:00
Evan Cheng
c356a572e3
Reflects MachineConstantPoolEntry changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-12 21:04:05 +00:00
Rafael Espindola
817e7fdb8b
implement SRL and MUL
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30262 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-11 19:24:19 +00:00
Rafael Espindola
1b3956b516
add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30261 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-11 19:23:32 +00:00
Rafael Espindola
7cca7c5317
partial implementation of the ARM Addressing Mode 1
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30252 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-11 17:25:40 +00:00
Rafael Espindola
ff59d22232
call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30246 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-11 12:49:38 +00:00
Anton Korobeynikov
f369dd26fb
Removed unnecessary Mangler creation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30239 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-10 21:17:03 +00:00
Rafael Espindola
0a200600e7
implement shl and sra
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30191 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 17:36:23 +00:00
Rafael Espindola
4e30764d55
add the eor (xor) instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30189 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 16:59:47 +00:00
Rafael Espindola
5c2aa0a4d8
implement unconditional branches
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fix select.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30186 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 12:47:03 +00:00
Jim Laskey
fde1b3bb2f
1. Remove condition on delete.
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2. Protect and outline createTargetAsmInfo.
3. Misc. kruft.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30169 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 23:39:26 +00:00
Jim Laskey
a0f3d17daa
Make target asm info a property of the target machine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30162 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 22:06:40 +00:00
Jim Laskey
8e8de8f776
Break out target asm info into separate files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30161 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 22:05:02 +00:00
Jim Laskey
563321a258
Separate target specific asm properties from the asm printers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30126 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 18:34:40 +00:00
Rafael Espindola
b52b54d4af
add the orr instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30125 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 18:03:12 +00:00
Chris Lattner
09e460662a
Completely eliminate def&use operands. Now a register operand is EITHER a
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def operand or a use operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 02:31:13 +00:00
Rafael Espindola
3a02f020eb
add support for returning 64bit values
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 19:05:01 +00:00
Chris Lattner
1911fd4f85
Completely rearchitect the interface between targets and the pass manager.
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This pass:
1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
output, move all this to common code, and give targets hooks they can
implement.
3. Commonalize the target population stuff between file emission and JIT
emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
paves the way for "fast -O0" stuff in the CFE later, and now LLC could
lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
which is now orthogonal to the fact that JIT'ing is being done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 04:14:57 +00:00
Chris Lattner
c4fa386471
Simplify target construction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30070 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-03 18:44:02 +00:00
Rafael Espindola
bc4cec9a62
add the SETULT condition code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30067 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-03 13:19:16 +00:00
Rafael Espindola
5f450d2948
add more condition codes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30056 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-02 20:24:25 +00:00
Evan Cheng
9ade218533
Select() no longer require Result operand by reference.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29898 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-26 05:34:46 +00:00
Rafael Espindola
755be9b3de
use @ for comments
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store LR in an arbitrary stack slot
add support for writing varargs functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29876 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-25 17:55:16 +00:00
Rafael Espindola
cdda88cd12
add the "eq" condition code
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implement a movcond instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29857 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-24 17:19:08 +00:00
Rafael Espindola
6f602de3b6
create a generic bcond instruction that has a conditional code argument
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29856 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-24 16:13:15 +00:00
Rafael Espindola
687bc49d1a
initial support for branches
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-24 13:45:55 +00:00
Rafael Espindola
f4d40050f1
add a README.txt
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29814 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-22 12:22:46 +00:00
Rafael Espindola
3c000bf817
initial support for select
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29802 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-21 22:00:32 +00:00
Rafael Espindola
a5dfc835d4
add the and instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29793 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-21 13:58:59 +00:00
Rafael Espindola
3717ca965b
call computeRegisterProperties
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29780 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-20 01:49:49 +00:00
Chris Lattner
5ea64fd9eb
Constify some methods. Patch provided by Anton Vayvod, thanks!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29756 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 22:00:08 +00:00
Rafael Espindola
f3a335cedf
add a "load effective address"
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29748 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 17:09:40 +00:00
Rafael Espindola
ec46ea34dc
Declare the callee saved regs
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Remove the hard coded store and load of the link register
Implement ARMFrameInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29727 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-16 14:43:33 +00:00
Rafael Espindola
61369da0e5
select code like
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ldr rx, [ry, #offset]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29664 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-14 19:01:24 +00:00
Chris Lattner
e219945348
Eliminate use of getNode that takes a vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29614 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:38:39 +00:00
Chris Lattner
8742867f95
elimiante use of getNode that takes vector of operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29612 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:22:35 +00:00
Evan Cheng
64a752f7c7
Match tablegen changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29604 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 09:08:15 +00:00
Evan Cheng
bb7b844bec
CALLSEQ_* produces chain even if that's not needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29603 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 09:03:33 +00:00
Rafael Espindola
a1ab92d8b7
correctly set LocalAreaOffset of TargetFrameInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29589 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09 17:37:45 +00:00
Rafael Espindola
7a53bd0890
fix the spill code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29583 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09 16:41:12 +00:00
Rafael Espindola
2c8cdc6c1a
fix the loading of the link register in emitepilogue
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29580 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09 13:15:47 +00:00
Rafael Espindola
46adf8119d
change the addressing mode of the str instruction to reg+imm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29571 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 20:35:03 +00:00
Rafael Espindola
1a00946817
initial support for variable number of arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29567 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 13:02:29 +00:00
Evan Cheng
2ef88a09b7
Match tablegen isel changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29549 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-07 22:28:20 +00:00
Rafael Espindola
341b864c8d
use a 'register pressure reducing' scheduler
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make sure only one move is used in a hello world
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29520 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-04 12:48:42 +00:00
Rafael Espindola
6312da0fc7
Bug fix: always generate a RET_FLAG in LowerRET
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fixes ret_null.ll and call.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29519 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 22:50:11 +00:00
Rafael Espindola
f4fda80403
add and use ARMISD::RET_FLAG
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29499 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 17:02:20 +00:00
Rafael Espindola
1ed3af11b5
start comments with #
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move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29451 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-01 18:53:10 +00:00
Rafael Espindola
06c1e7eacb
implement LowerConstantPool and LowerGlobalAddress
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29433 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-01 12:58:43 +00:00
Rafael Espindola
6d581e8d15
handle GlobalValue::InternalLinkage in doFinalization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29417 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 20:38:13 +00:00
Evan Cheng
2641cad180
Remove InFlightSet hack. No longer needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 00:47:19 +00:00
Rafael Espindola
b01c4bbb45
emit global constants
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29344 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 11:38:51 +00:00
Rafael Espindola
fac00a93a9
implement function calling of functions with up to 4 arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29274 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-25 20:17:20 +00:00
Rafael Espindola
44819cb20a
implemented sub
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correctly update the stack pointer in the prologue and epilogue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 12:26:16 +00:00
Rafael Espindola
355746359e
initial prologue and epilogue implementation. Need to define add and sub before finishing it :-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29175 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 17:00:30 +00:00
Rafael Espindola
84b19be6ab
skeleton of a lowerCall implementation for ARM
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29159 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-16 01:02:57 +00:00
Rafael Espindola
a4e64359aa
add the memri memory operand
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this makes it possible for ldr instructions with non-zero immediate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 11:36:48 +00:00
Rafael Espindola
aefe14299a
create the raddr addressing mode that matches any register and the frame index
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use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 01:41:35 +00:00
Rafael Espindola
49e4415587
handle the "mov reg1, reg2" case in isMoveInstr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 21:52:45 +00:00
Rafael Espindola
58421d7d08
initial implementation of ARMRegisterInfo::eliminateFrameIndex
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fixes test/Regression/CodeGen/ARM/ret_arg5.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-18 00:08:07 +00:00
Chris Lattner
1790d44d0d
Don't pass target name into TargetData anymore, it is never used or needed.
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Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:22:52 +00:00
Rafael Espindola
337c4ad6e7
lower more then 4 formal arguments. The offset is currently hard coded.
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implement SelectFrameIndex
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 12:28:08 +00:00
Rafael Espindola
4b02367d54
add R0 to liveout
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expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28691 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-05 22:26:14 +00:00
Rafael Espindola
85ede37ca9
Expand ret into "CopyToReg;BRIND"
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28559 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 17:33:19 +00:00
Chris Lattner
a5135ba0c9
Ignore generated files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28520 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-27 01:23:30 +00:00
Evan Cheng
6848be1a27
Change RET node to include signness information of the return values. i.e.
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RET chain, value1, sign1, value2, sign2, ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 23:10:12 +00:00
Rafael Espindola
a1334cdfb2
On ARM, alignment is in bits
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Add lr as a hard coded operand of bx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28494 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 10:56:17 +00:00
Rafael Espindola
2f99b6bd96
implement initial version of ARMAsmPrinter::printOperand
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28470 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 12:57:06 +00:00
Rafael Espindola
c3c1a86aa0
port the ARM backend to use ISD::CALL instead of LowerCallTo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28469 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 11:00:18 +00:00
Evan Cheng
6a3d5a62f0
Assert if InflightSet is not cleared after instruction selecting a BB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28459 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 00:24:28 +00:00
Evan Cheng
afe358e7d4
Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
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non-deterministic behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 20:46:25 +00:00
Chris Lattner
d74ea2bbd8
Patches to make the LLVM sources more -pedantic clean. Patch provided
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by Anton Korobeynikov! This is a step towards closing PR786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 17:04:05 +00:00
Rafael Espindola
4b442b528a
implement minimal versions of
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ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28431 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 02:48:20 +00:00
Owen Anderson
d988b32aba
Make all of the TargetMachine subclasses use the new string TargetData methods.
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This is part of the on-going work on PR 761.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28414 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-20 00:24:56 +00:00
Rafael Espindola
dc124a234a
implement movri
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add a stub LowerFORMAL_ARGUMENTS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28388 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-18 21:45:49 +00:00
Evan Cheng
0f3ac8d8d4
getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-18 00:12:58 +00:00
Evan Cheng
c01d497255
Remove PointerType from class Target
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28368 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 21:20:27 +00:00
Rafael Espindola
1c8f0536b3
add an abort after every assert(0)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-15 22:34:39 +00:00
Rafael Espindola
7bc59bc395
added a skeleton of the ARM backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28301 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-14 22:18:28 +00:00