Commit Graph

10643 Commits

Author SHA1 Message Date
Evan Cheng
c94ebef1b1 Do not consider MMX_MOVD64rr a move instructions. The source register is in GR32, the destination is VR64. They are not compatible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-22 08:04:23 +00:00
Anton Korobeynikov
b5bd026a75 Drop bunch of half-working stuff in the ext_weak linkage support.
Now we're using one gross, but quite robust hack :) (previous ones
did not work, for example, when ext_weak symbol was used deep inside
constant expression in the initializer).

The proper fix of this problem will require some quite huge asmprinter
changes and that's why was postponed. This fixes PR3629 by the way :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-21 11:53:32 +00:00
Bill Wendling
5a45d76c25 Make sure this doesn't access .end() too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65213 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-21 01:11:36 +00:00
Bill Wendling
8aa374b629 Make sure we don't dereference the .end() of the container.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-21 01:07:26 +00:00
Bill Wendling
3d2445f5d9 Propagate more debug loc infos. This also includes some code cleaning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65207 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-21 00:43:56 +00:00
Bill Wendling
2625f9b2e4 We need to propagate the debug location information even when dealing with the
prologue/epilogue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65206 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-21 00:32:08 +00:00
Evan Cheng
79fb3b434f Support return of MMX values in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65152 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-20 20:43:02 +00:00
Torok Edwin
474479fce7 add note about sin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65137 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-20 18:42:06 +00:00
Bill Wendling
cb819f13d7 Put code that generates debug labels into TableGen so that it can be used by
everyone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-18 23:12:06 +00:00
Dan Gohman
38deef9ce5 Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64915 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-18 16:37:45 +00:00
Nate Begeman
d6b7a242d3 Add support to the JIT for true non-lazy operation. When a call to a function
that has not been JIT'd yet, the callee is put on a list of pending functions
to JIT.  The call is directed through a stub, which is updated with the address
of the function after it has been JIT'd.  A new interface for allocating and
updating empty stubs is provided.

Add support for removing the ModuleProvider the JIT was created with, which
would otherwise invalidate the JIT's PassManager, which is initialized with the
ModuleProvider's Module.

Add support under a new ExecutionEngine flag for emitting the infomration 
necessary to update Function and GlobalVariable stubs after JITing them, by
recording the address of the stub and the name of the GlobalValue.  This allows
code to be copied from one address space to another, where libraries may live
at different virtual addresses, and have the stubs updated with their new
correct target addresses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64906 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-18 08:31:02 +00:00
Dan Gohman
97357614b5 Factor out the code to add a MachineOperand to a MachineInstrBuilder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64891 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-18 05:45:50 +00:00
Evan Cheng
caa0c2cadd GV with null value initializer shouldn't go to BSS if it's meant for a mergeable strings section. Currently it only checks for Darwin. Someone else please check if it should apply to other targets as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64877 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-18 02:19:52 +00:00
Scott Michel
fdc40a0a69 Remove trailing whitespace to reduce later commit patch noise.
(Note: Eventually, commits like this will be handled via a pre-commit hook that
 does this automagically, as well as expand tabs to spaces and look for 80-col
 violations.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64827 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-17 22:15:04 +00:00
Chris Lattner
a66878b881 add a horrible note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64719 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-17 01:16:14 +00:00
Bill Wendling
86e6cb924b --- Merging (from foreign repository) r64714 into '.':
U    include/llvm/CodeGen/DebugLoc.h
U    lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp

Enable debug location generation at -Os. This goes with the reapplication of the
r63639 patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-17 01:04:54 +00:00
Dan Gohman
9fbb52db98 Delete trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64694 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-16 23:14:14 +00:00
Dan Gohman
35188eb54d MachineLICM now handles these cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64620 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-15 23:24:52 +00:00
Dan Gohman
b5aa3ad1e7 The x86-64 red zone is now being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64535 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-14 03:30:05 +00:00
Evan Cheng
c7ce29b04f Teach x86 target -soft-float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 22:36:38 +00:00
Dale Johannesen
948175785d Remove non-DebugLoc versions of BuildMI from IA64, Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64438 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:34:39 +00:00
Dale Johannesen
8d13f8f104 Remove non-DebugLoc versions of BuildMI from X86.
There were some that might even matter in X86FastISel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64437 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:33:27 +00:00
Dale Johannesen
0b4581f16c missed file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64436 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:32:04 +00:00
Dale Johannesen
d552eee4a0 Remove non-DebugLoc versions of buildMI from Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64435 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:31:35 +00:00
Dale Johannesen
01b36e6436 Remove non-DebugLoc versions of BuildMI from Alpha and Cell.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64433 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:30:42 +00:00
Dale Johannesen
bd9ef18f74 Remove refs to non-DebugLoc version of BuildMI from XCore, PIC16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64432 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:29:03 +00:00
Dale Johannesen
536a2f1f84 Remove refs to non-DebugLoc version of BuildMI from PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64431 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:27:39 +00:00
Dale Johannesen
8a43d98644 and one more file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64430 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:26:21 +00:00
Dale Johannesen
b67284057e Remove refs to non-DebugLoc versions of BuildMI from ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64429 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:25:56 +00:00
Bill Wendling
92c1e12647 Revert this. It was breaking stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:16:35 +00:00
Bill Wendling
54fc7d6714 Turn off the old way of handling debug information in the code generator. Use
the new way, where all of the information is passed on SDNodes and machine
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64427 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13 02:01:04 +00:00
Dale Johannesen
c5b5051357 Check in missing file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64410 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-12 23:24:44 +00:00
Dale Johannesen
21b5541814 Eliminate a couple of non-DebugLoc BuildMI variants.
Modify callers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64409 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-12 23:08:38 +00:00
Dale Johannesen
78e3e521cd Arrange to print constants that match "n" and "i" constraints
in inline asm as signed (what gcc does).  Add partial support
for x86-specific "e" and "Z" constraints, with appropriate
signedness for printing.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64400 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-12 20:58:09 +00:00
Chris Lattner
8c4d1b2bcf fix PR3538 for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64384 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-12 17:38:23 +00:00
Chris Lattner
f902d246b6 fix PR3538 for PPC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-12 17:37:15 +00:00
Chris Lattner
1823c92aa7 fix the X86 backend to just drop llvm.declare nodes for VLAs instead of
leaving them in the DAG and then getting selection errors.  This is a 
fix for PR3538.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-12 17:33:11 +00:00
Bill Wendling
d1c321a89a Move debug loc info along when the spiller creates new instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64342 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-12 00:02:55 +00:00
Bill Wendling
fbef3101a5 Propagate DebugLoc info for spiller call-backs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-11 21:51:19 +00:00
Dan Gohman
d293e0d2dc Don't try to set an EFLAGS operand to dead if no instruction was created.
This fixes a bug introduced by r61215.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64316 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-11 19:50:24 +00:00
Evan Cheng
1d76864df3 Handle llvm.x86.sse2.maskmov.dqu in 64-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64240 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-10 22:06:28 +00:00
Evan Cheng
7403eeaa88 80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64237 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-10 21:39:44 +00:00
Sanjiv Gupta
2cc753170b Function temporaries can not overlap with retval or args.See the comment in source code to know the reason. Anything having .auto. in its name is local to a function in nature irrespective of the linkage specified. print static local variables in module level IDATA section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64199 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-10 04:20:26 +00:00
Evan Cheng
a0eedac226 Implement FpSET_ST1_*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64186 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-09 23:32:07 +00:00
Dan Gohman
333014e256 Use doxygen comment syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-09 18:12:09 +00:00
Evan Cheng
dc54d317e7 Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-09 07:14:22 +00:00
Chris Lattner
be685cc72a add a note.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-08 20:44:19 +00:00
Dale Johannesen
6f38cb61a9 Use getDebugLoc forwarder instead of getNode()->getDebugLoc.
No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64026 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-07 19:59:05 +00:00
Dan Gohman
1fdbc1dd4e Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-07 16:15:20 +00:00
Dale Johannesen
0469280776 Needs this file too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63993 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-07 00:56:46 +00:00
Dale Johannesen
b300d2aa3e Get rid of the last non-DebugLoc versions of getNode!
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base.  There's no
sensible way to associate debug info with these.  I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. 
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-07 00:55:49 +00:00
Dan Gohman
2d0a1cc416 Refactor some repeated logic into a separate function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63989 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-07 00:43:41 +00:00
Dan Gohman
288b824cef Make a comment a doxygen comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-07 00:42:54 +00:00
Dale Johannesen
e8d7230f48 Remove more non-DebugLoc getNode variants. Use
getCALLSEQ_{END,START} to permit passing no DebugLoc
there.  UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 23:05:02 +00:00
Dale Johannesen
de06470330 Remove more non-DebugLoc versions of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63969 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 21:50:26 +00:00
Bill Wendling
ac06d004a0 Record debug location information in the Dwarf writer.
A simple test program shows that debugging works. :-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 21:45:08 +00:00
Dan Gohman
9036d80d7b Use .size and .type on ELF systems; this helps tools that map
addresses to symbols.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 21:15:52 +00:00
Dale Johannesen
f5f5dce897 Eliminate remaining non-DebugLoc version of getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63951 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 19:16:40 +00:00
Sanjiv Gupta
a2d8b06272 Print globl directive for variables with external linkage (global variables).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63943 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 18:24:59 +00:00
Evan Cheng
770bcc7b15 Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63938 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 17:43:24 +00:00
Evan Cheng
4350eb86a7 Add TargetInstrInfo::isSafeToMoveRegisterClassDefs. It returns true if it's safe to move an instruction which defines a value in the register class. Replace pre-splitting specific IgnoreRegisterClassBarriers with this new hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63936 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 17:17:30 +00:00
Dale Johannesen
f90b2a7742 get rid of some non-DebugLoc getTargetNode variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63909 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 02:08:06 +00:00
Dale Johannesen
ed2eee63a6 Get rid of one more non-DebugLoc getNode and
its corresponding getTargetNode.  Lots of
caller changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63904 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 01:31:28 +00:00
Dale Johannesen
3484c09e0d Remove a non-DebugLoc version of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-05 22:07:54 +00:00
Evan Cheng
b3379fbc60 A few more isAsCheapAsAMove.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63852 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-05 08:42:55 +00:00
Dale Johannesen
49de98214b Reapply 63765. Patches for clang and llvm-gcc to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63812 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-05 01:49:45 +00:00
Dale Johannesen
2fabcb2776 Get rid of 3 non-DebugLoc getNode variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-05 01:01:16 +00:00
Dale Johannesen
4be0bdf7c1 Remove non-DebugLoc versions of getMergeValues, ZeroExtendInReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63800 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-05 00:20:09 +00:00
Dale Johannesen
a05dca4f9e Remove non-DebugLoc forms of CopyToReg and CopyFromReg.
Adjust callers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63789 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 23:02:30 +00:00
Dale Johannesen
4d452de150 Reverting 63765. This broke the build of both clang
and llvm-gcc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63786 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 22:47:25 +00:00
Dale Johannesen
33c960f523 Remove non-DebugLoc versions of getLoad and getStore.
Adjust the many callers of those versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 20:06:27 +00:00
Nate Begeman
d24479730a New feature: add support for target intrinsics being defined in the
target directories themselves.  This also means that VMCore no longer
needs to know about every target's list of intrinsics.  Future work
will include converting the PowerPC target to this interface as an
example implementation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 19:47:21 +00:00
Chris Lattner
e6c1473e56 Bill implemented this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63752 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 19:09:07 +00:00
Chris Lattner
8dfdf5d62d add a note, this is why we're faster at SciMark-MonteCarlo with
SSE disabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 19:08:01 +00:00
Dan Gohman
37eed798a9 Minor code cleanups; no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 17:28:58 +00:00
Dale Johannesen
39355f9fea Remove non-DebugLoc forms of the exotic forms
of Lod and Sto; patch uses.



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2009-02-04 02:34:38 +00:00
Dale Johannesen
f5d9789a7f Remove some more non-DebugLoc versions of construction
functions, with callers adjusted to fit.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 01:48:28 +00:00
Dale Johannesen
8ad9b43e69 Remove a few non-DebugLoc versions of node creation
functions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63703 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 01:17:06 +00:00
Mon P Wang
7bcaefaf59 Fixes a case where we generate an incorrect mask for pshfhw in the presence
of undefs and incorrectly determining if we have punpckldq.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63702 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 01:16:59 +00:00
Dale Johannesen
dd64c417c0 Patch up omissions in DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 00:33:20 +00:00
Dale Johannesen
eacf2dc4bb Need this file too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63674 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 22:26:34 +00:00
Dale Johannesen
0f502f6f44 Add some DL propagation to places that didn't
have it yet.  More coming.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 22:26:09 +00:00
Dale Johannesen
d839254888 DebugLoc propgation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63664 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 21:48:12 +00:00
Dale Johannesen
e4d209dcb8 DebugLoc propagation. done with file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 20:21:25 +00:00
Dale Johannesen
ace1610df5 DebugLoc propagation. 2/3 through file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63650 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 19:33:06 +00:00
Dan Gohman
605679f0cd Tevert part of the x86 subtarget logic changes: when -march=x86-64
is given, override the subtarget settings and enable 64-bit support.
This restores the earlier behavior, and fixes regressions on
Non-64-bit-capable x86-32 hosts.

This isn't necessarily the best approach, but the most obvious
alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used
with -march=x86-64 when the host doesn't have 64-bit support. This
makes things little more consistent, but it's less convenient, and
it has the practical drawback of requiring lots of test changes, so
I opted for the above approach for now.


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2009-02-03 18:53:21 +00:00
Bill Wendling
9bc96a5720 Create DebugLoc information in FastISel. Several temporary methods were
created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.


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2009-02-03 00:55:04 +00:00
Dan Gohman
f75e5b4d8c Change Feature64Bit to not imply FeatureSSE2. All x86-64 hardware has
SSE2, however it's possible to disable SSE2, and the subtarget support
code thinks that if 64-bit implies SSE2 and SSE2 is disabled then
64-bit should also be disabled. Instead, just mark all the 64-bit
subtargets as explicitly supporting SSE2.

Also, move the code that makes -march=x86-64 enable 64-bit support by
default to only apply when there is no explicit subtarget. If you
need to specify a subtarget and you want 64-bit code, you'll need to
select a subtarget that supports 64-bit code.


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2009-02-03 00:04:43 +00:00
Torok Edwin
b68a88bd48 Only force SSE level if it is not correct.
Add an assert to check HasX86_64 status.


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2009-02-02 21:57:34 +00:00
Torok Edwin
38870ed13c remove #if 0 code on Bill's request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 20:23:02 +00:00
Sanjiv Gupta
3b020feb57 Made the common case of default address space directive as non-virtual for performance reasons. Provide a single virtual interface for directives of all sizes in non-default address spaces.
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2009-02-02 16:53:06 +00:00
Evan Cheng
97d0e0e314 ADD / SUB / SMUL / UMUL with overflow second result top bits must be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63509 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 09:15:04 +00:00
Evan Cheng
961d6d4ac0 Add comment.
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2009-02-02 08:19:07 +00:00
Evan Cheng
67ad9db15b Teach LowerBRCOND to recognize (xor (setcc x), 1). The xor inverts the condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 08:07:36 +00:00
Torok Edwin
3f142c36ad Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for
var-args, and don't allow FP return values


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-01 18:15:56 +00:00
Duncan Sands
b0d5cdd52e Fix PR3453 and probably a bunch of other potential
crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.


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2009-02-01 18:06:53 +00:00
Dale Johannesen
7d2ad624fa Make LowerCallTo and LowerArguments take a DebugLoc
argument.  Adjust all callers and overloaded versions.



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2009-01-30 23:10:59 +00:00
Bill Wendling
7581bfa275 Get rid of the non-DebugLoc-ified getNOT() method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 23:03:19 +00:00
Sanjiv Gupta
5af3ee2818 Fixed the comment. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63387 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 09:01:44 +00:00
Sanjiv Gupta
e0ffc92508 Use sublw for comparison with literals instead of subwf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 07:55:25 +00:00
Mon P Wang
7ad9b51278 When PerformBuildVectorCombine, avoid creating a X86ISD::VZEXT_LOAD of
an illegal type.


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2009-01-30 07:07:40 +00:00
Sanjiv Gupta
c8d7bc850d Enable emitting of constant values in non-default address space as well. The APIs emitting constants now take an additional parameter signifying the address space in which to emit. The APIs like getData8BitsDirective() etc are made virtual enabling targets to be able to define appropirate directivers for various sizes and address spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63377 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 04:25:10 +00:00
Dan Gohman
e5af2d3a22 Make x86's BT instruction matching more thorough, and add some
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.


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2009-01-29 01:59:02 +00:00
Mon P Wang
e91a000889 Fixed lowering of v816 shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 23:11:14 +00:00
Duncan Sands
1465d61bdd Rename getAnalysisToUpdate to getAnalysisIfAvailable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63198 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 13:14:17 +00:00
Evan Cheng
1632782fe9 The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 08:35:02 +00:00
Mon P Wang
3becd093cc Add shuffle splat pattern for x86 sse shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63193 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 08:12:05 +00:00
Evan Cheng
d1e7d9a88b Suppress a compile time warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63161 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 00:53:34 +00:00
Anton Korobeynikov
72bb40229e Treat [1 x i8] zeroinitializer as a C string, placing such stuff into
mergeable string section. I don't see any bad impact of such decision
(rather then placing it into mergeable const section, as it was before),
but at least Darwin linker won't complain anymore.

The problem in LLVM is that we don't have special type for string constants
(like gcc does). Even more, we have two separate types: ConstatArray for non-null
strings and ConstantAggregateZero for null stuff.... It's a bit weird :)

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2009-01-27 22:29:24 +00:00
Dan Gohman
d3f184906d Reformat the allocation-order arrays to a more conventional style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 19:25:38 +00:00
Dan Gohman
9e79091f1a Respect the DisableRedZone flag on PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63119 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 19:19:28 +00:00
Dan Gohman
c03e9a1040 Simplify findNonImmUse; return the result using the return value
instead of via a by-reference argument. No functionality change.


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2009-01-27 19:04:30 +00:00
Evan Cheng
6a86bd71df Implement multiple with overflow by 2 with an add instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 03:30:42 +00:00
Dan Gohman
e8ecf4876a Eliminate unnecessary operands-list traversals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63088 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 02:37:43 +00:00
Dan Gohman
499cb3fcfb Enable the red zone on x86-64 by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63078 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 00:58:47 +00:00
Dan Gohman
336b636dd7 Fix the Red Zone calculation for functions with frame pointers.
Don't use the Red Zone when dynamic stack realignment is needed.
This could be implemented, but most x86-64 ABIs don't require
dynamic stack realignment so it isn't urgent.


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2009-01-27 00:40:06 +00:00
Scott Michel
9de57a9ed2 CellSPU:
- Update DWARF debugging support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 22:33:37 +00:00
Scott Michel
210de72cd7 Make the Dwarf macro information section optional; CellSPU's assembler
doesn't support it. The default is set to 'true', so this should not
impact any other target backends.


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2009-01-26 22:32:51 +00:00
Dan Gohman
92f4f16a19 Implement Red Zone utilization on x86-64. This is currently
disabled by default; I'll enable it when I hook it up with
the llvm-gcc flag which controls it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 22:22:31 +00:00
Evan Cheng
5b2e5893c6 Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 18:43:34 +00:00
Dan Gohman
e7852d0144 Take the next steps in making SDUse more consistent with LLVM Use, and
tidy up SDUse and related code.
 - Replace the operator= member functions with a set method, like
   LLVM Use has, and variants setInitial and setNode, which take
   care up updating use lists, like LLVM Use's does. This simplifies
   code that calls these functions.
 - getSDValue() is renamed to get(), as in LLVM Use, though most
   places can either use the implicit conversion to SDValue or the
   convenience functions instead.
 - Fix some more node vs. value terminology issues.

Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.


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2009-01-26 04:35:06 +00:00
Scott Michel
19c10e658a Untabify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 03:37:41 +00:00
Scott Michel
c9c8b2a804 CellSPU:
- Rename fcmp.ll test to fcmp32.ll, start adding new double tests to fcmp64.ll
- Fix select_bits.ll test
- Capitulate to the DAGCombiner and move i64 constant loads to instruction
  selection (SPUISelDAGtoDAG.cpp).

  <rant>DAGCombiner will insert all kinds of 64-bit optimizations after
  operation legalization occurs and now we have to do most of the work that
  instruction selection should be doing twice (once to determine if v2i64
  build_vector can be handled by SelectCode(), which then runs all of the
  predicates a second time to select the necessary instructions.) But,
  CellSPU is a good citizen.</rant>


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2009-01-26 03:31:40 +00:00
Nate Begeman
5bf4b7556f Fix a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62989 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 03:15:54 +00:00
Nate Begeman
c2fd67f697 De-identifying per sabre review
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 03:15:31 +00:00
Nate Begeman
51a0437b16 Map address space 256 to gs; similar mappings could be supported for the
other x86 segments.  address space 0 is stack/default, 1-255 are reserved for
client use.


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2009-01-26 01:24:32 +00:00
Nate Begeman
740ab03f12 Support pattern matching various x86 sse shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 00:52:55 +00:00
Chris Lattner
4469c53cfc silence a warning when assertions are disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 23:08:00 +00:00
Torok Edwin
afb564c697 should have removed the + when manually applying a patch!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 20:29:34 +00:00
Torok Edwin
c8ad2d2abf revert this patch for now, because Codegen does still want to generate SSE code,
for example in the case of va-args. XFAIL associated tests.


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2009-01-25 20:21:24 +00:00
Torok Edwin
7f1d5252c7 If user explicitly asks not to use SSE, don't force it. This fixes LLVM part of PR3402.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 17:58:56 +00:00
Evan Cheng
1902a129a5 Private linkage support for PPC / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62955 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 06:32:01 +00:00
Nate Begeman
9b99485074 Fix an indent and a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-24 22:12:48 +00:00
Torok Edwin
e46a686dc2 add note about possible GEP improvement with fields of size 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62925 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-24 19:30:25 +00:00
Chris Lattner
91387de8ce hopefully address PR3379 by making the P modifier work in x86 inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62887 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-23 22:33:40 +00:00
Bob Wilson
4c24546238 Add SelectionDAG::getNOT method to construct bitwise NOT operations,
corresponding to the "not" and "vnot" PatFrags.  Use the new method
in some places where it seems appropriate.



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2009-01-22 17:39:32 +00:00
Evan Cheng
536ab130ec Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62762 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22 09:10:11 +00:00
Chris Lattner
256baa4b1f add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62760 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22 07:16:03 +00:00
Dan Gohman
dbf5f2557e Recognize inline asm for bswap on x86-64 GLIBC. This allows it
to be supported in the JIT.


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2009-01-21 23:40:54 +00:00
Evan Cheng
a095c972cc Also favors NOT64r.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62710 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 19:45:31 +00:00
Chris Lattner
0f2d995fd6 fix warning in release-asserts mode and spelling of assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62699 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 18:38:18 +00:00
Dan Gohman
1ef4d8f7ee Fix a recent regression. ClrOpcode is not set for i8; for i8, if
we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.


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2009-01-21 14:50:16 +00:00
Sanjiv Gupta
2530566acd Fixed build warnings. Restoring changes done in 62600, they were lost in 62655.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62681 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 09:02:46 +00:00
Duncan Sands
9fbc7e2e7a Cleanup whitespace and comments, and tweak some
prototypes, in operand type legalization.  No
functionality change.


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2009-01-21 09:00:29 +00:00
Sanjiv Gupta
08b9b05218 Implement LowerOperationWrapper for legalizer.
Also a few signed comparison fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62665 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 05:44:05 +00:00
Scott Michel
d1e8d9c0a5 CellSPU:
- Ensure that (operation) legalization emits proper FDIV libcall when needed.
- Fix various bugs encountered during llvm-spu-gcc build, along with various
  cleanups.
- Start supporting double precision comparisons for remaining libgcc2 build.
  Discovered interesting DAGCombiner feature, which is currently solved via
  custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner
  insists on inserting one anyway.)
- Update README.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62664 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 04:58:48 +00:00
Evan Cheng
aaf414c92c Favors generating "not" over "xor -1". For example.
unsigned test(unsigned a) {
  return ~a;
}
llvm used to generate:
movl    $4294967295, %eax
xorl    4(%esp), %eax

Now it generates:
movl      4(%esp), %eax
notl      %eax

It's 3 bytes shorter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 02:09:05 +00:00
Evan Cheng
04ee5a1d92 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 19:12:24 +00:00
Dan Gohman
8289b05c4c Add a README entry noticed while investigating PR3216.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 01:07:33 +00:00
Evan Cheng
2722e7b139 DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62519 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 19:06:11 +00:00
Evan Cheng
c1a168a0fc Fix 80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62518 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 18:57:29 +00:00
Evan Cheng
5fc742d5b2 Handle ISD::DECLARE with PIC relocation model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62516 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 18:31:51 +00:00
Evan Cheng
50c3dfefd9 Minor tweak to LowerUINT_TO_FP_i32. Bias (after scalar_to_vector) has two uses so we should make it the second source operand of ISD::OR so 2-address pass won't have to be smart about commuting.
%reg1024<def> = MOVSDrm %reg0, 1, %reg0, <cp#0>, Mem:LD(8,8) [ConstantPool + 0]
%reg1025<def> = MOVSD2PDrr %reg1024
%reg1026<def> = MOVDI2PDIrm <fi#-1>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack-1 + 0]
%reg1027<def> = ORPSrr %reg1025<kill>, %reg1026<kill>
%reg1028<def> = MOVPD2SDrr %reg1027<kill>
%reg1029<def> = SUBSDrr %reg1028<kill>, %reg1024<kill>
%reg1030<def> = CVTSD2SSrr %reg1029<kill>
MOVSSmr <fi#0>, 1, %reg0, 0, %reg1030<kill>, Mem:ST(4,4) [FixedStack0 + 0]
%reg1031<def> = LD_Fp32m80 <fi#0>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack0 + 0]
RET %reg1031<kill>, %ST0<imp-use,kill>

The reason 2-addr pass isn't smart enough to commute the ORPSrr is because it can't look pass the MOVSD2PDrr instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 08:19:57 +00:00
Evan Cheng
a06ec9efe1 Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't
optimize it to a SINT_TO_FP when the sign bit is known zero. X86 isel should perform the optimization itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62504 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 08:08:22 +00:00
Bill Wendling
030939c87b Extend thi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62415 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 07:40:19 +00:00
Evan Cheng
8e27826649 Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62413 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 07:09:27 +00:00
Bill Wendling
f6a4e2edb0 Temporarily revert my last change. It is causing a bootstrap failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62405 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 04:23:51 +00:00
Bill Wendling
8b8a636843 Implement a special algorithm for converting uint_to_fp for i32 values on
X86. This code:

void f() {
  uint32_t x;
  float y = (float)x;
}

used to be:

     movl     %eax, -8(%ebp)
     movl     [2^52 double], -4(%ebp)
     movsd    -8(%ebp), %xmm0
     subsd    [2^52 double], %xmm0
     cvtsd2ss %xmm0, %xmm0

Is now:

   movsd        [2^52 double], %xmm0
   movsd        %xmm0, %xmm1
   movd         %ecx, %xmm2
   orps         %xmm2, %xmm1
   subsd        %xmm0, %xmm1
   cvtsd2ss     %xmm1, %xmm0

This is faster on X86. Note that there's an extra load of %xmm0 into %xmm1. That
will be fixed in a later coalescer fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 03:56:04 +00:00
Oscar Fuentes
70fd453a02 CMake: Add lib/Target/IA64/IA64Subtarget.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62394 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 01:50:32 +00:00
Evan Cheng
ee5c2b8ba2 Fix PPC ISD::Declare isel and eliminate the need for PPCTargetLowering::LowerGlobalAddress to check if isVerifiedDebugInfoDesc() is true. Given the recent changes, it would falsely return true for a lot of GlobalAddressSDNode's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62373 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 22:57:32 +00:00
Dan Gohman
01bbc3e334 Give IA64 a TargetSubtarget subclass, so that it can
implement getSubtargetImpl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62369 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 22:49:36 +00:00
Bill Wendling
64e87326d9 Add support for non-zero __builtin_return_address values on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62338 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 19:25:27 +00:00
Evan Cheng
bdfc582edf ARMCompilationCallback should not save / restore vfp registers if vfp is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62299 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 02:16:37 +00:00
Dan Gohman
2836c283bb Initial hazard recognizer support in post-pass scheduling. This includes
a new toy hazard recognizier heuristic which attempts to direct the
scheduler to avoid clumping large groups of loads or stores too densely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62291 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 01:33:36 +00:00
Dan Gohman
fc54c55296 Generalize the HazardRecognizer interface so that it can be used
to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62284 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 22:18:12 +00:00
Rafael Espindola
19caec79f2 Fix Alpha test and support for private linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62282 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 21:51:46 +00:00
Mon P Wang
f0fcdd8e26 Expand insert/extract of a <4 x i32> with a variable index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62281 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 21:10:20 +00:00
Rafael Espindola
bb46f52027 Add the private linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 20:18:42 +00:00
Dan Gohman
79ce276083 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 19:20:50 +00:00
Dan Gohman
41b762a75e Add load-folding table entries for BT*ri8 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62267 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 17:57:09 +00:00
Dan Gohman
c13cf130c4 Make getWidenVectorType const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62265 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 17:34:08 +00:00
Dan Gohman
73e0914848 Const-qualify getPreIndexedAddressParts and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62259 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 16:29:45 +00:00
Richard Osborne
cfb1ae87c6 Don't fold address calculations which use negative offsets into
the ADDRspii addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62258 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 11:32:30 +00:00
Richard Osborne
62db116933 Update the operands used when building LDAWSP instructions to match the .td
changes in the last commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62257 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 11:18:53 +00:00
Scott Michel
94bd57e154 - Convert remaining i64 custom lowering into custom instruction emission
sequences in SPUDAGToDAGISel.cpp and SPU64InstrInfo.td, killing custom
  DAG node types as needed.
- i64 mul is now a legal instruction, but emits an instruction sequence
  that stretches tblgen and the imagination, as well as violating laws of
  several small countries and most southern US states (just kidding, but
  looking at a function with 80+ parameters is really weird and just plain
  wrong.)
- Update tests as needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62254 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 04:41:47 +00:00
Richard Osborne
29cab5f0ee Add pseudo instructions to the XCore for (load|store|load address) of a
frame index. eliminateFrameIndex will replace these instructions with
(LDWSP|STWSP|LDAWSP) or (LDW|STW|LDAWF) if a frame pointer is in use.

This fixes PR 3324. Previously we used LDWSP, STWSP, LDAWSP before frame
pointer elimination. However since they were marked as implicitly using
SP they could not be rematerialised.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62238 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-14 18:26:46 +00:00
Nuno Lopes
bb6382e32d fix memleaks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62198 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 23:35:49 +00:00
Dan Gohman
0746392cc2 BT appears to be available on all >= i386 chips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62196 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 23:27:15 +00:00
Dan Gohman
286575c65c Don't use a BT instruction if the AND has multiple uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 23:25:30 +00:00
Dan Gohman
f31408d75c Disable the register+memory forms of the bt instructions for now. Thanks
to Eli for pointing out that these forms don't ignore the high bits of
their index operands, and as such are not immediately suitable for use
by isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 23:23:30 +00:00
Dan Gohman
4afe15b131 Add bt instructions that take immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62180 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 20:33:23 +00:00
Dan Gohman
0c89b7e61e Fix a few more JIT encoding issues in the BT instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62179 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 20:32:45 +00:00
Sanjiv Gupta
1b04694116 Checking in conditionals, function call, arrays and libcalls implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62174 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 19:18:47 +00:00
Chris Lattner
acca9559f4 make -march=cpp handle the nocapture attribute, make it assert if it
sees attributes it doesn't know.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62155 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 07:22:22 +00:00
Devang Patel
83489bb770 Use DebugInfo interface to lower dbg_* intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 00:35:13 +00:00
Duncan Sands
ceb4d1aecb Rename getABITypeSize to getTypePaddedSize, as
suggested by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-12 20:38:59 +00:00
Evan Cheng
f2accb5c9e 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-10 03:33:22 +00:00
Misha Brukman
9b8f542e27 Removed trailing whitespace from Makefiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 16:44:42 +00:00
Dan Gohman
5446274bd2 Add load-folding table entries for MOVDQA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 02:40:34 +00:00
Dan Gohman
b134709a58 Whitespace and other minor adjustments to make SSE instructions have
the same formatting as their corresponding SSE2 instructions, for
consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61971 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 02:27:34 +00:00
Devang Patel
eb3fc28914 Convert DwarfWriter into a pass.
Now Users request DwarfWriter through getAnalysisUsage() instead of creating an instance of DwarfWriter object directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61955 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-08 23:40:34 +00:00
Chris Lattner
9fee08fce7 add some more crazy strlen and memcpy stuff I noticed in spec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61918 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-08 07:34:55 +00:00
Chris Lattner
ffb08f569b add some notes about strlen craziness in eon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-08 06:52:57 +00:00
Misha Brukman
93c65c8378 Fix off-by-one error in traversing an array; this fixes a test.
The error was reported by gcc-4.3.0 during compilation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61896 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 23:07:29 +00:00
Dan Gohman
fbb7486560 Add patterns to match conditional moves with loads folded
into their left operand, rather than their right. Do this
by commuting the operands and inverting the condition.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 01:00:24 +00:00
Dan Gohman
b33fc7b063 Add load-folding table entries for cmovno too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61841 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 00:44:53 +00:00
Dan Gohman
305fceb56c Define instructions for cmovo and cmovno.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 00:35:10 +00:00
Dan Gohman
653456c351 X86_COND_C and X86_COND_NC are alternate mnemonics for
X86_COND_B and X86_COND_AE, respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61835 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 00:15:08 +00:00
Dan Gohman
cca2983291 Revert r42653 and forward-port the code that lets INC64_32r be
converted to LEA64_32r in x86's convertToThreeAddress. This
replaces code like this:
   movl  %esi, %edi
   inc   %edi
with this:
   lea   1(%rsi), %edi
which appears to be beneficial.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61830 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 23:34:46 +00:00
Scott Michel
21213e75b5 CellSPU:
- Add preliminary support for v2i32; load/store generates the right code but
  there's a lot work to be done to make this vector type operational.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61829 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 23:10:38 +00:00
Scott Michel
939e3a7f64 CellSPU: Update the README
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61785 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 03:51:14 +00:00
Scott Michel
dd950096b9 CellSPU:
- Fix bugs 3194, 3195: i128 load/stores produce correct code (although, we
  need to ensure that i128 is 16-byte aligned in real life), and 128 zero-
  extends are supported.
- New td file: SPU128InstrInfo.td: this is where all new i128 support should
  be put in the future.
- Continue to hammer on i64 operations and test cases; ensure that the only
  remaining problem will be i64 mul.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61784 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 03:36:14 +00:00
Bill Wendling
d60de51878 Revert r61415 and r61484. Duncan was correct that these weren't needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 22:53:45 +00:00
Dan Gohman
d68a07650c Tidy up #includes, deleting a bunch of unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 17:59:02 +00:00
Devang Patel
8a84e4402a squash warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 17:31:22 +00:00
Evan Cheng
7877112775 Atom and Core i7 do not have same model number after all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61686 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 08:45:01 +00:00
Scott Michel
1c7a81b0c5 CellSPU:
- Teach SPU64InstrInfo.td about the remaining signed comparisons, update tests
  accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 04:05:53 +00:00
Scott Michel
ed741dde28 CellSPU:
- Fix (brcond (setq ...)) bug, where BRNZ should have been used vice BRZ.
- Kill unused/unnecessary nodes in SPUNodes.td
- Beef out the i64operations.c test harness to use a lot of unaligned
  loads, test loops and LLVM loop/basic block optimizations; run the
  test harness successfully on real Cell hardware.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61664 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 01:34:35 +00:00
Evan Cheng
0be6d3fb2a Add Intel processors core i7 and atom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61603 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-03 04:24:44 +00:00
Evan Cheng
5b925c031d Fix PR3210: Detect more Intel processors. Patch by Torok Edwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-03 04:04:46 +00:00
Scott Michel
52d0001cfc CellSPU:
- Remove custom lowering for BRCOND
- Add remaining functionality for branches in SPUInstrInfo, such as branch
  condition reversal and load/store folding. Updated BrCond test to reflect
  branch reversal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61597 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-03 00:27:53 +00:00
Scott Michel
9bd7a371cb - Make copyRegToReg use the "LR" assembler synonym for "OR". Makes finding
register copies a little easier to pick out from the output.
- Fix bug 3192.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61591 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 20:52:08 +00:00
Evan Cheng
ccb6976a69 Do not isel load folding bt instructions for pentium m, core, core2, and AMD processors. These are significantly slower than a load followed by a bt of a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:35:45 +00:00
Evan Cheng
018b7ee91a Fix x86 CPU id detection to identify Penryn (and future processors).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61556 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:29:20 +00:00
Evan Cheng
52ceafa5c7 Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:29:08 +00:00
Duncan Sands
5480c0469e Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType.  In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-01 15:52:00 +00:00
Chris Lattner
d23b799d7d add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61513 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-31 00:54:13 +00:00
Scott Michel
02d711b93e - Start moving target-dependent nodes that could be represented by an
instruction sequence and cannot ordinarily be simplified by DAGcombine
  into the various target description files or SPUDAGToDAGISel.cpp.

  This makes some 64-bit operations legal.

- Eliminate target-dependent ISD enums.

- Update tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-30 23:28:25 +00:00
Bill Wendling
998dee96d3 Linux wants the FDE initial location and address range to be forced to 32-bit.
Darwin doesn't. Make this optional for platforms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-29 22:12:11 +00:00
Misha Brukman
e9dd47afa6 Fixed spelling, removed trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61477 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-29 20:08:23 +00:00
Scott Michel
1df30c4061 - Various '#if 0' cleanups.
- Move v4i32, i32 mul into SPUInstrInfo.td, with a few more instruction
  cleanups there as well.
- Make SMUL_LOHI, UMUL_LOHI competely illegal for Cell SPU, to better
  assist Chris to see the problem in bug 3101.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61464 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-29 03:23:36 +00:00
Scott Michel
f0569be4a9 - Remove Tilmann's custom truncate lowering: it completely hosed over
DAGcombine's ability to find reasons to remove truncates when they were not
  needed. Consequently, the CellSPU backend would produce correct, but _really
  slow and horrible_, code.

  Replaced with instruction sequences that do the equivalent truncation in
  SPUInstrInfo.td.

- Re-examine how unaligned loads and stores work. Generated unaligned
  load code has been tested on the CellSPU hardware; see the i32operations.c
  and i64operations.c in CodeGen/CellSPU/useful-harnesses.  (While they may be
  toy test code, it does prove that some real world code does compile
  correctly.)

- Fix truncating stores in bug 3193 (note: unpack_df.ll will still make llc
  fault because i64 ult is not yet implemented.)

- Added i64 eq and neq for setcc and select/setcc; started new instruction
  information file for them in SPU64InstrInfo.td. Additional i64 operations
  should be added to this file and not to SPUInstrInfo.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61447 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-27 04:51:36 +00:00
Chris Lattner
e55484eb45 Add a simple pattern for matching 'bt'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 05:34:37 +00:00
Chris Lattner
f1e9fd5676 Fix some JIT encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61425 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 01:32:49 +00:00
Chris Lattner
d1e3229e4b BT memory operands load from their address operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61424 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 01:27:10 +00:00
Chris Lattner
1c39d4cfaa translateX86CC can never fail. Simplify it based on this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61423 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-24 23:53:05 +00:00
Bill Wendling
722f5f1cfb Darwin likes for the EH frame to be non-local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61420 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-24 08:05:17 +00:00
Bill Wendling
d4121bef3c GCC doesn't emit DW_EH_PE_sdata4 for the FDE encoding on Darwin. I'm not sure
about other platforms.


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2008-12-24 05:25:49 +00:00
Dan Gohman
82779704ff Fix a compiler-abort on a testcase where the stack-pointer is added to
a symbolic constant. This is unlikely to be intentional, but it
shouldn't crash the compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61408 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-24 00:27:51 +00:00
Chris Lattner
4328708bad indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61407 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-24 00:11:37 +00:00
Chris Lattner
4c78e0286a simplify some control flow and reduce indentation, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61404 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 23:42:27 +00:00
Dan Gohman
c7a37d4ff2 Add instruction patterns and encodings for the x86 bt instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61400 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 22:45:23 +00:00
Devang Patel
fd1c6c3123 Silence unused variable warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61392 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 21:56:28 +00:00
Dan Gohman
0b1d4a798d Clean up the atomic opcodes in SelectionDAG.
This removes all the _8, _16, _32, and _64 opcodes and replaces each
group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode
is now used to carry the size information. In tablegen, the size-specific
opcodes are replaced by size-independent opcodes that utilize the
ability to compose them with predicates.

This shrinks the per-opcode tables and makes the code that handles
atomics much more concise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61389 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 21:37:04 +00:00
Chris Lattner
9cf8ef63c6 add some notes for simplifylibcalls optimizations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61385 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 20:52:52 +00:00
Mon P Wang
62c75ea397 Fixed code generation for v8i16 and v16i8 splats on X86.
Fixed lowering of v8i16 shuffles for v8i16 when we fall back to extract/insert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61365 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 04:03:27 +00:00
Dan Gohman
15a3a49e19 Make the fuse-failed debug output human-readable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61356 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 00:19:20 +00:00
Dan Gohman
b12b1a27f5 Fix fast-isel to not emit invalid assembly when presented with a
constant shift count that doesn't fit in the shift instruction's
immediate field. This fixes PR3242.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61281 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-20 17:19:40 +00:00
Dan Gohman
018a34c576 Move the patterns which have i8 immediates before the patterns
that have i32 immediates so that they get selected first. This
currently only matters in the JIT, as assemblers will
automatically use the smallest encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61250 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-19 18:25:21 +00:00
Chris Lattner
a33649e98c Fix some release-assert warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61244 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-19 17:03:38 +00:00
Rafael Espindola
2f6fea90a5 Fix bug 3202.
The EH_frame and .eh symbols are now private, except for darwin9 and earlier.
The patch also fixes the definition of PrivateGlobalPrefix on pcc linux.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61242 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-19 10:55:56 +00:00
Dan Gohman
bfd23c9961 When emitting instructions that define EFLAGS and the EFLAGS value isn't
used, mark the defs as dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61215 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 22:03:42 +00:00
Dan Gohman
34d6ad73e1 When setting up the frame pointer, add it as a live-in register to all
non-entry blocks, so that it doesn't appear use-before-def anywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61214 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 22:01:52 +00:00
Mon P Wang
af9b952627 Fixed x86 code generation of multiple for v2i64. It was incorrect for SSE4.1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61211 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 21:42:19 +00:00
Dan Gohman
a32b7ac86f Mark the x86 fp stack registers as "reserved". This tells LiveVariables
and the RegisterScavenger not to expect traditional liveness 
techniques are applicable to these registers, since we don't fully
modify the effects of push and pop after stackification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61179 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 01:05:09 +00:00
Dan Gohman
8749b61178 Add initial support for back-scheduling address computations,
especially in the case of addresses computed from loop induction
variables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61075 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16 03:35:01 +00:00
Chris Lattner
582048d5b8 add some more notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61033 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-15 08:32:28 +00:00
Chris Lattner
8f416f3afd Add a testcase for GCC PR 23455, which lpre handles now. Add some
comments about why we're not getting other cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61032 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-15 07:49:24 +00:00
Chris Lattner
ef423ebdd1 gvn now hoists this load out of the hot non-call path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61028 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-15 06:34:48 +00:00
Chris Lattner
30baa95afd silence warning when asserts disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61014 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-14 21:38:24 +00:00
Chris Lattner
03a46989b6 silence warning when asserts disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61013 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-14 21:37:33 +00:00
Bill Wendling
d350e02e19 - Use patterns instead of creating completely new instruction matching patterns,
which are identical to the original patterns.

- Change the multiply with overflow so that we distinguish between signed and
  unsigned multiplication. Currently, unsigned multiplication with overflow
  isn't working!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60963 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12 21:15:41 +00:00
Duncan Sands
8c0f244c3e Don't make use of an illegal type (i64) when
lowering f64 function arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60944 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12 08:05:40 +00:00
Mon P Wang
9e5ecb8f8f Added support for SELECT v8i8 v4i16 for X86 (MMX)
Added support for TRUNC v8i16 to v8i8 for X86 (MMX)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60916 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12 01:25:51 +00:00
Bill Wendling
ab55ebda1c Redo the arithmetic with overflow architecture. I was changing the semantics of
ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.

Similar for SUB and MUL instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60915 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12 00:56:36 +00:00
Evan Cheng
38b6fd67a6 Fix a 80 col. violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60901 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11 22:02:02 +00:00
Evan Cheng
e5ad88e97f Preliminary ARM debug support based on patch by Mikael of FlexyCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60851 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 21:54:21 +00:00
Evan Cheng
6bb14ca775 Some code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 21:49:05 +00:00
Bill Wendling
9a90132af4 Only perform SETO/SETC to JO/JC conversion if extractvalue is coming from an arithmetic with overflow instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60844 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 19:44:24 +00:00
Evan Cheng
5788d1a169 Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids some overflow issues. Patch by Thomas Jablin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60828 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 02:32:19 +00:00
Bill Wendling
bc5e15eafb Whitespace changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60826 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 02:01:32 +00:00
Chris Lattner
2dae65d13b move an entry, add some notes, remove a completed item (IMPLICIT_DEF)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60821 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 01:30:48 +00:00
Scott Michel
aedc637c96 CellSPU:
- Fix bug 3185, with misc other cleanups.
- Needed to implement SPUInstrInfo::InsertBranch(). CAUTION: Not sure what
  gets or needs to get passed to InsertBranch() to insert a conditional
  branch. This will abort for now until a good test case shows up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60811 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 00:15:19 +00:00
Bill Wendling
30a64a7649 Implement fast-isel conversion of a branch instruction that's branching on an
overflow/carry from the "arithmetic with overflow" intrinsics. It searches the
machine basic block from bottom to top to find the SETO/SETC instruction that is
its conditional. If an instruction modifies EFLAGS before it reaches the
SETO/SETC instruction, then it defaults to the normal instruction emission.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60807 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09 23:19:12 +00:00
Bill Wendling
74c3765291 Add sub/mul overflow intrinsics. This currently doesn't have a
target-independent way of determining overflow on multiplication. It's very
tricky. Patch by Zoltan Varga!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60800 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09 22:08:41 +00:00
Duncan Sands
677a7ec489 Handle a compiler warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60755 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09 09:58:11 +00:00
Bill Wendling
c065b3f5ec Correct my English.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60753 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09 07:55:31 +00:00
Scott Michel
e07d3dead1 CellSPU:
- Change default scheduling preference to list-burr, which produces somewhat
  better code than the default. Could also use list-tdrr, but need to ask
  dev list about the appropriate handy mnemonic before commiting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60738 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09 03:37:19 +00:00
Bill Wendling
52370a1089 Add initial support for fast-isel of the [SU]ADDO intrinsics. It isn't
complete. For instance, it lowers the common case into this less-than-optimal
code:

        addl    %ecx, %eax
        seto    %cl
        testb   %cl, %cl
        jne     LBB1_2  ## overflow

instead of:

        addl    %ecx, %eax
        jo      LBB1_2  ## overflow

That will come in a future commit.


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2008-12-09 02:42:50 +00:00
Dan Gohman
55fdaec36a Fix a couple of mistaken switch case fall-throughs. Thanks to Bill
for spotting these!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60728 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08 23:50:06 +00:00
Evan Cheng
e4d1082b2c Re-apply 60689 now my head is screwed on right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60711 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08 19:29:03 +00:00
Dan Gohman
2d4e9bc922 Revert 60689. It caused many regressions on Darwin targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60705 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08 17:38:02 +00:00
Dan Gohman
c8a1a3c426 Factor out the code for sign-extending/truncating gep indices
and use it in x86 address mode folding. Also, make
getRegForValue return 0 for illegal types even if it has a
ValueMap for them, because Argument values are put in the
ValueMap. This fixes PR3181.


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2008-12-08 07:57:47 +00:00
Chris Lattner
59779c5605 consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60694 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08 07:21:39 +00:00
Chris Lattner
bedb8c1d35 introduce a new RoundUpAlignment helper function, use it to
remove some more 64-bit divs and rems from the StructLayout 
ctor.


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2008-12-08 07:11:56 +00:00
Dan Gohman
f923129fc3 Update CPP backend for PrintModulePass API changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60690 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08 07:07:24 +00:00
Evan Cheng
dda346aa71 Perform cheap checks first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60689 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08 06:52:43 +00:00
Nick Lewycky
6ecf5ce3e3 Fix typo, psuedo -> pseudo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60651 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-07 03:49:52 +00:00
Chris Lattner
630c99fd21 improve a note.
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2008-12-07 00:15:10 +00:00
Chris Lattner
6a09a74e46 some more PRE/GVN/DSE related notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60633 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-06 22:52:12 +00:00
Chris Lattner
f96ca79cf3 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60632 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-06 22:49:05 +00:00
Chris Lattner
78a7e7c797 some random notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60624 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-06 19:28:22 +00:00
Evan Cheng
c3ccc1aaaf Clean up some ARM GV asm printing out; minor fixes to match what gcc does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60621 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-06 02:00:55 +00:00
Dale Johannesen
368eb2b22d Forgot a file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60609 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-05 21:55:35 +00:00
Dale Johannesen
203af58aea Make LoopStrengthReduce smarter about hoisting things out of
loops when they can be subsumed into addressing modes.

Change X86 addressing mode check to realize that
some PIC references need an extra register.
(I believe this is correct for Linux, if not, I'm sure
someone will tell me.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60608 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-05 21:47:27 +00:00
Evan Cheng
650d7f3ff4 Reason #3 from 60595 doesn't hold true. If we can fold a PIC load from constpool into a use, the rewrite happens at time of spill (not in VirtRegMap). Later on, if the GlobalBaseReg is spilled, the spiller can see the use uses GlobalBaseReg and do the right thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60596 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-05 17:41:31 +00:00
Evan Cheng
84100ba83d Effectively undo 60461 in PIC mode which simply transform V_SET0 / V_SETALLONES into a load from constpool in order to fold into restores. This is not safe to do when PIC base is being used for a number of reasons:
1. GlobalBaseReg may have been spilled.
2. It may not be live at the use.
3. Spiller doesn't know this is happening so it won't prevent GlobalBaseReg from being spilled later (That by itself is a nasty hack. It's needed because we don't insert the reload until later).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60595 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-05 17:23:48 +00:00
Evan Cheng
ae94e59416 Re-did 60519. It turns out Darwin's handling of hidden visibility symbols are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60571 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-05 01:06:39 +00:00
Scott Michel
cc18827f59 CellSPU: Fix bug 3055
- Add v4f32, v2f64 to LowerVECTOR_SHUFFLE
- Look for vector rotate in shuffle elements, generate a vector rotate
  instead of a full-blown shuffle when opportunity presents itself.
- Generate larger test harness and fix a few interesting but obscure bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60552 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-04 21:01:44 +00:00
Scott Michel
23f2ff74b1 Missing closing brace and reverse conditional condition on NDEBUG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60541 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-04 17:16:59 +00:00
Chris Lattner
d021901b09 This code is apparently quite confused. In the meantime,
get it building when NDEBUG is set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60532 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-04 06:14:27 +00:00
Bill Wendling
a8103dad4e Temporarily revert r60519. It was causing a bootstrap failure:
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -DHAVE_CONFIG_H -I. -I../../../llvm-gcc.src/libgomp -I. -I../../../llvm-gcc.src/libgomp/config/posix -I../../../llvm-gcc.src/libgomp -Wall -pthread -Werror -O2 -g -O2 -MT barrier.lo -MD -MP -MF .deps/barrier.Tpo -c ../../../llvm-gcc.src/libgomp/barrier.c  -fno-common -DPIC -o .libs/barrier.o
checking for sys/file.h... /var/folders/zG/zGE-ZJOGFiGjv0B5cs5oYE+++TM/-Tmp-//cc34Jg5P.s:13:non-relocatable subtraction expression, "_gomp_tls_key" minus "L1$pb"
/var/folders/zG/zGE-ZJOGFiGjv0B5cs5oYE+++TM/-Tmp-//cc34Jg5P.s:13:symbol: "_gomp_tls_key" can't be undefined in a subtraction expression
make[4]: *** [barrier.lo] Error 1
make[4]: *** Waiting for unfinished jobs....
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -DHAVE_CONFIG_H -I. -I../../../llvm-gcc.src/libgomp -I. -I../../../llvm-gcc.src/libgomp/config/posix -I../../../llvm-gcc.src/libgomp -Wall -pthread -Werror -O2 -g -O2 -MT alloc.lo -MD -MP -MF .deps/alloc.Tpo -c ../../../llvm-gcc.src/libgomp/alloc.c -o alloc.o >/dev/null 2>&1
yes
checking for sys/param.h... make[3]: *** [all-recursive] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libgomp] Error 2
make[1]: *** Waiting for unfinished jobs....



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60527 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-04 04:07:00 +00:00
Scott Michel
30ee7df71c CellSPU:
- First patch from Nehal Desai, a new contributor at Aerospace. Nehal's patch
  fixes sign/zero/any-extending loads for integers and floating point. Example
  code, compiled w/o debugging or optimization where he first noticed the bug:

  int main(void) {
    float a = 99.0;
    printf("%d\n", a);
    return 0;
  }

  Verified that this code actually works on a Cell SPU.

Changes by Scott Michel:
- Fix bug in the value type list constructed by SPUISD::LDRESULT to include
  both the load result's result and chain, not just the chain alone.
- Simplify LowerLOAD and remove extraneous and unnecessary chains.
- Remove unused SPUISD pseudo instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-04 03:02:42 +00:00
Evan Cheng
eb83dfde66 Visibility hidden GVs do not require extra load of symbol address from the GOT or non-lazy-ptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60519 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-04 01:56:50 +00:00
Evan Cheng
62fb4f2e1c Use mmx (punpckldq VR64, (mmx_v_set0)) to clear high 32-bits of a VR64 register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60499 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 19:38:05 +00:00
Dale Johannesen
f94a327361 A step towards geting linux ppc to work (see PR 3099)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60497 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 19:33:10 +00:00
Dan Gohman
c54baa2d43 Split foldMemoryOperand into public non-virtual and protected virtual
parts, and add target-independent code to add/preserve
MachineMemOperands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60488 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 18:43:12 +00:00
Dan Gohman
15511cf166 Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60487 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 18:15:48 +00:00
Dan Gohman
8cf7713753 Extend X86's addFrameReference to add a MachineMemOperand for
the frame reference. This will help post-RA scheduling determine
that spills to distinct stack slots are independent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60486 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 18:11:40 +00:00
Dan Gohman
f033b5a393 Update a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 17:10:41 +00:00
Rafael Espindola
952b839ce9 Fix bug 3140.
Print a single parameter .file directive if we have an ELF target.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60480 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 11:01:37 +00:00
Richard Osborne
269bc0042f Add support for ISD::TRAP to the XCore backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60479 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 10:59:16 +00:00
Evan Cheng
370e5340a5 Refactor code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60478 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 08:38:43 +00:00
Bill Wendling
0ea25cb941 CC should only be a ConstantSDNode at this point. Just use 'cast' instead of 'dyn_cast'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60477 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 08:32:02 +00:00
Dan Gohman
62c939d7d5 Mark x86's V_SET0 and V_SETALLONES with isSimpleLoad, and teach X86's
foldMemoryOperand how to "fold" them, by converting them into constant-pool
loads. When they aren't folded, they use xorps/cmpeqd, but for example when
register pressure is high, they may now be folded as memory operands, which
reduces register pressure.

Also, mark V_SET0 isAsCheapAsAMove so that two-address-elimination will
remat it instead of copying zeros around (V_SETALLONES was already marked).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60461 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 05:21:24 +00:00
Dan Gohman
41474baac8 Add a sanity-check to tablegen to catch the case where isSimpleLoad
is set but mayLoad is not set. Fix all the problems this turned up.

Change code to not use isSimpleLoad instead of mayLoad unless it
really wants isSimpleLoad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60459 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 02:30:17 +00:00
Dan Gohman
c70f329543 Fix a missing #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60458 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 02:10:00 +00:00
Dan Gohman
c5a1a220ea Fix this comment to reflect that it applies to types other
than just i32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60455 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 01:39:44 +00:00
Dan Gohman
e4300e271a Fix byval arguments in the fastcc calling convention. The fastcc convention
delegates to the regular x86-32 convention which handles byval, but only
after it handles a few cases, and it's necessary to handle byval before
handling those cases. This fixes PR3122 (and rdar://6400815), llvm-gcc
miscompiling LLVM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60453 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 01:28:04 +00:00
Scott Michel
b30e8f6334 CellSPU:
- Incorporate Tilmann Scheller's ISD::TRUNCATE custom lowering patch
- Update SPU calling convention info, even if it's not used yet (but can be
  at some point or another)
- Ensure that any-extended f32 loads are custom lowered, especially when
  they're promoted for use in printf.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60438 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-02 19:53:53 +00:00
Chris Lattner
88d84b245c add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60404 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-02 06:32:34 +00:00
Bill Wendling
3bdcda82a5 - Remove the buggy -X/C -> X/-C transform. This isn't valid when X isn't a
constant. If X is a constant, then this is folded elsewhere.

- Added a note to Target/README.txt to indicate that we'd like to implement
  this when we're able.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60399 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-02 05:12:47 +00:00
Bill Wendling
61edeb5ed2 Second stab at target-dependent lowering of everyone's favorite nodes: [SU]ADDO
- LowerXADDO lowers [SU]ADDO into an ADD with an implicit EFLAGS define. The
  EFLAGS are fed into a SETCC node which has the conditional COND_O or COND_C,
  depending on the type of ADDO requested.

- LowerBRCOND now recognizes if it's coming from a SETCC node with COND_O or
  COND_C set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60388 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-02 01:06:39 +00:00
Bill Wendling
9f24874f2e Reapply r60382. This time, don't mark "ADC" nodes with "implicit EFLAGS".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60385 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-02 00:07:05 +00:00
Bill Wendling
e3b3c00454 Temporarily revert r60382. It caused CodeGen/X86/i2k.ll and others to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60383 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-01 23:44:08 +00:00
Bill Wendling
a047bcacf2 - Have "ADD" instructions return an implicit EFLAGS.
- Add support for seto, setno, setc, and setnc instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60382 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-01 23:30:42 +00:00
Scott Michel
1a6cdb6b50 CellSPU:
- Fix v2[if]64 vector insertion code before IBM files a bug report.
- Ensure that zero (0) offsets relative to $sp don't trip an assert
  (add $sp, 0 gets legalized to $sp alone, tripping an assert)
- Shuffle masks passed to SPUISD::SHUFB are now v16i8 or v4i32


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-01 17:56:02 +00:00
Duncan Sands
aaffa05d0a There are no longer any places that require a
MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60349 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-01 11:41:29 +00:00
Duncan Sands
1607f05cb7 Change the interface to the type legalization method
ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-01 11:39:25 +00:00
Bill Wendling
b3833d1eb9 Implement ((A|B)&1)|(B&-2) -> (A&1) | B transformation. This also takes care of
permutations of this pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60312 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-01 01:07:11 +00:00
Bill Wendling
b01865c210 Add instruction combining for ((A&~B)|(~A&B)) -> A^B and all permutations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60291 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-30 13:52:49 +00:00
Bill Wendling
7f0ef6b325 Implement (A&((~A)|B)) -> A&B transformation in the instruction combiner. This
takes care of all permutations of this pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60290 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-30 13:08:13 +00:00
Eli Friedman
91db5271d2 A couple small cleanups, plus a new potential optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60286 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-30 07:52:27 +00:00
Eli Friedman
4e16b29a6b Moving potential optimizations out of PR2330 into lib/Target/README.txt.
Hopefully this isn't too much stuff to dump into this file.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60285 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-30 07:36:04 +00:00
Duncan Sands
c6dbe7fbad Add include files needed when building with
gcc 4.4 (due to use of sprintf).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60209 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-28 10:20:03 +00:00
Duncan Sands
f9a67a8943 Fix build with gcc-4.4: it doesn't like PICStyle
being both a namespace and a variable name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60208 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-28 09:29:37 +00:00
Nick Lewycky
d2f0db1b19 Also update the README.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60188 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-27 22:41:45 +00:00
Nick Lewycky
df563ca1f3 Add a synthetic missed optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60186 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-27 22:12:22 +00:00
Bill Wendling
109872e360 Comment out code that isn't entirely correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60156 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-27 07:18:35 +00:00
Evan Cheng
dc52cf48dc Eliminate a compile time warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60145 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-27 02:29:25 +00:00
Evan Cheng
884c70c912 On x86 favors folding short immediate into some arithmetic operations (e.g. add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size.
e.g.
movl 4(%esp), %eax
addl $4, %eax

is 2 bytes shorter than

movl $4, %eax
addl 4(%esp), %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60139 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-27 00:49:46 +00:00
Bill Wendling
3fafd93560 Generate something sensible for an [SU]ADDO op when the overflow/carry flag is
the conditional for the BRCOND statement. For instance, it will generate:

    addl %eax, %ecx
    jo LOF

instead of

    addl %eax, %ecx
    ; About 10 instructions to compare the signs of LHS, RHS, and sum.
    jl LOF



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60123 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-26 22:37:40 +00:00
Evan Cheng
07213cb4b7 Cosmetic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60110 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-26 18:00:00 +00:00
Sanjiv Gupta
8f78fa827e Emit declaration for globals and externs.
Custom lower AND, OR, XOR bitwise operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-26 10:53:50 +00:00
Dan Gohman
25a1b47cc3 Fish kill flag annotations in PUSH instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60095 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-26 06:39:12 +00:00
Nick Lewycky
f9ef5b3ff5 __fastcall and __stdcall are mingw extensions to gcc for windows. Use the
__attribute__ notation which is supported on more platforms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60083 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-26 03:17:27 +00:00
Scott Michel
18fae69723 CellSPU:
(a) Remove conditionally removed code in SelectXAddr. Basically, hope for the
    best that the A-form and D-form address predicates catch everything before
    the code decides to emit a X-form address.
(b) Expand vector store test cases to include the usual suspects.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60034 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-25 17:29:43 +00:00
Scott Michel
50843c0741 CellSPU: Relax constraints on when to generate a X-form address, evidently
they were too tight according to bug 3126.

Fix bug 3126.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-25 04:03:47 +00:00
Scott Michel
662165d224 CellSPU: Fix mnemonic typo in pattern; "shlqbyi" -> "shlqby".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59998 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-25 00:23:16 +00:00
Bill Wendling
41ea7e7eb3 - Make lowering of "add with overflow" customizable by back-ends.
- Mark "add with overflow" as having a custom lowering for X86. Give it a null
  lowering representation for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59971 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24 19:21:46 +00:00
Scott Michel
045a14503f CellSPU:
(a) Slight rethink on i64 zero/sign/any extend code - use a shuffle to
    directly zero-extend i32 to i64, but use rotates and shifts for
    sign extension. Also ensure unified register consistency.
(b) Add new test harness for i64 operations: i64ops.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59970 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24 18:20:46 +00:00
Scott Michel
104de4390b CellSPU:
(a) Improve the extract element code: there's no need to do gymnastics with
    rotates into the preferred slot if a shuffle will do the same thing.
(b) Rename a couple of SPUISD pseudo-instructions for readability and better
    semantic correspondence.
(c) Fix i64 sign/any/zero extension lowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59965 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24 17:11:17 +00:00
Duncan Sands
25cf2275ff If the type legalizer actually legalized anything
(this doesn't happen that often, since most code
does not use illegal types) then follow it by a
DAG combiner run that is allowed to generate
illegal operations but not illegal types.  I didn't
modify the target combiner code to distinguish like
this between illegal operations and illegal types,
so it will not produce illegal operations as well
as not producing illegal types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59960 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24 14:53:14 +00:00
Matthijs Kooijman
19ea77f09d Fix comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59958 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24 11:44:00 +00:00
Evan Cheng
027fdbe3ba Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59953 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24 07:34:46 +00:00
Mon P Wang
9f22a4aaaf Added missing description for -disable-mmx option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59929 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24 02:10:43 +00:00
Duncan Sands
03228089d5 Rename SetCCResultContents to BooleanContents. In
practice these booleans are mostly produced by SetCC,
however the concept is more general.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-23 15:47:28 +00:00
Mon P Wang
3c81d35e7d Added -disable-mmx using a patch from Preston Gurd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59901 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-23 04:37:22 +00:00
Scott Michel
7a1c9e9cb7 CellSPU: Fix bug 3056. Varadic extract_element was not implemented (nor was it
ever conceived to occur).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59891 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-22 23:50:42 +00:00
Anton Korobeynikov
7751ad92da Make a convenient helper for printing offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-22 16:15:34 +00:00
Scott Michel
9c0c6b2e4a CellSPU:
(a) Fix bgs 3052, 3057
(b) Incorporate Duncan's suggestions re: i1 promotion
(c) Indentation updates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59790 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21 02:56:16 +00:00
Scott Michel
dc91bea479 CellSPU:
(a) Remove moved file (SPUAsmPrinter.cpp) to make svn happy.
(b) Remove truncated stores that will never be used.
(c) Add initial support for __muldi3 as a libcall.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20 16:36:33 +00:00
Mon P Wang
07239f13cd Allow XMM2 and XMM3 to be used for non ABI compliant code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59720 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20 07:48:19 +00:00
Scott Michel
4379efced7 CellSPU: Custom lower truncating stores of i8 to i1 (should not have been
promote), fix signed conversion of indexed offsets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59707 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20 05:01:09 +00:00
Scott Michel
a0e5769166 CellSPU: Adjust spacing/tabulation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20 04:26:21 +00:00
Evan Cheng
97c573d5de Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20 02:25:51 +00:00
Evan Cheng
e3066abfcf Eliminate a compile time warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59678 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 23:21:33 +00:00
Evan Cheng
eda60a8364 Eliminate a compile time warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 23:21:11 +00:00
Dan Gohman
343f0c0467 Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.

This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.

The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59676 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 23:18:57 +00:00
Oscar Fuentes
57cbd99d5d CMake: Removed source file from lib/Target/PIC16/CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59655 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 18:42:25 +00:00
Scott Michel
719b0e17ae CellSPU: Do not custom lower i1 stores, rely on type legalization to do the
right thing and promote the store to i8.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59648 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 17:45:08 +00:00
Stuart Hastings
be362abe9c <rdar://problem/6351057>
Discourage (allocate last) use of x86_64 R12 and R13 due to their
longer instruction encodings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59644 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 17:19:35 +00:00
Scott Michel
430a555cdd Temporary check-in for Duncan to demonstrate CellSPU store problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59637 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 15:24:16 +00:00
Sanjiv Gupta
928df6ca4e Forgot to add this in the previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59623 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 12:12:49 +00:00
Sanjiv Gupta
863d3e9328 Fixed build warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59621 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 11:27:59 +00:00
Sanjiv Gupta
b1b5ffd827 Added a more function PIC16 backend. However to get this working a patch in
ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59617 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 11:00:54 +00:00
Dan Gohman
c99da1348d Don't set neverHasSideEffects on x86's divide instructions, since
they trap on divide-by-zero, and this side effect is otherwise
unmodeled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-18 21:29:14 +00:00
Dan Gohman
cbad42cfd1 Add more const qualifiers. This fixes build breakage from r59540.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-18 19:49:32 +00:00
Dale Johannesen
a7647e68a4 Move some former testcases (low-probability codegen
optimizations) into this wishlist.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59455 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-17 18:56:34 +00:00
Oscar Fuentes
92adc19be9 Adds extern "C" ints to the .cpp files that use RegisterTarget, as
well as 2 files that use "Registrator"s. These are to be used by the
MSVC builds, as the Win32 linker does not include libs that are
otherwise unreferenced, even if global constructors in the lib have
side-effects.

Patch by Scott Graham!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59378 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-15 21:36:30 +00:00
Evan Cheng
7e2cc91d2d Fix fuitos encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-15 00:40:57 +00:00
Evan Cheng
a956255ebf Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59314 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-14 20:09:11 +00:00
Dale Johannesen
fb88f1f9a7 Remove unneeded stuff from GRAD register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59311 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-14 18:10:48 +00:00
Richard Osborne
30aa75c96a [XCore] Remove whitespace in the description used when
registering XCoreTargetMachine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59308 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-14 16:19:56 +00:00
Richard Osborne
223fd6efc8 [XCore] Fix expansion of 64 bit add/sub. Don't custom expand
these operations if ladd/lsub are not available on the current
subtarget.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59305 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-14 15:59:19 +00:00
Richard Osborne
1d8f975890 Add XCore intrinsics for getid (returns thread id) and bitrev (reverses
bits in a word).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59296 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-14 10:12:16 +00:00
Evan Cheng
ffa6d962a7 Handle the rest of pseudo instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59275 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 23:36:57 +00:00
Evan Cheng
28f312949e Lazy compilation callback save / restore VFP registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59274 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 23:28:54 +00:00
Dale Johannesen
330169fa3e Extend InlineAsm::C_Register to allow multiple specific registers
(actually, code already all worked, only the comment
changed).  Use this to implement 'A' constraint on x86.
Fixes PR 1779.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59266 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 21:52:36 +00:00
Evan Cheng
35b0bfd06d Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59258 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 19:22:28 +00:00
Evan Cheng
3c902e81fa fsub{d|s} encoding bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59234 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 07:59:48 +00:00
Evan Cheng
67fd91f3df Missed a break statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59231 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 07:46:59 +00:00
Evan Cheng
148cad8b30 Fix pre- and post-indexed load / store encoding bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59230 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 07:34:59 +00:00
Dan Gohman
bc5cbb8be9 Move the code that inserts X87 FP_REG_KILL instructions from a
special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59190 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-12 22:55:05 +00:00
Evan Cheng
cb5798285a Remove the incorrect assertion. We don't have enough information before relocation to set U bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59170 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-12 21:37:59 +00:00
Evan Cheng
607f1b41a2 Address mode immediate offset has already been divided by 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59117 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-12 08:21:12 +00:00
Evan Cheng
3f4924efff Fix a VFP binary arithmetic instruction encoding bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59116 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-12 08:14:21 +00:00
Evan Cheng
706329143d Fix address mode 3 immediate offset mode encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59109 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-12 07:34:37 +00:00
Evan Cheng
3c4a4ffa3d Consolidate formats; fix FCMPED etc. encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59107 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-12 07:18:38 +00:00
Evan Cheng
80a119842d Fix VFP conversion instruction encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59104 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-12 06:41:41 +00:00
Evan Cheng
d06d48d2b5 Fix encoding of single-precision VFP registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59102 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-12 02:19:38 +00:00
Evan Cheng
580c0dfaed VFP fld / fst immediate field is multiplied by 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59100 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-12 01:02:24 +00:00
Andrew Lenharth
068d1c51cc This shouldn't be necessary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59090 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 23:19:51 +00:00
Evan Cheng
0a0ab1387a Fix FMDRR encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59088 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 22:46:12 +00:00
Evan Cheng
cb5201f3b2 Handle floating point constpool_entry's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59087 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 22:19:31 +00:00
Evan Cheng
cd8e66a1ef Encode VFP load / store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59084 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 21:48:44 +00:00
Evan Cheng
78be83d7c2 Encode VFP conversion instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59074 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 19:40:26 +00:00
Evan Cheng
86d77337fc Add a README entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59052 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 17:35:52 +00:00
Oscar Fuentes
2ae80d8ab1 CMake: corrected split of Alpha and Sparc AsmPrinters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59050 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 17:10:13 +00:00
Anton Korobeynikov
3bd86aac99 Separate sparc asmprinter. This should unbreak the native build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59047 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 16:42:57 +00:00
Anton Korobeynikov
bfac4260d8 Separate alpha asmprinter. This should unbreak native build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59046 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 16:42:17 +00:00
Dan Gohman
27cae7b01b The 32-bit displacement field in an x86 address is signed. Arrange for it
to be sign-extended when it is promoted to 64 bits for intermediate
offset calculations. The offset calculations are done as uint64_t so that
overflow conditions are well defined.

This fixes a problem which is currently hidden by the x86 AsmPrinter but
which was exposed by r58917 (which is temporarily reverted).  See PR3027
for details.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 15:52:29 +00:00
Andrew Lenharth
683a922653 fix another libgcc blocker
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 06:06:07 +00:00
Scott Michel
19fd42a207 Unbreak the buildbot and back out (inadvertant) casting edits in CellSPU
backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59018 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 03:06:06 +00:00
Evan Cheng
96581d3633 Encode VFP arithmetic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59016 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 02:11:05 +00:00
Scott Michel
73ce1c513f CellSPU: Fix bug 3606, as well as some ongoing work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59009 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10 23:43:06 +00:00
Evan Cheng
588920b9a5 Correct PIC function stub codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10 23:14:47 +00:00
Dan Gohman
f4b24e2b66 Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59004 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10 22:09:58 +00:00
Mon P Wang
77cdf30742 Added CONVERT_RNDSAT (conversion with rounding and saturation) SDNode to
support targets that support these conversions. Users should avoid using
this node as the current targets don't generating code for it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59001 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10 20:54:11 +00:00
Evan Cheng
9ed2f80910 Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58949 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10 01:08:07 +00:00
Anton Korobeynikov
b0714dbc0d Typo fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58928 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-09 02:54:13 +00:00
Anton Korobeynikov
0b45c9957f Temporary revert my last commit: it seems it's triggering some subtle bug in backend
and breaks llvm-gcc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58926 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 23:05:05 +00:00
Oscar Fuentes
b5b9252a17 CMake: corrected library target name for dependency: LLVMCellSPU ->
LLVMCellSPUCodeGen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58925 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 21:23:15 +00:00
Oscar Fuentes
a4dd926011 CMake: Reflected changes on the CellSPU target build. May require a
clean start.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58924 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 20:37:19 +00:00
Oscar Fuentes
eed0ec73b9 Fixed a pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58923 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 20:34:18 +00:00
Scott Michel
73655bc67f CellSPU: Bring SPU's assembly printer more in-line with current LLVM code
structure. Assembly printer now outputs the correct section for strings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58921 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 18:59:02 +00:00
Anton Korobeynikov
0f56953567 Factor out offset printing code into generic AsmPrinter.
FIXME: it seems, that most of targets don't support
offsets wrt CPI/GlobalAddress', was it intentional?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58917 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 17:21:38 +00:00
Nicolas Geoffray
d9afb4d08a The Index field of an AttributeWithIndex is of type unsigned, not uint16_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58908 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 15:36:01 +00:00
Anton Korobeynikov
e0f4af3b49 StoreInst does not produce any result thus it's useless to create new
variable for it. This greatly reduces amount of unused variables in
llvm2cpp-generated code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58905 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 12:58:07 +00:00
Evan Cheng
ae166410b9 Moved InvalidateInstructionCache to ARMJITInfo::emitFunctionStub which knows size of stub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58899 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 08:16:49 +00:00
Evan Cheng
ce4a70bd76 Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58897 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 08:02:53 +00:00
Evan Cheng
3cc8223a3c Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58896 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 07:38:22 +00:00
Evan Cheng
103325179a Fix relocation for calls to external symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 07:22:33 +00:00
Scott Michel
771138ca91 CellSPU: Fix prologue/epilogue emission when function contains calls but
theframe size is 0; the prologue and epilogue should be emitted in this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58890 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 05:16:20 +00:00
Evan Cheng
05c356e65a Skip over two-address use operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58883 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 01:44:13 +00:00
Evan Cheng
e96a490d7a Handle ARM machine constantpool entry with non-lazy ptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58882 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 01:31:27 +00:00
Evan Cheng
f1bbb9577a Use ARMFunctionInfo to track number of constpool entries and jumptables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58877 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08 00:51:41 +00:00
Evan Cheng
413a89f318 More code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-07 22:57:53 +00:00
Dale Johannesen
53e4e4478c Make FP tests requiring two compares work on PPC (PR 642).
This is Chris' patch from the PR, modified to realize that
SETUGT/SETULT occur legitimately with integers, plus
two fixes in LegalizeDAG to pass a valid result type into
LegalizeSetCC.  The argument of TLI.getSetCCResultType is
ignored on PPC, but I think I'm following usage elsewhere.



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2008-11-07 22:54:33 +00:00
Evan Cheng
437c1738ef Get PIC jump table working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58869 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-07 22:30:53 +00:00
Dan Gohman
e5f4de42b5 Flush the raw_ostream after emitting the assembly for a function.
This is a temporary fix for the -print-emitted-asm option, where
errs() is used as the stream, in the case where other code is
using stderr without using errs()' buffer. Hopefully soon we'll
fix errs() to be non-buffered instead. Patch by Preston Gurd.


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2008-11-07 19:49:17 +00:00
Richard Osborne
f943b1586f Fix compile warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58840 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-07 11:21:09 +00:00
Scott Michel
d9890dee7c CellSPU: Ensure that C strings are always put in the .rodata section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58839 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-07 11:06:44 +00:00
Richard Osborne
b25baef26f Add XCore backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58838 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-07 10:59:00 +00:00
Evan Cheng
4df60f5491 Jump table JIT support. Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58836 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-07 09:06:08 +00:00
Scott Michel
d03eeafd9f Teach CellSPU about ELF sections and new section emitter classes.
NB: This is likely to need more work.


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2008-11-07 04:36:25 +00:00
Evan Cheng
8b59db3f2c Encode misc arithmetic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58828 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-07 01:41:35 +00:00
Evan Cheng
97f48c39fd Encode extend instructions; more clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58818 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-06 22:15:19 +00:00
Evan Cheng
12c3a533c5 - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm.
- Consolidate instruction formats.
- Other clean up.


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2008-11-06 17:48:05 +00:00
Evan Cheng
d87293ce78 Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58800 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-06 08:47:38 +00:00
Mon P Wang
f007a8b931 Widening cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58796 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-06 05:31:54 +00:00
Evan Cheng
eb4f52eb62 Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58793 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-06 03:35:07 +00:00
Evan Cheng
9092213a5e Fix so_imm encoding bug; add support for MOVi2pieces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58790 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-06 02:25:39 +00:00
Evan Cheng
fbc9d412ef Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58789 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-06 01:21:28 +00:00
Evan Cheng
83b5cf0272 Encode pic load / store instructions; fix some encoding bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58780 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 23:22:34 +00:00
Evan Cheng
edda31c412 Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58764 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 18:35:52 +00:00
Dan Gohman
cbb7ab259d Reintroduce a comment that was removed with the AddToISelQueue
changes.


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2008-11-05 17:16:24 +00:00
Richard Osborne
617303ac71 Test commit, add Makefile for XCore target, more to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58755 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 09:53:58 +00:00
Evan Cheng
b35ed9247a Add more vector move low and zero-extend patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58752 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 06:04:51 +00:00
Evan Cheng
9dd93b36b8 Indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58750 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 06:03:38 +00:00