Chris Lattner
5b3a4553c1
Fix the missing symbols problem Bill was hitting. Patch contributed by
...
Bill Wendling!!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20649 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-17 15:38:16 +00:00
Chris Lattner
e4d5c441e0
This mega patch converts us from using Function::a{iterator|begin|end} to
...
using Function::arg_{iterator|begin|end}. Likewise Module::g* -> Module::global_*.
This patch is contributed by Gabor Greif, thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20597 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-15 04:54:21 +00:00
Reid Spencer
d632f4977e
Patch to make assembly output compatible with mingw compilation (identical
...
to cygwin)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20520 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-08 17:02:05 +00:00
Chris Lattner
da895d6337
Fix spelling, patch contributed by Gabor Greif!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20343 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-27 06:18:25 +00:00
Chris Lattner
572dd08204
Silence some uninit variable warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20284 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-23 05:57:21 +00:00
Chris Lattner
3576c84baf
We can fold promoted and non-promoted loads into divs also!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19835 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-25 20:35:10 +00:00
Chris Lattner
44129b5b68
Fold promoted loads into binary ops for FP, allowing us to generate m32 forms
...
of FP ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19834 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-25 20:03:11 +00:00
Chris Lattner
0a07883694
Silence a warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19798 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-23 23:20:06 +00:00
Chris Lattner
42e25b387f
Allow the FP stackifier to completely ignore functions that do not use FP at
...
all. This should speed up the X86 backend fairly significantly on integer
codes. Now if only we didn't have to compute livevar still... ;-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19796 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-23 23:13:59 +00:00
Reid Spencer
5dc81f63d1
Support Cygwin assembly generation. The cygwin version of Gnu ASsembler
...
doesn't support certain directives and symbols on cygwin are prefixed with
an underscore. This patch makes the necessary adjustments to the output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19775 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-23 03:52:14 +00:00
Chris Lattner
fb0f53f9c1
Speed up folding operations into loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19733 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-21 21:43:02 +00:00
Chris Lattner
67b1c3c404
The ever-important vanity pass name :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19731 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-21 21:35:14 +00:00
Chris Lattner
b62e1e296e
Fix a FIXME: realize that argument stores are all independent (don't alias)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19728 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-21 19:46:38 +00:00
Chris Lattner
19ad0620bc
Implement ADD_PARTS/SUB_PARTS so that 64-bit integer add/sub work. This
...
fixes most of the remaining llc-beta failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19716 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-20 18:53:00 +00:00
Chris Lattner
bf52d49f36
Fix a crash compiling 134.perl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19711 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-20 16:50:16 +00:00
Chris Lattner
c3c021bcad
Fix a problem where were were literally selecting for INCREASED register
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pressure, not decreases register pressure. Fix problem where we accidentally
swapped the operands of SHLD, which caused fourinarow to fail. This fixes
fourinarow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19697 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 17:24:34 +00:00
Chris Lattner
a76f04828a
When commuting these instructions, make sure to actually swap the operands too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19694 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 16:55:52 +00:00
Chris Lattner
4053b1e30b
Implement Regression/CodeGen/X86/rotate.ll: emit rotate instructions (which
...
typically cost 1 cycle) instead of shld/shrd instruction (which are typically
6 or more cycles). This also saves code space.
For example, instead of emitting:
rotr:
mov %EAX, DWORD PTR [%ESP + 4]
mov %CL, BYTE PTR [%ESP + 8]
shrd %EAX, %EAX, %CL
ret
rotli:
mov %EAX, DWORD PTR [%ESP + 4]
shrd %EAX, %EAX, 27
ret
Emit:
rotr32:
mov %CL, BYTE PTR [%ESP + 8]
mov %EAX, DWORD PTR [%ESP + 4]
ror %EAX, %CL
ret
rotli32:
mov %EAX, DWORD PTR [%ESP + 4]
ror %EAX, 27
ret
We also emit byte rotate instructions which do not have a sh[lr]d counterpart
at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19692 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 08:07:05 +00:00
Chris Lattner
40ff633b05
Add rotate instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19690 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 07:50:03 +00:00
Chris Lattner
30ea1e9411
Match 16-bit shld/shrd instructions as well, implementing shift-double.llx:test5
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19689 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 07:37:26 +00:00
Chris Lattner
0df53d22c3
Improve coverage of the X86 instruction set by adding 16-bit shift doubles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19687 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 07:31:24 +00:00
Chris Lattner
41e431ba04
Teach the code generator that shrd/shld is commutable if it has an immediate.
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This allows us to generate this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
shld %EDX, %EDX, 2
shl %EAX, 2
ret
instead of this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
mov %EDX, %EAX
shrd %EDX, %ECX, 30
shl %EAX, 2
ret
Note the magically transmogrifying immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19686 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 07:11:01 +00:00
Chris Lattner
8571637ee9
Codegen long >> 2 to this:
...
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
shrd %EAX, %EDX, 2
sar %EDX, 2
ret
instead of this:
test1:
mov %ECX, DWORD PTR [%ESP + 4]
shr %ECX, 2
mov %EDX, DWORD PTR [%ESP + 8]
mov %EAX, %EDX
shl %EAX, 30
or %EAX, %ECX
sar %EDX, 2
ret
and long << 2 to this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
*** mov %EDX, %EAX
shrd %EDX, %ECX, 30
shl %EAX, 2
ret
instead of this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
shr %ECX, 30
mov %EDX, DWORD PTR [%ESP + 8]
shl %EDX, 2
or %EDX, %ECX
shl %EAX, 2
ret
The extra copy (marked ***) can be eliminated when I teach the code generator
that shrd32rri8 is really commutative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 06:18:43 +00:00
Chris Lattner
009b55b6f6
X86 shifts mask the amount.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19678 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 03:36:30 +00:00
Chris Lattner
477c931852
Code to handle FP_EXTEND is dead now. X86 doesn't support any data types to
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FP_EXTEND from!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19674 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 20:05:56 +00:00
Chris Lattner
3dd68151dc
Remove more dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19673 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 19:50:08 +00:00
Chris Lattner
a7a4c0f7c4
The selection dag code handles the promotions from F32 to F64 for us, so we
...
don't need to even think about F32 in the X86 code anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19672 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 19:46:54 +00:00
Chris Lattner
b422aeac9e
Fix 124.m88ksim.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19667 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 17:35:28 +00:00
Chris Lattner
811482a82b
Do not emit loads multiple times, potentially in the wrong places.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19661 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 04:18:32 +00:00
Chris Lattner
b71f8fc99d
Eliminate bad assertions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19659 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 04:00:54 +00:00
Chris Lattner
4a108668df
* Eliminate the TokenSet and just use the ExprMap for both tokens and values.
...
* Insert some really pedantic assertions that will notice when we emit the
same loads more than one time, exposing bugs. This turns a miscompilation in
bzip2 into a compile-fail. yaay.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19658 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 03:51:59 +00:00
Chris Lattner
883c86f510
Rely on the code in MatchAddress to do this work. Otherwise we fail to
...
match (X+Y)+(Z << 1), because we match the X+Y first, consuming the index
register, then there is no place to put the Z.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 02:25:52 +00:00
Chris Lattner
98a8ba0393
Fix a problem where probing for addressing modes caused expressions to be
...
emitted too early. In particular, this fixes
Regression/CodeGen/X86/regpressure.ll:regpressure3.
This also improves the 2nd basic block in 164.gzip:flush_block, which went from
.LBBflush_block_1: # loopentry.1.i
movzx %EAX, WORD PTR [dyn_ltree + 20]
movzx %ECX, WORD PTR [dyn_ltree + 16]
mov DWORD PTR [%ESP + 32], %ECX
movzx %ECX, WORD PTR [dyn_ltree + 12]
movzx %EDX, WORD PTR [dyn_ltree + 8]
movzx %EBX, WORD PTR [dyn_ltree + 4]
mov DWORD PTR [%ESP + 36], %EBX
movzx %EBX, WORD PTR [dyn_ltree]
add DWORD PTR [%ESP + 36], %EBX
add %EDX, DWORD PTR [%ESP + 36]
add %ECX, %EDX
add DWORD PTR [%ESP + 32], %ECX
add %EAX, DWORD PTR [%ESP + 32]
movzx %ECX, WORD PTR [dyn_ltree + 24]
add %EAX, %ECX
mov %ECX, 0
mov %EDX, %ECX
to
.LBBflush_block_1: # loopentry.1.i
movzx %EAX, WORD PTR [dyn_ltree]
movzx %ECX, WORD PTR [dyn_ltree + 4]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 8]
add %EAX, %ECX
movzx %ECX, WORD PTR [dyn_ltree + 12]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 16]
add %EAX, %ECX
movzx %ECX, WORD PTR [dyn_ltree + 20]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 24]
add %ECX, %EAX
mov %EAX, 0
mov %EDX, %EAX
... which results in less spilling in the function.
This change alone speeds up 164.gzip from 37.23s to 36.24s on apoc. The
default isel takes 37.31s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 01:06:26 +00:00
Chris Lattner
e9fe2bcac2
Fix indentation.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19649 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 23:25:45 +00:00
Chris Lattner
869e0434ae
Don't bother using max here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19647 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 23:02:13 +00:00
Chris Lattner
90d1be7eef
Do not give token factor nodes outrageous weights
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19645 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 22:56:09 +00:00
Chris Lattner
5c65981a57
Two changes:
...
1. Fold [mem] += (1|-1) into inc [mem]/dec [mem] to save some icache space.
2. Do not let token factor nodes prevent forming '[mem] op= val' folds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19643 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 22:10:42 +00:00
Chris Lattner
e10269ba30
Refactor load/op/store folding into it's own method, no functionality changes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19641 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 19:25:26 +00:00
Chris Lattner
ae3ffba466
Fix a major regression last night that prevented us from producing [mem] op= reg
...
operations.
The body of the if is less indented but unmodified in this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19638 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 17:49:14 +00:00
Chris Lattner
2a4e508281
Codegen this:
...
int %foo(int %X) {
%T = add int %X, 13
%S = mul int %T, 3
ret int %S
}
as this:
mov %ECX, DWORD PTR [%ESP + 4]
lea %EAX, DWORD PTR [%ECX + 2*%ECX + 39]
ret
instead of this:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EAX, %ECX
add %EAX, 13
imul %EAX, %EAX, 3
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19633 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 06:48:02 +00:00
Chris Lattner
4ff348befa
Fix test/Regression/CodeGen/X86/2005-01-17-CycleInDAG.ll and 132.ijpeg.
...
Do not fold a load into an operation if it will induce a cycle in the DAG.
Repeat after me: dAg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19631 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 06:26:58 +00:00
Chris Lattner
cb1aa8d772
Do not fold a load into a comparison that is used by more than one place.
...
The comparison will probably be folded, so this is not ok to do.
This fixed 197.parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19624 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 01:34:14 +00:00
Chris Lattner
c98279d371
Do not codegen 'xor bool, true' as 'not reg'. not reg inverts the upper bits
...
of the bytereg. This fixes yacr2, 300.twolf and probably others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19622 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 00:23:16 +00:00
Chris Lattner
4df0de975a
Set up the shift and setcc types.
...
If we emit a load because we followed a token chain to get to it, try to
fold it into its single user if possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19620 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 00:00:33 +00:00
Chris Lattner
da2ce11407
* Adjust to changes in TargetLowering interfaces.
...
* Remove custom promotion for bool and byte select ops. Legalize now
promotes them for us.
* Allow folding ConstantPoolIndexes into EXTLOAD's, useful for float immediates.
* Declare which operations are not supported better.
* Add some hacky code for TRUNCSTORE to pretend that we have truncstore
for i16 types. This is useful for testing promotion code because I can
just remove 16-bit registers all together and verify that programs work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19614 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-16 07:34:08 +00:00
Chris Lattner
e9ef81dd2f
Add support for truncstore and *extload.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19566 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-15 05:22:24 +00:00
Chris Lattner
7f2afac1dc
Adjust to CopyFromREg changes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19561 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-14 22:37:41 +00:00
Chris Lattner
18c2f13e0f
Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19535 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-13 20:50:02 +00:00
Chris Lattner
1d50b7fa53
Codegen factor nodes more intelligently according to perceived register pressure.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19532 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-13 19:56:00 +00:00
Chris Lattner
c35807155c
Initial trivial (but stupid) codegen for this node.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19529 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-13 18:01:36 +00:00
Chris Lattner
636e79a20f
Add some really pedantic assertions to the load folding code. Fix a bunch
...
of cases where we accidentally emitted a load folded once and unfolded
elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19522 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-13 05:53:16 +00:00
Chris Lattner
a0bb692b27
We can only fold a load into an op if there is exactly one use of the value.
...
Checking to see if the load has two uses is not equivalent, as the chain
value may have zero uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19518 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 18:38:26 +00:00
Chris Lattner
9bbd992eb1
Try both ways to fold an add together. This allows us to generate this code
...
imul %EAX, %EAX, 400
add %ECX, %EAX
add %ESI, DWORD PTR [%ECX + 4*%EDX]
inc %EDX
cmp %EDX, 100
instead of this:
imul %EAX, %EAX, 400
add %ECX, %EAX
mov %EAX, %EDX
shl %EAX, 2
add %ECX, %EAX
add %ESI, DWORD PTR [%ECX]
inc %EDX
cmp %EDX, 100
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19513 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 18:08:53 +00:00
Chris Lattner
2b9378646d
Fix a major miscompilation where we were overwriting the scale reg.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19511 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 07:33:20 +00:00
Chris Lattner
48034fd9f1
Do not use the type of the RHS constant to determine the type of the operation.
...
This fails for shifts because the constant is always 8 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19508 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 05:22:07 +00:00
Chris Lattner
a23ccfb124
Do not lose the offset from teh global when peephole optimizing instructions.
...
This fixes FreeBench/pcompress
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19507 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 05:17:28 +00:00
Jeff Cohen
603fea9eb6
Fix C++ more compilatiom errors
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19504 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:29:05 +00:00
Chris Lattner
a56cea4495
Fix a compile error with VC++, which things that static const arrays need
...
to be dynamically initialized. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19503 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:23:22 +00:00
Chris Lattner
7dbcb75b15
Fix a bug that caused us to crash on povray. We weren't emitting an FP_REG_KILL into a block that had a successor with a FP PHI node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19502 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:21:28 +00:00
Chris Lattner
e11a9a93a8
Print a load of a null pointer (in intel mode) like this:
...
mov %AX, WORD PTR [0]
instead of like this:
mov %AX, WORD PTR []
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19501 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:07:11 +00:00
Chris Lattner
9f2cb3da48
Print a load of a null pointer like this:
...
movw 0, %ax
instead of like this:
movw , %ax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19500 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:05:19 +00:00
Chris Lattner
085c9955ca
Fix a crash compiling povray on UINT_TO_FP from i16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19499 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:00:00 +00:00
Chris Lattner
4292830fe5
There are no [mem] op= reg instructions for FP, so remove their entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19496 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 03:16:09 +00:00
Chris Lattner
db8c368d7b
Fix a bug where we didn't insert FP_REG_KILL instructions into MBB's that
...
contain FP PHI nodes but no other FP defining instructions. This fixes
183.equake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19495 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 02:57:10 +00:00
Chris Lattner
afce4306ec
Fold TRUNCATE (LOAD P) into a smaller load from P.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19494 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 02:19:06 +00:00
Chris Lattner
ef6806c979
Be more careful about order of arg evalution for CopyToReg nodes. This shrinks
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256.bzip2 from 7142 to 7103 lines of .s file.
Second, add initial support for folding loads into compares, though this code
is dynamically dead for now. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19493 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 02:02:48 +00:00
Chris Lattner
7ea64f5d12
Fold some more [mem] op= val operators. This allows us to things like this
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several times in 256.bzip2:
mov %EAX, DWORD PTR [%ESP + 204]
- mov %EAX, DWORD PTR [%EAX]
- or %EAX, 2097152
- mov %ECX, DWORD PTR [%ESP + 204]
- mov DWORD PTR [%ECX], %EAX
+ or DWORD PTR [%EAX], 2097152
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19492 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 01:28:00 +00:00
Chris Lattner
dbba22fa2a
Fold loads into sign/zero extends. instead of:
...
mov %AL, BYTE PTR [%EDX + l18_length_code]
movzx %EAX, %AL
Emit:
movzx %EAX, BYTE PTR [%EDX + l18_length_code]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19489 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 23:33:00 +00:00
Chris Lattner
837caa7223
Comment out debug code :)
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Select [mem] += Val operations. For constants, we used to get:
mov %ECX, -32768
add %ECX, DWORD PTR [l4_match_start]
mov DWORD PTR [l4_match_start], %ECX
Now we get:
add DWORD PTR [l4_match_start], -32768
For other values we used to get:
mov %EBP, %EDI ;; because the add destroys the value
add %EBP, DWORD PTR [l4_input_len]
mov DWORD PTR [l4_input_len], %EBP
now we get:
add DWORD PTR [l4_input_len], %EDI
Both of these use less registers than the alternative, are faster and smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19488 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 23:21:30 +00:00
Chris Lattner
5f75d9a88c
Handle the global address case here, not just the offset case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19487 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 22:58:43 +00:00
Chris Lattner
c4b6a78980
Treat int constants as not requiring a register, since they are almost always
...
folded into an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19486 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 22:29:12 +00:00
Chris Lattner
a5ade060db
* Factor a bunch of binary operator cases into shared code.
...
* Fold loads into Add, sub, and, or, xor and mul when possible.
* Codegen shl X, 1 as add X, X
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19483 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 21:19:59 +00:00
Chris Lattner
947d544e29
Fold multiplies by 3,5,9 into addressing modes when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19480 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 19:37:02 +00:00
Chris Lattner
51a263434a
Instead of generating stuff like this:
...
mov %ECX, %EAX
add %ECX, 32768
mov %SI, WORD PTR [2*%ECX + l13_prev]
Generate this:
mov %SI, WORD PTR [2*%ECX + l13_prev + 65536]
This occurs when you have a GEP instruction where an index is
"something + imm".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19472 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 06:36:20 +00:00
Chris Lattner
31805bf2b6
Implement MEMCPY natively in terms of rep movs*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19468 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 06:19:26 +00:00
Chris Lattner
989de030c4
Implement memset -> rep stos*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19467 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 06:14:36 +00:00
Chris Lattner
795069dd38
Announce that we don't support mem ops yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19466 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 05:57:36 +00:00
Chris Lattner
a95589be3f
Teach the address selector to make 'reg+reg' addressing modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19457 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 04:40:19 +00:00
Chris Lattner
d4dab929d8
Emit NOT instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19455 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 04:31:30 +00:00
Chris Lattner
6c07aee7c9
Fix a bug emitting branches that broke a lot of programs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19452 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 04:06:27 +00:00
Chris Lattner
ef7ba0756b
Be more careful where we set ContainsFPCode. We were missing a set in the
...
int -> FP casting code. Note that we don't have to set it for FP operations
that take FP values as operands: whatever produces the FP value will set the
flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19451 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 03:50:45 +00:00
Chris Lattner
a3aa2e2882
Fix a major bug in setcc/cmov folding, where we accidentally
...
inverted the sense of the comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19450 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 03:37:59 +00:00
Chris Lattner
1133309e57
Take register pressure into account when we have to decide whether to
...
evaluate the LHS or the RHS of an operation first. This causes good things
to happen. For example, instead of compiling a loop to this:
.LBBstrength_result7_1: # loopentry
movl 16(%esp), %edi
movl (%edi), %edi ;;; LOAD
movl (%ecx), %ebx
movl $2, (%eax,%ebx,4)
movl (%edx), %ebx
movl %esi, %ebp
addl $21, %ebp
addl $42, %esi
cmpl $0, %edi ;;; USE
cmovne %esi, %ebp
cmpl %ebp, %ebx
movl %ebp, %esi
jg .LBBstrength_result7_1
We now compile it to this:
.LBBstrength_result7_1: # loopentry
movl %edi, %ebx
addl $42, %ebx
addl $21, %edi
movl (%ecx), %ebp ;; LOAD
cmpl $0, %ebp ;; USE
cmovne %ebx, %edi
movl (%edx), %ebx
movl $2, (%eax,%ebx,4)
movl (%esi), %ebx
cmpl %edi, %ebx
jg .LBBstrength_result7_1
Which reduces register pressure enough (in this case) to avoid spilling in the
loop.
As another example, consider the CodeGen/X86/regpressure.ll testcase. We
used to generate this code for both cases:
regpressure1:
subl $32, %esp
movl %esi, 12(%esp)
movl %edi, 8(%esp)
movl %ebx, 4(%esp)
movl %ebp, (%esp)
movl 36(%esp), %ecx
movl (%ecx), %eax
movl 4(%ecx), %edx
movl %edx, 24(%esp)
movl 8(%ecx), %edx
movl %edx, 16(%esp)
movl 12(%ecx), %edx
movl 16(%ecx), %esi
movl 20(%ecx), %edi
movl 24(%ecx), %ebx
movl %ebx, 28(%esp)
movl 28(%ecx), %ebx
movl 32(%ecx), %ebp
movl %ebp, 20(%esp)
movl 36(%ecx), %ecx
imull 24(%esp), %eax
imull 16(%esp), %eax
imull %edx, %eax
imull %esi, %eax
imull %edi, %eax
imull 28(%esp), %eax
imull %ebx, %eax
imull 20(%esp), %eax
imull %ecx, %eax
movl (%esp), %ebp
movl 4(%esp), %ebx
movl 8(%esp), %edi
movl 12(%esp), %esi
addl $32, %esp
ret
This code is basically trying to do all of the loads first, then execute all
of the multiplies. Because we run out of registers, lots of spill code happens.
We now generate this code for both cases:
regpressure1:
movl 4(%esp), %ecx
movl (%ecx), %eax
movl 4(%ecx), %edx
imull %edx, %eax
movl 8(%ecx), %edx
imull %edx, %eax
movl 12(%ecx), %edx
imull %edx, %eax
movl 16(%ecx), %edx
imull %edx, %eax
movl 20(%ecx), %edx
imull %edx, %eax
movl 24(%ecx), %edx
imull %edx, %eax
movl 28(%ecx), %edx
imull %edx, %eax
movl 32(%ecx), %edx
imull %edx, %eax
movl 36(%ecx), %ecx
imull %ecx, %eax
ret
which is much nicer (when we fold loads into the muls it will be even better).
The old instruction selector used to produce the good code for regpressure1
but not for regpressure2, as it depended on the order of operations in the
LLVM code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19449 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 03:11:44 +00:00
Chris Lattner
24aad1b0c1
Fold setcc instructions into selects.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19438 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-10 22:10:13 +00:00
Chris Lattner
57fbfb5879
Add conditional moves for the parity flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19437 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-10 22:09:33 +00:00
Chris Lattner
a13d3236d1
Implement 8-bit multiply for X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19435 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-10 20:55:48 +00:00
Chris Lattner
bd9f0eefb2
Codegen (Reg|imm)+&GV as an LEA, because we cannot put it into the immediate field
...
of an ADDri (due to current restrictions on MachineOperand :( ). This allows
us to generate:
leal Data+16000, %edx
instead of:
movl $Data, %edx
addl $16000, %edx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19420 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-09 20:20:29 +00:00
Chris Lattner
250208587d
Fix copy and pasto's for FP -> Int. This fixes fldry
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19418 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-09 19:49:59 +00:00
Chris Lattner
590d800a12
Initial implementation of FP->INT and INT->FP casts
...
Also, fix zero_extend from bool to i8, which fixes Shootout/objinst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19414 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-09 18:52:44 +00:00
Chris Lattner
6e7c47c12d
Fix a subtle bug involving constant expr casts from int to fp
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19410 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-09 01:49:29 +00:00
Chris Lattner
1482458b23
Implement varargs and returnaddress/frameaddress intrinsics. With this
...
patch, all of SingleSource/UnitTests passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19408 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-09 00:01:27 +00:00
Chris Lattner
b0802651bf
Okay 15th time is the charm. Looking at the vector size is useless as it
...
gets clobbered by a previous statement. This fixes all calls finally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19399 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 20:51:36 +00:00
Chris Lattner
6cc70ef0f9
Okay, my off by one was actually off by two. This fixes Generic/2003-07-07-BadLongConst.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19398 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 20:39:31 +00:00
Chris Lattner
ce45d65d9a
Fix off by one error
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19396 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 20:31:34 +00:00
Chris Lattner
5188ad735c
Adjust to changes in LowerCallTo interface
...
Minor bugfixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19376 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 19:28:19 +00:00
Chris Lattner
8c92628d1c
Wrap long line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19367 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 06:59:50 +00:00
Chris Lattner
7ab65934a0
The X86 instruction selector already handles codegen of:
...
store float 123.45, float* %P
as an integer store. This adds handling of float immediate stores as integers
for arguments passed function calls.
This is now tested by CodeGen/X86/store-fp-constant.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19364 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 05:45:24 +00:00
Chris Lattner
18ad19488d
Allow the selection-dag based selector to be diabled with -disable-pattern-isel.
...
For now, this is the default, as the current selector is missing some big pieces.
To enable the new selector, pass -disable-pattern-isel=false to llc or lli.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19335 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-07 07:50:50 +00:00
Chris Lattner
8acb1ba04d
Reimplementation of the X86 pattern isel. This is still missing many large
...
pieces, but can already do amazing things in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19334 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-07 07:49:41 +00:00
Chris Lattner
d844d0128a
This file is now dead.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19333 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-07 07:49:05 +00:00
Chris Lattner
95cdb36714
Add a new prototype
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19332 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-07 07:48:33 +00:00
Chris Lattner
6ac95f9679
Codegen -1 and -0.0 more efficiently. This implements CodeGen/X86/negatize_zero.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19313 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-06 21:19:16 +00:00
Chris Lattner
5384b38ccc
1. If a double FP constant must be put into a constant pool, but it can be
...
precisely represented as a float, put it into the constant pool as a
float.
2. Use the cbw/cwd/cdq instructions instead of an explicit SAR for signed
division.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19291 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-05 16:30:14 +00:00
Chris Lattner
0539313fe5
Minor optimization to allocate R8 registers in a better order.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19289 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-05 16:09:16 +00:00
Jeff Cohen
1c32f79a82
Revert elimination of global variable hack... still needed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19273 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-03 16:34:19 +00:00
Chris Lattner
10197ff5cd
ADC and IMUL are also commutable.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19264 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-03 01:27:59 +00:00
Jeff Cohen
40296bdf27
Eliminate the use of the global variable hack in the X86 target that was used
...
to get Visual Studio to link in X86.lib to the executables that need it. There
is another way of doing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19252 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 04:23:12 +00:00
Chris Lattner
5aee0b97aa
Disable 2->3 address promotion of add and inc instructions to LEA's. In
...
addition to being three address, LEA's don't set the flags.
This fixes 186.crafty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19251 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 04:18:17 +00:00
Chris Lattner
5dd350defd
Add a new method.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19249 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 02:38:18 +00:00
Chris Lattner
eb96ec52ff
Add support for SETNPr to lower to memory form.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19248 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 02:37:46 +00:00
Chris Lattner
bcea4d6f28
Implement the convertToThreeAddress method, add support for inverting JP/JNP
...
branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19247 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 02:37:07 +00:00
Chris Lattner
cc65beeb39
Two changes here:
...
1. Add new instructions for checking parity flags: JP, JNP, SETP, SETNP.
2. Set the isCommutable and isPromotableTo3Address bits on several
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19246 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 02:35:46 +00:00
Chris Lattner
6b4f501470
Remove unused enum value
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19024 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-17 22:41:46 +00:00
Chris Lattner
8cdbc35216
Change the sentinal
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19007 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-17 00:46:51 +00:00
Chris Lattner
11cf7aa775
Create a stack slot for the return address lazily instead of eagerly. This
...
save small amounts of time for functions that don't call llvm.returnaddress
or llvm.frameaddress (which is almost all functions).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19006 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-17 00:07:46 +00:00
Chris Lattner
84b85c8262
Adjust to changes in asmwriter filenames
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18987 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-16 17:33:24 +00:00
Chris Lattner
c0354c904b
Set the rounding mode for the X86 FPU to 64-bits instead of 80-bits. We
...
don't support long double anyway, and this gives us FP results closer to
other targets.
This also speeds up 179.art from 41.4s to 18.32s, by eliminating a problem
with extra precision that causes an FP == comparison to fail (leading to
extra loop iterations).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18895 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-13 17:23:11 +00:00
Chris Lattner
3ea78c4276
Use the target triple to pick this target.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18830 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-12 17:40:28 +00:00
Chris Lattner
223d4c4b3a
Fix a regression caused by the previous patch
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18449 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-03 05:13:15 +00:00
Chris Lattner
45de191b0b
Spill/restore X86 floating point stack registers with 64-bits of precision
...
instead of 80-bits of precision. This fixes PR467.
This change speeds up fldry on X86 with LLC from 7.32s on apoc to 4.68s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18433 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-02 18:17:31 +00:00
Chris Lattner
3986924e0b
Consider 64-bit registers to be FP as well.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18432 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-02 17:57:21 +00:00
Tanya Lattner
9855b84469
Reverting this patch:
...
http://mail.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20041122/021428.html
It broke Mutlisource/Applications/obsequi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18407 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-01 18:27:03 +00:00
Chris Lattner
928b47ae2e
Revamp long/ulong comparisons to use a much more efficient sequence (thanks
...
to Brian and the Sun compiler for pointing out that the obvious works :)
This also enables folding all long comparisons into setcc and branch
instructions: before we could only do == and !=
For example, for:
void test(unsigned long long A, unsigned long long B) {
if (A < B) foo();
}
We now generate:
test:
subl $4, %esp
movl %esi, (%esp)
movl 8(%esp), %eax
movl 12(%esp), %ecx
movl 16(%esp), %edx
movl 20(%esp), %esi
subl %edx, %eax
sbbl %esi, %ecx
jae .LBBtest_2 # UnifiedReturnBlock
.LBBtest_1: # then
call foo
movl (%esp), %esi
addl $4, %esp
ret
.LBBtest_2: # UnifiedReturnBlock
movl (%esp), %esi
addl $4, %esp
ret
Instead of:
test:
subl $12, %esp
movl %esi, 8(%esp)
movl %ebx, 4(%esp)
movl 16(%esp), %eax
movl 20(%esp), %ecx
movl 24(%esp), %edx
movl 28(%esp), %esi
cmpl %edx, %eax
setb %al
cmpl %esi, %ecx
setb %bl
cmove %ax, %bx
testb %bl, %bl
je .LBBtest_2 # UnifiedReturnBlock
.LBBtest_1: # then
call foo
movl 4(%esp), %ebx
movl 8(%esp), %esi
addl $12, %esp
ret
.LBBtest_2: # UnifiedReturnBlock
movl 4(%esp), %ebx
movl 8(%esp), %esi
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18330 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-29 05:55:24 +00:00
Chris Lattner
90b1b457ef
Do not push two return addresses on the stack when we call external functions who have their addresses taken. This fixes test-call.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18134 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-22 22:25:30 +00:00
Chris Lattner
88f9386cfe
There is no reason to emit function stubs for direct calls.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18082 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-21 03:46:06 +00:00
Chris Lattner
7fc3824835
ignore generated files
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18073 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-21 00:01:54 +00:00
Chris Lattner
e72e445ed5
Remove all JIT specific code and switch the code generator over to emitting
...
relocations for global references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18068 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 23:55:15 +00:00
Chris Lattner
7ddde32ead
Implement the X86 JIT interfaces
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18067 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 23:54:33 +00:00
Chris Lattner
8dad013038
Describe the X86 target-specific relocations.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18066 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 23:54:19 +00:00
Chris Lattner
89d64e262c
We implement these interfaces
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18065 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 23:53:56 +00:00
Chris Lattner
3104db054a
Dont' forget to switch back to decimal output
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18010 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-19 20:57:07 +00:00
Chris Lattner
39a83dc37c
Fix a major bug in the signed shr code, which apparently only breaks 134.perl!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17902 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-16 18:40:52 +00:00
Chris Lattner
8f1ac9f90d
Remove a dead function, which died when we got GAS emission working (phwew,
...
hold your nose!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17869 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-16 04:34:29 +00:00
Chris Lattner
f2d552eca6
Implement a simple FIXME: if we are emitting a basic block address that has
...
already been emitted, we don't have to remember it and deal with it later,
just emit it directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17868 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-16 04:30:51 +00:00
Chris Lattner
16fe6f5f24
* Merge some win32 ifdefs together
...
* Get rid of "emitMaybePCRelativeValue", either we want to emit a PC relative
value or not: drop the maybe BS. As it turns out, the only places where
the bool was a variable coming in, the bool was a dynamic constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17867 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-16 04:21:18 +00:00
Chris Lattner
5aa3ed92de
Add debug-only=jit printout, so we see when lazily resolved symbols are
...
set up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17862 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-15 23:16:55 +00:00
Chris Lattner
36c625d3a5
Simplify and rearrange long shift code
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17861 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-15 23:16:34 +00:00
Misha Brukman
d2691fdf18
GhostLinkage should not reach asm printing stage
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17750 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-14 21:03:49 +00:00
Chris Lattner
4b2c09fa22
Don't print unneeded labels
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17714 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-13 23:27:11 +00:00
Chris Lattner
ce7cafa960
shld is a very high latency operation. Instead of emitting it for shifts of
...
two or three, open code the equivalent operation which is faster on athlon
and P4 (by a substantial margin).
For example, instead of compiling this:
long long X2(long long Y) { return Y << 2; }
to:
X3_2:
movl 4(%esp), %eax
movl 8(%esp), %edx
shldl $2, %eax, %edx
shll $2, %eax
ret
Compile it to:
X2:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl %eax, %edx
shrl $30, %edx
leal (%edx,%ecx,4), %edx
shll $2, %eax
ret
Likewise, for << 3, compile to:
X3:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl %eax, %edx
shrl $29, %edx
leal (%edx,%ecx,8), %edx
shll $3, %eax
ret
This matches icc, except that icc open codes the shifts as adds on the P4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17707 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-13 20:48:57 +00:00
Chris Lattner
62f5a9402c
Add missing check
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17706 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-13 20:04:38 +00:00
Chris Lattner
44205cadba
Compile:
...
long long X3_2(long long Y) { return Y+Y; }
int X(int Y) { return Y+Y; }
into:
X3_2:
movl 4(%esp), %eax
movl 8(%esp), %edx
addl %eax, %eax
adcl %edx, %edx
ret
X:
movl 4(%esp), %eax
addl %eax, %eax
ret
instead of:
X3_2:
movl 4(%esp), %eax
movl 8(%esp), %edx
shldl $1, %eax, %edx
shll $1, %eax
ret
X:
movl 4(%esp), %eax
shll $1, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17705 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-13 20:03:48 +00:00
John Criswell
546faca4ef
Correct the name of stosd for the AT&T syntax:
...
It's stosl (l for long == 32 bit).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17658 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-10 04:48:15 +00:00
John Criswell
e5cda8e727
Fix compilation problem; make the cast and the LHS be the same type.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17488 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-05 16:17:06 +00:00
Chris Lattner
141e3fd81d
Quiet VC++ warnings
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17484 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-05 04:50:59 +00:00
Chris Lattner
a62869b064
Fix a warning
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17431 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-02 15:27:57 +00:00
Chris Lattner
7cc372bfc3
Add placeholder variable to make Win32 work, applied for Morten Ofstad
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17406 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-01 20:10:20 +00:00
Reid Spencer
6cb21d443e
Change Library Names Not To Conflict With Others When Installed
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17286 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-27 23:18:45 +00:00
Reid Spencer
8c2c3152d6
Adjust to changes in Makefile.rules
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17167 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-22 21:02:08 +00:00
Reid Spencer
cac731ecbe
We won't use automake
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17155 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-22 03:35:04 +00:00
Reid Spencer
86d341b204
Initial automake generated Makefile template
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17136 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-18 23:55:41 +00:00
Chris Lattner
7d0974b9a0
Improve compatibility with VC++, patch contributed by Morten Ofstad!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17126 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-18 15:54:17 +00:00
Chris Lattner
611fb259ba
Don't print stuff out from the code generator. This broke the JIT horribly
...
last night. :) bork!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17093 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 17:40:50 +00:00
Chris Lattner
56a31c69c8
Rewrite support for cast uint -> FP. In particular, we used to compile this:
...
double %test(uint %X) {
%tmp.1 = cast uint %X to double ; <double> [#uses=1]
ret double %tmp.1
}
into:
test:
sub %ESP, 8
mov %EAX, DWORD PTR [%ESP + 12]
mov %ECX, 0
mov DWORD PTR [%ESP], %EAX
mov DWORD PTR [%ESP + 4], %ECX
fild QWORD PTR [%ESP]
add %ESP, 8
ret
... which basically zero extends to 8 bytes, then does an fild for an
8-byte signed int.
Now we generate this:
test:
sub %ESP, 4
mov %EAX, DWORD PTR [%ESP + 8]
mov DWORD PTR [%ESP], %EAX
fild DWORD PTR [%ESP]
shr %EAX, 31
fadd DWORD PTR [.CPItest_0 + 4*%EAX]
add %ESP, 4
ret
.section .rodata
.align 4
.CPItest_0:
.quad 5728578726015270912
This does a 32-bit signed integer load, then adds in an offset if the sign
bit of the integer was set.
It turns out that this is substantially faster than the preceeding sequence.
Consider this testcase:
unsigned a[2]={1,2};
volatile double G;
void main() {
int i;
for (i=0; i<100000000; ++i )
G += a[i&1];
}
On zion (a P4 Xeon, 3Ghz), this patch speeds up the testcase from 2.140s
to 0.94s.
On apoc, an athlon MP 2100+, this patch speeds up the testcase from 1.72s
to 1.34s.
Note that the program takes 2.5s/1.97s on zion/apoc with GCC 3.3 -O3
-fomit-frame-pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17083 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 08:01:28 +00:00
Chris Lattner
07306de06e
Unify handling of constant pool indexes with the other code paths, allowing
...
us to use index registers for CPI's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17082 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 07:49:45 +00:00
Chris Lattner
0e0ed85697
Give the asmprinter the ability to print memrefs with a constant pool index,
...
index reg and scale
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17081 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 07:16:32 +00:00
Chris Lattner
de95c9e0bb
fold:
...
%X = and Y, constantint
%Z = setcc %X, 0
instead of emitting:
and %EAX, 3
test %EAX, %EAX
je .LBBfoo2_2 # UnifiedReturnBlock
We now emit:
test %EAX, 3
je .LBBfoo2_2 # UnifiedReturnBlock
This triggers 581 times on 176.gcc for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17080 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 06:10:40 +00:00
Chris Lattner
30483b0c84
Teach the X86 backend about unreachable and undef. Among other things, we
...
now compile:
'foo() {}' into "ret" instead of "mov EAX, 0; ret"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17049 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-16 18:13:05 +00:00
Chris Lattner
358a9027a8
Instruction select globals with offsets better. For example, on this test
...
case:
int C[100];
int foo() {
return C[4];
}
We now codegen:
foo:
mov %EAX, DWORD PTR [C + 16]
ret
instead of:
foo:
mov %EAX, OFFSET C
mov %EAX, DWORD PTR [%EAX + 16]
ret
Other impressive features may be coming later.
This patch is contributed by Jeff Cohen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17011 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 05:05:29 +00:00
Chris Lattner
8cce7cd0ae
Give the X86 JIT the ability to encode global+disp constants. Patch
...
contributed by Jeff Cohen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17010 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 04:53:13 +00:00
Chris Lattner
d416f086cc
Give the X86 asm printer the ability to print out addressing modes that have
...
constant displacements from global variables. Patch by Jeff Cohen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17009 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 04:44:53 +00:00
Chris Lattner
fb3d844e50
Allow X86 addressing modes to represent globals with offsets. Patch contributed
...
by Jeff Cohen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17008 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 04:43:20 +00:00
Reid Spencer
d96cb6eaa0
Update to reflect changes in Makefile rules.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16950 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-13 11:46:52 +00:00
Reid Spencer
81f76b324e
Initial version of automake Makefile.am file.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16893 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-10 22:20:40 +00:00
Chris Lattner
222b86f694
The person who was planning to add SSE support isn't anymore, so disable
...
the -sse* options (to avoid misleading people).
Also, the stack alignment of the target doesn't depend on whether SSE is
eventually implemented, so remove a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16860 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-08 22:41:46 +00:00
Chris Lattner
b0f4e389db
Fix a major regression from the bugfix for 2004-10-08-SelectSetCCFold.llx,
...
which prevented setcc's from being folded into branches. It appears that
conditional branchinst's CC operand is actually operand(2), not operand(0)
as we might expect. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16859 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-08 22:24:31 +00:00
Chris Lattner
d04cd55796
Fix bug: 2004-10-08-SelectSetCCFold.llx. Normally this is hidden by the
...
instcombine xform, which is why we didn't notice it before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16840 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-08 16:34:13 +00:00
Chris Lattner
09c750f73d
Remove debugging code, fix encoding problem. This fixes the problems
...
the JIT had last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16766 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 14:31:50 +00:00
Chris Lattner
2483f67914
Codegen signed mod by 2 or -2 more efficiently. Instead of generating:
...
t:
mov %EDX, DWORD PTR [%ESP + 4]
mov %ECX, 2
mov %EAX, %EDX
sar %EDX, 31
idiv %ECX
mov %EAX, %EDX
ret
Generate:
t:
mov %ECX, DWORD PTR [%ESP + 4]
*** mov %EAX, %ECX
cdq
and %ECX, 1
xor %ECX, %EDX
sub %ECX, %EDX
*** mov %EAX, %ECX
ret
Note that the two marked moves are redundant, and should be eliminated by the
register allocator, but aren't.
Compare this to GCC, which generates:
t:
mov %eax, DWORD PTR [%esp+4]
mov %edx, %eax
shr %edx, 31
lea %ecx, [%edx+%eax]
and %ecx, -2
sub %eax, %ecx
ret
or ICC 8.0, which generates:
t:
movl 4(%esp), %ecx #3.5
movl $-2147483647, %eax #3.25
imull %ecx #3.25
movl %ecx, %eax #3.25
sarl $31, %eax #3.25
addl %ecx, %edx #3.25
subl %edx, %eax #3.25
addl %eax, %eax #3.25
negl %eax #3.25
subl %eax, %ecx #3.25
movl %ecx, %eax #3.25
ret #3.25
We would be in great shape if not for the moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16763 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 05:01:07 +00:00
Chris Lattner
3ffdff6448
Fix a scary bug with signed division by a power of two. We used to generate:
...
s: ;; X / 4
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
sar %ECX, 1
shr %ECX, 30
mov %EDX, %EAX
add %EDX, %ECX
sar %EAX, 2
ret
When we really meant:
s:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
sar %ECX, 1
shr %ECX, 30
add %EAX, %ECX
sar %EAX, 2
ret
Hey, this also reduces register pressure too :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16761 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 04:19:43 +00:00
Chris Lattner
610f1e2785
Codegen signed divides by 2 and -2 more efficiently. In particular
...
instead of:
s: ;; X / 2
movl 4(%esp), %eax
movl %eax, %ecx
shrl $31, %ecx
movl %eax, %edx
addl %ecx, %edx
sarl $1, %eax
ret
t: ;; X / -2
movl 4(%esp), %eax
movl %eax, %ecx
shrl $31, %ecx
movl %eax, %edx
addl %ecx, %edx
sarl $1, %eax
negl %eax
ret
Emit:
s:
movl 4(%esp), %eax
cmpl $-2147483648, %eax
sbbl $-1, %eax
sarl $1, %eax
ret
t:
movl 4(%esp), %eax
cmpl $-2147483648, %eax
sbbl $-1, %eax
sarl $1, %eax
negl %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16760 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 04:02:39 +00:00
Chris Lattner
d93d3b047c
Add some new instructions. Fix the asm string for sbb32rr
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16759 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 04:01:02 +00:00
Chris Lattner
955f09666d
* Prune #includes
...
* Update comments
* Rearrange code a bit
* Finally ELIMINATE the GAS workaround emitter for Intel mode. woot!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16647 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 07:31:08 +00:00
Chris Lattner
ac5701c562
Add support for emitting AT&T style .s files, and make it the default. Users
...
may now choose their output format with the -x86-asm-syntax={intel|att} flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16646 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 07:24:48 +00:00
Chris Lattner
8f99eff156
Convert some missed patterns to support AT&T style
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16645 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 07:23:07 +00:00
Chris Lattner
10f873b420
Apparently the GNU assembler has a HUGE hack to be compatible with really
...
old and broken AT&T syntax assemblers. The problem with this hack is that
*SOME* forms of the fdiv and fsub instructions have the 'r' bit inverted.
This was a real pain to figure out, but is trivially easy to support: thus
we are now bug compatible with gas and gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16644 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 07:08:46 +00:00
Chris Lattner
ac6a47588b
Fix incorrect suffix
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16642 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 05:20:16 +00:00
Chris Lattner
707c6fe3ad
Fix some more missed suffixes and swapped operands
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16641 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 01:38:10 +00:00
Chris Lattner
60c715c9a2
Add missing suffixes to FP instructions for AT&T mode
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16640 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 00:43:31 +00:00
Chris Lattner
9a3e49a1b3
Add support for the -x86-asm-syntax flag, which can be used to choose between
...
Intel and AT&T style assembly language. The ultimate goal of this is to
eliminate the GasBugWorkaroundEmitter class, but for now AT&T style emission
is not fully operational.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16639 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-03 20:36:57 +00:00
Chris Lattner
3a173dfc72
Add support to the instruction patterns for AT&T style output, which will
...
hopefully lead to the death of the 'GasBugWorkaroundEmitter'. This also
includes changes to wrap the whole file to 80 columns! Woot! :)
Note that the AT&T style output has not been tested at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16638 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-03 20:35:00 +00:00
Alkis Evlogimenos
65cbfa0f37
The real x87 floating point registers should not be allocatable. They
...
are only used by the stackifier when transforming FPn register
allocations to the real stack file x87 registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16472 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-21 21:22:11 +00:00
Misha Brukman
eae1bf10ea
s/ISel/X86ISel/ to have unique class names for debugging via gdb because the C++
...
front-end in gcc does not mangle classes in anonymous namespaces correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16469 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-21 18:21:21 +00:00
Reid Spencer
2da5c3dda6
Convert code to compile with vc7.1.
...
Patch contributed by Paolo Invernizzi. Thanks Paolo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16368 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-15 17:06:42 +00:00
Misha Brukman
a2700194ae
Fit long lines into 80 cols via creative space elimination
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16353 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-15 01:40:18 +00:00
Chris Lattner
b228657acc
Revamp the Register class, and allow the use of the RegisterGroup class to
...
specify aliases directly in register definitions.
Patch contributed by Jason Eckhardt!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16330 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-14 04:17:02 +00:00
Misha Brukman
fb0796e82e
Fix filename: Printer.cpp has become X86AsmPrinter.cpp
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16299 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-12 21:26:04 +00:00
Alkis Evlogimenos
93c1ab2e15
Use a shorter form to express implicit use/defs in FpGETRESULT and
...
FpSETRESULT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16247 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-08 18:29:31 +00:00
Alkis Evlogimenos
978f629ba9
A call instruction should implicitely define ST0 since the return
...
value is returned in that register. The pseudo instructions
FpGETRESULT and FpSETRESULT shold also have an implicity use and def
of ST0 repsecitvely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16246 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-08 16:54:54 +00:00
Reid Spencer
551ccae044
Changes For Bug 352
...
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-01 22:55:40 +00:00
Reid Spencer
fc989e1ee0
Reduce the number of arguments in the instruction builder and make some
...
improvements on instruction selection that account for register and frame
index bases.
Patch contributed by Jeff Cohen. Thanks Jeff!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16110 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-30 00:13:26 +00:00
Chris Lattner
6f0161aac3
Add -sse[,2,3] arguments to LLC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16018 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-24 08:18:44 +00:00
Chris Lattner
47d2f2bb50
Nuke commented out stuff
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16017 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-24 08:18:27 +00:00
Chris Lattner
ff0a6e6aac
Switch from bytes to bits for alignment for consistency
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15974 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:14:13 +00:00
Chris Lattner
fae896999c
Reduce uses of getRegClass
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15973 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:13:52 +00:00
Chris Lattner
f746a7d09b
Rename var
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15897 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-18 02:22:55 +00:00
Chris Lattner
c6393f82bf
Start using alignment output routines from AsmPrinter.
...
Changes to make this more similar to the ppc asmprinter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15890 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 19:25:42 +00:00
Chris Lattner
8581ee85b4
Use the AsmPrinter emitGlobalConstant.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15872 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 06:48:55 +00:00
Chris Lattner
055acae18c
Start using the AsmPrinter to emit our first class constants. This also
...
drops our half-assed support for cygwin, which noone uses and doesn't work
anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15839 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 23:16:06 +00:00
Chris Lattner
f60b91cbe3
Disable the pattern isel
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15787 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 23:02:17 +00:00
Chris Lattner
01d0efba39
Code insertion methods now return void instead of an int.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15780 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 22:15:11 +00:00
Chris Lattner
57f1b67c34
These methods no longer take a TargetRegisterClass* operand.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 21:56:44 +00:00
Nate Begeman
f8be5e94aa
Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15739 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:05:10 +00:00
Chris Lattner
c96bb817aa
Remove a bunch of ad-hoc target-specific flags that were only used by the
...
old asmprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15660 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:12:04 +00:00
Chris Lattner
8e61d82528
Remove a dead method
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15659 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:07:14 +00:00
Chris Lattner
2a998bdc7c
Finally, the entire instruction asmprinter is now generated from tblgen, woo!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15658 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:02:04 +00:00
Chris Lattner
e4ead0ce62
Add asmprintergen support for the last X86 instruction that needs it: pcrelative calls.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15657 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:59:12 +00:00
Chris Lattner
8198fcfc5d
This file is long dead
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15656 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:55:12 +00:00
Chris Lattner
9795b3a0e7
Scrunch memoperands, add a few more for floating point memops
...
Eliminate the FPI*m classes, converting them to use FPI instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15655 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:50:10 +00:00
Chris Lattner
8549429a78
Move hacks up
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15654 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:09:55 +00:00
Chris Lattner
0f38e6ccca
Make FPI take asm string and operand list
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15653 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 05:54:16 +00:00
Chris Lattner
f5d3a83f65
Nuke the Im*i* patterns, by asmprintergenifying all users.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15652 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 05:31:07 +00:00
Chris Lattner
f29ed0937f
X86 instructions that read-modify-write memory are not LLVM two-address instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15651 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 05:07:25 +00:00
Chris Lattner
57a02306c5
Get rid of the Im8, Im16, Im32 classes, converting more instructions over to
...
asmprintergeneration
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15650 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 04:31:00 +00:00
Chris Lattner
916f96ace0
Remove dead method
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15647 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 02:26:39 +00:00
Chris Lattner
66fa1dcf90
Convert asmprinter to new style of instruction printer
...
Start asmprintergen'ifying machine instrs with memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15646 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 02:25:00 +00:00
Chris Lattner
36b689009d
This is purely a formatting patch that gets us closer to the mecca of fitting
...
X86InstrInfo.td into 80 columns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15629 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 21:21:30 +00:00
Chris Lattner
1b9e20e32f
Drop the first argument of FPI, and asmprinterify fxch
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15628 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 21:02:13 +00:00
Chris Lattner
30bf2d8951
This purely mechanical patch gives the "I" tblgen class operand list and asm
...
string operands, and adjusts all users to pass them in instead of using II.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15624 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 20:17:41 +00:00
Chris Lattner
869f477f34
Convert Ii32 instructions over to use the asmprinter generator
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15621 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 19:06:36 +00:00
Chris Lattner
7d620d57a4
Convert the Ii16 instructions over
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15606 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 16:22:02 +00:00
Chris Lattner
ab67067186
Convert all Ii8 instructions over to the autogenerated asmprinter.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15605 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 16:09:54 +00:00
Alkis Evlogimenos
15876bb28c
Stop using getValues().
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15487 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-04 08:44:43 +00:00
Chris Lattner
bcdda01210
Fix a warning
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15409 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 19:31:30 +00:00
Chris Lattner
fc752713d7
Convert all I<> instructions to asmformat.
...
Delete the 'name' field of all instructions that have asmformats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15403 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 09:52:59 +00:00
Chris Lattner
a35ce87e2e
Eliminate 3 of the X86 printImplicit* flags.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15398 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:23:17 +00:00
Chris Lattner
1626c507e8
Get rid of 3 of the 4 'printimplicit' flags. Implicit operands are now
...
explicitly listed in the asm string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15397 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:22:29 +00:00
Chris Lattner
0e967d4f48
Convert more instructions over to the asmprinter
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15396 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:13:11 +00:00
Chris Lattner
25369cfa2b
Handle registers a bit more efficiently
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15395 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:12:41 +00:00
Chris Lattner
068758e518
give FP stack registers names
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15394 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:12:13 +00:00
Chris Lattner
ffff70827c
Switch more instructions over to using the asmprinter. Fix bugs in the emission
...
of in/out instructions (missing %'s on registers).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15393 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 07:44:35 +00:00
Chris Lattner
b12ee503f7
The tblgen'erated asmparser wants a way to print operands.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15392 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 07:43:46 +00:00
Chris Lattner
3fa861ac6c
Rename the Printer class -> X86AsmPrinter.
...
Include the tablegenerated assembly writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15389 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 06:02:08 +00:00
Chris Lattner
8f945d7756
Factor a bunch of the rules and add support for generating the asmwriter.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15388 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 06:01:32 +00:00
Chris Lattner
96563df090
Specify an asm string and operands lists for a bunch of instructions.
...
This only really covers no-operand instructions so far.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15387 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 06:01:00 +00:00
Chris Lattner
1ab7c5b5e8
Completely disable the pattern isel until it is more substantial.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15380 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 03:28:02 +00:00
Chris Lattner
4ad25e432d
Entirely eliminate all patterns and expanders from this file. We shall go
...
with an incremental approach rather than a revolutionary approach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15379 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 03:25:01 +00:00
Chris Lattner
bb737edcc3
Remove obsolete file
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15377 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 03:19:28 +00:00
Alkis Evlogimenos
31e155e610
Align breaks.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15371 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 10:05:44 +00:00
Chris Lattner
167cf33e1d
Add breaks
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15365 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 09:53:31 +00:00
Alkis Evlogimenos
6103c1703c
Simplify code a bit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15364 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 09:44:32 +00:00
Alkis Evlogimenos
02a453074d
Correctly spell 'unconditional'.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15363 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 09:41:44 +00:00
Alkis Evlogimenos
36f506eddb
Implement insertGoto and reverseBranchCondition for the X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15362 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 09:38:47 +00:00
Chris Lattner
62cce39515
Mark barrier instructions. Execution does not fall through uncond branches
...
or return intructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15356 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 02:10:53 +00:00
Misha Brukman
8606aea117
Fix indentation: should be 2 spaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15240 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-26 18:48:58 +00:00
Misha Brukman
91b5ca838a
Fix file header as it has been renamed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15239 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-26 18:45:48 +00:00
Misha Brukman
c6d398abbb
Renamed files to have the `X86' prefix for uniqueness purposes.
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All CVS history was renamed, the *,v were copied over. No worries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15238 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-26 18:43:11 +00:00
Chris Lattner
cc46c4fcee
Remove some (LARGE) abandoned code for the release. If this is ever needed
...
again in the future, it can be resurrected out of CVS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15112 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-22 21:30:35 +00:00
Chris Lattner
3dbb504081
Fix cases where we generated horrible code like this:
...
mov %EDI, 12
add %EDI, %ECX
mov %ECX, 12
add %ECX, %EDX
mov %EDX, 12
add %EDX, %ESI
instead (really!) generate this:
add %ECX, 12
add %EDX, 12
add %ESI, 12
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15090 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-21 21:28:26 +00:00
Chris Lattner
4771288fe3
While I'm at it, don't break codegen of mul by 3,5,9.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15013 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-19 23:50:57 +00:00
Chris Lattner
596b97f1ab
Generate better code for multiplies by negative constants like -4, -1, -9, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15012 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-19 23:47:21 +00:00
Reid Spencer
8863f1814b
bug 122:
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- Replace ConstantPointerRef usage with GlobalValue usage
- Minimize redundant isa<GlobalValue> usage
- Correct isa<Constant> for GlobalValue subclass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14950 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-18 00:38:32 +00:00
Chris Lattner
42df461c90
Make sure to emit the immediate byte for instructions like:
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shrd [mem], reg, imm
This fixes the jit-ls failure on 186.crafty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14914 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-17 20:26:14 +00:00
Chris Lattner
3b5e6e5f84
Reserve the correct amt of space.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14913 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-17 20:24:05 +00:00
Chris Lattner
76e2df2645
Patches towards fixing PR341
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14841 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-15 02:14:30 +00:00
Chris Lattner
d2995df5b7
Improve codegen for the LLVM offsetof/sizeof "operator". Before we compiled
...
this LLVM function:
int %foo() {
ret int cast (int** getelementptr (int** null, int 1) to int)
}
into:
foo:
mov %EAX, 0
lea %EAX, DWORD PTR [%EAX + 4]
ret
now we compile it into:
foo:
mov %EAX, 4
ret
This sequence is frequently generated by the MSIL front-end, and soon the malloc lowering pass and
Java front-ends as well..
-Chris
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14834 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-15 00:58:53 +00:00
Chris Lattner
0cf0c37469
Delete the allocate*TargetMachine function, which is now dead .
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The shared command line options are now in a header that makes sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14756 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-11 04:17:10 +00:00
Chris Lattner
71d24aab2d
Make these format a bit nicer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14747 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-11 03:27:42 +00:00
Chris Lattner
d36c970a11
Auto-registrate target
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14745 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-11 02:48:49 +00:00
Reid Spencer
954da37bb4
Add #include <iostream> since Value.h does not #include it any more.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14622 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-04 12:19:56 +00:00
Chris Lattner
9a9ca0f06b
Remove dead blocks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14564 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-02 05:46:41 +00:00
Misha Brukman
c1f901c589
Fix associativity of parameters to assert(): now it actually makes sense.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14483 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-29 19:43:20 +00:00
Misha Brukman
e8d8fb26a6
Convert tabs to spaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14482 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-29 19:28:53 +00:00
Chris Lattner
23a53aa9c4
I believe that the code generator now properly handles dead basic blocks. If not,
...
this is a bug, and should be fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14476 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-29 07:17:12 +00:00
Chris Lattner
8b486a114e
Fix a regression from r1.224. In particular, codegen a cast from double ->
...
float as a truncation by going through memory. This truncation was being
skipped, which caused 175.vpr to fail after aggressive register promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14473 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-29 00:14:38 +00:00
Tanya Lattner
b140762a45
Made a fix so that you can print out MachineInstrs that belong to a MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14389 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-25 00:13:11 +00:00
Misha Brukman
66d6ee4247
Spell out `NoFramePointerElim' for readability.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14299 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-21 21:17:44 +00:00
Misha Brukman
83eaa0b567
Use the common `NoFPElim' setting instead of our own.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14298 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-21 21:10:24 +00:00
Chris Lattner
3048373748
Move the IntrinsicLowering header into the CodeGen directory, as per PR346
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14266 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-20 07:49:54 +00:00
Chris Lattner
667ea024b5
Codegen sub C, X a little bit better for register pressure. Instead of
...
mov REG, C
sub REG, X
generate:
neg X
add X, C
which uses one less reg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14213 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-18 00:50:37 +00:00
Chris Lattner
a6f9fe6dbc
Fold setcc instructions into select and branches that are not in the same BB as
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the setcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14212 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-18 00:29:22 +00:00
Chris Lattner
ccd9796a46
Do not fold loads into instructions if it is used more than once. In particular
...
we do not want to fold the load in cases like this:
X = load
= add A, X
= add B, X
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14204 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-17 22:15:25 +00:00
Chris Lattner
f70c22b019
Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14201 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-17 18:19:28 +00:00
Chris Lattner
4adf066f99
Remove support for llvm.isnan. Alkis wins :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14189 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-15 21:48:07 +00:00
Chris Lattner
dc5724478e
Add basic support for the isunordered intrinsic. The isnan stuff still needs to go
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14185 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-15 21:36:44 +00:00
Chris Lattner
01cdb1b367
By far, one of the most common uses of isnan is to make 'isunordered'
...
comparisons. In an 'isunordered' predicate, which looks like this at
the LLVM level:
%a = call bool %llvm.isnan(double %X)
%b = call bool %llvm.isnan(double %Y)
%COM = or bool %a, %b
We used to generate this code:
fxch %ST(1)
fucomip %ST(0), %ST(0)
setp %AL
fucomip %ST(0), %ST(0)
setp %AH
or %AL, %AH
With this patch, we generate this code:
fucomip %ST(0), %ST(1)
fstp %ST(0)
setp %AL
Which should make alkis happy. Tested as X86/compare_folding.llx:test1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14148 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-11 05:33:49 +00:00
Chris Lattner
57790422ca
Fix bug in previous checkin
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14146 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-11 05:22:44 +00:00
Chris Lattner
899dbdcdb0
No really, these are dead now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14145 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-11 04:50:14 +00:00
Chris Lattner
0ca2c8e02c
Now that compare instructions aren't lumped in with the other twoargfp instructions,
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we can get rid of the FpUCOM/FpUCOMi pseudo instructions, which makes stuff simpler
and faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14144 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-11 04:49:02 +00:00
Chris Lattner
ab8deccb82
Introduce a new FP instruction type to separate the compare cases from the
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twoarg cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14143 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-11 04:41:24 +00:00
Chris Lattner
b4fe76cbb5
Add direct support for the isnan intrinsic, implementing test/Regression/CodeGen/X86/isnan.llx
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testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14141 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-11 04:31:10 +00:00
Chris Lattner
665e661384
Add support for the setp instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14140 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-11 04:30:06 +00:00
Chris Lattner
d62d5d7e5b
Split compare instruction handling OUT of handleTwoArgFP into handleCompareFP.
...
This makes the code much simpler, and the two cases really do belong apart.
Once we do it, it's pretty obvious how flawed the logic was for A != A case,
so I fixed it (fixing PR369).
This also uses freeStackSlotAfter instead of inserting an fxchg then
popStackAfter'ing in the case where there is a dead result (unlikely, but
possible), producing better code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14139 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-11 04:25:06 +00:00
Chris Lattner
32305f7763
Fix the fixed stack offset, patch contributed by Vladimir Prus
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14110 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-10 06:19:25 +00:00
John Criswell
6b5bd5857d
Fix for PR#366. We use getClassB() so that we can handle cast instructions
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that cast to bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14096 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-09 15:18:51 +00:00
Chris Lattner
994d7ae649
This file is obsolete
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14005 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-04 00:15:21 +00:00
Chris Lattner
d029cd2d5a
Convert to the new TargetMachine interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13952 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-02 05:55:25 +00:00
Chris Lattner
99c59e8e21
Add support for accurate garbage collection to the LLVM code generators
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13696 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-23 21:23:35 +00:00
Chris Lattner
df04097f87
Add some notes to myself, no functional changes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13695 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-23 21:23:12 +00:00
Chris Lattner
bbdbf30238
minor wording change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13694 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-23 21:22:55 +00:00
Brian Gaeke
09015d9468
Don't keep track of references to LLVM BasicBlocks while emitting; use
...
MachineBasicBlocks instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13568 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-14 06:54:58 +00:00
Brian Gaeke
3fb5d1a6cc
Support MachineBasicBlock operands on RawFrm instructions.
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Get rid of separate numbering for LLVM BasicBlocks; use the automatically
generated MachineBasicBlock numbering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13567 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-14 06:54:57 +00:00
Brian Gaeke
9f088e481c
Generate branch machine instructions with MachineBasicBlock operands instead of
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LLVM BasicBlock operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13566 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-14 06:54:56 +00:00
Chris Lattner
b7cb9ffd34
Two more improvements for null pointer handling: storing a null pointer
...
and passing a null pointer into a function.
For this testcase:
void %test(int** %X) {
store int* null, int** %X
call void %test(int** null)
ret void
}
we now generate this:
test:
sub %ESP, 12
mov %EAX, DWORD PTR [%ESP + 16]
mov DWORD PTR [%EAX], 0
mov DWORD PTR [%ESP], 0
call test
add %ESP, 12
ret
instead of this:
test:
sub %ESP, 12
mov %EAX, DWORD PTR [%ESP + 16]
mov %ECX, 0
mov DWORD PTR [%EAX], %ECX
mov %EAX, 0
mov DWORD PTR [%ESP], %EAX
call test
add %ESP, 12
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13558 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-13 15:26:48 +00:00
Chris Lattner
9f1b531090
Second half of my fixed-sized-alloca patch. This folds the LEA to compute
...
the alloca address into common operations like loads/stores.
In a simple testcase like this (which is just designed to excersize the
alloca A, nothing more):
int %test(int %X, bool %C) {
%A = alloca int
store int %X, int* %A
store int* %A, int** %G
br bool %C, label %T, label %F
T:
call int %test(int 1, bool false)
%V = load int* %A
ret int %V
F:
call int %test(int 123, bool true)
%V2 = load int* %A
ret int %V2
}
We now generate:
test:
sub %ESP, 12
mov %EAX, DWORD PTR [%ESP + 16]
mov %CL, BYTE PTR [%ESP + 20]
*** mov DWORD PTR [%ESP + 8], %EAX
mov %EAX, OFFSET G
lea %EDX, DWORD PTR [%ESP + 8]
mov DWORD PTR [%EAX], %EDX
test %CL, %CL
je .LBB2 # PC rel: F
.LBB1: # T
mov DWORD PTR [%ESP], 1
mov DWORD PTR [%ESP + 4], 0
call test
*** mov %EAX, DWORD PTR [%ESP + 8]
add %ESP, 12
ret
.LBB2: # F
mov DWORD PTR [%ESP], 123
mov DWORD PTR [%ESP + 4], 1
call test
*** mov %EAX, DWORD PTR [%ESP + 8]
add %ESP, 12
ret
Instead of:
test:
sub %ESP, 20
mov %EAX, DWORD PTR [%ESP + 24]
mov %CL, BYTE PTR [%ESP + 28]
*** lea %EDX, DWORD PTR [%ESP + 16]
*** mov DWORD PTR [%EDX], %EAX
mov %EAX, OFFSET G
mov DWORD PTR [%EAX], %EDX
test %CL, %CL
*** mov DWORD PTR [%ESP + 12], %EDX
je .LBB2 # PC rel: F
.LBB1: # T
mov DWORD PTR [%ESP], 1
mov %EAX, 0
mov DWORD PTR [%ESP + 4], %EAX
call test
*** mov %EAX, DWORD PTR [%ESP + 12]
*** mov %EAX, DWORD PTR [%EAX]
add %ESP, 20
ret
.LBB2: # F
mov DWORD PTR [%ESP], 123
mov %EAX, 1
mov DWORD PTR [%ESP + 4], %EAX
call test
*** mov %EAX, DWORD PTR [%ESP + 12]
*** mov %EAX, DWORD PTR [%EAX]
add %ESP, 20
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13557 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-13 15:12:43 +00:00
Chris Lattner
cb2fd557ee
Substantially improve code generation for address exposed locals (aka fixed
...
sized allocas in the entry block). Instead of generating code like this:
entry:
reg1024 = ESP+1234
... (much later)
*reg1024 = 17
Generate code that looks like this:
entry:
(no code generated)
... (much later)
t = ESP+1234
*t = 17
The advantage being that we DRAMATICALLY reduce the register pressure for these
silly temporaries (they were all being spilled to the stack, resulting in very
silly code). This is actually a manual implementation of rematerialization :)
I have a patch to fold the alloca address computation into loads & stores, which
will make this much better still, but just getting this right took way too much time
and I'm sleepy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13554 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-13 07:40:27 +00:00
Chris Lattner
2b10b08ad6
Pass boolean constants into function calls more efficiently, generating:
...
mov DWORD PTR [%ESP + 4], 1
instead of:
mov %EAX, 1
mov DWORD PTR [%ESP + 4], %EAX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13494 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-12 16:35:04 +00:00
Chris Lattner
c81e6bae88
Fix a fairly serious pessimizaion that was preventing us from efficiently
...
compiling things like 'add long %X, 1'. The problem is that we were switching
the order of the operands for longs even though we can't fold them yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13451 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-10 15:15:55 +00:00
Chris Lattner
9984fd0df9
Fix some comments, avoid sign extending booleans when zero extend works fine
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13440 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-09 23:16:33 +00:00
Chris Lattner
96e3b426d5
Generate more efficient code for casting booleans to integers (no sign extension required)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13439 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-09 22:28:45 +00:00
Chris Lattner
e7a31c98db
Codegen floating point stores of constants into integer instructions. This
...
allows us to compile:
store float 10.0, float* %P
into:
mov DWORD PTR [%EAX], 1092616192
instead of:
.CPItest_0: # float 0x4024000000000000
.long 1092616192 # float 10
...
fld DWORD PTR [.CPItest_0]
fstp DWORD PTR [%EAX]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13409 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-07 21:18:15 +00:00
Chris Lattner
260195d2b1
Make comparisons against the null pointer as efficient as integer comparisons
...
against zero. In particular, don't emit:
mov %ESI, 0
cmp %ECX, %ESI
instead, emit:
test %ECX, %ECX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13407 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-07 19:55:55 +00:00
Chris Lattner
bbc130d110
Remove unneeded check
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13355 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-04 19:35:11 +00:00
Chris Lattner
c8af02c403
Improve signed division by power of 2 *dramatically* from this:
...
div:
mov %EDX, DWORD PTR [%ESP + 4]
mov %ECX, 64
mov %EAX, %EDX
sar %EDX, 31
idiv %ECX
ret
to this:
div:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
sar %ECX, 5
shr %ECX, 26
mov %EDX, %EAX
add %EDX, %ECX
sar %EAX, 6
ret
Note that the intel compiler is currently making this:
div:
movl 4(%esp), %edx #3.5
movl %edx, %eax #4.14
sarl $5, %eax #4.14
shrl $26, %eax #4.14
addl %edx, %eax #4.14
sarl $6, %eax #4.14
ret #4.14
Which has one less register->register copy. (hint hint alkis :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13354 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-04 19:33:58 +00:00
Chris Lattner
9eb9b8ecb9
Improve code generated for integer multiplications by 2,3,5,9
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13342 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-04 15:47:14 +00:00
Chris Lattner
77993632a1
Remove unused #include
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13304 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-01 21:29:16 +00:00
Chris Lattner
2268684f6f
Iterate over the Machine CFG that Brian added instead of the LLVM CFG.
...
Look at all of the pretty minuses. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13303 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-01 21:27:53 +00:00
Brian Gaeke
1afe7736ff
Make RequiresFPRegKill() take a MachineBasicBlock arg.
...
In InsertFPRegKills(), just check the MachineBasicBlock for successors
instead of its corresponding BasicBlock.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13213 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-28 04:45:55 +00:00
Brian Gaeke
235aa5eba7
In InsertFPRegKills(), use the machine-CFG itself rather than the
...
LLVM CFG when trying to find the successors of BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13212 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-28 04:34:16 +00:00
Brian Gaeke
ea9ca67304
Update the machine-CFG edges whenever we see a branch.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13211 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-28 04:19:37 +00:00
Brian Gaeke
b61fc83ecb
Use emitWordAt() to emit forward-branch fixups.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13120 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-23 17:11:16 +00:00
John Criswell
53b54be5fc
Remove code to adjust the iterator for llvm.readio and llvm.writeio.
...
The iterator is pointing at the next instruction which should not disappear
when doing the load/store replacement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12954 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-14 21:27:56 +00:00
Chris Lattner
098e945fbd
This is the real fix for Codegen/X86/2004-04-13-FPCMOV-Crash.llx which works
...
even when the "optimization" I added before is turned off. It generates this
extremely pointless code:
test:
fld QWORD PTR [%ESP + 4]
mov %AL, 0
test %AL, %AL
fcmove %ST(0), %ST(0)
ret
Good thing the optimizer will have removed this before code generation
anyway. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12939 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-14 02:42:32 +00:00
John Criswell
e5a4c15da6
Added support for the llvm.readio and llvm.writeio intrinsics.
...
On x86, memory operations occur in-order, so these are just lowered into
volatile loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12936 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 22:13:14 +00:00
Chris Lattner
82c5a9990f
Implement a small optimization, which papers over the problem in
...
X86/2004-04-13-FPCMOV-Crash.llx
A more robust fix is to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12935 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 21:56:09 +00:00
Chris Lattner
87e18deabc
Emit the immediate form of in/out when possible.
...
Fix several bugs in the intrinsics:
1. Make sure to copy the input registers before the instructions that use them
2. Make sure to copy the value returned by 'in' out of EAX into the register
it is supposed to be in.
This fixes assertions when using in/out and linear scan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12896 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 17:20:37 +00:00
Chris Lattner
440bbc257e
Add immediate forms of in/out. Use let to shorten lines
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12895 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 17:19:31 +00:00
Chris Lattner
e47f4ff9f6
Add support for new instruction type
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12894 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 17:18:51 +00:00
Chris Lattner
266538350a
Add support for the printImplicitDefsBefore flag
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12893 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 17:18:39 +00:00
Chris Lattner
133dbb1285
Fix issues that the local allocator has dealing with instructions that implicitly use ST(0)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12855 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 03:02:48 +00:00
Chris Lattner
284b496aae
No really, fix printing for LLC. I gotta get a way for CVS to whine at me if
...
I have unsaved emacs buffers, geeze...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12854 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 01:52:04 +00:00
Chris Lattner
2fc83a5ba6
Correct printing for LLC and the encoding for the JIT
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12853 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 01:50:04 +00:00
Chris Lattner
8d2822e7f1
Use the fucomi[p] instructions to perform floating point comparisons instead
...
of the fucom[p][p] instructions. This allows us to code generate this function
bool %test(double %X, double %Y) {
%C = setlt double %Y, %X
ret bool %C
}
... into:
test:
fld QWORD PTR [%ESP + 4]
fld QWORD PTR [%ESP + 12]
fucomip %ST(1)
fstp %ST(0)
setb %AL
movsx %EAX, %AL
ret
where before we generated:
test:
fld QWORD PTR [%ESP + 4]
fld QWORD PTR [%ESP + 12]
fucompp
** fnstsw
** sahf
setb %AL
movsx %EAX, %AL
ret
The two marked instructions (which are the ones eliminated) are very bad,
because they serialize execution of the processor. These instructions are
available on the PPRO and later, but since we already use cmov's we aren't
losing any portability.
I retained the old code for the day when we decide we want to support back
to the 386.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12852 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 01:43:36 +00:00
Chris Lattner
c040bca4b9
Add support for the FUCOMIr instruction
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12851 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 01:39:15 +00:00
Chris Lattner
a1b5e160ed
Add two new instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12850 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 01:38:55 +00:00
Chris Lattner
9938286325
Fix a bug in my load/cast folding patch.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12849 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 00:23:04 +00:00
Chris Lattner
13c07feb20
Adjust some comments, fix a bug in my previous patch
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12848 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 00:12:04 +00:00
Chris Lattner
feac3e18aa
On X86, casting an integer to floating point requires going through memory.
...
If the source of the cast is a load, we can just use the source memory location,
without having to create a temporary stack slot entry.
Before we code generated this:
double %int(int* %P) {
%V = load int* %P
%V2 = cast int %V to double
ret double %V2
}
into:
int:
sub %ESP, 4
mov %EAX, DWORD PTR [%ESP + 8]
mov %EAX, DWORD PTR [%EAX]
mov DWORD PTR [%ESP], %EAX
fild DWORD PTR [%ESP]
add %ESP, 4
ret
Now we produce this:
int:
mov %EAX, DWORD PTR [%ESP + 4]
fild DWORD PTR [%EAX]
ret
... which is nicer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12846 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 23:21:26 +00:00
Chris Lattner
95157f7638
Implement folding of loads into floating point operations. This implements:
...
test/Regression/CodeGen/X86/fp_load_fold.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12844 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 22:05:45 +00:00
Chris Lattner
6621ed94cc
Unify all of the code for floating point +,-,*,/ into one function
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12842 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 21:23:56 +00:00
Chris Lattner
8ebf1c35a1
This implements folding of constant operands into floating point operations
...
for mul and div.
Instead of generating this:
test_divr:
fld QWORD PTR [%ESP + 4]
fld QWORD PTR [.CPItest_divr_0]
fdivrp %ST(1)
ret
We now generate this:
test_divr:
fld QWORD PTR [%ESP + 4]
fdivr QWORD PTR [.CPItest_divr_0]
ret
This code desperately needs refactoring, which will come in the next
patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12841 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 21:09:14 +00:00
Chris Lattner
462fa82270
Restructure the mul/div/rem handling code to follow the pattern the other
...
instructions use. This doesn't change any functionality except that long
constant expressions of these operations will now magically start working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12840 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 20:56:28 +00:00
Chris Lattner
48b0c97e20
Codegen FP adds and subtracts with a constant more efficiently, generating:
...
fld QWORD PTR [%ESP + 4]
fadd QWORD PTR [.CPItest_add_0]
instead of:
fld QWORD PTR [%ESP + 4]
fld QWORD PTR [.CPItest_add_0]
faddp %ST(1)
I also intend to do this for mul & div, but it appears that I have to
refactor a bit of code before I can do so.
This is tested by: test/Regression/CodeGen/X86/fp_constant_op.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12839 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 20:26:20 +00:00
Chris Lattner
490e86fed5
Add some new instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12838 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 20:24:15 +00:00
Chris Lattner
4cf15e7a3b
Relax assertion to make this function work with a broader class of instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12836 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 20:21:06 +00:00
Chris Lattner
427aeb476f
Two changes:
...
1. If an incoming argument is dead, don't load it from the stack
2. Do not code gen noop copies at all (ie, cast int -> uint), not even to
a move. This should reduce register pressure for allocators that are
unable to coallesce away these copies in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12835 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 19:21:59 +00:00
Chris Lattner
85aa7097c2
Silence a spurious warning
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12815 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-10 18:32:01 +00:00
John Criswell
6d804f408a
Reversed the order of the llvm.writeport() operands so that the value
...
is listed first and the address is listed second.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12795 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-09 19:09:14 +00:00
John Criswell
aee0cf3fca
Changed assertions to error messages.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12787 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-09 15:10:15 +00:00
John Criswell
ca6ea0f137
Changes recommended by Chris:
...
InstSelectSimple.cpp:
Change the checks for proper I/O port address size into an exit() instead
of an assertion. Assertions aren't used in Release builds, and handling
this error should be graceful (not that this counts as graceful, but it's
more graceful).
Modified the generation of the IN/OUT instructions to have 0 arguments.
X86InstrInfo.td:
Added the OpSize attribute to the 16 bit IN and OUT instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12786 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-08 22:39:13 +00:00
John Criswell
4ffff9e2fa
Added the llvm.readport and llvm.writeport intrinsics for x86. These do
...
I/O port instructions on x86. The specific code sequence is tailored to
the parameters and return value of the intrinsic call.
Added the ability for implicit defintions to be printed in the Instruction
Printer.
Added the ability for RawFrm instruction to print implict uses and
defintions with correct comma output. This required adjustment to some
methods so that a leading comma would or would not be printed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12782 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-08 20:31:47 +00:00
Jakub Staszak
8ac0009979
file based off InstSelectSimple.cpp, slowly being replaced by generated code from the really simple X86 instruction selector tablegen backend
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12715 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 19:35:17 +00:00
Jakub Staszak
0a8fd30c1b
Tablgen files for really simple instruction selector
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12714 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 19:34:00 +00:00
Chris Lattner
7b92de1e7d
Fix PR313: [x86] JIT miscompiles unsigned short to floating point
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12711 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 19:29:36 +00:00
Chris Lattner
43ab3a8f45
Fix incorrect encoding of some ADC and SBB instuctions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12710 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 19:20:32 +00:00
Chris Lattner
48c937e5c9
Fix a minor bug in previous checking
...
Enable folding of long seteq/setne comparisons into branches and select instructions
Implement unfolded long relational comparisons against a constants a bit more efficiently
Folding comparisons changes code that looks like this:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, %EAX
or %ECX, %EDX
sete %CL
test %CL, %CL
je .LBB2 # PC rel: F
into code that looks like this:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, %EAX
or %ECX, %EDX
jne .LBB2 # PC rel: F
This speeds up 186.crafty by 6% with llc-ls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12702 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 17:34:50 +00:00
Chris Lattner
e80e637793
Improve codegen of long == and != comparisons against constants. Before,
...
comparing a long against zero got us this:
sub %ESP, 8
mov DWORD PTR [%ESP + 4], %ESI
mov DWORD PTR [%ESP], %EDI
mov %EAX, DWORD PTR [%ESP + 12]
mov %EDX, DWORD PTR [%ESP + 16]
mov %ECX, 0
mov %ESI, 0
mov %EDI, %EAX
xor %EDI, %ECX
mov %ECX, %EDX
xor %ECX, %ESI
or %EDI, %ECX
sete %CL
test %CL, %CL
je .LBB2 # PC rel: F
Now it gets us this:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, %EAX
or %ECX, %EDX
sete %CL
test %CL, %CL
je .LBB2 # PC rel: F
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12696 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 16:02:27 +00:00
Chris Lattner
6ab06d5d19
Handle various other important cases of multiplying a long constant immediate. For
...
example, multiplying X*(1 + (1LL << 32)) now produces:
test:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
mov %EAX, %ECX
add %EDX, %ECX
ret
[[[Note to Alkis: why isn't linear scan generating this code?? This might be a
problem with your intervals being too conservative:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
add %EDX, %EAX
ret
end note]]]
Whereas GCC produces this:
T:
sub %esp, 12
mov %edx, DWORD PTR [%esp+16]
mov DWORD PTR [%esp+8], %edi
mov %ecx, DWORD PTR [%esp+20]
xor %edi, %edi
mov DWORD PTR [%esp], %ebx
mov %ebx, %edi
mov %eax, %edx
mov DWORD PTR [%esp+4], %esi
add %ebx, %edx
mov %edi, DWORD PTR [%esp+8]
lea %edx, [%ecx+%ebx]
mov %esi, DWORD PTR [%esp+4]
mov %ebx, DWORD PTR [%esp]
add %esp, 12
ret
I'm not sure example what GCC is smoking here, but it looks like it has just
confused itself with a bunch of stack slots or something. The intel compiler
is better, but still not good:
T:
movl 4(%esp), %edx #2.11
movl 8(%esp), %eax #2.11
lea (%eax,%edx), %ecx #3.12
movl $1, %eax #3.12
mull %edx #3.12
addl %ecx, %edx #3.12
ret #3.12
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12693 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 04:55:43 +00:00
Chris Lattner
028adc422d
Efficiently handle a long multiplication by a constant. For this testcase:
...
long %test(long %X) {
%Y = mul long %X, 123
ret long %Y
}
we used to generate:
test:
sub %ESP, 12
mov DWORD PTR [%ESP + 8], %ESI
mov DWORD PTR [%ESP + 4], %EDI
mov DWORD PTR [%ESP], %EBX
mov %ECX, DWORD PTR [%ESP + 16]
mov %ESI, DWORD PTR [%ESP + 20]
mov %EDI, 123
mov %EBX, 0
mov %EAX, %ECX
mul %EDI
imul %ESI, %EDI
add %ESI, %EDX
imul %ECX, %EBX
add %ESI, %ECX
mov %EDX, %ESI
mov %EBX, DWORD PTR [%ESP]
mov %EDI, DWORD PTR [%ESP + 4]
mov %ESI, DWORD PTR [%ESP + 8]
add %ESP, 12
ret
Now we emit:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
mov %EDX, 123
mul %EDX
imul %ECX, %ECX, 123
add %ECX, %EDX
mov %EDX, %ECX
ret
Which, incidently, is substantially nicer than what GCC manages:
T:
sub %esp, 8
mov %eax, 123
mov DWORD PTR [%esp], %ebx
mov %ebx, DWORD PTR [%esp+16]
mov DWORD PTR [%esp+4], %esi
mov %esi, DWORD PTR [%esp+12]
imul %ecx, %ebx, 123
mov %ebx, DWORD PTR [%esp]
mul %esi
mov %esi, DWORD PTR [%esp+4]
add %esp, 8
lea %edx, [%ecx+%edx]
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12692 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 04:29:36 +00:00
Chris Lattner
722070e0ba
Improve code generation of long shifts by 32.
...
On this testcase:
long %test(long %X) {
%Y = shr long %X, ubyte 32
ret long %Y
}
instead of:
t:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
sar %EAX, 0
mov %EDX, 0
ret
we now emit:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
mov %EDX, 0
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12688 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 03:42:38 +00:00
Chris Lattner
0652167bea
Bugfixes: inc/dec don't set the carry flag!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12687 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 03:36:57 +00:00
Chris Lattner
92900a65a3
Improve code for passing constant longs as arguments to function calls.
...
For example, on this instruction:
call void %test(long 1234)
Instead of this:
mov %EAX, 1234
mov %ECX, 0
mov DWORD PTR [%ESP], %EAX
mov DWORD PTR [%ESP + 4], %ECX
call test
We now emit this:
mov DWORD PTR [%ESP], 1234
mov DWORD PTR [%ESP + 4], 0
call test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12686 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 03:23:00 +00:00
Chris Lattner
33f7fa317b
Emit more efficient 64-bit operations when the RHS is a constant, and one
...
of the words of the constant is zeros. For example:
Y = and long X, 1234
now generates:
Yl = and Xl, 1234
Yh = 0
instead of:
Yl = and Xl, 1234
Yh = and Xh, 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12685 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 03:15:53 +00:00
Chris Lattner
7ba92306db
Fix typeo
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12684 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 02:13:25 +00:00
Chris Lattner
ab1d0e0963
Add support for simple immediate handling to long instruction selection.
...
This allows us to handle code like 'add long %X, 123456789012' more efficiently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12683 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 02:11:49 +00:00
Chris Lattner
ee98389808
The sbb instructions really ARE sbb's, not adc's
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12682 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 02:02:11 +00:00
Chris Lattner
edd5e4957a
Implement negation of longs efficiently. For this testcase:
...
long %test(long %X) {
%Y = sub long 0, %X
ret long %Y
}
We used to generate:
test:
sub %ESP, 4
mov DWORD PTR [%ESP], %ESI
mov %ECX, DWORD PTR [%ESP + 8]
mov %ESI, DWORD PTR [%ESP + 12]
mov %EAX, 0
mov %EDX, 0
sub %EAX, %ECX
sbb %EDX, %ESI
mov %ESI, DWORD PTR [%ESP]
add %ESP, 4
ret
Now we generate:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
neg %EAX
adc %EDX, 0
neg %EDX
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12681 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 01:48:06 +00:00
Chris Lattner
502e36c3c9
Minor tweak to avoid an extra reg-reg copy that the register allocator has to eliminate
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12680 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 01:25:33 +00:00
Chris Lattner
29bf0623e5
Two changes:
...
* In promote32, if we can just promote a constant value, do so instead of
promoting a constant dynamically.
* In visitReturn inst, actually USE the promote32 argument that takes a
Value*
The end result of this is that we now generate this:
test:
mov %EAX, 0
ret
instead of...
test:
mov %AX, 0
movzx %EAX, %AX
ret
for:
ushort %test() {
ret ushort 0
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12679 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 01:21:00 +00:00
Chris Lattner
28977af72a
Support getelementptr instructions which use uint's to index into structure
...
types and can have arbitrary 32- and 64-bit integer types indexing into
sequential types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12653 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-05 01:30:19 +00:00
Alkis Evlogimenos
bee8a094af
Clean up code a bit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12615 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 18:11:32 +00:00
Alkis Evlogimenos
1a66731da8
Fix type in comments
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12611 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 16:02:50 +00:00
Alkis Evlogimenos
13ce339442
Fix type in instruction builder instantiation
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12610 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 15:51:03 +00:00
Alkis Evlogimenos
8b28b6d187
Add more ADC and SBB variants
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12607 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 07:11:10 +00:00
Chris Lattner
0526f01fec
Simplify code by using the more powerful BuildMI forms.
...
Implement a small optimization. In test/Regression/CodeGen/X86/select.ll,
we now generate this for foldSel3:
foldSel3:
mov %AL, BYTE PTR [%ESP + 4]
fld DWORD PTR [%ESP + 8]
fld DWORD PTR [%ESP + 12]
mov %EAX, DWORD PTR [%ESP + 16]
mov %ECX, DWORD PTR [%ESP + 20]
cmp %EAX, %ECX
fxch %ST(1)
fcmovae %ST(0), %ST(1)
*** fstp %ST(1)
ret
Instead of:
foldSel3:
mov %AL, BYTE PTR [%ESP + 4]
fld DWORD PTR [%ESP + 8]
fld DWORD PTR [%ESP + 12]
mov %EAX, DWORD PTR [%ESP + 16]
mov %ECX, DWORD PTR [%ESP + 20]
cmp %EAX, %ECX
fxch %ST(1)
fcmovae %ST(0), %ST(1)
*** fxch %ST(1)
*** fstp %ST(0)
ret
In practice, this only effects code size: performance should be basically
unaffected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12588 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-01 04:06:09 +00:00
Chris Lattner
f1ac50ec53
Wrap at 80 cols
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12587 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-01 04:03:27 +00:00
Chris Lattner
68626c2b30
Generate slightly smaller code, "test R, R" instead of "cmp R, 0"
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12579 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:22:36 +00:00
Chris Lattner
08bde1870a
The X86 backend no longer needs the select lowering pass.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12578 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:03:46 +00:00
Chris Lattner
352eb48f8e
Codegen FP select instructions into X86 conditional moves. Annoyingly enough
...
the X86 does not support a full set of fp cmove instructions, so we can't always
fold the condition into the select. :( Yuck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12577 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:03:35 +00:00
Chris Lattner
c1bab32bc5
Add support for floating point conditional move instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12576 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:02:36 +00:00
Chris Lattner
30b2f72e7c
Add support for FP cmoves
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12575 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:02:21 +00:00
Chris Lattner
1c54a85447
Add FP conditional move instructions, which annoyingly have special properties
...
that require the asmwriter to be extended (printing implicit uses before the
explicit operands)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12574 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:02:13 +00:00
Chris Lattner
307ecbaddb
Fold comparisons into select instructions, making much better code and
...
using our broad selection of movcc instructions. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12560 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 22:39:09 +00:00
Chris Lattner
87d3bb5dfa
Implement spill code folding for all of the conditional move instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12554 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 21:29:47 +00:00
Chris Lattner
12d96a0b4d
Add direct support for integer select instructions, though we still don't support
...
folding compares into the select yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12553 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 21:22:00 +00:00
Chris Lattner
a5cdab7101
Fix some serious bugs in the cmov descriptions, which didn't cause a problem because
...
we never generated them
Make indentation a bit more consistent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12549 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 20:18:02 +00:00
Chris Lattner
6f2ab04e91
Fix a fairly major performance problem. If a PHI node had a constant as
...
an incoming value from a block, the selector would evaluate the constant
at the TOP of the block instead of at the end of the block. This made the
live range for the constant span the entire block, increasing register
pressure needlessly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12542 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 19:10:12 +00:00
Chris Lattner
5abd61f6d9
Add the select lowering pass to get initial support for select instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12541 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 18:41:59 +00:00
Chris Lattner
ab18020cbd
Malloc doesn't kill a load. This patch need not go into 1.2 though.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12500 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-18 17:01:26 +00:00
Chris Lattner
85c84e759e
Fix a really nasty bug that was breaking ijpeg in LLC mode. We were incorrectly
...
folding load instructions into other instructions across free instruction
boundaries. Perhaps this will also fix the other strange failures?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12494 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-18 06:29:54 +00:00
Alkis Evlogimenos
63dd4ff809
Add LAHF instruction
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12424 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-15 17:20:14 +00:00
Alkis Evlogimenos
a1a7148c4d
Another API change to MRegisterInfo::foldMemoryOperand. Instead of a
...
MachineBasicBlock::iterator take a MachineInstr*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12392 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-14 20:14:27 +00:00
Alkis Evlogimenos
39354c99a1
Change MRegisterInfo::foldMemoryOperand to return the folded
...
instruction to make the API more flexible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12386 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-14 07:19:51 +00:00
Chris Lattner
5634b9f5e7
It helps if I save the file. :)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12357 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-13 00:24:52 +00:00
Chris Lattner
317201d773
Rename the intrinsic enum values for llvm.va_* from Intrinsic::va_* to
...
Intrinsic::va*. This avoid conflicting with macros in the stdlib.h file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12356 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-13 00:24:00 +00:00
Alkis Evlogimenos
a3f66842b2
Add support for a wider range of CMOV instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12336 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-12 17:59:56 +00:00
Misha Brukman
db760d00c3
Fix compilation on Sparc: assert(0) => abort()
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12289 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-11 19:08:24 +00:00
Alkis Evlogimenos
519f4e76b7
Check if printing of implicit uses is required for all types of shift
...
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12258 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-09 06:10:15 +00:00
Alkis Evlogimenos
cc2a2a530f
Differentiate between extended precision floats (80-bit) and double precision floats (64-bit)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12254 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-09 03:37:54 +00:00
Alkis Evlogimenos
0309066f6c
Use newly added API to emit bytes for instructions that gas misassembles
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12253 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-09 03:35:34 +00:00
Alkis Evlogimenos
39c2005b70
Add emitInstruction() API so that we can get the bytes of a simple instruction
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12252 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-09 03:34:53 +00:00
Alkis Evlogimenos
f6e8156008
Constify things a bit
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12251 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-09 03:30:12 +00:00
Chris Lattner
7dee5daf85
Implement folding explicit load instructions into binary operations. For a
...
testcase like this:
int %test(int* %P, int %A) {
%Pv = load int* %P
%B = add int %A, %Pv
ret int %B
}
We now generate:
test:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
add %EAX, DWORD PTR [%ECX]
ret
Instead of:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
mov %EAX, DWORD PTR [%EAX]
add %EAX, %ECX
ret
... saving one instruction, and often a register. Note that there are a lot
of other instructions that could use this, but they aren't handled. I'm not
really interested in adding them, but mul/div and all of the FP instructions
could be supported as well if someone wanted to add them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12204 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-08 01:58:35 +00:00
Chris Lattner
721d2d4a6e
Rearrange and refactor some code. No functionality changes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12203 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-08 01:18:36 +00:00
Alkis Evlogimenos
13d362f310
Add memory operand version of conditional move.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12190 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-07 03:19:11 +00:00
Brian Gaeke
323819e4e1
make -print-machineinstrs work for both SparcV9 and X86
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12122 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 19:16:23 +00:00
Alkis Evlogimenos
ce1e500e2f
Add assertion for scale verification.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12120 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 18:05:02 +00:00
Misha Brukman
538607fe45
Doxygenify some comments.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12064 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 23:53:11 +00:00
Brian Gaeke
05b15fb075
TargetCacheInfo has been removed; its only uses were to propagate a constant
...
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12043 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 06:43:29 +00:00
Chris Lattner
21585221b6
Handle passing constant integers to functions much more efficiently. Instead
...
of generating this code:
mov %EAX, 4
mov DWORD PTR [%ESP], %EAX
mov %AX, 123
movsx %EAX, %AX
mov DWORD PTR [%ESP + 4], %EAX
call Y
we now generate:
mov DWORD PTR [%ESP], 4
mov DWORD PTR [%ESP + 4], 123
call Y
Which hurts the eyes less. :)
Considering that register pressure around call sites is already high (with all
of the callee clobber registers n stuff), this may help a lot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12028 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 02:42:43 +00:00
Chris Lattner
ce6096f49b
Fix a minor code-quality issue. When passing 8 and 16-bit integer constants
...
to function calls, we would emit dead code, like this:
int Y(int, short, double);
int X() {
Y(4, 123, 4);
}
--- Old
X:
sub %ESP, 20
mov %EAX, 4
mov DWORD PTR [%ESP], %EAX
*** mov %AX, 123
mov %AX, 123
movsx %EAX, %AX
mov DWORD PTR [%ESP + 4], %EAX
fld QWORD PTR [.CPIX_0]
fstp QWORD PTR [%ESP + 8]
call Y
mov %EAX, 0
# IMPLICIT_USE %EAX %ESP
add %ESP, 20
ret
Now we emit:
X:
sub %ESP, 20
mov %EAX, 4
mov DWORD PTR [%ESP], %EAX
mov %AX, 123
movsx %EAX, %AX
mov DWORD PTR [%ESP + 4], %EAX
fld QWORD PTR [.CPIX_0]
fstp QWORD PTR [%ESP + 8]
call Y
mov %EAX, 0
# IMPLICIT_USE %EAX %ESP
add %ESP, 20
ret
Next up, eliminate the mov AX and movsx entirely!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12026 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 02:34:08 +00:00
Alkis Evlogimenos
96c9b8b496
Add instruction name description.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11998 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 18:44:03 +00:00
Alkis Evlogimenos
7f6124cfc2
Use correct template for SHLD and SHRD instructions so that the memory
...
operand size is correctly specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11997 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 09:19:40 +00:00
Alkis Evlogimenos
9c22aeb0b2
Improve allocation order:
...
1) For 8-bit registers try to use first the ones that are parts of the
same register (AL then AH). This way we only alias 2 16/32-bit
registers after allocating 4 8-bit variables.
2) Move EBX as the last register to allocate. This will cause less
spills to happen since we will have 8-bit registers available up to
register excaustion (assuming we use the allocation order). It
would be nice if we could push all of the 8-bit aliased registers
towards the end but we much prefer to keep callee saved register to
the end to avoid saving them on entry and exit of the function.
For example this gives a slight reduction of spills with linear scan
on 164.gzip.
Before:
11221 asm-printer - Number of machine instrs printed
975 spiller - Number of loads added
675 spiller - Number of stores added
398 spiller - Number of register spills
After:
11182 asm-printer - Number of machine instrs printed
952 spiller - Number of loads added
652 spiller - Number of stores added
386 spiller - Number of register spills
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11996 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 09:17:01 +00:00
Alkis Evlogimenos
8295f202d9
A big X86 instruction rename. The instructions are renamed to make
...
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:
ADD8rr -> add, 8-bit register, 8-bit register
IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate
IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate
MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11995 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 08:50:03 +00:00
Chris Lattner
ee352852e7
Eliminate the X86-specific BMI functions, using BuildMI instead.
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Replace uses of addZImm with addImm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11992 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 07:22:16 +00:00
Chris Lattner
168aa90bf6
Fix a miscompilation of 197.parser that occurs when you have single basic
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block loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11990 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 07:10:16 +00:00
Chris Lattner
dce363d5ec
Adjust to change in TII ctor arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11987 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 06:31:44 +00:00
Chris Lattner
1ddf475b6a
These two virtual methods are never called.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11984 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 05:59:33 +00:00
Alkis Evlogimenos
8777d241cf
Use correct template for ADC instruction with memory operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11974 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 02:18:17 +00:00
Alkis Evlogimenos
da474adb21
SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them
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to denote this fact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11972 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 23:46:44 +00:00
Alkis Evlogimenos
8e475b8cfd
Floating point loads/stores act on memory operands. Rename them to
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denote this fact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11971 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 23:42:35 +00:00
Alkis Evlogimenos
91c4b52e7f
Rename instruction templates to be easier to the human eye to
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parse. The name is now I (operand size)*. For example:
Im32 -> instruction with 32-bit memory operands.
Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11970 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 23:09:03 +00:00
Alkis Evlogimenos
f8da4d8839
Uncomment instructions that take both an immediate and a memory
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operand but their sizes differ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11969 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 22:06:59 +00:00
Alkis Evlogimenos
5ab29b504d
Each instruction now has both an ImmType and a MemType. This describes
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the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11967 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 22:02:05 +00:00
Alkis Evlogimenos
745502a04b
Do not generate instructions with mismatched memory/immediate sized
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operands. The X86 backend doesn't handle them properly right now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11944 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 06:01:43 +00:00
Alkis Evlogimenos
84cda0f470
Further comment updates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11933 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 03:20:31 +00:00
Alkis Evlogimenos
a643a1a528
Update comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11932 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 03:12:31 +00:00
Alkis Evlogimenos
2eae379388
My previous commit broke the jit. The shift instructions always take
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an 8-bit immediate. So mark the shifts that take immediates as taking
an 8-bit argument. The rest with the implicit use of CL are marked
appropriately.
A bug still exists:
def SHLDmri32 : I2A8 <"shld", 0xA4, MRMDestMem>, TB; // [mem32] <<= [mem32],R32 imm8
The immediate in the above instruction is 8-bit but the memory
reference is 32-bit. The printer prints this as an 8-bit reference
which confuses the assembler. Same with SHRDmri32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11931 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 02:56:26 +00:00
Alkis Evlogimenos
fa5229691f
Fix argument size for SHL, SHR, SAR, SHLD and SHRD families of
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instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11923 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-27 19:46:30 +00:00
Alkis Evlogimenos
f9186e38d5
Fix encoding of ADD and SUB family of instructions. Also rearrange
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them so that they are consistent with AND, XOR, etc...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11922 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-27 18:57:00 +00:00
Alkis Evlogimenos
169584ed45
Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11921 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-27 18:55:12 +00:00
Alkis Evlogimenos
08388a4787
Add memory operand folding support for the SETcc family of
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instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11907 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-27 16:13:37 +00:00
Alkis Evlogimenos
e56508eb7e
Add memory operand folding support for SHLD and SHRD instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11905 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-27 15:03:18 +00:00
Alkis Evlogimenos
58ec60589b
Add memory operand folding support for SHL, SHR and SAR, SHLD instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11903 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-27 09:28:43 +00:00
Alkis Evlogimenos
e35ba65b02
Rename SHL, SHR, SAR, SHLD and SHLR instructions to make them
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consistent with the rest and also pepare for the addition of their
memory operand variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11902 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-27 06:57:05 +00:00
Alkis Evlogimenos
71e353ed35
Uncomment assertions that register# != 0 on calls to
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MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11882 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-26 22:00:20 +00:00
Chris Lattner
8dd8d261a4
Fix some warnings, some of which were spurious, and some of which were real
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bugs. Thanks Brian!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11859 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-26 01:20:02 +00:00
Chris Lattner
87124425d0
Fix failures in 099.go due to the cfgsimplify pass creating switch instructions
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where there did not used to be any before
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11829 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 19:30:19 +00:00
Chris Lattner
5f2c7b1975
Teach the instruction selector how to transform 'array' GEP computations into X86
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scaled indexes. This allows us to compile GEP's like this:
int* %test([10 x { int, { int } }]* %X, int %Idx) {
%Idx = cast int %Idx to long
%X = getelementptr [10 x { int, { int } }]* %X, long 0, long %Idx, ubyte 1, ubyte 0
ret int* %X
}
Into a single address computation:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
lea %EAX, DWORD PTR [%EAX + 8*%ECX + 4]
ret
Before it generated:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
shl %ECX, 3
add %EAX, %ECX
lea %EAX, DWORD PTR [%EAX + 4]
ret
This is useful for things like int/float/double arrays, as the indexing can be folded into
the loads&stores, reducing register pressure and decreasing the pressure on the decode unit.
With these changes, I expect our performance on 256.bzip2 and gzip to improve a lot. On
bzip2 for example, we go from this:
10665 asm-printer - Number of machine instrs printed
40 ra-local - Number of loads/stores folded into instructions
1708 ra-local - Number of loads added
1532 ra-local - Number of stores added
1354 twoaddressinstruction - Number of instructions added
1354 twoaddressinstruction - Number of two-address instructions
2794 x86-peephole - Number of peephole optimization performed
to this:
9873 asm-printer - Number of machine instrs printed
41 ra-local - Number of loads/stores folded into instructions
1710 ra-local - Number of loads added
1521 ra-local - Number of stores added
789 twoaddressinstruction - Number of instructions added
789 twoaddressinstruction - Number of two-address instructions
2142 x86-peephole - Number of peephole optimization performed
... and these types of instructions are often in tight loops.
Linear scan is also helped, but not as much. It goes from:
8787 asm-printer - Number of machine instrs printed
2389 liveintervals - Number of identity moves eliminated after coalescing
2288 liveintervals - Number of interval joins performed
3522 liveintervals - Number of intervals after coalescing
5810 liveintervals - Number of original intervals
700 spiller - Number of loads added
487 spiller - Number of stores added
303 spiller - Number of register spills
1354 twoaddressinstruction - Number of instructions added
1354 twoaddressinstruction - Number of two-address instructions
363 x86-peephole - Number of peephole optimization performed
to:
7982 asm-printer - Number of machine instrs printed
1759 liveintervals - Number of identity moves eliminated after coalescing
1658 liveintervals - Number of interval joins performed
3282 liveintervals - Number of intervals after coalescing
4940 liveintervals - Number of original intervals
635 spiller - Number of loads added
452 spiller - Number of stores added
288 spiller - Number of register spills
789 twoaddressinstruction - Number of instructions added
789 twoaddressinstruction - Number of two-address instructions
258 x86-peephole - Number of peephole optimization performed
Though I'm not complaining about the drop in the number of intervals. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11820 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 07:00:55 +00:00
Chris Lattner
b6bac51351
* Make the previous patch more efficient by not allocating a temporary MachineInstr
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to do analysis.
*** FOLD getelementptr instructions into loads and stores when possible,
making use of some of the crazy X86 addressing modes.
For example, the following C++ program fragment:
struct complex {
double re, im;
complex(double r, double i) : re(r), im(i) {}
};
inline complex operator+(const complex& a, const complex& b) {
return complex(a.re+b.re, a.im+b.im);
}
complex addone(const complex& arg) {
return arg + complex(1,0);
}
Used to be compiled to:
_Z6addoneRK7complex:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
*** mov %EDX, %ECX
fld QWORD PTR [%EDX]
fld1
faddp %ST(1)
*** add %ECX, 8
fld QWORD PTR [%ECX]
fldz
faddp %ST(1)
*** mov %ECX, %EAX
fxch %ST(1)
fstp QWORD PTR [%ECX]
*** add %EAX, 8
fstp QWORD PTR [%EAX]
ret
Now it is compiled to:
_Z6addoneRK7complex:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
fld QWORD PTR [%ECX]
fld1
faddp %ST(1)
fld QWORD PTR [%ECX + 8]
fldz
faddp %ST(1)
fxch %ST(1)
fstp QWORD PTR [%EAX]
fstp QWORD PTR [%EAX + 8]
ret
Other programs should see similar improvements, across the board. Note that
in addition to reducing instruction count, this also reduces register pressure
a lot, always a good thing on X86. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11819 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 06:13:04 +00:00
Chris Lattner
2e68037187
Add a helper to create an addressing mode given all of the pieces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11818 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 06:01:07 +00:00
Chris Lattner
985fe3df6f
add an inefficient way of folding structure and constant array indexes together
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into a single LEA instruction. This should improve the code generated for
things like X->A.B.C[12].D.
The bigger benefit is still coming though. Note that this uses an LEA instruction
instead of an add, giving the register allocator more freedom. We should probably
never generate ADDri32's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11817 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 03:45:50 +00:00
Chris Lattner
5a83096d6a
Implement special case for storing an immediate into memory so that we don't need
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an intermediate register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11816 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 02:56:58 +00:00
Alkis Evlogimenos
743d0a1f83
Refactor rewinding code for finding the first terminator of a basic
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block into MachineBasicBlock::getFirstTerminator().
This also fixes a bug in the implementation of the above in both
RegAllocLocal and InstrSched, where instructions where added after the
terminator if the basic block's only instruction was a terminator (it
shouldn't matter for RegAllocLocal since this case never occurs in
practice).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11748 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 18:14:48 +00:00
Chris Lattner
fbc39d5045
Simplify code a bit, don't go off the end of the block, now that the current
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block we are in might be empty
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11744 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 07:42:19 +00:00
Chris Lattner
65cf42d32f
We were forgetting to add FP_REG_KILL instructions to basic blocks which will
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eventually get an assignment due to elimination of PHIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11743 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 07:29:45 +00:00
Chris Lattner
f7b42259e9
Work around a gas bug. Print '-9223372036854775808' as unsigned.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11729 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 03:27:05 +00:00
Chris Lattner
311ca2e51f
Implement cast fp -> bool
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11728 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 03:21:41 +00:00
Chris Lattner
baa58a5691
Stop passing iterators around by reference now that we have ilists!
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Implement cast Type::ULongTy -> double
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11726 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 03:10:10 +00:00
Chris Lattner
2d0a82570a
Add a new cmove instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11722 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 01:16:05 +00:00
Chris Lattner
986618ebc7
Only insert FP_REG_KILL instructions in MachineBasicBlocks that actually
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use FP instructions. This reduces the number of instructions inserted in
176.gcc (for example) from 58074 to 101 (it doesn't use much FP, which
is typical). This reduction speeds up the entire code generator. In the
case of 176.gcc, llc went from taking 31.38s to 24.78s. The passes that
sped up the most are the register allocator and the 2 live variable analysis
passes, which sped up 2.3, 1.3, and 1.5s respectively. The asmprinter
pass also sped up because it doesn't print the instructions in comments :)
Note that this patch is likely to expose latent bugs in machine code passes,
because now basicblock can be empty, where they were never empty before. I
cleaned out regalloclocal, but who knows about linscan :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11717 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 19:47:26 +00:00
Alkis Evlogimenos
890f92328d
Move MOTy::UseType enum into MachineOperand. This eliminates the
...
switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11715 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 19:23:26 +00:00
Chris Lattner
7ca04097ad
Reduce the number of pointless copies inserted due to constant pointer refs.
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Also, make an assertion actually fireable!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11713 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 17:35:42 +00:00
Chris Lattner
827832c705
Fix bug in previous checkout: leave the iterator at the first instruction
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AFTER the GEP that was emitted. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11712 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 17:05:38 +00:00
Chris Lattner
3f1e8e7ceb
Completely rewrite how getelementptr instructions are expanded. This has two
...
(minor) benefits right now:
1. An extra dummy MOVrr32 is gone. This move would often be coallesced by
both allocators anyway.
2. The code now uses the gep_type_iterator to walk the gep, which should future
proof it a bit. It still assumes that array indexes are Longs though.
These don't really justify rewriting the code. The big benefit will come later
though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11710 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 07:04:00 +00:00
Alkis Evlogimenos
f216421181
When folding memory operands in machine instructions be careful to
...
leave register operands with the same use/def flags as the original
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11709 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 06:54:26 +00:00
Chris Lattner
14c6ef7ca1
Wow this is out of date. When we have _real_ code generator documentation,
...
this should be folded into it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11705 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 05:53:54 +00:00
Chris Lattner
6d2fdcfb8a
The two address pass cannot handle two addr instructions where one incoming
...
value is a physreg and one is a virtreg. For this reason, disable copy folding
entirely for physregs. Also, use the new isMoveInstr target hook which gives us
folding of FP moves as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11700 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 04:44:58 +00:00
Alkis Evlogimenos
e9118f3694
Fix argument size for MOVSX and MOVZX instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11576 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-18 16:20:40 +00:00
Chris Lattner
cc0d2f586f
Add support for GlobalAddress's for alkis
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11560 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 18:23:55 +00:00
Alkis Evlogimenos
9b9b7fc28d
These store to memory too.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11558 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 17:53:48 +00:00
Chris Lattner
acce13e4cc
These store to memory, not read from it.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11556 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 17:46:50 +00:00
Alkis Evlogimenos
d886ed99fb
Instructiosn with 1 memory operand have 4 operands in our
...
representation.. duh!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11554 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:58:13 +00:00
Alkis Evlogimenos
f41dadafae
Align case statements.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11552 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:50:41 +00:00
Alkis Evlogimenos
14ffe75c9c
Add TEST and XCHG memory operand support.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11550 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:48:42 +00:00
Alkis Evlogimenos
68bff8e15d
Add OR and XOR memory operand support.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11549 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:33:14 +00:00
Alkis Evlogimenos
e287a00440
Peephole optimize SUBmi{16,32} into SUBmi{16,32}b when immediate is 8
...
bits wide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11548 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:14:29 +00:00
Alkis Evlogimenos
cacca82833
ADDmi{16,32} should be in the next case statement.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11547 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:10:11 +00:00
Alkis Evlogimenos
a7be982e72
Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT,
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MOVSX, and MOVZX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11546 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 09:14:23 +00:00
Alkis Evlogimenos
89b0214b76
Add memory operand folding for CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32}
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and DECm{8,16,32} instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11545 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:49:20 +00:00
Alkis Evlogimenos
509d6d65b5
Add CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} and DECm{8,16,32} instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11544 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:49:00 +00:00
Alkis Evlogimenos
503770cfc3
Add SUB{rm,mr,mi}{8,16,32} instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11543 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:17:40 +00:00
Alkis Evlogimenos
18bd7bb4d4
Add support for folding memory operands for ADC, SBB and SUB instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11541 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:08:51 +00:00
Alkis Evlogimenos
69da6dba79
Add support for ADC{rm.mr}32 and SBB{rm,mr}32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11540 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:06:31 +00:00
Chris Lattner
ee0919bb10
Add a (hidden) option to print instructions that fail to fuse. It's looking
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like compares and test's would be the next huge win...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11539 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:03:47 +00:00
Alkis Evlogimenos
17dc674c13
Add support for folding memory operands in MOVri{8,16,32} instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11538 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 07:47:20 +00:00
Chris Lattner
5b67252620
Expand the repertoire of the forms we can print and encode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11537 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 07:40:44 +00:00
Chris Lattner
651fd55d5f
Disable this peephole for now. We can't keep track of the fact that the immediate is 8 bits,
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but the memory reference is full sized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11536 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 07:36:32 +00:00
Chris Lattner
a7660be6c2
Add an option to disable spill fusing in the X86 backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11531 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 06:30:34 +00:00
Chris Lattner
e87331d11d
Fix the mneumonics for the mov instructions to have the source and destination
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order in the correct sense!! Arg!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11530 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 06:28:19 +00:00
Chris Lattner
7ddc3fbd22
Fix the last crimes against nature that used the 'ir' ordering to use the
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'ri' ordering instead... no it's not possible to store a register into an
immediate!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11529 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 06:24:02 +00:00
Chris Lattner
f120ebbf8a
GRRR. Move instructions have swapped the order of the r/m operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11528 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 06:20:20 +00:00
Chris Lattner
6e173a0d9c
Rename MOVi[mr] instructions to MOV[rm]i
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11527 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 06:16:44 +00:00
Chris Lattner
90c38c8141
Whoops, got my cases swapped.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11526 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 06:02:15 +00:00
Chris Lattner
5a051f65d3
Change to match the newer, simpler, interface
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11525 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 05:54:57 +00:00
Chris Lattner
0f9c491abc
Add support for folding memory operands into AND and IMUL's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11523 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 05:46:06 +00:00
Chris Lattner
7c035b73a4
Scrunchify code, by adding helpers. No functionality changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11522 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 05:35:13 +00:00
Chris Lattner
4ff7876c64
Add mem forms of AND instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11521 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 05:25:50 +00:00
Alkis Evlogimenos
b499866c05
Add API to check and fold memory operands into instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11519 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 04:33:18 +00:00
Chris Lattner
55b5481255
Rename the IMULri* instructions to IMULrri, as they are actually three address
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instructions. Add forms of these instructions that read from memory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11518 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 04:26:43 +00:00
Alkis Evlogimenos
31bbb5190b
Add peephole optimizations for ADD [MEM], IMM8 instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11511 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-16 23:50:18 +00:00
Alkis Evlogimenos
7271e0e107
Add two more variants of add. Update comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11510 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-16 23:48:42 +00:00
Chris Lattner
e0f636a068
Add some ADD instructions that take memory operands for Alkis
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11502 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-16 18:19:31 +00:00
Alkis Evlogimenos
859a18b583
Make dense maps keyed on physical registers smallerusing
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MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.
Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11477 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-15 21:37:17 +00:00
Chris Lattner
0e5b79c174
Implement llvm.(frame|return)address(0) correctly. They are used by the LLVM JIT, among other
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applications
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11459 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-15 01:04:03 +00:00
Alkis Evlogimenos
b929bca027
Fix problem in DEBUG code. I could be pointing past the end and
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dereferencing it causes an assertion error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11458 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-15 00:46:41 +00:00
Chris Lattner
96c3d2e2e7
Fix the 'have a framepointer' case, so that the frame pointer always points
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to the old saved EBP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11455 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-15 00:15:37 +00:00
Alkis Evlogimenos
c81efdc59c
Add back machine code deleter pass until we get a MachineCode pass
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that will be responsible for the creation of MachineFunctions and will
be required by all MachineFunctionPass passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11453 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-15 00:03:15 +00:00
Chris Lattner
3193556387
Add support for the 'pop' instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11451 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-14 21:06:02 +00:00
Chris Lattner
e9dd84ea8a
There is no reason to align the stack pointer if there are no callees of this
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function!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11450 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-14 20:11:07 +00:00
Chris Lattner
bb07ef97cf
The prologue/epilogue related method calls have no reason to return a value,
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make them return void.
This allows us to avoid some costly MBB.size() calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11448 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-14 19:49:54 +00:00
Chris Lattner
300d0eda6f
finegrainify namespacification, fix 80col prob
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11445 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-14 06:00:36 +00:00
Chris Lattner
9f87a6ce6f
Urg, right. These need an input value...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11443 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-14 04:47:23 +00:00
Chris Lattner
2a0f224ce9
Codegen llvm.memset into rep stos[bwd]. Simplify code for llvm.memcpy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11442 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-14 04:46:05 +00:00
Chris Lattner
b89abef577
add 'rep stos[bwd]' instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11441 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-14 04:45:37 +00:00
Alkis Evlogimenos
f81af21caf
Use newly added next() and prior() utility functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11430 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-14 01:18:34 +00:00
Chris Lattner
0712283e43
There is no need to emit a shift if the size is constant, which is common
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11420 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-13 23:36:47 +00:00
Alkis Evlogimenos
be766c7246
Remove getAllocatedRegNum(). Use getReg() instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11393 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-13 21:01:20 +00:00
Chris Lattner
915e5e56d7
Add support for the rep movs[bwd] instructions, and emit them when code
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generating the llvm.memcpy intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11351 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-12 17:53:22 +00:00
Alkis Evlogimenos
024126ee23
Change interface so that we can add to the end of a basic block
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without getting an assertion from ilist that we are dereferencing
ilist<T>::end().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11345 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-12 08:11:04 +00:00
Alkis Evlogimenos
c0b9dc5be7
Change MachineBasicBlock's vector of MachineInstr pointers into an
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ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-12 02:27:10 +00:00
Chris Lattner
b009c0088c
s/getOpCode/getOpcode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11332 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-11 19:26:28 +00:00
Chris Lattner
61b08f193a
Add #include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11285 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-10 21:18:55 +00:00
Chris Lattner
c31ecb9aae
Remove uses of MachineOperand::isVirtualRegister
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11281 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-10 20:55:47 +00:00
Chris Lattner
6d21518718
Don't use MachineOperator::is(Phys|Virt)Register
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11276 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-10 20:31:28 +00:00
Chris Lattner
0bbf3052c2
Tighten up checks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11274 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-10 20:25:13 +00:00
Chris Lattner
d21cd809b6
Adjust to the changed StructType interface. In particular, getElementTypes() is gone.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11228 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-09 04:37:31 +00:00
Chris Lattner
f6f263ce8c
Add a new (hidden) option that is useful for profiling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11218 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-09 01:47:10 +00:00
Alkis Evlogimenos
14be64018f
Modify the two address instruction pass to remove the duplicate
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operand of the instruction and thus simplify the register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11124 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-04 22:17:40 +00:00
Brian Gaeke
74ceb298fe
Take away the default iostream argument of createMachineFunctionPrinterPass(),
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at Chris's request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11120 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-04 21:41:01 +00:00
Alkis Evlogimenos
f0339396c1
IMULri* instructions do not require their first two registers operands
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to be the same (IOW they are not two address instructions).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11117 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-04 17:21:04 +00:00
Chris Lattner
9f08a92e6c
Generate ftst instructions for comparison against zero
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11098 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-03 18:54:04 +00:00
Chris Lattner
3b904eb351
Add the ftst instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11095 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-03 07:27:50 +00:00
Chris Lattner
b97046ae4f
Add support for one argument OneArgFP instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11094 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-03 07:27:34 +00:00
Chris Lattner
1580193020
No need to declare implicit uses/defs of ST0
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11081 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-02 19:57:45 +00:00
Chris Lattner
9f8fd6d9ea
Generate the fchs instruction to negate a floating point number
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11078 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-02 19:31:38 +00:00
Chris Lattner
4a06f35484
Add support for OneArgFPRW instructions, fix a couple of typeos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11077 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-02 19:23:15 +00:00
Chris Lattner
af70362e40
Codegen -0.0 correctly. Do not use fldz! This is another -0.0 == +0.0 problem, arg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11070 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-02 18:56:30 +00:00
Alkis Evlogimenos
a1b6f95f78
FpMOV is also a move instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11055 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-01 08:22:16 +00:00
Chris Lattner
847df25e7d
Add some comments sketching out how this is to work eventually.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11026 91177308-0d34-0410-b5e6-96231b3b80d8
2004-01-30 22:25:18 +00:00
Chris Lattner
79b13735ad
Add a new flag, which is only used for symmetry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11025 91177308-0d34-0410-b5e6-96231b3b80d8
2004-01-30 22:24:18 +00:00
Chris Lattner
cf93cdde56
Add (currently disabled) support to the instruction selector to only insert
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FP_REG_KILL instructions at the end of blocks involved with critical edges.
Fix a bug where FP_REG_KILL instructions weren't inserted in fall through
unconditional branches. Perhaps this will fix some linscan problems?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11019 91177308-0d34-0410-b5e6-96231b3b80d8
2004-01-30 22:13:44 +00:00
Chris Lattner
aa06d0439e
Eliminate the isStringCompatible function, using ConstantArray::isString.
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It's not clear why the code was looking for signed chars < 0, but it can't
matter to the assembler anyway, so the check goes away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10853 91177308-0d34-0410-b5e6-96231b3b80d8
2004-01-14 17:14:42 +00:00
Alkis Evlogimenos
f998a7e671
Output mov %REG = 0 instead of xor %REG, %REG, %REG to clear a
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register so that LiveVariable analysis is not confused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10773 91177308-0d34-0410-b5e6-96231b3b80d8
2004-01-12 07:22:45 +00:00
Chris Lattner
f70e0c216c
Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering
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implementation from the TargetMachine directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10636 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-28 21:23:38 +00:00
Alkis Evlogimenos
5e30002af7
Add TargetInstrInfo::isMoveInstr() to support coalescing in register
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allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10633 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-28 17:35:08 +00:00
Chris Lattner
aed386e6b0
Whoops, don't try to lower non intrinsic calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10632 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-28 09:53:23 +00:00
Chris Lattner
4482715f3d
implement support for the intrinsic lowering functionality
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10629 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-28 09:47:19 +00:00
Alkis Evlogimenos
0ef76cadbb
Move FP_REG_KILL closer to the return instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10567 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-21 16:47:43 +00:00
Alkis Evlogimenos
9abc81790e
Move FP_REG_KILL closer to the actual branch instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10563 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-20 17:28:15 +00:00
Alkis Evlogimenos
e0bb3e766d
Remove floating point killer pass. This is now implemented in the
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instruction selector by adding a new pseudo-instruction
FP_REG_KILL. This instruction implicitly defines all x86 fp registers
and is a terminator so that passes which add machine code at the end
of basic blocks (like phi elimination) do not add instructions between
it and the branch or return instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10562 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-20 16:22:59 +00:00
Chris Lattner
655239cc6b
Finally, _actually delete the machine code_ for a function, after it has
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been emitted. Also, since the FPK pass is causing memory access violations,
disable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10559 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-20 10:20:19 +00:00
Chris Lattner
9068574a29
Fix memory leak in the stackifier, due to the machinebasicblocks not holding
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instructions on an ilist
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10556 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-20 10:12:17 +00:00
Chris Lattner
f2e49d4c1a
Finegrainify namespacification
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Minor cleanups to killer pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10555 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-20 09:58:55 +00:00
Chris Lattner
2828970819
A minor cleanup for better encapsulation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10545 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-20 02:03:14 +00:00
Chris Lattner
1e60a9165d
Rip JIT specific stuff out of TargetMachine, as per PR176
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10542 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-20 01:22:19 +00:00
Alkis Evlogimenos
4d7af65903
Change interface of MachineOperand as follows:
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a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10461 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-14 13:24:17 +00:00
Alkis Evlogimenos
97323a47d8
Change preserve all claim to just preserve live variables and phielimination.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10460 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-14 10:14:23 +00:00
Alkis Evlogimenos
359b65f782
Add a floating point killer pass. This pass runs before register
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allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10446 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-13 05:36:22 +00:00
John Criswell
52b62de100
Modified cast so that it converts the int to a long before casting to
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a pointer. This evades a warning emitted by GCC when we cast from
unsigned int (32 bit) to void * (64 bit) on SparcV9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10435 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-12 19:57:48 +00:00
Chris Lattner
65b05ce022
Implement the TargetMachine::getJITStubForFunction method for X86, finegrainify
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namespacification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10430 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-12 07:11:18 +00:00
Chris Lattner
9b527704f7
Add an option to enable the SSA based peephole optimizer.
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Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code. Each of these is a fairly substantial job, so this will remain disabled
for the immediate future. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10276 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-01 05:18:30 +00:00
Chris Lattner
4537076ee8
Add a new SSA-based peephole optimizer which includes copy propagation and
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folding of instructions into addressing modes. This creates lots of dead
instructions, which are currently not deleted. It also creates a lot of
instructions that the X86 backend currently cannot handle. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10275 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-01 05:15:28 +00:00
Chris Lattner
f2d2925452
generalize the instruction types permitted a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10274 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-01 05:13:56 +00:00
Chris Lattner
e1cc79f1cf
Finegrainify namespacification
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10270 91177308-0d34-0410-b5e6-96231b3b80d8
2003-11-30 06:13:25 +00:00
Brian Gaeke
f9c86cf5cf
Support constant casting constant pointers to ints/uints, and/or
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the other way around, instead of failing a large, tumor-like assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10171 91177308-0d34-0410-b5e6-96231b3b80d8
2003-11-22 07:18:25 +00:00
Brian Gaeke
dfcc9cfaa8
Constant shift expressions, meet InstSelectSimple. Yow!!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10170 91177308-0d34-0410-b5e6-96231b3b80d8
2003-11-22 06:49:41 +00:00
Brian Gaeke
2dd3e1b435
Stub for constant shift expr support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10168 91177308-0d34-0410-b5e6-96231b3b80d8
2003-11-22 05:18:35 +00:00
Chris Lattner
62b767b8d7
Fix PR123
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10069 91177308-0d34-0410-b5e6-96231b3b80d8
2003-11-18 17:47:05 +00:00