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3772 Commits

Author SHA1 Message Date
Bob Wilson
d51722a7e3 Fix a broken test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86298 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-06 23:06:42 +00:00
Evan Cheng
e7e0d62efd Remove ARMPCLabelIndex from ARMISelLowering. Use ARMFunctionInfo::createConstPoolEntryUId() instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86294 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-06 22:24:13 +00:00
Eric Christopher
ef1fad533e Fix PR5315, original patch by Nicolas Capens! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86203 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-06 00:11:57 +00:00
Dan Gohman
3f131328ff Update these tests for the new label names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86192 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-05 23:31:40 +00:00
Bob Wilson
5a225cc85a Add -mtriple to llc commands, attempting to fix buildbot failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86086 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-05 00:51:31 +00:00
Bob Wilson
8a008cc49d Attempt again to fix buildbot failures: make expected output less specific 
and compile with -mtriple to specify *-apple-darwin targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86081 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-05 00:30:35 +00:00
Bob Wilson
3d90dbee69 Add PowerPC codegen for indirect branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86050 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-04 21:31:18 +00:00
Bob Wilson
1709dd73d6 Fix broken test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86045 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-04 20:04:11 +00:00
Bob Wilson
0d48d6106e Add test for ARM indirectbr codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86042 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-04 19:25:34 +00:00
Evan Cheng
50608bac2f RangeIsDefinedByCopyFromReg() should check for subreg_to_reg, insert_subreg, 
and extract_subreg as a "copy" that defines a valno.
Also fixes a typo. These two issues prevent a simple subreg coalescing from
happening before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86022 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-04 08:33:14 +00:00
Evan Cheng
ad95ff9fab Fix test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-04 00:42:33 +00:00
Evan Cheng
b23b2015eb fconsts / fconstd immediate should be proceeded with #. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85952 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-03 21:59:33 +00:00
Evan Cheng
777c6b7caa Re-apply 85799. It turns out my code isn't buggy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85947 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-03 21:40:02 +00:00
Kenneth Uildriks
b908f8ad6a Make opt default to not adding a target data string and update tests that depend on target data to supply it within the test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85900 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-03 15:29:06 +00:00
Evan Cheng
ba908640b3 Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85871 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-03 05:52:54 +00:00
Nate Begeman
e4a9f9c450 Declare sin & cos as readonly so they match the code in SelectionDAGBuild 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85853 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-03 02:19:31 +00:00
Anton Korobeynikov
7b360e7f29 Temporary xfail until PR5367 will be resolved 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85848 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-03 00:37:36 +00:00
Anton Korobeynikov
ab453e0641 Revert r85049, it is causing PR5367 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85847 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-03 00:24:48 +00:00
Evan Cheng
454ac8961b Revert 85799 for now. It might be breaking llvm-gcc driver. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85827 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-02 21:49:14 +00:00
Evan Cheng
72ed88feac Initilize the machine LICM CSE map upon the first time an instruction is hoisted to 
the loop preheader. Add instructions which are already in the preheader block that
may be common expressions of those that are hoisted out. These does get a few more
instructions CSE'ed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85799 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-02 08:09:49 +00:00
Evan Cheng
580e791ded Remove an irrelevant and poorly reduced test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85794 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-02 07:11:54 +00:00
Evan Cheng
7baae87d8f Unbreak ARMBaseRegisterInfo::copyRegToReg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85787 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-02 04:44:55 +00:00
Anton Korobeynikov
2ae0eec1c0 Handle splats of undefs properly. This includes the testcase for PR5364 as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85767 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-02 00:12:06 +00:00
Anton Korobeynikov
2e1da9fea4 64-bit FP loads & stores operate on both NEON and VFP pipelines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85765 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-02 00:11:06 +00:00
Evan Cheng
48d8afab73 Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85743 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-01 21:12:51 +00:00
Evan Cheng
1107f03ef4 Fix tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85723 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-01 18:13:29 +00:00
Chris Lattner
43f44aa160 improve x86 codegen support for blockaddress. We now compile 
the testcase into:

_test1:                                                     ## @test1
## BB#0:                                                    ## %entry
	leaq	L_test1_bb6(%rip), %rax
	jmpq	*%rax
L_test1_bb:                                                 ## Address Taken
LBB1_1:                                                     ## %bb
	movb	$1, %al
	ret
L_test1_bb6:                                                ## Address Taken
LBB1_2:                                                     ## %bb6
	movb	$2, %al
	ret

Note, it is very very strange that BlockAddressSDNode doesn't carry 
around TargetFlags.  Dan, please fix this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85703 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-01 03:25:03 +00:00
Evan Cheng
de17fb6e4d Use cbz and cbnz instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85698 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 23:46:45 +00:00
Jim Grosbach
8cd0a8cb82 vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using 
them for scalar floating point operations for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85697 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 22:57:36 +00:00
Jim Grosbach
1820ec5e7a Consolidate test files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85696 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 22:20:56 +00:00
Jim Grosbach
91c0aebe68 Change to use FileCheck 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85695 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 22:16:14 +00:00
Jim Grosbach
0e5c9beeed Make tests more explicit about which instructions are expected. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85694 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 22:14:17 +00:00
Jim Grosbach
6b0b4b3eaf Grammar tweak to comments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85693 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 22:12:44 +00:00
Jim Grosbach
199a4b4c70 Update test to be more explicit about what instruction sequences are expected for each operation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85691 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 22:10:38 +00:00
Jim Grosbach
07d236ba88 Update test to be more explicit about what instruction sequences are expected for each operation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85689 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 21:52:58 +00:00
Jim Grosbach
bcf2f2c159 Expand 64-bit logical shift right inline 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85687 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 21:42:19 +00:00
Jim Grosbach
b4a976c304 Expand 64-bit arithmetic shift right inline 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85685 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 21:00:56 +00:00
Benjamin Kramer
e3246fc6ab Force triple; darwin's ASM syntax differs from linux's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85676 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 19:54:06 +00:00
Jim Grosbach
c2b879fcfe Expand 64 bit left shift inline rather than using the libcall. For now, this 
is unconditional. Making it still use the libcall when optimizing for size
would be a good adjustment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85675 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 19:38:01 +00:00
Benjamin Kramer
823bdbc770 Add missing colons for FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85674 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 19:22:24 +00:00
Jim Grosbach
4a26092248 Convert to FileCheck 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85673 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 19:06:53 +00:00
Evan Cheng
9eda68988e It's safe to remat t2LDRpci; Add PseudoSourceValue to load / store's to enable more machine licm. More changes coming. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85643 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 03:39:36 +00:00
Dan Gohman
c933acf096 Add a target triple so that this test behaves consistently across hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85640 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-31 00:15:28 +00:00
Dan Gohman
0437a06ea6 Fix the -mattr line for this test so that it passes on hosts that lack SSSE3. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85637 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-30 23:18:27 +00:00
Dan Gohman
0115e164ba Fix MachineLICM to use the correct virtual register class when 
unfolding loads for hoisting.  getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85622 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-30 22:18:41 +00:00
Evan Cheng
3efabd316f I forgot to commit this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85608 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-30 20:03:40 +00:00
Rafael Espindola
c1382b745f This fixes functions like 
void f (int a1, int a2, int a3, int a4, int a5,...)

In ARMTargetLowering::LowerFormalArguments if the function has 4 or
more regular arguments we used to set VarArgsFrameIndex using an
offset of 0, which is only correct if the function has exactly 4
regular arguments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85590 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-30 14:33:14 +00:00
Bob Wilson
2c04dae715 Reimplement BranchFolding change to avoid tail merging for a 1 instruction 
common tail, except when the OptimizeForSize function attribute is present.
Radar 7338114.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85441 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-28 22:10:20 +00:00
Dan Gohman
589f1f5a43 Teach MachineLICM to unfold loads from constant memory from 
otherwise unhoistable instructions in order to allow the loads
to be hoisted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85364 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-28 03:21:57 +00:00
Evan Cheng
39382427f1 Use fconsts and fconstd to materialize small fp constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85362 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-28 01:44:26 +00:00
Dan Gohman
a104d1eab2 Mark dead physregdefs dead immediately. This helps MachineSink and 
MachineLICM and other things which run before LiveVariables is run.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85360 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-28 01:13:53 +00:00
Dan Gohman
83f6120c9a Allow constants of different types to share constant pool entries 
if they have compatible encodings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85359 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-28 01:12:16 +00:00
Rafael Espindola
2bda533e1c Add missing testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85266 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-27 17:59:03 +00:00
Bob Wilson
37986053b4 Fix Thumb2 failures by converting them to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85210 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-27 06:31:02 +00:00
Bob Wilson
b9350315d2 Fix the rest of the ARM failures by converting them to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85208 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-27 06:16:45 +00:00
Bob Wilson
13e80bdb71 Fix some more failures by converting to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85207 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-27 05:50:28 +00:00
Bob Wilson
8bb080e71b Convert to FileCheck, fixing failure due to tab change in the process. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85204 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-27 05:30:47 +00:00
David Goodwin
2e7be612d5 Break anti-dependence breaking out into its own class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85127 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-26 16:59:04 +00:00
Dan Gohman
a8225083ba Make LSR's OptimizeShadowIV ignore induction variables with negative 
strides for now, because it doesn't handle them correctly. This fixes a
miscompile of SingleSource/Benchmarks/Misc-C++/ray.

This problem was usually hidden because indvars transforms such induction
variables into negations of canonical induction variables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85118 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-26 15:32:57 +00:00
Evan Cheng
a5dc45e3c8 - Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests and 
bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg
  around.
- Relax register scavenging to allow use of partially "not-live" registers. It's
  common for targets to operate on registers where the top bits are undef. e.g.
  s0 =
  d0 = insert_subreg d0<undef>, s0, 1
  ...
     = d0
  When the insert_subreg is eliminated by the coalescer, the scavenger used to
  complain. The previous fix was to keep to insert_subreg around. But that's
  brittle and it's overly conservative when we want to use the scavenger to 
  allocate registers. It's actually legal and desirable for other instructions
  to use the "undef" part of d0. e.g.
  s0 =
  d0 = insert_subreg d0<undef>, s0, 1
  ...
  s1 =
     = s1
     = d0
  We probably need add a "partial-undef" marker on machine operand so the
  machine verifier would not complain.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85091 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-26 04:56:07 +00:00
Chris Lattner
1d871c5e54 fix PR5295 where the .ll parser didn't reject a function after a global 
or global after a function with conflicting names.  Update some testcases
that were accidentally depending on this behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85081 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-25 23:22:50 +00:00
Evan Cheng
21a45557c6 Add a couple of ARM cross-rc coalescing tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85051 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-25 08:01:41 +00:00
Evan Cheng
cc7a5b91de Update tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85050 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-25 07:53:48 +00:00
Dan Gohman
7abbd04e90 APInt-ify the gep scaling code, so that it correctly handles the case where 
the scale overflows pointer-sized arithmetic. This fixes PR5281.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84954 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-23 17:57:43 +00:00
Evan Cheng
b6c215b63f Update tests for 84931. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84932 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-23 05:58:34 +00:00
David Goodwin
4c3715c2e5 Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84911 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-22 23:19:17 +00:00
Bob Wilson
bac6ed4ba4 Revert 84843. Evan, this was breaking some of the if-conversion tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84868 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-22 16:52:21 +00:00
Evan Cheng
87689d3b70 Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84843 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-22 06:48:32 +00:00
Evan Cheng
8000c6c535 Don't generate sbfx / ubfx with negative lsb field. Patch by David Conrad. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84813 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-22 00:40:00 +00:00
Anton Korobeynikov
f32df4ce3e Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be selected. 
Yay for ASCII graphics!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84808 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-22 00:16:00 +00:00
Dan Gohman
6d31268a7d Revert the main portion of r31856. It was causing BranchFolding 
to break up CFG diamonds by banishing one of the blocks to the end of
the function, which is bad for code density and branch size.

This does pessimize MultiSource/Benchmarks/Ptrdist/yacr2, the
benchmark cited as the reason for the change, however I've examined
the code and it looks more like a case of gaming a particular
branch than of being generally applicable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84803 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-22 00:03:58 +00:00
Jim Grosbach
65b7f3af76 Improve handling of immediates by splitting 32-bit immediates into two 16-bit 
immediate operands when they will fit into the using instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84778 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 20:44:34 +00:00
Anton Korobeynikov
a91f4c561e Add DAG printing for RMW stuff debugging 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84776 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 19:18:28 +00:00
Anton Korobeynikov
83fceb9481 RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and disable some tests until it will be clever enough to handle them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84775 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 19:17:55 +00:00
Evan Cheng
2095659a85 Match more patterns to movt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84751 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 08:15:52 +00:00
Dan Gohman
c1ae8c9b8f Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84727 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 01:44:44 +00:00
Anton Korobeynikov
a3da7c3ca8 Add reg-imm tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84705 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 00:11:44 +00:00
Anton Korobeynikov
2bcf60a9cc Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign) 
transform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84683 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-20 21:37:45 +00:00
David Goodwin
480c529e02 Checkpoint more aggressive anti-dependency breaking for post-ra scheduler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84658 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-20 19:54:44 +00:00
Dan Gohman
1a49295eae Make TranslateX86CC return COND_INVALID instead of aborting when it 
encounters an OEQ or UNE comparison, and update its callers to check
for this return status and recover. This fixes a problem resulting from
the LowerOperation hooks being called from LegalizeVectorOps, because
LegalizeVectorOps only lowers vectors, so OEQ and UNE comparisons may
still be at large. This fixes PR5092.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84640 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-20 16:22:37 +00:00
Dan Gohman
07adb85cb7 Re-apply r84295, with fixes to how the loop "top" and "bottom" blocks are 
tracked. Instead of trying to manually keep track of these locations
while doing complex modifications, just recompute them when they're needed.
This fixes a bug in which the TopMBB and BotMBB were not correctly updated,
leading to invalid transformations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84598 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-20 04:50:37 +00:00
Evan Cheng
0222a8cfb8 If the physical register being spilled does not have an interval, spill its sub-registers instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84586 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-20 01:31:09 +00:00
Jim Grosbach
6009751244 Enable allocation of R3 in Thumb1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84563 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 22:57:03 +00:00
Chris Lattner
7bf4bc5a1d convert to filecheck syntax and make a lot more aggressive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84517 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 18:27:56 +00:00
Anton Korobeynikov
766fc1db16 Revert r84295, this unbreaks llvm-gcc bootstrap on x86-64/linux 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84516 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 18:21:09 +00:00
Chris Lattner
baa989ed6e rename test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84515 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 18:18:07 +00:00
Torok Edwin
6602922878 Fix PR5247, "lock addq" pattern (and other atomics), it DOES modify EFLAGS. 
LLC was scheduling compares before the adds causing wrong branches to be taken
in programs, resulting in misoptimized code wherever atomic adds where used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84485 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 11:00:58 +00:00
Daniel Dunbar
068c56e0d7 Teach lit that the .c files in 'test/CodeGen/CellSPU/useful-harnesses' aren't tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84460 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 03:53:55 +00:00
Nate Begeman
a09008bf6d Add support for matching shuffle patterns with palignr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84459 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 02:17:23 +00:00
Evan Cheng
d36076e4a3 Turn on post-alloc scheduling for x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84431 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-18 19:57:27 +00:00
Dan Gohman
3bdd8de280 Enhance CodePlacementOpt's unconditional intra-loop branch elimination logic 
to be more general and understand more varieties of loops.

Teach CodePlacementOpt to reorganize the basic blocks of a loop so that
they are contiguous. This also includes a fair amount of logic for preserving
fall-through edges while doing so. This fixes a BranchFolding-ism where blocks
which can't be made to use a fall-through edge and don't conveniently fit
anywhere nearby get tossed out to the end of the function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84295 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-17 00:32:43 +00:00
Mon P Wang
362b8f2786 Update tests to use FileCheck 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84282 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 22:09:05 +00:00
Mon P Wang
70bf40d02e Add test case for r84279 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84280 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 22:07:19 +00:00
Dan Gohman
b00f236b03 Move zext and sext casts fed by loads into the same block as the 
load, to help SelectionDAG fold them into the loads, unless
conditions are unfavorable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84271 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 20:59:35 +00:00
Evan Cheng
d3dd50fec0 Enable post-alloc scheduling for all ARM variants except for Thumb1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84249 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 06:11:08 +00:00
Sandeep Patel
452b54a8ae Branches must be the last instruction in a Thumb2 IT block. Approved by Evan Cheng. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84212 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-15 22:25:32 +00:00
Sanjiv Gupta
753ec15d5f Re-apply 84180 with the fixed test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84195 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-15 19:26:25 +00:00
Jakob Stoklund Olesen
6ad8c84d70 Move Blackfin intrinsics into the Target/Blackfin directory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84194 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-15 18:50:52 +00:00
Dan Gohman
cd2ae14ce3 Make CodePlacementOpt align loops, rather than loop headers. The 
header is just the entry block to the loop, and it needn't be at
the top of the loop in the code layout.

Remove the code that suppressed loop alignment for outer loops,
so that outer loops are aligned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84158 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-15 00:36:22 +00:00
Evan Cheng
a2f8047134 When LiveVariables is adding implicit-def to model "partial dead", add the earlyclobber marker if the superreg def has it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84153 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-14 23:39:27 +00:00
Dan Gohman
79d4646f4b Fix this test to account for a movl $0 being emitted as an xor now, 
and convert it to FileCheck.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84065 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-14 00:28:48 +00:00
Bob Wilson
765cc0b9d5 Revise ARM inline assembly memory operands to require the memory address to 
be in a register.  The previous use of ARM address mode 2 was completely
arbitrary and inappropriate for Thumb.  Radar 7137468.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84022 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-13 20:50:28 +00:00
Sandeep Patel
47eedaa8fa Add ARMv6T2 SBFX/UBFX instructions. Approved by Anton Korobeynikov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84009 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-13 18:59:48 +00:00
Dan Gohman
0032681424 Don't forget to mark RAX as live-out of the function when arranging for 
it to hold the address of an sret return value, for x86-64 ABI purposes.

Also, fix the test that was originally intended to test this to actually
test it, using FileCheck.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83853 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-12 16:36:12 +00:00
Benjamin Kramer
90869455b5 Eliminate some redundant llvm-as calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83837 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-12 09:31:55 +00:00
Anton Korobeynikov
436604d505 Add missed mem-mem move patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83812 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-11 23:03:53 +00:00
Anton Korobeynikov
afac8abfc0 Add MSP430 mem-mem insts support. Patch by Brian Lucas with some my refinements 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83811 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-11 23:03:28 +00:00
Anton Korobeynikov
aca471f3a5 Add bunch of MSP430 'feature' tests. Patch by Brian Lucas with some my refinements 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83809 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-11 23:02:38 +00:00
Anton Korobeynikov
95eb470ce1 Implement 'm' memory operand properly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83785 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-11 19:14:21 +00:00
Anton Korobeynikov
8f8e9f0830 It seems that OR operation does not affect status reg at all. 
Remove impdef of SRW. This fixes PR4779


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83739 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-10 22:17:47 +00:00
Dan Gohman
cda49a0b29 Update this test; the code is the same but it gets counted as one 
fewer remat.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83690 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-09 23:31:04 +00:00
Dan Gohman
11596ed43c Fix the x86 test-shrink optimization so that it doesn't shrink comparisons 
when one of the bits being tested would end up being the sign bit in the
narrower type, and a signed comparison is being performed, since this would
change the result of the signed comparison. This fixes PR5132.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83670 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-09 20:35:19 +00:00
Bob Wilson
83815aeb29 Merge a bunch of NEON tests into larger files so they run faster. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83667 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-09 20:20:54 +00:00
Bob Wilson
e8e72be33a Convert some ARM tests with lots of greps to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83651 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-09 17:20:46 +00:00
Evan Cheng
3dc326ba83 Fix a logic error that caused non-rematable loop invariants loads to be licm'ed out of loop. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83622 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-09 06:21:52 +00:00
Bob Wilson
8795070d50 Commit one last NEON test to use FileCheck. That's all of them now! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83617 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-09 05:31:56 +00:00
Bob Wilson
0305dd745e Convert more NEON tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83616 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-09 05:14:48 +00:00
Evan Cheng
35ca9203f2 Reset kill markers after live interval is reconstructed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83608 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-09 01:17:11 +00:00
Bob Wilson
5631139a69 Add codegen support for NEON vst4lane intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83600 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-09 00:01:36 +00:00
Bob Wilson
8cdb269686 Add codegen support for NEON vst3lane intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83598 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 23:51:31 +00:00
Bob Wilson
c5c6edb74f Add codegen support for NEON vst2lane intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83596 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 23:38:24 +00:00
Bob Wilson
4cf0189d5a Convert more NEON tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83595 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 23:33:03 +00:00
Bob Wilson
62e053e5a1 Add codegen support for NEON vld4lane intrinsics with 128-bit vectors. 
Also fix some copy-and-paste errors in previous changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83590 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 22:53:57 +00:00
Bob Wilson
5d78275493 Convert more NEON tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83587 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 22:33:53 +00:00
Bob Wilson
0bf7d998b4 Add codegen support for NEON vld3lane intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83585 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 22:27:33 +00:00
Anton Korobeynikov
632606c724 Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via movt/movw pair. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83572 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 20:43:22 +00:00
Bob Wilson
30aea9d96e Add codegen support for NEON vld2lane intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83568 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 18:56:10 +00:00
Richard Osborne
c96c8e0e81 Add some peepholes for signed comparisons using ashr X, X, 32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83549 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 15:38:17 +00:00
Bob Wilson
67a6103a34 Convert more NEON tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83528 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 06:02:10 +00:00
Bob Wilson
deb3141cf5 Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83526 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 05:18:18 +00:00
Bob Wilson
5adf60c03b Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83518 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 00:28:28 +00:00
Bob Wilson
24e04c535f Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83513 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 00:21:01 +00:00
Bob Wilson
0ea38bb939 Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83508 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 23:54:04 +00:00
Bob Wilson
fe27c512e8 Convert more NEON tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83507 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 23:47:21 +00:00
Bob Wilson
c67160c010 Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83506 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 23:39:57 +00:00
Bob Wilson
a4288080e6 Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83502 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 22:57:01 +00:00
Dale Johannesen
5f3663e51d Fix handling of x86 'R' constraint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83499 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 22:47:20 +00:00
Bob Wilson
b2cae81ac4 Convert more NEON tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83497 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 22:30:19 +00:00
Bob Wilson
99c372e723 Convert test to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83487 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 20:51:42 +00:00
Bob Wilson
63c9063434 Add codegen support for NEON vst4 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83486 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 20:49:18 +00:00
Bob Wilson
66a70639da Add codegen support for NEON vst3 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83484 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 20:30:08 +00:00
Bob Wilson
d285575f87 Add codegen support for NEON vst2 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83482 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 18:47:39 +00:00
Bob Wilson
7708c22baa Add codegen support for NEON vld4 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83479 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 18:09:32 +00:00
Bob Wilson
ff8952e8a9 Add codegen support for NEON vld3 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83471 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 17:24:55 +00:00
Bob Wilson
967f87578d Add tests for vld2 of 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83468 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 17:19:13 +00:00
Bob Wilson
ec1d81c389 Update NEON struct names to match llvm-gcc changes. 
(This is not required for correctness but might help with sanity.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83415 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 21:16:19 +00:00
Dan Gohman
e3cc3f3c84 Instead of printing unnecessary basic block labels as labels in 
verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.

Also, factor out the relevant code out of all the targets and into
target-independent code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83392 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 17:38:38 +00:00
Evan Cheng
3825ce8c24 Fix tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83241 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 06:53:57 +00:00
Evan Cheng
892597943a Forgot about ARM::tPUSH. It also has a new writeback operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83237 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 05:03:07 +00:00
Evan Cheng
62a1b5db44 Move load / store multiple before post-alloc scheduling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83236 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 04:57:15 +00:00
David Goodwin
9843a93e83 Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83218 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 22:19:57 +00:00
David Goodwin
471850ab84 Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83215 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 21:46:35 +00:00
Evan Cheng
10469f8e48 ARM::tPOP and tPOP_RET each has an extra writeback operand now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83214 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 20:54:53 +00:00
Evan Cheng
48af260bb1 Forgot this test earlier. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83143 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 08:41:27 +00:00
David Goodwin
413738ee8c Remove regression that requires post-RA scheduling from a target that does not use that scheduler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83128 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 00:23:57 +00:00
David Goodwin
0dad89fa94 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 00:10:16 +00:00
David Goodwin
8971c4a30e Post-RA regressions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83075 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-29 17:10:26 +00:00
Evan Cheng
fa1be5d991 Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83058 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-29 07:07:30 +00:00
Dan Gohman
8c050fadf6 Add a CHECK line to check the position of the second divsd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83009 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 20:48:39 +00:00
Evan Cheng
5adb66a646 Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo 
instruction. This makes it re-materializable.

Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82982 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 09:14:39 +00:00
Evan Cheng
0e6b590b91 Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of 
physical registers. This is especially critical for the later two since they
start the live interval of a super-register. e.g.
%DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
If this instruction is eliminated, the register scavenger will not be happy as
D0 is not defined previously.
This fixes PR5055.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82968 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 05:28:43 +00:00
Anton Korobeynikov
6a2fa325c1 Use movt/movw pair to materialize 32 bit constants on ARMv6T2+. 
This should be better than single load from constpool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82948 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-27 23:52:58 +00:00
Evan Cheng
e298ab26b1 Enable pre-regalloc load / store multiple pass for Thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82893 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-27 09:46:04 +00:00
Chris Lattner
eec96958cd implement and document support for filecheck variables. This 
allows matching and remembering a string and then matching and
verifying that the string occurs later in the file.

Change X86/xor.ll to use this in some cases where the test was
checking for an arbitrary register allocation decision.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82891 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-27 07:56:52 +00:00
Evan Cheng
2fcf85efe7 Remove this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82869 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-26 18:51:37 +00:00
Dan Gohman
11eab02b77 Convert comparisons like (x == infinity) to (x >= infinity) on targets 
where FCMP_OEQ is not legal and FCMP_OGE is, such as x86. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82861 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-26 15:24:17 +00:00
Daniel Dunbar
c8e9314a41 "Update" tests for -disable-if-conversion removal. I think branch.ll should just 
be removed, but I XFAIL'd it for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82847 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-26 05:29:36 +00:00
Evan Cheng
9fde6ca2c7 Convert test to filecheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82835 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-26 02:41:17 +00:00
Dan Gohman
a8fb336c2e Unbreak MachineLICM for instructions that reference RIP on x86-64 too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82825 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-25 23:58:45 +00:00
Dan Gohman
19778e7558 Fix MachineSink to be able to sink instructions that use physical registers 
which have no defs anywhere in the function. In particular, this fixes sinking
of instructions that reference RIP on x86-64, which is currently being modeled
as a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82815 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-25 22:53:29 +00:00
Evan Cheng
483011018e Flip -disable-post-RA-scheduler to -post-RA-scheduler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82803 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-25 21:38:11 +00:00
Dan Gohman
c76909abfe Improve MachineMemOperand handling. 
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
   This eliminates MachineInstr's std::list member and allows the data to be
   created by isel and live for the remainder of codegen, avoiding a lot of
   copying and unnecessary translation. This also shrinks MemSDNode.
 - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
   fields for MachineMemOperands.
 - Change MemSDNode to have a MachineMemOperand member instead of its own
   fields with the same information. This introduces some redundancy, but
   it's more consistent with what MachineInstr will eventually want.
 - Ignore alignment when searching for redundant loads for CSE, but remember
   the greatest alignment.

Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-25 20:36:54 +00:00
Dale Johannesen
1d73742ad9 Add readonly to some sin and cos calls; transformations 
being checked aren't valid without it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82786 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-25 18:15:29 +00:00
Chris Lattner
5d6a05f4d4 reimplement the regex matching strategy by building a single 
regex and matching it instead of trying to match chunks at a time.
Matching chunks at a time broke with check lines like 
  CHECK: foo {{.*}}bar
because the .* would eat the entire rest of the line and bar would
never match.

Now we just escape the fixed strings for the user, so that something
like:
  CHECK: a() {{.*}}???
is matched as:
  CHECK: {{a\(\) .*\?\?\?}}
transparently "under the covers".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82779 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-25 17:23:43 +00:00
Bob Wilson
0035f9c3b9 pr4926: ARM requires the stack pointer to be aligned, even for leaf functions. 
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public
interface" it must be 8-byte aligned.  For the older ARM APCS ABI, the stack
alignment is just always 4 bytes.  For X86, we currently align SP at
entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment
is needed at other times, such as for a leaf function.

After discussing this with Dan, I decided to go with the approach of adding
a new "TransientStackAlignment" field to TargetFrameInfo.  This value
specifies the stack alignment that must be maintained even in between calls.
It defaults to 1 except for ARM, where it is 4.  (Some other targets may
also want to set this if they have similar stack requirements. It's not
currently required for PPC because it sets targetHandlesStackFrameRounding
and handles the alignment in target-specific code.) The existing StackAlignment
value specifies the alignment upon entry to a function, which is how we've
been using it anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82767 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-25 14:41:49 +00:00
Chris Lattner
5d7c79d9c6 convert testcases to filecheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82759 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-25 06:49:41 +00:00
Chris Lattner
0f427ac24c remove a large unreduced testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82756 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-25 06:37:22 +00:00
Bob Wilson
08ae76c042 Convert to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82710 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-24 20:23:02 +00:00
Dan Gohman
3c98fefa35 Add nounwind to this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82708 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-24 20:20:08 +00:00
Evan Cheng
393e277ecd Fix PR5024 with a big hammer: disable the double-def assertion in the scavenger. 
LiveVariables add implicit kills to correctly track partial register kills. This works well enough and is fairly accurate. But coalescer can make it impossible to maintain these markers. e.g.

        BL <ga:sss1>, %R0<kill,undef>, %S0<kill>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def>, ...
...
	%reg1031<def> = FLDS <cp#1>, 0, 14, %reg0, Mem:LD4[ConstantPool]
...
   	%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>

When reg1031 and S0 are coalesced, the copy (FCPYS) will be eliminated the the implicit-kill of D0 is lost. In this case it's possible to move the marker to the FLDS. But in many cases, this is not possible. Suppose

	%reg1031<def> = FOO <cp#1>, %D0<imp-def>
...
   	%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>

When FCPYS goes away, the definition of S0 is the "FOO" instruction. However, transferring the D0 implicit-kill to FOO doesn't work since it is the def of D0 itself. We need to fix this in another time by introducing a "kill" pseudo instruction to track liveness.

Disabling the assertion is not ideal, but machine verifier is doing that job now. It's important to know double-def is not a miscomputation since it means a register should be free but it's not tracked as free. It's a performance issue instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82677 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-24 02:27:09 +00:00
Evan Cheng
ad934b821c Clean up LiveVariables and change how it deals with partial updates and kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82676 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-24 02:15:22 +00:00
Evan Cheng
79997912a7 Add nounwind. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82637 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-23 18:20:27 +00:00
Evan Cheng
296925dc16 Fix PR5024. LiveVariables physical register defs should *commit* only after all 
of the defs are processed.
Also fix a implicit_def propagation bug: a implicit_def of a physical register
should be applied to uses of the sub-registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82616 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-23 06:28:31 +00:00
Evan Cheng
f7cd853071 Fix a obvious logic error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82610 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-23 05:23:19 +00:00
Evan Cheng
60c7df2c93 Fix PR5024. LiveVariables::FindLastPartialDef should return a set of sub-registers that were defined by the last partial def, not just a single sub-register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-22 08:34:46 +00:00
Evan Cheng
014d624a28 Fix a pasto. Also simplify for Bill's benefit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82505 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-22 01:48:19 +00:00
Evan Cheng
cf985a9545 Clean up spill weight computation. Also some changes to give loop induction 
variable increment / decrement slighter high priority. 

This has major impact on some micro-benchmarks. On MultiSource/Applications
and spec tests, it's a minor win. It also reduce 256.bzip instruction count
by 8%, 55 on 164.gzip on i386 / Darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82485 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-21 21:12:25 +00:00
Dan Gohman
78a130a31c Add a comment mentioning the rdar number associated with this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82471 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-21 18:32:20 +00:00
Dan Gohman
4a0b3e170d Add support for rematerializing FsFLD0SS and FsFLD0SD as constant-pool 
loads in order to reduce register pressure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82470 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-21 18:30:38 +00:00
Dan Gohman
670e53977b Recognize SSE min and max opportunities in even more cases. 
And fix a bug with the behavior of min/max instructions formed from
fcmp uge comparisons.

Also, use FiniteOnlyFPMath() for this code instead of UnsafeFPMath,
as it is more specific.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82466 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-21 18:03:22 +00:00
Evan Cheng
b0f5973bee Fix PR4986. "r1024 = insert_subreg r1024, undef, 2" cannot be turned in an implicit_def. Instead, it's an identity copy so it should be eliminated. Also make sure to update livevariable kill information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82436 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-21 04:32:32 +00:00
Dale Johannesen
39faac2531 When computing live intervals for earlyclobber operands, 
we pushed the beginning of the interval back 1, so the
interval would overlap with inputs that die.  We were
also pushing the end of the interval back 1, though,
which means the earlyclobber didn't overlap with other
output operands.  Don't do this.  PR 4964.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82342 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-20 00:36:41 +00:00
Evan Cheng
ce31910eae Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82311 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-19 09:51:03 +00:00
Dan Gohman
d268e00938 Delete the label names from this test to make it less fragile. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82276 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-18 21:23:12 +00:00
Chris Lattner
228252f981 Make a new X8632_MachoTargetObjectFile TLOF implementation whose 
getSymbolForDwarfGlobalReference is smart enough to know that it 
needs to register the stub it references with MachineModuleInfoMachO,
so that it gets emitted at the end of the file.

Move stub emission from X86ATTAsmPrinter::doFinalization to the
new X86ATTAsmPrinter::EmitEndOfAsmFile asmprinter hook.  The important
thing here is that EmitEndOfAsmFile is called *after* the ehframes are
emitted, so we get all the stubs.

This allows us to remove a gross hack from the asmprinter where it would
"just know" that it needed to output stubs for personality functions.
Now this is all driven from a consistent interface.

The testcase change is just reordering the expected output now that the
stubs come out after the ehframe instead of before.

This also unblocks other changes that Bill wants to make.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82269 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-18 20:22:52 +00:00
Dale Johannesen
8dffc819c5 Model the carry bit on ppc32. Without this we could 
move a SUBFC (etc.) below the SUBFE (etc.) that consumed
the carry bit.  Add missing ADDIC8, noticed along the way.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82266 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-18 20:15:22 +00:00
Dan Gohman
e220c4b3d9 Add support for using the FLAGS result of or, xor, and and instructions 
on x86, to avoid explicit test instructions. A few existing tests changed
due to arbitrary register allocation differences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82263 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-18 19:59:53 +00:00
Anton Korobeynikov
c6f729ed55 Allow symbols to start from the digit if target requests it. This allows, e.g. pinning 
variables to specified absolute address. Make use of this feature for MSP430.
This unbreaks PR4776.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82227 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-18 16:57:42 +00:00
Chris Lattner
4aebc9d8c7 make this testcase check darwin32 also 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82182 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-17 23:56:41 +00:00
Chris Lattner
7ea9890962 rename test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82181 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-17 23:55:12 +00:00
Chris Lattner
20397179ad convert to filecheck 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82179 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-17 23:54:26 +00:00
Chris Lattner
3aaf740424 rename file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82178 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-17 23:42:06 +00:00
Daniel Dunbar
f194d627d5 Remove test cases using -regalloc=simple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82130 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-17 06:37:07 +00:00
Evan Cheng
5cf732e3b1 Fix PR4910: Broken logic in coalescer means when a physical register liveness is being shortened, the sub-registers were not. The symptom is the register allocator could not find a free register for this particular test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82108 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-17 00:57:15 +00:00
Bob Wilson
9b379dc526 Convert more tests to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81915 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 20:58:02 +00:00
Chris Lattner
dffb6e5aee fix PR4984 by ensuring that fastisel adds properly sign extended GEP displacement 
values to machineinstrs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81886 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 18:27:02 +00:00
Chris Lattner
371b8fc41c rename test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81884 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 18:23:37 +00:00
Chris Lattner
25519ddc2d convert to filecheck 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81882 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 18:23:23 +00:00
Sandeep Patel
85111a9c07 Fix superreg use in ARMAsmPrinter. Approved by Anton Korobeynikov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81878 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 17:53:11 +00:00
Chris Lattner
db486a6d53 several major improvements to the sparc backend: support for weak linkage 
and PIC codegen.  Patch by Venkatraman Govindaraju!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81877 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 17:46:24 +00:00
Dan Gohman
a5f4dbf111 Restore a comment that was lost in the merge. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81857 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 15:09:54 +00:00
Chris Lattner
c059f04758 this is failing on linux hosts, force a triple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81833 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 04:27:29 +00:00
Chris Lattner
3d76d11866 merge one more in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81824 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 02:27:23 +00:00
Chris Lattner
9f052ab161 merge some more cmov tests into cmov.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81823 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 02:25:21 +00:00
Chris Lattner
5f52cf8bb7 merge two cmov tests into one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81822 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 02:22:47 +00:00
Dan Gohman
1e038a8494 Don't pull a load through a callseq_start if the load's chain 
has multiple uses, as one of the other uses may be on a path
to a different node above the callseq_start, because that
leads to a cyclic graph. This problem is exposed when
-combiner-global-alias-analysis is used. This fixes PR4880.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81821 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 01:22:01 +00:00
Dan Gohman
907355caf8 On x86-64, the 32-bit cmov doesn't actually clear the high 32-bit of 
its result if the condition is false.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81814 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 00:14:11 +00:00
Chris Lattner
4c66f729c9 merge the linux cpool/jtbl pic tests into pic.ll and convert to filecheck. 
Change the picbase symbol on non-darwin systems from ".Lllvm$4.$piclabel" to
".L4$pb".  The actual name doesn't matter and the darwin name is shorter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81688 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-13 18:46:37 +00:00
Anton Korobeynikov
20c35ec427 Define proper subreg sets for arm - this should fix bunch of subtle problems 
with subreg - superreg mapping and also fix PR4965.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81657 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-13 00:59:43 +00:00
Dan Gohman
d11c4de5ce Add -mattr=+sse2 to the -march=x86 version of this test. Without 
sse, this code falls back to SelectionDAG isel which uses an x87
instruction, which is fine, but not what this test is testing for.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81656 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-12 23:45:47 +00:00
Dan Gohman
55a7877cac Remove an unnecessary -f. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81546 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-11 18:41:06 +00:00
Dan Gohman
b7c0b246da Convert more tests to avoid llvm-as. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81545 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-11 18:36:27 +00:00
Dan Gohman
f2f6ce65b7 Change tests from "opt %s" to "opt < %s" so that opt doesn't see the 
input filename so that opt doesn't print the input filename in the
output so that grep lines in the tests don't unintentionally match
strings in the input filename.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81537 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-11 18:01:28 +00:00
Chris Lattner
4f8fb4973d turn on -experimental-asm-printer for x86 / AT&T by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81532 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-11 17:07:27 +00:00
Evan Cheng
879caeadf3 Follow up to 81494. When the folded reload is narrowed to a 32-bit load then change the destination register to a 32-bit one or add a sub-register index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81496 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-11 01:01:31 +00:00
Evan Cheng
9cef48eae9 It's not legal to fold a load from a narrower stack slot into a wider instruction. If done, the instruction does a 64-bit load and that's not 
safe. This can happen we a subreg_to_reg 0 has been coalesced. One
exception is when the instruction that folds the load is a move, then we
can simply turn it into a 32-bit load from the stack slot.                                                                                                                    

rdar://7170444


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81494 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-11 00:39:26 +00:00
Dan Gohman
5e5abb77fe Reapply r81171 with a fix: don't try to use i64 when it 
isn't legal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81492 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-11 00:34:46 +00:00
Bob Wilson
92ad363f58 Don't swap the operands of a subtraction when trying to create a 
post-decrement load/store.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81464 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-10 22:09:31 +00:00
Bob Wilson
2a16e6b22c Revert r81171 which was causing pr4927. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81415 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-10 00:49:22 +00:00
Bob Wilson
cd3b9a4f17 Fix pr4939: Change FPCCToARMCC to translate SETOLE to ARMCC::LS. 
See the bug report for details.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81397 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 23:14:54 +00:00
Dan Gohman
607a0508ba When widening a vector load, use the correct chain. This fixes PR4891. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81343 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 14:22:57 +00:00
Torok Edwin
6e89b6f107 Add testcase for r81322 (PR4933). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81327 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 09:34:43 +00:00
Chris Lattner
58f875bbf6 add a testacse for the objc problem that required required r81305 
to be temporarily disabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81320 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 06:19:34 +00:00
Chris Lattner
33c6aa6692 disable the new asmprinter by default. Both the Mangler and MCSymbol 
printing stuff are quoting symbols now, breaking objc testcases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81319 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 06:11:14 +00:00
Evan Cheng
28d63b1699 Cast MO.getImm() to unsigned before comparing with an unsigned limit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81318 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 06:05:16 +00:00
Chris Lattner
ab9642ff8f turn the mcinst asmprinter on by default for x86, tweaking two tests to 
expect the slight syntax differences in the generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81305 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 00:41:36 +00:00
Chris Lattner
f43b45282f this got merged into lea.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81298 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 00:22:31 +00:00
Chris Lattner
e1d8d831d2 filecheckize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81297 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 00:19:46 +00:00
Dan Gohman
fce288fc91 Eliminate more uses of llvm-as and llvm-dis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 00:09:15 +00:00
Dan Gohman
36a0947820 Eliminate more uses of llvm-as and llvm-dis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:54:48 +00:00
Chris Lattner
fc227be725 update various tests for signedness changes in .s file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81289 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:51:06 +00:00
Chris Lattner
94d1077d99 adjust for signedness change. I'd appreciate it if an ARM flavored person 
could look at this: the top undefined bits of an immediate shouldn't affect
isel (cmp vs cmp.w)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81288 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:44:53 +00:00
Chris Lattner
543d57352c merge thumb2-bic2.ll into thumb2-bic.ll and update for signedness changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81285 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:41:06 +00:00
Chris Lattner
08ab4fdb59 tweak this to pass on linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81273 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:32:40 +00:00
Chris Lattner
8429837a94 convert to filecheck syntax 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81267 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:16:26 +00:00
Chris Lattner
d842962e27 change selectiondag to add the sign extended versions of immediate operands 
to instructions instead of zero extended ones.  This makes the asmprinter
print signed values more consistently.  This apparently only really affects
the X86 backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:05:44 +00:00
Anton Korobeynikov
2ba62ef7f2 Unbreak getOnesVector() / getZeroVector() to use valid ARM extended imm's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81262 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 22:51:43 +00:00
Chris Lattner
8047d763a5 filecheckize some tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81259 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 22:38:46 +00:00
Dan Gohman
3e054fe9ef Use opt -S instead of piping bitcode output through llvm-dis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81257 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 22:34:10 +00:00
Dan Gohman
b1e1e82c54 Change these tests to feed the assembly files to opt directly, instead 
of using llvm-as, now that opt supports this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81226 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 16:50:01 +00:00
Anton Korobeynikov
6ca0b9e722 Add NEON 'laned' operations. This fixes another bunch of gcc testsuite fails and 
makes the code faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81220 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 15:22:32 +00:00
Anton Korobeynikov
7d16da42ba Unbreak 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81205 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 07:30:03 +00:00
Evan Cheng
8bdb0de2bd When remat'ing and destination virtual register has a sub-register index. Make sure the sub-register class matches the register class of the remat'ed instruction definition register class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81204 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 06:39:07 +00:00
Chris Lattner
467036058b disable some irrelevant eh emission 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81200 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 06:26:40 +00:00
Chris Lattner
ba3598cb1f fix PR4767, a crash because fp stackifier visited blocks in 
depth first order, so it wouldn't process unreachable blocks.
When compiling at -O0, late dead block elimination isn't done
and the bad instructions got to isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81187 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 04:55:44 +00:00
Dan Gohman
ed48caf5e7 Fix an abort on a store of an empty struct member. getValue returns 
null in the case of an empty struct, so don't try to call getNumValues
on it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81180 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 01:44:02 +00:00
Dan Gohman
fd06aa7c07 Fix a thinko: When lowering fneg with xor, bitcast the operands 
from floating-point to integer first, and bitcast the result
back to floating-point. Previously, this test was passing by
falling back to SelectionDAG lowering. The resulting code isn't
as nice, but it's correct and CodeGen now stays on the fast path.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81171 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-07 23:47:14 +00:00
Daniel Dunbar
6a42be27b8 Don't depend on arch specific global prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81084 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-05 11:53:06 +00:00
Daniel Dunbar
31ab6e3364 Eliminate uses of %prcontext. 
- I'd appreciate it if someone else eyeballs my changes to make sure I captured
   the intent of the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81083 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-05 11:35:16 +00:00
Bob Wilson
da4ae4be5b Stabilize the order of live intervals in the priority_queue used by the 
linear scan reg alloc.  This fixes a problem I ran into where extracting
a function from a larger file caused the generated code to change (masking
the problem I was trying to debug) because the allocator behaved differently.

This changes the results for two X86 regression checks.  stack-color-with-reg
is improved, with one less instruction, but pr3495 is worse, with one more
copy.  As far as I can tell, these tests were just getting lucky or unlucky,
so I've changed the expected results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81060 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-05 01:19:16 +00:00
Evan Cheng
030a0a0cdb Run branch folding if if-converter make some transformations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80994 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-04 07:47:40 +00:00
Daniel Dunbar
e57dc10985 Remove stale greps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-04 05:07:52 +00:00
Bob Wilson
6aa9775888 Convert tests to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80983 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-04 04:07:19 +00:00
Bob Wilson
5ffe917f72 Convert a test to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80975 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-04 00:32:31 +00:00
Dan Gohman
3d45a853db LLVM currently represents floating-point negation as -0.0 - x. Fix 
FastISel to recognize this pattern and emit a floating-point
negation using xor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80963 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 22:53:57 +00:00
Daniel Dunbar
a87f9218be Remove dead greps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80946 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 20:59:02 +00:00
Dan Gohman
8d44b28bc6 Recognize more opportunities to use SSE min and max instructions, 
swapping the operands if necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80940 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 20:34:31 +00:00
Mon P Wang
3653b13c52 Test cases for vector shifts changes r80935 
Changed the old vector shift test to use FileCheck


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80936 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 19:57:35 +00:00
Evan Cheng
63476a8040 Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 07:04:02 +00:00
Chris Lattner
46d061dd28 merge all the basic linux/32 pic tests together into one test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80902 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 06:29:23 +00:00
Chris Lattner
1c9c4a75e8 rename test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80901 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 06:16:49 +00:00
Anton Korobeynikov
69d1c1aebf More missed vdup patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80838 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-02 21:21:28 +00:00
Bob Wilson
8a3198b770 Add support for generating code for vst{234}lane intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 18:51:56 +00:00
Bob Wilson
2af658fcc0 Fix incorrect declarations of intrinsics in this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80705 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 18:50:43 +00:00
Bob Wilson
c011005912 Add test for vld{234}_lane instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80658 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 04:27:10 +00:00
Bob Wilson
71124f698b Fix pr4843: When an instruction has multiple destination registers that are 
tied to different source registers, the TwoAddressInstructionPass needs to
be smarter.  Change it to check before replacing a source register whether
that source register is tied to a different destination register, and if so,
defer handling it until a subsequent iteration.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80654 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 04:18:40 +00:00
Jim Grosbach
46e0faa81c SJLJ is arm/darwin only for now. force the triple for the test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80651 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 02:34:49 +00:00
Jim Grosbach
3fb2b1ede3 Clean up LSDA name generation and use for SJLJ exception handling. This 
makes an eggregious hack somewhat more palatable. Bringing the LSDA forward
and making it a GV available for reference would be even better, but is
beyond the scope of what I'm looking to solve at this point.

Objective C++ code could generate function names that broke the previous
scheme. This fixes that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80649 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 01:57:56 +00:00
David Goodwin
a3251db21a Don't mark a register live at an undef use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80621 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-31 20:47:02 +00:00
Evan Cheng
029599bf01 Remove .n suffix for some 16-bit opcodes now that Darwin assembler is fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80615 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-31 20:14:07 +00:00
Chris Lattner
251829ed87 eliminate some uses of prcontext. Any help here would be appreciated :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80520 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-30 21:45:23 +00:00
Anton Korobeynikov
d91aafd005 Add missed pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80502 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-30 19:06:39 +00:00
Anton Korobeynikov
b00c03bb35 EXTRACT_VECTOR_ELEMENT can have result type different from element type. 
Remove the assertion and generalize the code for ARM NEON stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80498 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-30 17:14:54 +00:00
Dan Gohman
71a258c36b CMOV_GR8 clobbers EFLAGS when its expansion involves an xor to set 
a register to 0. This fixes PR4814.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80445 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-29 22:19:15 +00:00
Anton Korobeynikov
71624cc786 Do not assert on too wide splats we don't support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80409 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-29 00:08:18 +00:00
Anton Korobeynikov
2324bdc1ee Add missed extract_element pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80408 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 23:41:26 +00:00
Evan Cheng
e4e4ed3b56 Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80404 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 23:18:09 +00:00
Evan Cheng
0e87e23f6e v4, v5 does not support sxtb / sxth. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80322 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 00:31:43 +00:00
Anton Korobeynikov
2a82a7aa60 scalar_to_vector is fully legal now (implemented as subreg accesses) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80249 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 16:04:47 +00:00
Anton Korobeynikov
3a0f1b3ed0 Ok, sometimes it's profitable to turn scalar_to_vector stuff into subreg access. 
Add a testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80246 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 14:51:42 +00:00
Evan Cheng
cdbb3f5d33 Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which cannot fold any immediate offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80191 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 01:23:50 +00:00
Dan Gohman
7e7f06e70a X86FastISel support for loading and storing values of type i1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80186 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 00:31:47 +00:00
Dan Gohman
cbbea0ffc7 Expand i8 selects into control flow instead of 16-bit conditional 
moves. This avoids the need to promote the operands (or implicitly
extend them, a partial register update condition), and can reduce
i8 register pressure. This substantially speeds up code such as
write_hex in lib/Support/raw_ostream.cpp.

subclass-coalesce.ll is too trivial and no longer tests what it was
originally intended to test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80184 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 00:14:12 +00:00
Bob Wilson
e4696cf03d Convert some more Neon tests to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80120 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 18:11:50 +00:00
Dale Johannesen
4e68f8803d Alter 79292 to produce output that actually assembles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80119 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 18:10:32 +00:00
Anton Korobeynikov
1cb852b0ea Expand scalar_to_vector - we don't have any isel logic for it now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80107 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 16:26:09 +00:00
Dan Gohman
af70e5c676 Don't use INSERT_SUBREG to model anyext operations on x86-64, as it 
leads to partial-register definitions. To help avoid redundant
zero-extensions, also teach the h-register matching patterns that
use movzbl to match anyext as well as zext.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80099 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 14:59:13 +00:00
Anton Korobeynikov
cd76128f18 Add dummy inline asm handling for 'r' constraint. This fixes PR4778 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80085 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 13:44:29 +00:00
Scott Michel
77f452d1a8 Updated i128 sext support for CellSPU backend, contributed by Ken Werner (IBM) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80042 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 22:37:34 +00:00
Chris Lattner
67e7ba8fc2 remove some dead lines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80031 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 21:01:56 +00:00
Chris Lattner
447da71345 convert to filecheck style 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80029 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 20:57:38 +00:00
Chris Lattner
0765ce66be convert to filecheck 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80025 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 20:49:04 +00:00
Daniel Dunbar
3ff36b7814 Switch abi-isel.ll to FileCheck; it's not much faster, but it now tests a lot 
more and is much nicer to the OS.
 - Dan, please check. If there are parts of the test you think I should strip
   out so it doesn't cause random failures let me know (there are still some PIC
   label numbers in it, for example).


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 2009-08-25 18:45:03 +00:00
David Goodwin
88a589c4b3 Fixup register kills after scheduling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80002 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 17:03:05 +00:00
Anton Korobeynikov
379a087cc7 Provide dynamic_stackalloc lowering for MSP430. 
This fixes PR4769

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 2009-08-25 17:00:23 +00:00
Dan Gohman
fea1dd0804 Remove obsolete -f flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79992 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 15:38:29 +00:00
Dale Johannesen
f6163dc856 Fix PR 4751, another difficulty with %a modifier on x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79961 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 00:16:14 +00:00
Scott Michel
f6045fe8c4 - Remove SelectSEXTi128 from SPUISelDAGToDAG.cpp, evidently, this is redundant 
code, according to Anton (I'm not totally convinced, but we can always
  resurrect patches if we need to do so.)
- Start moving CellSPU's tests to prefer FileCheck.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79958 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-24 23:57:35 +00:00
Scott Michel
838dbd92d8 Prefer 'FileCheck' over 'grep'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79953 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-24 22:49:22 +00:00
Scott Michel
f1fa4fd282 128-bit sign extension and vector shift cleanups, contributed by Ken Werner 
(IBM).


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 2009-08-24 22:28:53 +00:00
Bob Wilson
81fece667e Fix a typo. Somehow I thought this had passed before, but I guess not. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79937 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-24 21:17:17 +00:00
Bob Wilson
ef63f70794 Convert slow test to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79935 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-24 20:33:47 +00:00
Daniel Dunbar
d60054e512 Convert two gratuitous abuses of poor helpless CPU cycles to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79933 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-24 20:08:27 +00:00
Dale Johannesen
a3f2b21aff Split test into 3. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79926 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-24 17:51:19 +00:00
Dale Johannesen
a60e51f7e8 Make linkerprivate work for ARM and PPC. Testcase covers 
all Darwin targets; could be split into separate tests for
the chip subdirectories, but from Chris' last mail on testing
I assume he'd rather have only one test.  Generic seems to be
the best available, maybe there should be a Darwin subdirectory?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79877 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-24 01:03:42 +00:00
Daniel Dunbar
67f99986fa Rerevert (r75663 and r76805), seems there is more non-determinism. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79856 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-23 17:26:24 +00:00
Jakob Stoklund Olesen
46ff969ca6 Fix PR4753. 
When undoing a reuse in ReuseInfo::GetRegForReload, check if it was only a
sub-register being used. The MachineOperand::getSubReg() method is only valid
for virtual registers, so we have to recover the sub-register index manually.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79855 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-23 13:01:45 +00:00
Daniel Dunbar
895ae9b30d Speculatively revert r76823 (i.e., reapply r75663 and r76805) to see if the real 
problem is fixed by the TableGen determinism fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79851 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-23 10:44:51 +00:00
Eli Friedman
ce392eb3ea Make x86 test actually test x86 code generation. Fix the 
construct on ARM, which was breaking by coincidence, and add a similar 
testcase for ARM.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79719 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 03:13:10 +00:00
Chris Lattner
934a7567cb rename test, make more specific. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79712 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 00:44:24 +00:00
Anton Korobeynikov
d99dda22f4 Add missing RUN line 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 00:28:50 +00:00
Anton Korobeynikov
65a3788694 Reduce the test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79703 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 00:18:11 +00:00
Bob Wilson
b6c68f9e74 Use CHECK-NEXT to make sure we're only getting one copy of each shuffle 
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79702 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 00:13:23 +00:00
Bob Wilson
c692cb77aa Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations, 
now using shuffles instead of intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79673 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 20:54:19 +00:00
Anton Korobeynikov
162da3c7b4 Add fcopysign instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79664 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 20:02:37 +00:00
Anton Korobeynikov
3c2734c82b Handle 'r' inline asm constraint 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79648 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 18:15:41 +00:00
Bob Wilson
3b83287c4e Add some tests for vext.16 and vext.32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79638 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 16:35:24 +00:00
Bob Wilson
d4b4cf524b Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these as 
vector shuffles.  Temporarily remove the tests for these operations until the
new implementation is working.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79579 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 00:01:42 +00:00
Dale Johannesen
a70872e15e Use FileCheck even though this means testing for something 
that has nothing to do with the point of the test, per Chris.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79569 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-20 22:12:08 +00:00
Dan Gohman
ef74e9bf2a Fix an x86 code size regression: prefer RIP-relative addressing 
over absolute addressing even in non-PIC mode (unless the address
has an index or something else incompatible), because it has a
smaller encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79553 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-20 18:23:44 +00:00
Evan Cheng
89d177f017 Fix an obvious copy-n-paste bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-20 17:01:04 +00:00
Dale Johannesen
4caadc3ae0 Use FileCheck for the test run where it's appropriate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79534 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-20 16:58:04 +00:00
Dale Johannesen
7bcec7e541 Handle 'a' modifier in X86 asms. PR 4742. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79484 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 22:44:41 +00:00
Bill Wendling
ef01ab0973 Make this test platform neutral. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79447 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 18:51:45 +00:00
Dan Gohman
6a402dc952 Add an x86 peep that narrows TEST instructions to forms that use 
a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 18:16:17 +00:00
Bob Wilson
de95c1b88b Add support for Neon VEXT (vector extract) shuffles. 
This is derived from a patch by Anton Korzh.  I modified it to recognize
the VEXT shuffles during legalization and lower them to a target-specific
DAG node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79428 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 17:03:43 +00:00
Eli Friedman
d68eea2b6d PR4737: Fix a nasty bug in load narrowing with non-power-of-two types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79415 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 08:46:10 +00:00
Dan Gohman
db8dc2b9fa Legalize the shift amount operand of SRL_PARTS, SHL_PARTS, and 
SRA_PARTS, as is done for SRL, SHL, and SRA.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79380 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 23:36:17 +00:00
Richard Osborne
1123135dbf Add support for mergeable sections back into the XCore backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79368 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 21:14:31 +00:00
Richard Osborne
a9e8334877 Put data with relocations in the same sections as data without relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79351 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 17:58:17 +00:00
Dan Gohman
9ae003d334 Make this test less sensitive to assembler differences. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79348 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 17:19:46 +00:00
Chris Lattner
755baa8329 force a triple so this passes on darwin 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79345 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 16:55:45 +00:00
Dan Gohman
da65822cfc Make tail merging handle blocks with repeated predecessors correctly, and 
remove RemoveDuplicateSuccessor, as it is no longer necessary, and because
it breaks assumptions made in
MachineBasicBlock::isOnlyReachableByFallthrough.

Convert test/CodeGen/X86/omit-label.ll to FileCheck and add a testcase
for PR4732.

test/CodeGen/Thumb2/thumb2-ifcvt2.ll sees a diff with this commit due to
it being bugpoint-reduced to the point where it doesn't matter what the
condition for the branch is.

Add some more interesting code to
test/CodeGen/X86/2009-08-06-branchfolder-crash.ll, which is the testcase
that originally motivated the RemoveDuplicateSuccessor code, to help
verify that the original problem isn't being re-broken.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79338 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 15:18:18 +00:00
Evan Cheng
51f39961c3 Fix revsh pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79318 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 05:43:23 +00:00
Dale Johannesen
5cfd4ddece PowerPC inline asm was emitting two output operands 
for a single "m" constraint; this is wrong because the
opcode of a load or store would have to change in parallel.
This patch makes it always compute addresses into a register,
which is correct but not as efficient as possible.  7144566.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79292 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 00:18:39 +00:00
Richard Osborne
2a5e23b44d Update getSectionForConstant() to to allow mergable sections to be nulled out 
if not supported by the ELF subtarget.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79249 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-17 16:37:11 +00:00
Eli Friedman
51fe650c58 Fix test on Linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79140 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 21:28:17 +00:00
Bill Wendling
af56634058 Reapply r79127. It was fixed by d0k. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79136 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 21:21:19 +00:00
Bill Wendling
f865ea85bd Revert r79127. It was causing compilation errors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79135 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 21:14:01 +00:00
Evan Cheng
088880cb19 Change allowsUnalignedMemoryAccesses to take type argument since some targets 
support unaligned mem access only for certain types. (Should it be size
instead?)

ARM v7 supports unaligned access for i16 and i32, some v6 variants support it
as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79127 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 19:23:44 +00:00
Chris Lattner
5dafafdeb4 implement support for CHECK-NEXT: in filecheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79123 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 18:32:21 +00:00
Jakob Stoklund Olesen
16b794d25a Refine EarlyClobber assert in register scavenger. 
It is legal for an inline asm operand to use an earlyclobber register if the
use operand is tied to the earlyclobber operand. The issue is discussed here:

  http://gcc.gnu.org/ml/gcc/1999-04n/msg00431.html

We should perhaps let only the machine code verifier worry about these finer
details. EarlyClobber operands are not really interesting to the scavenger.

This fixes PR4528 for the third time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79122 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 18:16:58 +00:00
Chris Lattner
d04fee1e2b specify a target triple so global variable manglings are consistent etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79118 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 17:35:05 +00:00
Chris Lattner
d8d7335f79 convert to filecheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79117 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 17:28:09 +00:00
Chris Lattner
11ade72cda rename this test to sse2.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79116 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 17:24:09 +00:00
Chris Lattner
8e1fad4bb7 merge a bunch more sse3 tests into sse3.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79115 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 17:21:44 +00:00
Chris Lattner
075ee999d3 convert test to filecheck format. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79114 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 17:05:03 +00:00
Chris Lattner
bd0463098b rename test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79113 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 17:01:44 +00:00
Chris Lattner
37c59b48c7 this is a test for sse3, simplify it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79112 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 17:01:19 +00:00
Jakob Stoklund Olesen
d62c9a697b Don't setCalleeSavedInfoValid() until spills are interted. 
In a naked function, the flag is never set and getPristineRegs() returns an
empty list. That means naked functions are able to clobber callee saved
registers, but that is the whole point of naked functions.

This fixes PR4716.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79096 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 13:10:46 +00:00
Jakob Stoklund Olesen
7d927212de Add XFAIL testcase for setcc undef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79093 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 12:10:22 +00:00
Jakob Stoklund Olesen
ea60d3d9f2 Add XFAIL test case for a scavenger assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79092 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 12:09:56 +00:00
Jakob Stoklund Olesen
7a1e872564 Update LocalRewriter::DistanceMap when inserting stack loads. 
In the included test case, a stack load was not included in DistanceMap. That
caused TransferDeadness to ignore the instruction, leading to a scavenger
assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79090 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 11:03:03 +00:00
Evan Cheng
39f4d470b6 Fix tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79086 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 08:23:11 +00:00
Evan Cheng
bc9b754091 Turn on if-conversion for thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79084 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 07:59:10 +00:00
Chris Lattner
760e24cd05 use XCore-specific section with xcore specific cp/dp flags to restore 
support for globals going into the appropriate sections with the flags.

This hopefully finishes unbreaking the previous behavior that I broke before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79079 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 06:09:35 +00:00
Dan Gohman
d6708eade0 On x86-64, for a varargs function, don't store the xmm registers to 
the register save area if %al is 0. This avoids touching xmm
regsiters when they aren't actually used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79061 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 01:38:56 +00:00
Evan Cheng
98a0104014 Leaf functions which do not save CSRs can be frameless even with -disable-fp-elim. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79039 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 20:48:13 +00:00
Evan Cheng
31b99dd760 Also shrink immediate branches; also more assembler workarounds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79014 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 18:31:44 +00:00
Anton Korobeynikov
2247276c6f Properly handle indirect win64 args when they're passed in memory 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79009 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 18:19:10 +00:00
Evan Cheng
a1efbbdbf3 Shrink ADR and LDR from constantpool late during constantpool island pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78970 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 00:32:16 +00:00
Bruno Cardoso Lopes
fdf229eda9 Remove HasCrazyBSS and add a flag in TAI to indicate that '.section' 
must be emitted for PowerPC-Linux '.bss' section


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78958 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 23:30:21 +00:00
Daniel Dunbar
b42dad4761 Revert 78892 and 78895, these break generating working executables on 
x86_64-apple-darwin10.

--- Reverse-merging r78895 into '.':
U    test/CodeGen/PowerPC/2008-12-12-EH.ll
U    lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U    include/llvm/Target/DarwinTargetAsmInfo.h
U    lib/Target/X86/X86TargetAsmInfo.cpp
U    lib/Target/X86/X86TargetAsmInfo.h
U    lib/Target/ARM/ARMTargetAsmInfo.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/ARMTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.h
U    lib/Target/PowerPC/PPCTargetMachine.cpp
G    lib/Target/DarwinTargetAsmInfo.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 17:03:38 +00:00
Chris Lattner
b71b909bc7 reintroduce support for Mips "small" section handling. This is 
implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78900 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 06:28:06 +00:00
Evan Cheng
48bd7e3bbc tPOP_RET now has predicate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78898 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 06:05:07 +00:00
Chris Lattner
bf04f72592 fix typo, add 10.6 version of test for my previous patch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78895 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:43:33 +00:00
Evan Cheng
86e5f7b6f8 It's ok to spill a tGPR register as long as it's still allocated a low register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78893 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:40:51 +00:00
Bruno Cardoso Lopes
b808588a3a Change MCSectionELF to represent a section semantically instead of 
syntactically as a string, very similiar to what Chris did with MachO.
The parsing support and validation is not introduced yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78890 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:07:35 +00:00
Dan Gohman
cf20ac4fd1 Various AsmWriter output cleanups. Use WriteAsOperand instead of 
PrintUnmangledNameSafely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78878 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 01:36:44 +00:00
Dan Gohman
46d505647d Use WriteAsOperand to print BasicBlock names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78838 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 20:56:56 +00:00
Bob Wilson
114a266c94 Generate Neon VTBL and VTBX instructions from the corresponding intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78835 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 20:51:55 +00:00
Dale Johannesen
871fc2eaa0 Test for 78821, sort of. While that bug is nondeterministic, 
this test failed consistently on a Darwin build.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78822 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 17:43:47 +00:00
Chris Lattner
54d26fa799 one last (?) bad x86 triple test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78801 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 06:49:44 +00:00
Chris Lattner
db777bbb97 fix some pastos in triple lines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78800 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 06:49:12 +00:00
Chris Lattner
9249a9241d another bogus triple 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78798 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 06:36:52 +00:00
Chris Lattner
118987f080 fix another broken target triple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78796 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 06:29:18 +00:00
Chris Lattner
ff740d11f0 fix an incorrect target triple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78795 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 06:28:51 +00:00
Chris Lattner
e14463832c add nounwind 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78791 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 05:44:03 +00:00
Evan Cheng
ea253b99e9 Remove an Darwin assembler workaround. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78777 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 01:56:42 +00:00
Evan Cheng
05c269c645 Shrink ADDS, ADC, RSB, and SUBS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78776 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 01:49:45 +00:00
Evan Cheng
b89030ab65 Shrinkify Thumb2 r = add sp, imm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78745 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 23:00:31 +00:00
Evan Cheng
4b322e58b7 Shrinkify Thumb2 load / store multiple instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78717 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 21:11:32 +00:00
Chris Lattner
d3fe75e2bf now that these are in file-check format, we can merge them together 
into one bigger test (which runs faster)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78672 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 15:54:17 +00:00
Evan Cheng
195c71b472 Fix the previous accidental commit. Now shrinking common Thumb2 load / store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78659 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 09:37:40 +00:00
Jakob Stoklund Olesen
8c54a62061 Rebuild RegScavenger::DistanceMap each time it is needed. 
The register scavenger maintains a DistanceMap that maps MI pointers to their
distance from the top of the current MBB. The DistanceMap is built
incrementally in forward() and in bulk in findFirstUse(). It is used by
scavengeRegister() to determine which candidate register has the longest
unused interval.

Unfortunately the DistanceMap contents can become outdated. The first time
scavengeRegister() is called, the DistanceMap is filled to cover the MBB. If
then instructions are inserted in the MBB (as they always are following
scavengeRegister()), the recorded distances are too short. This causes bad
behaviour in the included test case where a register use /after/ the current
position is ignored because findFirstUse() thinks is is /before/ the current
position. A "using an undefined register" assertion follows promptly.

The fix is to build a fresh DistanceMap at the top of scavengeRegister(), and
discard it after use. This means that DistanceMap is no longer needed as a
RegScavenger member variable, and forward() doesn't need to update it.

The fix then discloses issue number two in the same test case: The candidate
search in scavengeRegister() finds a CSR that has been saved in the prologue,
but is currently unused. It would be both inefficient and wrong to spill such
a register in the emergency spill slot. In the present case, the emergency
slot restore is placed immediately before the normal epilogue restore, leading
to a "Redefining a live register" assertion.

Fix number two: When scavengerRegister() stumbles upon an unused register that
is overwritten later in the MBB, return that register early. It is important
to verify that the register is defined later in the MBB, otherwise it might be
an unspilled CSR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78650 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 06:25:12 +00:00
Bob Wilson
d1fa3f58a0 Convert more Neon tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78648 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 05:51:19 +00:00
Bob Wilson
b0abb4dc42 Use vAny type to get rid of Neon intrinsics that differed only in whether 
the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.

If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78646 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 05:39:44 +00:00
Bob Wilson
f24bd401eb Use new EVT::vAny type to combine Neon intrinsics for VPADD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78632 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 01:15:26 +00:00
Evan Cheng
3a1f0f6785 Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78622 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 23:56:04 +00:00
Dan Gohman
00edf39b34 Fix a bug in the DAGCombiner's handling of multiple linked 
MERGE_VALUES nodes. Replacing the result values with the
operands in one MERGE_VALUES node may cause another
MERGE_VALUES node be CSE'd with the first one, and bring
its uses along, so that the first one isn't dead, as this
code expects. Fix this by iterating until the node is
really dead. This fixes PR4699.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78619 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 23:43:19 +00:00
David Goodwin
c5cfea3c02 Use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78614 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 23:14:14 +00:00
David Goodwin
4980187dd9 Use FileCheck... its good for you... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78613 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 23:06:57 +00:00
David Goodwin
af37f341df Fix test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78611 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 22:58:08 +00:00
David Goodwin
aeb66fe54e Fix test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78606 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 22:31:04 +00:00
David Goodwin
338268c67f Use NEON for single-precision int<->FP conversions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78604 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 22:17:39 +00:00
Evan Cheng
e2b861f7d9 Handle the constantfp created during post-legalization dag combiner phase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78594 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 20:25:59 +00:00
Dan Gohman
5743a3f201 Add nounwind keywords. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78568 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 16:48:40 +00:00
Chris Lattner
ff4bc460c5 Make the big switch: Change MCSectionMachO to represent a section *semantically* 
instead of syntactically as a string.  This means that it keeps track of the 
segment, section, flags, etc directly and asmprints them in the right format.
This also includes parsing and validation support for llvm-mc and 
"attribute(section)", so we should now start getting errors about invalid 
section attributes from the compiler instead of the assembler on darwin.

Still todo: 
1) Uniquing of darwin mcsections
2) Move all the Darwin stuff out to MCSectionMachO.[cpp|h]
3) there are a few FIXMEs, for example what is the syntax to get the
   S_GB_ZEROFILL segment type?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78547 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 01:39:42 +00:00
Bob Wilson
22cd2547fe Add tests for Neon VZIP and VUZP instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78529 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-09 06:48:29 +00:00
Bob Wilson
4861fd5d0c Add a test for Neon VTRN instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78528 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-09 06:30:46 +00:00
Eric Christopher
b4dc13cab7 Add crc32 instruction and intrinsics. Add a new class of prefix 
bytes for F2 0F 38 and propagate. Add a FIXME for a set
of possibilities which correspond to intrinsics already used.

New test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78508 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-08 21:55:08 +00:00
Jakob Stoklund Olesen
46151de6a0 Add support for READCYCLECOUNTER in Blackfin back-end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78506 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-08 21:42:22 +00:00
Jakob Stoklund Olesen
17421d81fd Don't build illegal ops in DAGCombiner::SimplifyBinOpWithSameOpcodeHands(). 
Blackfin supports and/or/xor on i32 but not on i16. Teach
DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes
after legalize ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78497 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-08 20:42:17 +00:00
Jakob Stoklund Olesen
dffb051c21 Simplify RegScavenger::forward a bit more. 
Verify that early clobber registers and their aliases are not used.

All changes to RegsAvailable are now done as a transaction so the order of
operands makes no difference.

The included test case is from PR4686. It has behaviour that was dependent on the order of operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78465 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-08 13:18:47 +00:00
Anton Korobeynikov
941222eea0 Do not generate 32-bit call on win64 when imm does not fit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78443 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 23:59:21 +00:00
Chris Lattner
ce0e9abef3 rename test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78441 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 23:57:30 +00:00
Chris Lattner
eed4657594 merge a bunch of tests together into one, convert to filecheck which 
is more tolerant of whitespace differences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78439 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 23:56:42 +00:00
Bob Wilson
e9ce5d5ef9 Convert more Neon tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78433 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 23:45:02 +00:00
David Goodwin
767a952a6f Make NEON single-precision FP support the default for cortex-a8 (again). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78430 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 23:32:33 +00:00
Anton Korobeynikov
32a1b25781 2 more vdup.32 cases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78419 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 22:36:50 +00:00
Evan Cheng
d77c7aba83 Thumb2 32-bit ldm / stm needs .w suffix if submode is ia. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78410 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 21:19:10 +00:00
Evan Cheng
1d2426c470 Fix support to use NEON for single precision fp math. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78397 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 19:30:41 +00:00
Evan Cheng
15c592ddff Another coalescer bug. When a dead copy is eliminated, transfer the kill to a def of the exact register rather than a super-register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78376 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 07:14:14 +00:00
Evan Cheng
861986401e It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing. 
This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time.

This fixes PR4659 and PR4682.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78361 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 00:34:42 +00:00
Dale Johannesen
4a20e518c7 Add the testcase from PR 4668. This works at the 
moment, but it's a fragile area.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78358 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-07 00:04:42 +00:00
Dale Johannesen
14e545d18e Fix PR 4626, a crash in branch folding after OptimizeBlock 
produced a CFG it wasn't prepared for.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78351 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 22:56:40 +00:00
Bob Wilson
b36ec86c01 Implement Neon VST[234] operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78330 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 18:47:44 +00:00
Bob Wilson
004f7c7049 Fix incorrect intrinsic declarations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78329 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 18:46:26 +00:00
Dan Gohman
8e1593ec36 Tidy up this testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78322 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 17:11:55 +00:00
Chris Lattner
fc60eb4033 reduce testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78315 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 16:14:33 +00:00
Dan Gohman
e483feded9 Remove an over-aggressive assert. Functions with empty struct return 
types don't have any return values, from CodeGen's perspective.
This fixes PR4688.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78311 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 15:07:58 +00:00
Anton Korobeynikov
04d1f2e79c Add tests for X86-64 code model handling. Small and kernel for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78300 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 12:25:20 +00:00
Dan Gohman
aae317ac32 Fix a bug in x86's PreprocessForRMW logic that was exposed 
by aggressive chain operand optimization. UpdateNodeOperands
does not modify the node in place if it would result in
a node identical to an existing node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78297 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 09:22:57 +00:00
Dan Gohman
5cbd37e505 Fix a few places in DAGCombiner that were creating all-ones-bits 
and high-bits values in ways that weren't correct for integer
types wider than 64 bits. This fixes a miscompile in
PPMacroExpansion.cpp in clang on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78295 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 09:18:59 +00:00
Chris Lattner
067fd3275e this passes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78281 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 03:55:49 +00:00
Sanjiv Gupta
e90acceb50 XFAIL it while it is being worked on. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 02:19:20 +00:00
Bob Wilson
9b600c60af Add tests for new NEON vld instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78264 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 00:38:31 +00:00
Bob Wilson
3765d0f1a7 Convert more Neon tests to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78261 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 23:51:20 +00:00
Anton Korobeynikov
567d14f07c Missed pieces for ARM HardFP ABI. 
Patch by Sandeep Patel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78225 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 19:04:42 +00:00
Dan Gohman
74f6f9a931 Enable the new no-SP register classes by default. This is to address 
PR4572. A few tests have some minor code regressions due to different
coalescing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78217 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 17:40:24 +00:00
Anton Korobeynikov
f4ef8c9045 Add testcases for reg-mem arithemtics added recently 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78214 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 17:04:32 +00:00
Anton Korobeynikov
9e155d61da Convert bswap test to filecheck, add more test entries & convert stuff to filecheck 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78212 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 16:50:53 +00:00
Dan Gohman
22f7d57dde Fix a bug in the PIC16 backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78211 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 16:46:43 +00:00
Dan Gohman
c61954b57c Change these tests to use function attributes rather than special llc 
command-line options.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78204 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 16:37:27 +00:00
Chris Lattner
299a8141e3 checking in broken testcases is not such a good idea. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78201 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 16:04:18 +00:00
Sanjiv Gupta
96a0a02119 Quite a few tests crashed in llc after 78142. This is just one of them. I hope to add a few more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78198 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 15:52:14 +00:00
Evan Cheng
6248fa4529 Disable stack coloring with register for now. It's not able to set kill markers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78179 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 07:26:17 +00:00
Evan Cheng
9cd1632814 Another nasty coalescer bug (is there another kind): 
After coalescing reg1027's def and kill are both at the same point:
 %reg1027,0.000000e+00 = [56,814:0)  0@70-(814)

bb5:
60   %reg1027<def> = t2MOVr %reg1027, 14, %reg0, %reg0
68   %reg1027<def> = t2LDRi12 %reg1027<kill>, 8, 14, %reg0
76   t2CMPzri %reg1038<kill,undef>, 0, 14, %reg0, %CPSR<imp-def>
84   %reg1027<def> = t2MOVr %reg1027, 14, %reg0, %reg0
96   t2Bcc mbb<bb5,0x2030910>, 1, %CPSR<kill>

Do not remove the kill marker on t2LDRi12.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78178 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 07:05:41 +00:00
Dan Gohman
40a0b2c305 Revert changes accidentally committed along with r78163. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78165 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 05:38:13 +00:00
Dan Gohman
c3c9c486e4 Teach X86FastISel how to handle CCValAssign::BCvt, which is used for 
MMX arguments. This fixes PR4684.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78163 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 05:33:42 +00:00