David Greene
786da7dec2
Add support for emitting non-temporal stores for DAGs marked
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non-temporal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 17:02:56 +00:00
Jakob Stoklund Olesen
d135f14f61
Fix PR6283.
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When coalescing with a physreg, remember to add imp-def and imp-kill when
dealing with sub-registers.
Also fix a related bug in VirtRegRewriter where substitutePhysReg may
reallocate the operand list on an instruction and invalidate the reg_iterator.
This can happen when a register is mentioned twice on the same instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 02:06:10 +00:00
Bob Wilson
bf9b221c00
Besides removing phi cycles that reduce to a single value, also remove dead
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phi cycles. Adjust a few tests to keep dead instructions from being optimized
away. This (together with my previous change for phi cycles) fixes Apple
radar 7627077.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96057 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:31:44 +00:00
Dale Johannesen
c12da8d30a
When save/restoring CR at prolog/epilog, in a large
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stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot. Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.
SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.
Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 21:35:34 +00:00
Anton Korobeynikov
c8f6326c06
Testcases for recent stdcall / fastcall mangling improvements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 15:29:13 +00:00
Anton Korobeynikov
4dd162f394
Cleanup stdcall / fastcall name mangling.
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This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 15:28:40 +00:00
Dan Gohman
572645cf84
Reapply the new LoopStrengthReduction code, with compile time and
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bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.
This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95975 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 10:34:29 +00:00
Bob Wilson
fe61fb1e10
Add a new pass on machine instructions to optimize away PHI cycles that
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reduce down to a single value. InstCombine already does this transformation
but DAG legalization may introduce new opportunities. This has turned out to
be important for ARM where 64-bit values are split up during type legalization:
InstCombine is not able to remove the PHI cycles on the 64-bit values but
the separate 32-bit values can be optimized. I measured the compile time
impact of this (running llc on 176.gcc) and it was not significant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:30:21 +00:00
Jakob Stoklund Olesen
4a540f0593
Reapply coalescer fix for better cross-class coalescing.
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This time with fixed test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 23:55:29 +00:00
Mon P Wang
f7ea6c3ee8
The previous fix of widening divides that trap was too fragile as it depends on custom
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lowering and requires that certain types exist in ValueTypes.h. Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements. It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95823 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 23:37:45 +00:00
Bob Wilson
5e2b05a71e
Delete dead PHI machine instructions. These can be created due to type
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legalization even when the IR-level optimizer has removed dead phis, such
as when the high half of an i64 value is unused on a 32-bit target.
I had to adjust a few test cases that had dead phis.
This is a partial fix for Radar 7627077.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95816 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 22:58:57 +00:00
Evan Cheng
046632f272
Now that ShrinkDemandedOps() is separated out from DAG combine. It sometimes leave some obvious nops which dag combine used to clean up afterwards e.g. (trunk (ext n)) -> n. Look for them and squash them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95757 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 02:17:34 +00:00
Chris Lattner
cb921e7b57
move tests that depend on the x86 backend out of codegen/generic,
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and remove a few old and unreduced ones. Fixes PR5624.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95656 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 06:41:03 +00:00
Chris Lattner
4a26cc4de6
make target independent.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 06:36:30 +00:00
Chris Lattner
b00cd1c899
merge a target-specific add test into x86 directory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95654 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 06:35:50 +00:00
Chris Lattner
7816239985
merge another test in, drop the trivially constant folded cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95653 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 06:33:27 +00:00
Chris Lattner
71d845c48a
consolidate and filecheckize two tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95652 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 06:24:00 +00:00
Chris Lattner
2b7ff1be96
merge two tests, make target independent.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95651 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 06:19:20 +00:00
Chris Lattner
d863b766f5
convert to filecheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95608 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 23:47:34 +00:00
Chris Lattner
25ceb5f317
add an x86 implementation of MCTargetExpr for
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representing @GOT and friends. Use it for
personality references as a first use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 22:09:08 +00:00
Dan Gohman
618f17702d
When CodeGen'ing unoptimized code, there may be unfolded constant expressions
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in global initializers. Instead of aborting, attempt to fold them on the
spot. If folding succeeds, emit the folded expression instead.
This fixes PR6255.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95583 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 22:02:38 +00:00
Dan Gohman
c2e93b255e
In guaranteed tailcall mode, don't decline the tailcall optimization
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for blocks ending in "unreachable".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95565 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 20:34:14 +00:00
Evan Cheng
00a99a3584
Run codegen dce pass for all targets at all optimization levels. Previously it's
...
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 09:07:11 +00:00
Evan Cheng
e3e86dce64
Remove a large test case that (soon will) no longer make sense.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95492 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 09:00:30 +00:00
Rafael Espindola
2f82ca904a
Fix alignment on ppc linux. This fixes the build of crtend.o
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95477 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 03:32:21 +00:00
Evan Cheng
f22f9b35d6
Do not emit callseq instructions around sibcalls. This eliminated some unnecessary stack adjustments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95475 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 03:28:46 +00:00
Bob Wilson
e6373eb826
Handle AddrMode6 (for NEON load/stores) in Thumb2's rewriteT2FrameIndex.
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Radar 7614112.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95456 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 00:24:38 +00:00
Jakob Stoklund Olesen
d450e5b886
Don't unroll loops containing function calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95454 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 23:21:31 +00:00
Bill Wendling
63d58ebd09
Make test more fucused eliminating extraneous bits.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 11:21:05 +00:00
Evan Cheng
401f030fb8
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95373 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 06:37:00 +00:00
Evan Cheng
5f94193b36
Handle tail call with byval arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95351 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 02:21:12 +00:00
Evan Cheng
5ba8bf6d28
When the scheduler unfold a load folding instruction it move some of the predecessors to the unfolded load. It decides what gets moved to the load by checking whether the new load is using the predecessor as an operand. The check neglects the cases whether the predecessor is a flagged scheduling unit.
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rdar://7604000
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95339 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 01:27:11 +00:00
Bill Wendling
744f579b63
An empty global constant (one of size 0) may have a section immediately
...
following it. However, the EmitGlobalConstant method wasn't emitting a body for
the constant. The assembler doesn't like that. Before, we were generating this:
.zerofill __DATA, __common, __cmd, 1, 3
This fix puts us back to that semantic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95336 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 00:17:02 +00:00
Jakob Stoklund Olesen
e4d2d96cc8
Fix small bug in handling instructions with more than one implicitly defined operand.
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ProcessImplicitDefs would only mark one operand per instruction with <undef>.
This fixed PR6086.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95319 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-04 18:46:28 +00:00
Evan Cheng
1f2fda97b1
Re-enable x86 tail call optimization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95295 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-04 06:47:24 +00:00
Chris Lattner
87c06d6179
add support for the sparcv9-*-* target triple to turn on
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64-bit sparc codegen. Patch by Nathan Keynes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-04 06:34:01 +00:00
Evan Cheng
8148ae8847
Speculatively disable x86 automatic tail call optimization while we track down a self-hosting issue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95259 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:40:40 +00:00
Evan Cheng
394f1b5334
Make test less fragile
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95258 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:39:04 +00:00
Evan Cheng
febc81680c
Revert 94937 and move the noreturn check to codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95198 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 03:55:59 +00:00
Evan Cheng
86809ccdad
Allow all types of callee's to be tail called. But avoid automatic tailcall if the callee is a result of bitcast to avoid losing necessary zext / sext etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 03:28:02 +00:00
Dale Johannesen
9a6636b2cd
Reapply 95050 with a tweak to check the register class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 01:40:33 +00:00
Chris Lattner
e0bb20cc03
make these less sensitive to asm verbose changes by disabling it for them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95175 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 00:48:53 +00:00
Dale Johannesen
62a04136d5
Test revert 95050; there's a good chance it's causing
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buildbot failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95103 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 18:52:56 +00:00
Evan Cheng
b2c9290a01
Perform sibcall in some cases when arguments are passes memory. Look for cases
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where callee's arguments are already in the caller's own caller's stack and
they line up perfectly. e.g.
extern int foo(int a, int b, int c);
int bar(int a, int b, int c) {
return foo(a, b, c);
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 02:22:50 +00:00
Dale Johannesen
5ce0ee9c09
Make local RA smarter about reusing input register of a copy
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as output. Needed for (functional) correctness in inline asm,
and should be generally beneficial. 7361612.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 02:08:02 +00:00
Evan Cheng
7276c8c2b5
Fix PR6196. GV callee may not be a function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 22:40:09 +00:00
Dan Gohman
a00ef1122c
Update this test for a trivial register allocation difference.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94989 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 19:00:32 +00:00
Evan Cheng
0a4fd46d9e
Undo r94946 now all the tests are passing again.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94970 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 02:13:39 +00:00
Evan Cheng
843bd699f6
Avoid recursive sibcall's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-31 06:44:49 +00:00
Anton Korobeynikov
90cfc130d6
Fix a gross typo: ARMv6+ may or may not support unaligned memory operations.
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Even if they are suported by the core, they can be disabled
(this is just a configuration bit inside some register).
Allow unaligned memops on darwin and conservatively disallow them otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 14:08:12 +00:00
Evan Cheng
a6bff982c1
Allow more tailcall optimization: calls with inputs that are all passed in registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94873 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 01:22:00 +00:00
Evan Cheng
7096ae48c9
Catch more trivial tail call opportunities: no inputs and output types match.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-29 06:45:59 +00:00
Chris Lattner
a34103f6fa
convert the last 3 targets to use EmitFunctionBody() now that
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it has before/end body hooks.
lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp | 49 ++-----------
lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp | 87 ++++++------------------
lib/Target/XCore/AsmPrinter/XCoreAsmPrinter.cpp | 56 +++------------
test/CodeGen/XCore/ashr.ll | 2
4 files changed, 48 insertions(+), 146 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 06:22:43 +00:00
Evan Cheng
5fef8bc1cb
Fix a bug introduced by r94490 where it created a X86ISD::CMP whose output type is different from its inputs.
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This fixes PR6146.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:57:22 +00:00
Chris Lattner
d49fe1b6bc
Give AsmPrinter the most common expected implementation of
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runOnMachineFunction, and switch PPC to use EmitFunctionBody.
The two ppc asmprinters now don't heave to define
runOnMachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:28:58 +00:00
Chris Lattner
10e7c60c04
emit a 0 byte instead of a noop if a function is empty on darwin.
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"0" is nice and target independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:06:32 +00:00
Chandler Carruth
6f03433516
Quick fix to a test that is currently failing on every Linux build bot. No idea
...
if this is the "correct" fix, but it seems a strict improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94675 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-27 10:36:15 +00:00
Evan Cheng
b17124553d
Perform trivial tail call optimization for callees with "C" ABI. These are done
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even when -tailcallopt is not specified and it does not require changing ABI.
First case is the most trivial one. Perform tail call optimization when both
the caller and callee do not return values and when the callee does not take
any input arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-27 06:25:16 +00:00
Chris Lattner
c618c8aff4
emit jump table an alias ".set" directives through MCStreamer as
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assignments.
.set x, a-b
is the same as:
x = a-b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-26 21:53:08 +00:00
Rafael Espindola
2e2563bf8e
Emit .comm alignment in bytes but .align in powers of 2 for ARM ELF.
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Original patch by Sandeep Patel and updated by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94582 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-26 20:21:43 +00:00
Chris Lattner
6a315c358c
eliminate MCAsmInfo::NeedsSet: we now just use .set on any platform
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that has it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94581 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-26 20:20:43 +00:00
Evan Cheng
8c7ecaf524
Implement cond ? -1 : 0 with sbb.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94490 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-26 02:00:44 +00:00
Rafael Espindola
0173b74c55
Update test for darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 15:32:10 +00:00
Chris Lattner
5c78034bc8
we removed support for darwin8 tools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94414 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 07:43:40 +00:00
Rafael Espindola
f166ed7324
Fix PR6134.
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We are not emitting alignments on Darwin for "bar". Not sure what is the
correct way to do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94400 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 02:27:39 +00:00
Daniel Dunbar
34b6ea6cef
Attempt to unbreak test on Linux. Chris, please check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 00:54:13 +00:00
Chris Lattner
4e4af5978c
just remove this test, it is not reduced, is not clear what its testing for and
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it is dying due to fragility in the asmprinter .s comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-24 19:23:09 +00:00
Mon P Wang
6fb474bd3c
It seems better to scalarize vectors of size 1 instead of widening them.
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Add support to widen SETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-24 00:24:43 +00:00
Mon P Wang
eb38ebf15c
Improved widening loads by adding support for wider loads if
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the alignment allows. Fixed a bug where we didn't use a
vector load/store for PR5626.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-24 00:05:03 +00:00
Chris Lattner
52492ac0d0
Change constantexpr global variable initializers to convert the constants
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to MCExpr then emit them through MCStreamer with EmitValue. I think all
global variable initializers are now going through mcstreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 06:17:14 +00:00
Eric Christopher
e9625cf698
Don't lower splat vector load to relative to the esp if the
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stack may be misaligned.
Update test accordingly.
Patch by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94291 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 06:02:43 +00:00
Chris Lattner
63df4a4fec
stop testing for invalid output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 05:45:28 +00:00
Chris Lattner
05f845314a
emit .ascii and .asciz through MCStreamer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 04:54:10 +00:00
Chris Lattner
4fe5d72765
remove this test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 03:11:10 +00:00
Evan Cheng
796263464d
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94272 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 01:21:27 +00:00
Evan Cheng
4d03ca0702
Fix tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94271 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 01:19:28 +00:00
Chris Lattner
7e02e52e9a
make this less constrained, we want blank lines between globals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-22 19:51:08 +00:00
Dan Gohman
7979b72feb
Revert LoopStrengthReduce.cpp to pre-r94061 for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94123 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-22 00:46:49 +00:00
Chris Lattner
2116a4ee55
testcase for r94095
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94096 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-21 20:01:04 +00:00
Dan Gohman
a10756ee65
Re-implement the main strength-reduction portion of LoopStrengthReduction.
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This new version is much more aggressive about doing "full" reduction in
cases where it reduces register pressure, and also more aggressive about
rewriting induction variables to count down (or up) to zero when doing so
reduces register pressure.
It currently uses fairly simplistic algorithms for finding reuse
opportunities, but it introduces a new framework allows it to combine
multiple strategies at once to form hybrid solutions, instead of doing
all full-reduction or all base+index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-21 02:09:26 +00:00
Chris Lattner
213168ba46
emit basic block labels with mcstreamer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93993 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-20 07:24:05 +00:00
Chris Lattner
043c4e5c1d
emit integer and fp zeros as (e.g.) .byte 0 instead of .space 1,
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for tidiness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93992 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-20 07:19:19 +00:00
Chris Lattner
2dd245c469
signficant cleanups to EmitGlobalConstant (including streamerization
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of int initializers), change some methods to be static functions,
use raw_ostream::write_hex instead of a smallstring dance with
APValue::toStringUnsigned(S, 16).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-20 07:11:32 +00:00
Dan Gohman
cd9e155755
Fold (add x, shl(0 - y, n)) -> sub(x, shl(y, n)), to simplify some code
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that SCEVExpander can produce when running on behalf of LSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 23:30:49 +00:00
Dan Gohman
2b98bd23cb
Make SCEVAddRecExpr's getType return a pointer type when the add
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has a pointer member. This helps reduce unnecessary bitcasting
and uglygeps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93939 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 22:53:50 +00:00
Dan Gohman
8e1aa8edec
Add nounwinds.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 21:51:51 +00:00
Jakob Stoklund Olesen
35f0febcb6
Remove predicates when changing an add into an unpredicable mov.
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Since the mov is executed unconditionally, make sure that the add didn't have
any predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93909 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 21:08:28 +00:00
Evan Cheng
590d16be6f
Do not extend extension results beyond the use of a PHI instruction at the start of a use block. A PHI use is expected to kill its source values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93895 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 19:45:51 +00:00
Chris Lattner
41aa25a433
don't let asm-verbose break the check-next lines in these tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 06:39:54 +00:00
Chris Lattner
74bfe21b50
Now that we have everything nicely factored (e.g. asmprinter is not
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doing global variable classification anymore) and hookized, sink almost
all target targets global variable emission code into AsmPrinter and out
of each target.
Some notes:
1. PIC16 does completely custom and crazy stuff, so it is not changed.
2. XCore has some custom handling for extra directives. I'll look at it next.
3. This switches linux/ppc to use .globl instead of .global. If .globl is
actually wrong, let me know and I'll fix it.
4. This makes linux/ppc get a lot of random cases right which were obviously
wrong before, it is probably now a bit healthier.
5. Blackfin will probably start getting .comm and other things that it didn't
before. If this is undesirable, it should explicitly opt out of these
things by clearing the relevant fields of MCAsmInfo.
This leads to a nice diffstat:
14 files changed, 127 insertions(+), 830 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 05:38:33 +00:00
Chris Lattner
c7fbe90389
fix a significant difference between llvm and gcc on ELF systems:
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GCC would put weak zero initialized mutable data in the .bss section,
we would put it into a crasy '.gnu.linkonce.b.test,"aw",@nobits'
section. Fixing this will allow simplifications next up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93844 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 03:06:01 +00:00
Chris Lattner
129e1872c2
there is no need to emit a .section above .comm on linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93842 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 02:46:56 +00:00
Evan Cheng
f06c28aac4
Test case for r93758.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93824 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 00:35:20 +00:00
Evan Cheng
1ad0e8b576
Canonicalize -1 - x to ~x.
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Instcombine does this but apparently there are situations where this pattern will escape the optimizer and / or created by isel. Here is a case that's seen in JavaScriptCore:
%t1 = sub i32 0, %a
%t2 = add i32 %t1, -1
The dag combiner pattern: ((c1-A)+c2) -> (c1+c2)-A
will fold it to -1 - %a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93773 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-18 21:38:44 +00:00
Chris Lattner
a7c65e03c4
reduce this test and convert to filecheck, hopefully the linux buildbot
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will tell me something more useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-17 19:09:12 +00:00
Bob Wilson
3a4a832223
The Neon "vtst" instruction takes a suffix that is the element size alone --
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adding an "i" to the suffix, indicating that the elements are integers, is
accepted but not part of the standard syntax. This helps us pass a few more
of the Neon tests from gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-17 06:35:17 +00:00
Kenneth Uildriks
93ae407ec3
When checking for sret-demotion, it needs to use legal types. When using the return value of an sret-demoted call, it needs to use possibly illegal types that match the declared Type of the callee.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93667 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-16 23:37:33 +00:00
Chris Lattner
a4a1b38dda
this teestcase takes a long time to crash, remove it. If someone cares about this, they should file a bug, it's not doing any good as an xfail.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93604 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-16 00:53:22 +00:00
Bob Wilson
516ab96de3
Run the pre-register allocation tail duplication pass by default. Remove
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the -pre-regalloc-taildup command-line option, and add a new
-disable-early-taildup option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-16 00:29:50 +00:00
David Greene
ee9c595885
Fix PR6019. A load has more than one use if it feeds a bitconvert that
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has more than one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93576 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15 23:23:41 +00:00
Jim Grosbach
2be065a0e8
add testcase for r93564
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93567 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15 22:27:37 +00:00
Anton Korobeynikov
12c71a53b5
Reenable tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93555 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15 21:19:26 +00:00
Anton Korobeynikov
8396a17bc3
Temporary disable tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15 02:09:27 +00:00
Anton Korobeynikov
74a265686d
Add variable-width shifts for MSP430
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93468 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-14 22:09:38 +00:00
Dan Gohman
ff00a55517
Fix a codegen abort seen in 483.xalancbmk.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93417 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-14 03:08:49 +00:00
Chris Lattner
dd8e09ad76
this test requires SSE, thanks to jyasskin for pointing this out.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 21:51:41 +00:00
Evan Cheng
eb18812f75
Commit some changes I had managed to lose last night while refactoring the code. Avoid change use of PHI instructions because it's not legal to insert any instructions before them.
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This fixes PR6027.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93335 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 19:16:39 +00:00
Evan Cheng
81d22d87de
Re-enable extension optimization pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 08:45:40 +00:00
Chris Lattner
2f8cc26be4
remove uses of deprecated functions, this generates slightly
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different BlockAddress labels, but nothing semantically important.
Add a FIXME that BlockAddress codegen is broken if the LLVM BB has
an empty name (e.g. strip was run).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 07:30:49 +00:00
Evan Cheng
262a96edb4
Disable opt-ext pass to unbreak the build for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 01:51:43 +00:00
Jeffrey Yasskin
3aba5b1d60
Try to fix the ARM and PPC buildbots. The -mattr=vector-unaligned-mem
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flag doesn't exist there, and this is an x86 test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 00:31:43 +00:00
Evan Cheng
7da9ecf967
Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.
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For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93278 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 00:30:23 +00:00
Evan Cheng
d9d3a894b3
Add nounwind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93244 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-12 18:29:23 +00:00
Duncan Sands
796248fdb1
Revert commit 93204, since it causes the assembler to barf
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on x86-64 linux with messages like this:
Error: Incorrect register `%r14' used with `l' suffix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93242 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-12 17:46:16 +00:00
Dan Gohman
ad4f7a6882
Make several tests less fragile.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93230 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-12 04:52:47 +00:00
Dan Gohman
f1b4d26e67
Reapply the MOV64r0 patch, with a fix: MOV64r0 clobbers EFLAGS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93229 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-12 04:42:54 +00:00
Evan Cheng
b85071c736
Add manual ISD::OR fastisel selection routines. TableGen is no longer autogen them after 93152 and 93191.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 22:59:27 +00:00
Evan Cheng
199c4240fe
Extend r93152 to work on OR r, r. If the source set bits are known not to overlap, then select as an ADD instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 22:03:29 +00:00
Chris Lattner
c31b0fc31f
reduce this to a sensible testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 21:58:19 +00:00
David Greene
67df1a1d64
Shorten up this testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 21:50:35 +00:00
Evan Cheng
05920b8146
Revert 93158. It's breaking quite a few x86_64 tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93185 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 21:13:41 +00:00
Jakob Stoklund Olesen
dd437ba15e
Avoid adding PHI arguments for a predecessor that has gone away when a BRCOND was constant folded.
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This fixes PR5980.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93184 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 21:02:33 +00:00
Dan Gohman
e5dacc55ad
Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it
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has an immediate with at least 32 bits of leading zeros, to avoid needing to
materialize that immediate in a register first.
FileCheckize, tidy, and extend a testcase to cover this case.
This fixes rdar://7527390.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93160 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 17:58:34 +00:00
Dan Gohman
71c25b7d7b
Re-instate MOV64r0 and MOV16r0, with adjustments to work with the
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new AsmPrinter. This is perhaps less elegant than describing them
in terms of MOV32r0 and subreg operations, but it allows the
current register to rematerialize them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 17:37:57 +00:00
Dan Gohman
3e8e4fd40c
Generalize this check to avoid depending on a specific register assignment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93157 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 17:24:27 +00:00
Dan Gohman
3bf224ba1d
Make this test less trivial, to avoid spurious failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93156 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 17:23:56 +00:00
Evan Cheng
4b0345be30
Select an OR with immediate as an ADD if the input bits are known zero. This allow the instruction to be 3address-fied if needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93152 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 17:03:47 +00:00
David Greene
95eb2eeea6
Implement a feature (-vector-unaligned-mem) to allow targets to
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ignore alignment requirements for SIMD memory operands. This
is useful on architectures like the AMD 10h that do not trap on
unaligned references if a status bit is twiddled at startup time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93151 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 16:29:42 +00:00
Jeffrey Yasskin
a77169dbeb
Fix http://llvm.org/PR5729 : x86-64 tail calls were putting their targets into
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R11, and then asserting that the target was in R9. Since R9 isn't reserved for
the target anymore, and is used as an argument, this patch changes the
assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-09 18:56:43 +00:00
Dan Gohman
d199636039
Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode
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really does need to be a vector type, because
TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type,
and it needs to be able to distinguish between vectors and scalars.
Also, fix some more issues with legalization of vector casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-09 02:13:55 +00:00
Evan Cheng
306b4cafc1
Fix a critical bug in 64-bit atomic operation lowering for 32-bit. The results of the cmpxchg8b instructions are being thrown away when it branches back to the top of the checking loop. This means the loop always compares against the old value and this can result in a dead lock.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-08 23:41:50 +00:00
Evan Cheng
6f279e0bda
ReplaceAllUsesOfValueWith may delete other nodes that the one being replaced. Do not delete dead nodes again.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92988 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-08 02:36:12 +00:00
Chris Lattner
bd1fccfad5
Fix rdar://7517201, a regression introduced by r92849.
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When folding a and(any_ext(load)) both the any_ext and the
load have to have only a single use.
This removes the anyext-uses.ll testcase which started failing
because it is unreduced and unclear what it is testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 21:59:23 +00:00
Evan Cheng
347a9cb507
APInt'fy TargetLowering::SimplifySetCC to fix PR5963.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92943 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 20:58:44 +00:00
Evan Cheng
17751dac3e
Fix a minor regression from my dag combiner changes. One more place which needs to look pass truncates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92885 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 00:54:06 +00:00
Jakob Stoklund Olesen
d1862037f0
Add comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92883 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 00:51:04 +00:00
Jakob Stoklund Olesen
30ac0467ce
Add Target hook to duplicate machine instructions.
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Some instructions refer to unique labels, and so cannot be trivially cloned
with CloneMachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92873 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-06 23:47:07 +00:00
Evan Cheng
d40d03e1bd
Teach dag combine to fold the following transformation more aggressively:
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(OP (trunc x), (trunc y)) -> (trunc (OP x, y))
Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.
This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-06 19:38:29 +00:00
Dan Gohman
d7d1a29003
Move this test from test/Transforms/IndVarSimplify to
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test/CodeGen/X86, as doesn't use -indvars, and it does use
llc -march=x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92799 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 22:52:54 +00:00
Bill Wendling
9f7c5c0dca
Don't assign the shift the same type as the variable being shifted. This could
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result in illegal types for the SHL operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92797 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 22:39:10 +00:00
Dan Gohman
aceba31b7a
Delete useless trailing semicolons.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 17:55:26 +00:00
Dan Gohman
c12e979790
Make this test more portable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 21:23:34 +00:00
Dan Gohman
b75e8642a6
Add some tests and update an existing test to reflect recent
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x86 isel peeps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 20:53:54 +00:00
Anton Korobeynikov
39784e158a
Fix invalid chain folding for memory variant of sdiv / udiv
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 10:31:54 +00:00
Chris Lattner
d0592d3be6
fix PR5930, allowing the asmprinter to emit difference between
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two labels as a truncate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92455 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-03 18:33:18 +00:00
Chris Lattner
2ef90d782e
add PR#
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-03 18:10:58 +00:00
Chris Lattner
5099b31f98
differences between two blockaddress's don't cause a
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global variable initializer to require relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-03 18:09:40 +00:00
Chris Lattner
09987f73f6
allow this to work on linux hosts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-02 00:22:15 +00:00
Chris Lattner
133ce871df
Teach codegen to handle:
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(X != null) | (Y != null) --> (X|Y) != 0
(X == null) & (Y == null) --> (X|Y) == 0
so that instcombine can stop doing this for pointers. This is part of PR3351,
which is a case where instcombine doing this for pointers (inserting ptrtoint)
is pessimizing code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92406 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-02 00:00:03 +00:00
Chris Lattner
aac00392c3
rename file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-01 23:55:04 +00:00
Chris Lattner
f031e8ad01
Teach codegen to lower llvm.powi to an efficient (but not optimal)
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multiply sequence when the power is a constant integer. Before, our
codegen for std::pow(.., int) always turned into a libcall, which was
really inefficient.
This should also make many gfortran programs happier I'd imagine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92388 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-01 03:32:16 +00:00
Chris Lattner
0fba8cf9ff
Make this more likely to generate a libcall.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92387 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-01 03:26:51 +00:00
Sanjiv Gupta
223497e1ef
Extern declaration for unordered.f32 libcall was not being emitted. Fixed that.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92242 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-29 03:24:34 +00:00
Sanjiv Gupta
917283a418
Fixed llc crash for zext (i1 -> i8) loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 04:53:24 +00:00
Chris Lattner
04b091a782
handle equality memcmp of 8 bytes on x86-64 with two unaligned loads and a
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compare. On other targets we end up with a call to memcmp because we don't
want 16 individual byte loads. We should be able to use movups as well, but
we're failing to select the generated icmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92107 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-24 01:07:17 +00:00
Chris Lattner
8047d9a6be
move an optimization for memcmp out of simplifylibcalls and into
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SDISel. This optimization was causing simplifylibcalls to
introduce type-unsafe nastiness. This is the first step, I'll be
expanding the memcmp optimizations shortly, covering things that
we really really wouldn't want simplifylibcalls to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92098 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-24 00:37:38 +00:00
Sanjiv Gupta
76d2f9a4db
Reapply 91904.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 11:19:09 +00:00
Sanjiv Gupta
e433d5e1f4
deleting empty file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91994 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 10:35:24 +00:00
Sanjiv Gupta
6d48855a56
Reverting back 91904.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91993 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 09:46:01 +00:00
Dale Johannesen
9949933d6e
Use more sensible type for flags in asms. PR 5570.
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Patch by Sylve`re Teissier (sorry, ASCII only).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 07:32:51 +00:00
Eric Christopher
d060b2576a
Update objectsize intrinsic and associated dependencies. Fix
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lowering code and update testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 02:51:48 +00:00
Anton Korobeynikov
a1508f9514
Add testcase for PR5703
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91931 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 22:37:23 +00:00
Evan Cheng
b1f4981333
Remove target attribute break-sse-dep. Instead, do not fold load into sse partial update instructions unless optimizing for size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91910 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 17:47:23 +00:00
Sanjiv Gupta
66500208a5
While converting one of the operands to a memory operand, we need to check if it is Legal and does not result into a cyclic dep.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91904 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 14:25:37 +00:00
Sanjiv Gupta
bcfd12a234
Emit direction operand in binary insns that stores in memory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91777 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 13:52:01 +00:00
Sanjiv Gupta
3f5d7642ce
Test cases for changes done in 91768.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91773 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 11:38:14 +00:00
Evan Cheng
9ab2b98ba5
Increase opportunities to optimize (brcond (srl (and c1), c2)).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91717 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 21:31:31 +00:00
Evan Cheng
400073d546
On recent Intel u-arch's, folding loads into some unary SSE instructions can
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be non-optimal. To be precise, we should avoid folding loads if the instructions
only update part of the destination register, and the non-updated part is not
needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks
the partial register dependency and it can improve performance. e.g.
movss (%rdi), %xmm0
cvtss2sd %xmm0, %xmm0
instead of
cvtss2sd (%rdi), %xmm0
An alternative method to break dependency is to clear the register first. e.g.
xorps %xmm0, %xmm0
cvtss2sd (%rdi), %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 07:40:29 +00:00
Dan Gohman
f838e2366a
Tidy up this testcase and add test for tailcall optimization
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with unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91650 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:05:06 +00:00
Bob Wilson
5afffaed5c
Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
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The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types. Radar 7457110.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:03:29 +00:00
Dan Gohman
f042396b0f
Remove "tail" keywords. These calls are not intended to be tail calls.
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This protects this test from depending on codegen not performing the
tail call optimization by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91648 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:02:18 +00:00
Jakob Stoklund Olesen
f8ad5bcdb5
Add test case for the phi reuse patch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91642 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 00:11:44 +00:00
Sean Callanan
108934c65d
Instruction fixes, added instructions, and AsmString changes in the
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X86 instruction tables.
Also (while I was at it) cleaned up the X86 tables, removing tabs and
80-line violations.
This patch was reviewed by Chris Lattner, but please let me know if
there are any problems.
* X86*.td
Removed tabs and fixed 80-line violations
* X86Instr64bit.td
(IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW)
Added
(CALL, CMOV) Added qualifiers
(JMP) Added PC-relative jump instruction
(POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate
that it is 64-bit only (ambiguous since it has no
REX prefix)
(MOV) Added rr form going the other way, which is encoded
differently
(MOV) Changed immediates to offsets, which is more correct;
also fixed MOV64o64a to have to a 64-bit offset
(MOV) Fixed qualifiers
(MOV) Added debug-register and condition-register moves
(MOVZX) Added more forms
(ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which
(as with MOV) are encoded differently
(ROL) Made REX.W required
(BT) Uncommented mr form for disassembly only
(CVT__2__) Added several missing non-intrinsic forms
(LXADD, XCHG) Reordered operands to make more sense for
MRMSrcMem
(XCHG) Added register-to-register forms
(XADD, CMPXCHG, XCHG) Added non-locked forms
* X86InstrSSE.td
(CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ)
Added
* X86InstrFPStack.td
(COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP,
FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1, FYL2X,
FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM,
FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE,
FXRSTOR)
Added
(FCOM, FCOMP) Added qualifiers
(FSTENV, FSAVE, FSTSW) Fixed opcode names
(FNSTSW) Added implicit register operand
* X86InstrInfo.td
(opaque512mem) Added for FXSAVE/FXRSTOR
(offset8, offset16, offset32, offset64) Added for MOV
(NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR,
LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS,
LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT,
LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC,
CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC,
SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL,
VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD,
VMWRITE, VMXOFF, VMXON) Added
(NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier
(JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL,
JGE, JLE, JG, JCXZ) Added 32-bit forms
(MOV) Changed some immediate forms to offset forms
(MOV) Added reversed reg-reg forms, which are encoded
differently
(MOV) Added debug-register and condition-register moves
(CMOV) Added qualifiers
(AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV
(BT) Uncommented memory-register forms for disassembler
(MOVSX, MOVZX) Added forms
(XCHG, LXADD) Made operand order make sense for MRMSrcMem
(XCHG) Added register-register forms
(XADD, CMPXCHG) Added unlocked forms
* X86InstrMMX.td
(MMX_MOVD, MMV_MOVQ) Added forms
* X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table
change
* X86RegisterInfo.td: Added debug and condition register sets
* x86-64-pic-3.ll: Fixed testcase to reflect call qualifier
* peep-test-3.ll: Fixed testcase to reflect test qualifier
* cmov.ll: Fixed testcase to reflect cmov qualifier
* loop-blocks.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-11.ll: Fixed testcase to reflect call qualifier
* 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call
qualifier
* x86-64-pic-2.ll: Fixed testcase to reflect call qualifier
* live-out-reg-info.ll: Fixed testcase to reflect test qualifier
* tail-opts.ll: Fixed testcase to reflect call qualifiers
* x86-64-pic-10.ll: Fixed testcase to reflect call qualifier
* bss-pagealigned.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-1.ll: Fixed testcase to reflect call qualifier
* widen_load-1.ll: Fixed testcase to reflect call qualifier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91638 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 00:01:26 +00:00
Evan Cheng
4c2b001f13
Revert this dag combine change:
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Fold (zext (and x, cst)) -> (and (zext x), cst)
DAG combiner likes to optimize expression in the other way so this would end up cause an infinite looping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17 00:40:05 +00:00
Nick Lewycky
0588bcef8d
Make this test pass on Linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91521 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 07:35:25 +00:00
Evan Cheng
2e489c4f9d
Re-enable 91381 with fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91489 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 00:53:11 +00:00
Dale Johannesen
fc49bd2447
Do better with physical reg operands (typically, from inline asm)
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in local register allocator. If a reg-reg copy has a phys reg
input and a virt reg output, and this is the last use of the phys
reg, assign the phys reg to the virt reg. If a reg-reg copy has
a phys reg output and we need to reload its spilled input, reload
it directly into the phys reg than passing it through another reg.
Following 76208, there is sometimes no dependency between the def of
a phys reg and its use; this creates a window where that phys reg
can be used for spilling (this is true in linear scan also). This
is bad and needs to be fixed a better way, although 76208 works too
well in practice to be reverted. However, there should normally be
no spilling within inline asm blocks. The patch here goes a long way
towards making this actually be true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 00:29:41 +00:00
Kenneth Uildriks
76df3f398c
For fastcc on x86, let ECX be used as a return register after EAX and EDX
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91410 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 03:27:52 +00:00
Evan Cheng
d7760a4905
Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91405 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 03:07:11 +00:00
Evan Cheng
9818c043d2
Make 91378 more conservative.
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1. Only perform (zext (shl (zext x), y)) -> (shl (zext x), y) when y is a constant. This makes sure it remove at least one zest.
2. If the shift is a left shift, make sure the original shift cannot shift out bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91399 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 03:00:32 +00:00
Evan Cheng
ad9c0a3d8b
Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:53:42 +00:00
Evan Cheng
8acb3100de
Fold (zext (and x, cst)) -> (and (zext x), cst).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:52:11 +00:00
Evan Cheng
99b653c36f
Propagate zest through logical shift.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:41:36 +00:00
Dan Gohman
2e141d744e
Fix integer cast code to handle vector types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 23:40:38 +00:00
Evan Cheng
dd99f3a7dc
Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91223 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 20:03:14 +00:00
Anton Korobeynikov
8d1ffbd1ad
Lower setcc branchless, if this is profitable.
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Based on the patch by Brian Lucas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91175 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 23:01:29 +00:00
Dan Gohman
87862e77bb
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 21:31:27 +00:00
Dan Gohman
192db0027c
Change this to the correct PR number.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91148 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 20:09:21 +00:00
Dan Gohman
a4f9cc4e55
Fix the result type of SELECT nodes lowered from Select instructions with
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aggregate return values. This fixes PR5754.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91145 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:50:50 +00:00
Anton Korobeynikov
817a46454a
Honour setHasCalls() set from isel.
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This is used in some weird cases like general dynamic TLS model.
This fixes PR5723
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:39:55 +00:00
Evan Cheng
50d070561e
Tests for 91103 and 91104.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91105 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 06:02:21 +00:00
Evan Cheng
6fd78ec8a2
It's not safe to coalesce a move where src and dst registers have different subregister indices. e.g.:
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%reg16404:1<def> = MOV8rr %reg16412:2<kill>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 20:59:45 +00:00
Evan Cheng
ce72f3fbdf
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 22:24:42 +00:00
Evan Cheng
c363094e04
Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
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vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>
iff ptr is 16-byte aligned (or can be made into 16-byte aligned).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 21:00:30 +00:00
Evan Cheng
7bd6478cd6
Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90925 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 01:53:58 +00:00
Evan Cheng
d831cda3e7
- Support inline asm 'w' constraint for 128-bit vector types.
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- Also support the 'q' NEON registers asm code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 23:06:22 +00:00
Anton Korobeynikov
9aa1ec87b0
Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90819 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 01:03:04 +00:00
David Greene
e1a2fd5ad4
Use FileCheck and set nounwind on calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90790 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 19:40:26 +00:00
Dan Gohman
d84ea47b89
Don't enable the post-RA scheduler on x86 except at -O3. In its
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current form, it is too expensive in compile time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 19:04:31 +00:00
Anton Korobeynikov
7cca606aaa
Dynamic stack realignment use of sp register as source/dest register
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in "bic sp, sp, #15 " leads to unpredicatble behaviour in Thumb2 mode.
Emit the following code instead:
mov r4, sp
bic r4, r4, #15
mov sp, r4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-06 22:39:50 +00:00
Bill Wendling
dc492e0370
Temporarily revert r90502. It was causing the llvm-gcc bootstrap on PPC to fail.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90653 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 07:30:23 +00:00
Jakob Stoklund Olesen
6b74e505be
Also attempt trivial coalescing for live intervals that end in a copy.
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The coalescer is supposed to clean these up, but when setting up parameters
for a function call, there may be copies to physregs. If the defining
instruction has been LICM'ed far away, the coalescer won't touch it.
The register allocation hint does not always work - when the register
allocator is backtracking, it clears the hints.
This patch takes care of a few more cases that r90163 missed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90502 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 00:16:04 +00:00
Nate Begeman
93e0ed31c5
Don't pull vector sext through both hands of a logical operation, since doing so prevents the fusion of vector sext and setcc into vsetcc.
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Add a testcase for the above transformation.
Fix a bogus use of APInt noticed while tracking this down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 07:11:29 +00:00
Bob Wilson
324f4f1633
Recognize canonical forms of vector shuffles where the same vector is used for
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both source operands. In the canonical form, the 2nd operand is changed to an
undef and the shuffle mask is adjusted to only reference elements from the 1st
operand. Radar 7434842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 06:40:55 +00:00
Bill Wendling
3627b48110
Remove unnecessary check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90352 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-02 22:02:20 +00:00
Evan Cheng
9836a26da3
Fix PR5391: support early clobber physical register def tied with a use (ewwww)
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- A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber.
- If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range.
- Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90269 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 22:25:00 +00:00
Jim Grosbach
2a37b9c750
test case for IV-Users simplification loop improvement
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90260 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 21:53:51 +00:00
Jakob Stoklund Olesen
579d6d9fe3
Use CFG connectedness as a secondary sort key when deciding the order of copy coalescing.
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This means that well connected blocks are copy coalesced before the less connected blocks. Connected blocks are more difficult to
coalesce because intervals are more complicated, so handling them first gives a greater chance of success.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 03:03:00 +00:00
Evan Cheng
a4025df42d
Fix PR5614: parts of a physical register def may be killed the rest.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90180 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 00:44:45 +00:00
Jakob Stoklund Olesen
ce7a663140
New virtual registers created for spill intervals should inherit allocation hints from the original register.
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This helps us avoid silly copies when rematting values that are copied to a physical register:
leaq _.str44(%rip), %rcx
movq %rcx, %rsi
call _strcmp
becomes:
leaq _.str44(%rip), %rsi
call _strcmp
The coalescer will not touch the movq because that would tie down the physical register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90163 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 22:55:54 +00:00
Mon P Wang
8b6a20accd
Add test case for r90108
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90109 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 02:42:27 +00:00
Duncan Sands
fb245e2d46
While this test is testing a problem in the generic part of codegen,
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the problem only shows for msp430 and pic16 which is why it specifies
them using -march. But it is wrong to put such tests in CodeGen/Generic,
since not everyone builds these targets. Put a copy of the test in each
of the target test directories.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90005 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-27 16:04:14 +00:00
Evan Cheng
695b9f3d5e
Test for 89905.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89906 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-26 00:35:01 +00:00
Evan Cheng
e7c9195706
ProcessImplicitDefs should watch out for invalidated iterator and extra implicit operands on copies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 21:13:39 +00:00
Bruno Cardoso Lopes
d71cebf575
Support PIC loading of constant pool entries
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 12:17:58 +00:00
Dale Johannesen
f7801b493e
Do not store R31 into the caller's link area on PPC.
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This violates the ABI (that area is "reserved"), and
while it is safe if all code is generated with current
compilers, there is some very old code around that uses
that slot for something else, and breaks if it is stored
into. Adjust testcases looking for current behavior.
I've verified that the stack frame size is right in all
testcases, whether it changed or not. 7311323.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89811 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 22:59:02 +00:00
Evan Cheng
d7f0810c93
Enable predication of NEON instructions in Thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89748 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 08:06:15 +00:00
Anton Korobeynikov
5cdc3a949a
Materialize global addresses via movt/movw pair, this is always better
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than doing the same via constpool:
1. Load from constpool costs 3 cycles on A9, movt/movw pair - just 2.
2. Load from constpool might stall up to 300 cycles due to cache miss.
3. Movt/movw does not use load/store unit.
4. Less constpool entries => better compiler performance.
This is only enabled on ELF systems, since darwin does not have needed
relocations (yet).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 00:44:37 +00:00
Jim Grosbach
77b02beb1f
move fconst[sd] to UAL. <rdar://7414913>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89700 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:08:25 +00:00
Jim Grosbach
bbf56bb37b
update test for 89694
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89695 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 20:39:53 +00:00
Edward O'Callaghan
18d18b71d5
Miss two, PR5307.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89596 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 15:35:28 +00:00
Edward O'Callaghan
f4a93dd70e
Convert Thumb2 tests to FileCheck for PR5307.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89595 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 15:18:27 +00:00
Benjamin Kramer
bfd987ba57
Turns out stuff gets allocated to different registers depending on the subtarget.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89594 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 15:15:52 +00:00
Edward O'Callaghan
11cc4fab52
Convert ARM tests to FileCheck for PR5307.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89593 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 14:23:33 +00:00
Benjamin Kramer
3ebd44d20f
Convert test to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89589 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 13:16:36 +00:00
Edward O'Callaghan
de9b6b1cd5
Forgot to alter RUN line when converting to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89588 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 13:09:48 +00:00
Edward O'Callaghan
85d1aab444
Fix for bad FileCheck converts in revision 89584.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 12:50:05 +00:00
Edward O'Callaghan
81fff07daf
Convert a few tests to FileCheck for PR5307.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89584 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 11:45:44 +00:00
Jim Grosbach
21ce2e3c74
Revert 89562. We're being sneakier than I was giving us credit for, and this
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isn't necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 23:34:09 +00:00
Jim Grosbach
f3b33d0b2a
Darwin requires a frame pointer for all non-leaf functions to support correct
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backtraces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 21:40:08 +00:00
Jakob Stoklund Olesen
b99b63c2e5
Don't leave temporary files in the test directory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89531 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 02:05:31 +00:00
Dale Johannesen
5b8bce11d6
When generating a vector the really slow way, via loads
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and stores, handle the case where the element size is not
a valid target type correctly (PPC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89521 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 00:53:23 +00:00
Evan Cheng
c26abd9487
Enable hoisting load from constant memories.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:31:34 +00:00
Sean Callanan
b9e6b34e1e
Recommitting PALIGNR shift width fixes.
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Thanks to Daniel Dunbar for fixing clang intrinsics:
http://llvm.org/viewvc/llvm-project?view=rev&revision=89499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:28:42 +00:00
Dale Johannesen
5ca124691b
Remove an incorrect overaggressive optimization
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(PPC specific).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:16:40 +00:00
Sean Callanan
1bbf6d1a6f
Reverting PALIGNR fix until I figure out how this
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broke the Clang testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:09:28 +00:00
Sean Callanan
201dfa7432
Fixed PALIGNR to take 8-bit rotations in all cases.
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Also fixed the corresponding testcase, and the PALIGNR
intrinsic (tested for correctness with llvm-gcc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89491 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 21:40:28 +00:00
Evan Cheng
4aedb61d03
Remat VLDRD from constpool. Clean up some instruction property specifications.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:57:15 +00:00
Duncan Sands
c088ae8b84
Fix PR5558, which was caused by a wrong fix for PR3393 (see commit 63048),
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which was an expensive checks failure due to a bug in the checking. This
patch in essence reverts the original fix for PR3393, and refixes it by a
tweak to the way expensive checking is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89454 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 10:45:10 +00:00
Dan Gohman
b4afb137ef
Fix fast-isel to avoid selecting the return instruction if a
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tail call has been encountered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89444 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:51:26 +00:00
Evan Cheng
9b82425cb0
Also CSE non-pic load from constant pools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:10:27 +00:00
Evan Cheng
9ef4835bd8
Fix codegen of conditional move of immediates. We were not making use of the immediate forms of cmov instructions at all.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 00:54:03 +00:00
Daniel Dunbar
2b86caf05b
Unbreak test, Bruno please check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 07:18:49 +00:00
Evan Cheng
2ef9c8a43d
More consistent thumb1 asm printing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:57:41 +00:00
Evan Cheng
5b397c93a5
Shrink ldr / str [sp, imm0-1024] to 16-bit instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:32:27 +00:00
Bruno Cardoso Lopes
2045c47aff
- Add sugregister logic to handle f64=(f32,f32).
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- Support mips1 like load/store of doubles:
Instead of:
sdc $f0, X($3)
Generate:
swc $f0, X($3)
swc $f1, X+4($3)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89322 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:06:13 +00:00
Bill Wendling
77bd09b650
Test from Dhrystone to make sure that we're not emitting an aligned load for a
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string that's aligned at 8-bytes instead of 16-bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89295 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 01:33:57 +00:00
Bob Wilson
41a0456a3c
Fix buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89274 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 23:30:38 +00:00
Richard Osborne
bea7df56ce
Add XCore support for indirectbr / blockaddress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 23:20:42 +00:00
Bob Wilson
60f34b9fb0
Tail duplication still needs to iterate. Duplicating new instructions onto
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the tail of a block may make that block a new candidate for duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89264 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 22:52:37 +00:00
Jakob Stoklund Olesen
0b25ae1afb
Fix PR5300.
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When TwoAddressInstructionPass deletes a dead instruction, make sure that all
register kills are accounted for. The 2-addr register does not get special
treatment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89246 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 21:33:35 +00:00
Jakob Stoklund Olesen
5052c1547e
Fix inverted test and add testcase from failing self-host.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89167 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 00:02:18 +00:00
Jakob Stoklund Olesen
6c8a0715c4
Remove fragile test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 21:52:40 +00:00
Jim Grosbach
f04777b945
Enable arm jumpt table adjustment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 21:24:11 +00:00
Anton Korobeynikov
d2aad77261
Forgot to commit test fixes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89138 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 20:38:36 +00:00
Jakob Stoklund Olesen
95a2c8f1d0
Enable -split-phi-edges by default, except when -regalloc=local.
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The local register allocator doesn't like it when LiveVariables is run.
We should also disable edge splitting under -O0, but that has to wait a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89125 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 19:15:50 +00:00
Evan Cheng
9e97f3c2e2
Revert 89021. It's miscompiling llvm-gcc driver driver at -O0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89082 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 09:55:52 +00:00
Jakob Stoklund Olesen
2cbe71cdf0
Enable -split-phi-edges by default
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89021 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 01:07:22 +00:00
Evan Cheng
6cccc30679
MOV64rm should be marked isReMaterializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 00:55:55 +00:00
Jim Grosbach
1187285e90
Convert to FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89007 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 00:20:26 +00:00
Jim Grosbach
727f0c37fb
Convert to FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89002 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 00:03:38 +00:00
Jim Grosbach
2c0fb63738
Cleanup. Missed removing these when converting. Oops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89001 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 00:00:33 +00:00
Dan Gohman
1d8c9e721e
Fix this test - there don't appear to be any actual Reload Reuses
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in this testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88998 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 23:49:55 +00:00
Dan Gohman
10190cceec
Revert r87049, which was the workaround for the regression triggered
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by the recent FixedStackPseudoSourceValue-related changes, now that
the specific bug that affected it is fixed, in r88954.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88997 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 23:43:42 +00:00
Jim Grosbach
9f07f3b009
Convert to FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 23:19:29 +00:00
Evan Cheng
600c043697
- Check memoperand alignment instead of checking stack alignment. Most load / store folding instructions are not referencing spill stack slots.
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- Mark MOVUPSrm re-materializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88974 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 21:56:03 +00:00
Jim Grosbach
2f74603460
Convert to FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88947 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 20:04:15 +00:00
Lang Hames
0d6dd493f4
Added a testcase for PR5495.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 20:03:13 +00:00
Jim Grosbach
4adcade9b7
Convert to FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88942 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 19:46:46 +00:00
Jim Grosbach
c0517504e5
tbb opt off by default
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88921 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 17:24:45 +00:00
David Greene
ddff941357
Support spill comments.
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Have the asm printer emit a comment if an instruction is a spill or
reload and have the spiller mark copies it introdues so the asm printer
can also annotate those.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88911 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 15:12:23 +00:00
Evan Cheng
39aa7251a2
Check if subreg index is zero.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88899 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 06:31:49 +00:00
Evan Cheng
285a7d57dc
For some targets, a copy can use a register multiple times, e.g. ppc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88895 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 05:52:06 +00:00
Evan Cheng
2d947263d5
xfail for now. It has been failing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88892 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 05:44:04 +00:00
Bruno Cardoso Lopes
6e0b658dad
- Fix a small bug while handling target constant pools (one param was missing).
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- Add a smarter constant pool loading, instead of:
lui $2, %hi($CPI1_0)
addiu $2, $2, %lo($CPI1_0)
lwc1 $f0, 0($2)
Generate:
lui $2, %hi($CPI1_0)
lwc1 $f0, %lo($CPI1_0)($2)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 04:33:42 +00:00
Jim Grosbach
a44321776e
Detect need for autoalignment of the stack earlier to catch spills more
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conservatively. eliminateFrameIndex() machinery adjust to handle addr mode
6 (vld1/vst1) used for spills. Fix tests to expect aligned Q-reg spilling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88874 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-15 21:45:34 +00:00
Jim Grosbach
e11d26b3d8
remove xfail
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 21:57:35 +00:00
Richard Osborne
13c4fabf99
Add XCore support for arbitrary-sized aggregate returns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88802 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 19:33:35 +00:00
Evan Cheng
fae3e92345
Added getSubRegIndex(A,B) that returns subreg index of A to B. Use it to replace broken code in VirtRegRewriter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88753 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 03:42:17 +00:00
Evan Cheng
d57cdd5683
- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.
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- If destination is a physical register and it has a subreg index, use the
sub-register instead.
This fixes PR5423.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 02:55:43 +00:00
Evan Cheng
e17ae4f82e
Add radar number.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 02:11:32 +00:00
Evan Cheng
8fdd84cfa7
Fix PR5412: Fix an inverted check and another missing sub-register check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88738 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 02:09:09 +00:00
Dan Gohman
ed9bab3b4d
Enable the tail call optimization when the caller returns undef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 02:06:30 +00:00
Evan Cheng
0cd22dd738
When expanding t2STRDi8 r, r to two stores, add kill markers correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 01:50:00 +00:00
Evan Cheng
1f6a3c820a
Fix PR5411. Bug in UpdateKills. A reg def partially define its super-registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88719 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 23:16:41 +00:00
Dan Gohman
c4c550c758
When optimizing for size, don't tail-merge unless it's likely to be a
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code-size win, and not when it's only likely to be code-size neutral,
such as when only a single instruction would be eliminated and a new
branch would be required.
This fixes rdar://7392894.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 21:02:15 +00:00
Evan Cheng
236490d870
Fix PR5410: LiveVariables lost subreg def:
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D0<def,dead> = ...
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= S0<use, kill>
S0<def> = ...
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D0<def> =
The first D0 def is correctly marked dead, however, livevariables should have
added an implicit def of S0 or we end up with a use without a def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88690 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 20:36:40 +00:00
Dan Gohman
01205a80f5
Don't let a noalias difference disrupt the tailcall optimization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 18:49:38 +00:00
Dale Johannesen
1e608819aa
Adjust isConstantSplat to allow for big-endian targets.
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PPC is such a target; make it work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87060 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 01:45:18 +00:00
Daniel Dunbar
6242495be2
Update test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 01:01:58 +00:00
Jim Grosbach
cb2c2b738a
Clean up testcase a bit. Simplify case blocks and adjust switch instruction to not take an undefined value as input.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86997 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 17:19:09 +00:00
Benjamin Kramer
9e3728be62
Fix typo in run line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 12:35:27 +00:00
Evan Cheng
60f9061820
RegScavenger::enterBasicBlock should always reset register state.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 07:49:10 +00:00
Evan Cheng
586f69a118
- Teach LSR to avoid changing cmp iv stride if it will create an immediate that
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cannot be folded into target cmp instruction.
- Avoid a phase ordering issue where early cmp optimization would prevent the
later count-to-zero optimization.
- Add missing checks which could cause LSR to reuse stride that does not have
users.
- Fix a bug in count-to-zero optimization code which failed to find the pre-inc
iv's phi node.
- Remove, tighten, loosen some incorrect checks disable valid transformations.
- Quite a bit of code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86969 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 07:35:05 +00:00
Dan Gohman
ad6af45dc1
Tail merge at any size when there are two potentials blocks and one
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can be made to fall through into the other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86909 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 00:39:10 +00:00
Kenneth Uildriks
c158dde219
x86 users can now return arbitrary sized structs. Structs too large to fit in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86876 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 19:59:24 +00:00
Dan Gohman
2210c0bea8
Add support for tail duplication to BranchFolding, and extend
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tail merging support to handle more cases.
- Recognize several cases where tail merging is beneficial even when
the tail size is smaller than the generic threshold.
- Make use of MachineInstrDesc::isBarrier to help detect
non-fallthrough blocks.
- Check for and avoid disrupting fall-through edges in more cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 19:48:59 +00:00
Evan Cheng
012397489b
Add nounwind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 07:11:02 +00:00
Bill Wendling
5606ec894e
Fix test to work on every platform.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86786 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 01:44:22 +00:00
Bill Wendling
13f6135742
Fix test to work on every platform.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86785 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 01:41:32 +00:00
Bill Wendling
ee161a6824
Make sure that the exception handling data has the same visibility as the
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function it's generated for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86779 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 01:24:59 +00:00
Bill Wendling
6b41aba7ce
Test this on Darwin only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86752 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 23:18:33 +00:00
Dale Johannesen
9a645cd9d4
Emit correct code when making a ConstantPool entry for a vector
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constant whose component type is not a legal type for the target.
(If the target ConstantPool cannot handle this type either, it has
an opportunity to merge elements. In practice any target with
8-bit bytes must support i8 *as data*). 7320806 (partial).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 23:16:41 +00:00
Bill Wendling
b19a5e9be6
Modify how the prologue encoded the "move" information for the FDE. GCC
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generates a sequence similar to this:
__Z4funci:
LFB2:
mflr r0
LCFI0:
stmw r30,-8(r1)
LCFI1:
stw r0,8(r1)
LCFI2:
stwu r1,-80(r1)
LCFI3:
mr r30,r1
LCFI4:
where LCFI3 and LCFI4 are used by the FDE to indicate what the FP, LR, and other
things are. We generated something more like this:
Leh_func_begin1:
mflr r0
stw r31, 20(r1)
stw r0, 8(r1)
Llabel1:
stwu r1, -80(r1)
Llabel2:
mr r31, r1
Note that we are missing the "mr" instruction. This patch makes it more like the
GCC output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 22:14:04 +00:00
Mike Stump
75adb32c60
Add testcase for recent checkin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86620 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 23:10:49 +00:00
Jim Grosbach
3f51147d44
Update test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86614 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 22:59:01 +00:00
Jim Grosbach
e5165490b7
Use Unified Assembly Syntax for the ARM backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 00:11:35 +00:00
Anton Korobeynikov
f0b47b7f6d
Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86471 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 15:33:12 +00:00
Anton Korobeynikov
52f28e9b63
Fix invalid operand updates & implement post-inc memory operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86466 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 14:27:38 +00:00
Anton Korobeynikov
c2fd919ea2
It is invalid to infer the value type from the result #0 of the node
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since the instruction might use the other result of different type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86462 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 12:14:54 +00:00
Nate Begeman
0b10b91465
x86 vector shuffle cleanup/fixes:
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1. rename the movhp patfrag to movlhps, since thats what it actually matches
2. eliminate the bogus movhps load and store patterns, they were incorrect. The load transforms are already handled (correctly) by shufps/unpack.
3. revert a recent test change to its correct form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86415 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 23:17:15 +00:00
Anton Korobeynikov
6534f83ae8
Add some dummy support for post-incremented loads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86385 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:15:06 +00:00
Anton Korobeynikov
8983da729a
Add 8 bit libcalls and make use of them for msp430
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86384 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:14:39 +00:00
Anton Korobeynikov
123ed8f099
Initial support for addrmode handling. Tests by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:13:35 +00:00
Anton Korobeynikov
e8ea011cc7
It turns out that the testcase in question uncovered subreg-handling bug.
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Add assert in asmprinter to catch such cases and xfail the tests.
PR is to be filled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86375 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 15:20:32 +00:00
Eric Christopher
761411c21b
Fix a couple of shuffle patterns to use movhlps instead
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of movhps as the constraint. Changes optimizations so
update testcases as appropriate as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 08:45:53 +00:00
Chris Lattner
e880efe446
Fix PR5421 by APInt'izing switch lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86354 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 07:50:34 +00:00
Chris Lattner
e503871315
merge cmp1 into cmp0 and filecheckize.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86345 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 06:19:20 +00:00
Evan Cheng
d457e6e9a5
Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86330 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 04:04:34 +00:00
Evan Cheng
78e5c1140a
- Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
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except it doesn't care if the definitions' virtual registers differ. This is
used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
Since pc relative constantpool entries are always different, this requires it
it check if the values can actually the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 03:52:02 +00:00
Evan Cheng
b9803a8fa6
- Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative
...
load of a GV from constantpool and then add pc. It allows the code sequence to
be rematerializable so it would be hoisted by machine licm.
- Add a late pass to break these pseudo instructions into a number of real
instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm
to this pass. This is done before post regalloc scheduling to allow the
scheduler to proper schedule these instructions. It also allow them to be
if-converted and shrunk by later passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86304 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:52:48 +00:00
Anton Korobeynikov
fc2cba8362
Honour subreg machine operands during asmprinting
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86303 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:45:15 +00:00
Bob Wilson
54c78ef2fe
Print VMOV (immediate) operands as hexadecimal values. Apple's assembler
...
will not accept negative values for these. LLVM's default operand printing
sign extends values, so that valid unsigned values appear as negative
immediates. Print all VMOV immediate operands as hex values to resolve this.
Radar 7372576.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86301 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:33:28 +00:00
Bob Wilson
d51722a7e3
Fix a broken test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86298 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:06:42 +00:00
Evan Cheng
e7e0d62efd
Remove ARMPCLabelIndex from ARMISelLowering. Use ARMFunctionInfo::createConstPoolEntryUId() instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 22:24:13 +00:00
Eric Christopher
ef1fad533e
Fix PR5315, original patch by Nicolas Capens!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86203 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 00:11:57 +00:00
Dan Gohman
3f131328ff
Update these tests for the new label names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86192 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 23:31:40 +00:00
Bob Wilson
5a225cc85a
Add -mtriple to llc commands, attempting to fix buildbot failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 00:51:31 +00:00
Bob Wilson
8a008cc49d
Attempt again to fix buildbot failures: make expected output less specific
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and compile with -mtriple to specify *-apple-darwin targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 00:30:35 +00:00
Bob Wilson
3d90dbee69
Add PowerPC codegen for indirect branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 21:31:18 +00:00
Bob Wilson
1709dd73d6
Fix broken test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 20:04:11 +00:00
Bob Wilson
0d48d6106e
Add test for ARM indirectbr codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 19:25:34 +00:00
Evan Cheng
50608bac2f
RangeIsDefinedByCopyFromReg() should check for subreg_to_reg, insert_subreg,
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and extract_subreg as a "copy" that defines a valno.
Also fixes a typo. These two issues prevent a simple subreg coalescing from
happening before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 08:33:14 +00:00
Evan Cheng
ad95ff9fab
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 00:42:33 +00:00
Evan Cheng
b23b2015eb
fconsts / fconstd immediate should be proceeded with #.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 21:59:33 +00:00
Evan Cheng
777c6b7caa
Re-apply 85799. It turns out my code isn't buggy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85947 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 21:40:02 +00:00
Kenneth Uildriks
b908f8ad6a
Make opt default to not adding a target data string and update tests that depend on target data to supply it within the test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 15:29:06 +00:00
Evan Cheng
ba908640b3
Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 05:52:54 +00:00
Nate Begeman
e4a9f9c450
Declare sin & cos as readonly so they match the code in SelectionDAGBuild
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85853 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 02:19:31 +00:00
Anton Korobeynikov
7b360e7f29
Temporary xfail until PR5367 will be resolved
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:37:36 +00:00
Anton Korobeynikov
ab453e0641
Revert r85049, it is causing PR5367
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:24:48 +00:00
Evan Cheng
454ac8961b
Revert 85799 for now. It might be breaking llvm-gcc driver.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85827 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 21:49:14 +00:00
Evan Cheng
72ed88feac
Initilize the machine LICM CSE map upon the first time an instruction is hoisted to
...
the loop preheader. Add instructions which are already in the preheader block that
may be common expressions of those that are hoisted out. These does get a few more
instructions CSE'ed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85799 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 08:09:49 +00:00
Evan Cheng
580e791ded
Remove an irrelevant and poorly reduced test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85794 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 07:11:54 +00:00
Evan Cheng
7baae87d8f
Unbreak ARMBaseRegisterInfo::copyRegToReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 04:44:55 +00:00
Anton Korobeynikov
2ae0eec1c0
Handle splats of undefs properly. This includes the testcase for PR5364 as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:12:06 +00:00
Anton Korobeynikov
2e1da9fea4
64-bit FP loads & stores operate on both NEON and VFP pipelines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:11:06 +00:00
Evan Cheng
48d8afab73
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 21:12:51 +00:00
Evan Cheng
1107f03ef4
Fix tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 18:13:29 +00:00
Chris Lattner
43f44aa160
improve x86 codegen support for blockaddress. We now compile
...
the testcase into:
_test1: ## @test1
## BB#0: ## %entry
leaq L_test1_bb6(%rip), %rax
jmpq *%rax
L_test1_bb: ## Address Taken
LBB1_1: ## %bb
movb $1, %al
ret
L_test1_bb6: ## Address Taken
LBB1_2: ## %bb6
movb $2, %al
ret
Note, it is very very strange that BlockAddressSDNode doesn't carry
around TargetFlags. Dan, please fix this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85703 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 03:25:03 +00:00
Evan Cheng
de17fb6e4d
Use cbz and cbnz instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 23:46:45 +00:00
Jim Grosbach
8cd0a8cb82
vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using
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them for scalar floating point operations for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:57:36 +00:00
Jim Grosbach
1820ec5e7a
Consolidate test files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85696 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:20:56 +00:00
Jim Grosbach
91c0aebe68
Change to use FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85695 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:16:14 +00:00
Jim Grosbach
0e5c9beeed
Make tests more explicit about which instructions are expected.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85694 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:14:17 +00:00
Jim Grosbach
6b0b4b3eaf
Grammar tweak to comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:12:44 +00:00
Jim Grosbach
199a4b4c70
Update test to be more explicit about what instruction sequences are expected for each operation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:10:38 +00:00
Jim Grosbach
07d236ba88
Update test to be more explicit about what instruction sequences are expected for each operation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85689 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 21:52:58 +00:00
Jim Grosbach
bcf2f2c159
Expand 64-bit logical shift right inline
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 21:42:19 +00:00
Jim Grosbach
b4a976c304
Expand 64-bit arithmetic shift right inline
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85685 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 21:00:56 +00:00
Benjamin Kramer
e3246fc6ab
Force triple; darwin's ASM syntax differs from linux's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85676 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 19:54:06 +00:00
Jim Grosbach
c2b879fcfe
Expand 64 bit left shift inline rather than using the libcall. For now, this
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is unconditional. Making it still use the libcall when optimizing for size
would be a good adjustment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85675 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 19:38:01 +00:00
Benjamin Kramer
823bdbc770
Add missing colons for FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85674 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 19:22:24 +00:00
Jim Grosbach
4a26092248
Convert to FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 19:06:53 +00:00
Evan Cheng
9eda68988e
It's safe to remat t2LDRpci; Add PseudoSourceValue to load / store's to enable more machine licm. More changes coming.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85643 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 03:39:36 +00:00
Dan Gohman
c933acf096
Add a target triple so that this test behaves consistently across hosts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 00:15:28 +00:00
Dan Gohman
0437a06ea6
Fix the -mattr line for this test so that it passes on hosts that lack SSSE3.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85637 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 23:18:27 +00:00
Dan Gohman
0115e164ba
Fix MachineLICM to use the correct virtual register class when
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unfolding loads for hoisting. getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 22:18:41 +00:00
Evan Cheng
3efabd316f
I forgot to commit this test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85608 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 20:03:40 +00:00
Rafael Espindola
c1382b745f
This fixes functions like
...
void f (int a1, int a2, int a3, int a4, int a5,...)
In ARMTargetLowering::LowerFormalArguments if the function has 4 or
more regular arguments we used to set VarArgsFrameIndex using an
offset of 0, which is only correct if the function has exactly 4
regular arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85590 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 14:33:14 +00:00
Bob Wilson
2c04dae715
Reimplement BranchFolding change to avoid tail merging for a 1 instruction
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common tail, except when the OptimizeForSize function attribute is present.
Radar 7338114.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85441 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 22:10:20 +00:00
Dan Gohman
589f1f5a43
Teach MachineLICM to unfold loads from constant memory from
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otherwise unhoistable instructions in order to allow the loads
to be hoisted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85364 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 03:21:57 +00:00
Evan Cheng
39382427f1
Use fconsts and fconstd to materialize small fp constants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 01:44:26 +00:00
Dan Gohman
a104d1eab2
Mark dead physregdefs dead immediately. This helps MachineSink and
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MachineLICM and other things which run before LiveVariables is run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 01:13:53 +00:00
Dan Gohman
83f6120c9a
Allow constants of different types to share constant pool entries
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if they have compatible encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85359 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 01:12:16 +00:00
Rafael Espindola
2bda533e1c
Add missing testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 17:59:03 +00:00
Bob Wilson
37986053b4
Fix Thumb2 failures by converting them to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85210 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 06:31:02 +00:00
Bob Wilson
b9350315d2
Fix the rest of the ARM failures by converting them to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85208 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 06:16:45 +00:00
Bob Wilson
13e80bdb71
Fix some more failures by converting to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85207 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 05:50:28 +00:00
Bob Wilson
8bb080e71b
Convert to FileCheck, fixing failure due to tab change in the process.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85204 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 05:30:47 +00:00
David Goodwin
2e7be612d5
Break anti-dependence breaking out into its own class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 16:59:04 +00:00
Dan Gohman
a8225083ba
Make LSR's OptimizeShadowIV ignore induction variables with negative
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strides for now, because it doesn't handle them correctly. This fixes a
miscompile of SingleSource/Benchmarks/Misc-C++/ray.
This problem was usually hidden because indvars transforms such induction
variables into negations of canonical induction variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85118 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 15:32:57 +00:00
Evan Cheng
a5dc45e3c8
- Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests and
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bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg
around.
- Relax register scavenging to allow use of partially "not-live" registers. It's
common for targets to operate on registers where the top bits are undef. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
= d0
When the insert_subreg is eliminated by the coalescer, the scavenger used to
complain. The previous fix was to keep to insert_subreg around. But that's
brittle and it's overly conservative when we want to use the scavenger to
allocate registers. It's actually legal and desirable for other instructions
to use the "undef" part of d0. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
s1 =
= s1
= d0
We probably need add a "partial-undef" marker on machine operand so the
machine verifier would not complain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85091 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 04:56:07 +00:00
Chris Lattner
1d871c5e54
fix PR5295 where the .ll parser didn't reject a function after a global
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or global after a function with conflicting names. Update some testcases
that were accidentally depending on this behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 23:22:50 +00:00
Evan Cheng
21a45557c6
Add a couple of ARM cross-rc coalescing tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 08:01:41 +00:00
Evan Cheng
cc7a5b91de
Update tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 07:53:48 +00:00
Dan Gohman
7abbd04e90
APInt-ify the gep scaling code, so that it correctly handles the case where
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the scale overflows pointer-sized arithmetic. This fixes PR5281.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84954 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-23 17:57:43 +00:00
Evan Cheng
b6c215b63f
Update tests for 84931.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84932 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-23 05:58:34 +00:00
David Goodwin
4c3715c2e5
Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84911 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 23:19:17 +00:00
Bob Wilson
bac6ed4ba4
Revert 84843. Evan, this was breaking some of the if-conversion tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84868 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 16:52:21 +00:00
Evan Cheng
87689d3b70
Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84843 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 06:48:32 +00:00
Evan Cheng
8000c6c535
Don't generate sbfx / ubfx with negative lsb field. Patch by David Conrad.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 00:40:00 +00:00
Anton Korobeynikov
f32df4ce3e
Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be selected.
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Yay for ASCII graphics!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 00:16:00 +00:00
Dan Gohman
6d31268a7d
Revert the main portion of r31856. It was causing BranchFolding
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to break up CFG diamonds by banishing one of the blocks to the end of
the function, which is bad for code density and branch size.
This does pessimize MultiSource/Benchmarks/Ptrdist/yacr2, the
benchmark cited as the reason for the change, however I've examined
the code and it looks more like a case of gaming a particular
branch than of being generally applicable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84803 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 00:03:58 +00:00
Jim Grosbach
65b7f3af76
Improve handling of immediates by splitting 32-bit immediates into two 16-bit
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immediate operands when they will fit into the using instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 20:44:34 +00:00
Anton Korobeynikov
a91f4c561e
Add DAG printing for RMW stuff debugging
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84776 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 19:18:28 +00:00
Anton Korobeynikov
83fceb9481
RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and disable some tests until it will be clever enough to handle them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84775 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 19:17:55 +00:00
Evan Cheng
2095659a85
Match more patterns to movt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 08:15:52 +00:00
Dan Gohman
c1ae8c9b8f
Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 01:44:44 +00:00
Anton Korobeynikov
a3da7c3ca8
Add reg-imm tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 00:11:44 +00:00
Anton Korobeynikov
2bcf60a9cc
Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)
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transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84683 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 21:37:45 +00:00
David Goodwin
480c529e02
Checkpoint more aggressive anti-dependency breaking for post-ra scheduler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 19:54:44 +00:00
Dan Gohman
1a49295eae
Make TranslateX86CC return COND_INVALID instead of aborting when it
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encounters an OEQ or UNE comparison, and update its callers to check
for this return status and recover. This fixes a problem resulting from
the LowerOperation hooks being called from LegalizeVectorOps, because
LegalizeVectorOps only lowers vectors, so OEQ and UNE comparisons may
still be at large. This fixes PR5092.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 16:22:37 +00:00
Dan Gohman
07adb85cb7
Re-apply r84295, with fixes to how the loop "top" and "bottom" blocks are
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tracked. Instead of trying to manually keep track of these locations
while doing complex modifications, just recompute them when they're needed.
This fixes a bug in which the TopMBB and BotMBB were not correctly updated,
leading to invalid transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 04:50:37 +00:00
Evan Cheng
0222a8cfb8
If the physical register being spilled does not have an interval, spill its sub-registers instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 01:31:09 +00:00
Jim Grosbach
6009751244
Enable allocation of R3 in Thumb1
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84563 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 22:57:03 +00:00
Chris Lattner
7bf4bc5a1d
convert to filecheck syntax and make a lot more aggressive.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84517 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:27:56 +00:00
Anton Korobeynikov
766fc1db16
Revert r84295, this unbreaks llvm-gcc bootstrap on x86-64/linux
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84516 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:21:09 +00:00
Chris Lattner
baa989ed6e
rename test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84515 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:18:07 +00:00
Torok Edwin
6602922878
Fix PR5247, "lock addq" pattern (and other atomics), it DOES modify EFLAGS.
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LLC was scheduling compares before the adds causing wrong branches to be taken
in programs, resulting in misoptimized code wherever atomic adds where used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 11:00:58 +00:00
Daniel Dunbar
068c56e0d7
Teach lit that the .c files in 'test/CodeGen/CellSPU/useful-harnesses' aren't tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84460 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 03:53:55 +00:00
Nate Begeman
a09008bf6d
Add support for matching shuffle patterns with palignr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84459 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 02:17:23 +00:00
Evan Cheng
d36076e4a3
Turn on post-alloc scheduling for x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84431 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18 19:57:27 +00:00
Dan Gohman
3bdd8de280
Enhance CodePlacementOpt's unconditional intra-loop branch elimination logic
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to be more general and understand more varieties of loops.
Teach CodePlacementOpt to reorganize the basic blocks of a loop so that
they are contiguous. This also includes a fair amount of logic for preserving
fall-through edges while doing so. This fixes a BranchFolding-ism where blocks
which can't be made to use a fall-through edge and don't conveniently fit
anywhere nearby get tossed out to the end of the function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84295 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17 00:32:43 +00:00
Mon P Wang
362b8f2786
Update tests to use FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84282 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 22:09:05 +00:00
Mon P Wang
70bf40d02e
Add test case for r84279
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84280 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 22:07:19 +00:00
Dan Gohman
b00f236b03
Move zext and sext casts fed by loads into the same block as the
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load, to help SelectionDAG fold them into the loads, unless
conditions are unfavorable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84271 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 20:59:35 +00:00
Evan Cheng
d3dd50fec0
Enable post-alloc scheduling for all ARM variants except for Thumb1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84249 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 06:11:08 +00:00
Sandeep Patel
452b54a8ae
Branches must be the last instruction in a Thumb2 IT block. Approved by Evan Cheng.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 22:25:32 +00:00
Sanjiv Gupta
753ec15d5f
Re-apply 84180 with the fixed test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 19:26:25 +00:00
Jakob Stoklund Olesen
6ad8c84d70
Move Blackfin intrinsics into the Target/Blackfin directory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 18:50:52 +00:00
Dan Gohman
cd2ae14ce3
Make CodePlacementOpt align loops, rather than loop headers. The
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header is just the entry block to the loop, and it needn't be at
the top of the loop in the code layout.
Remove the code that suppressed loop alignment for outer loops,
so that outer loops are aligned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 00:36:22 +00:00
Evan Cheng
a2f8047134
When LiveVariables is adding implicit-def to model "partial dead", add the earlyclobber marker if the superreg def has it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84153 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 23:39:27 +00:00
Dan Gohman
79d4646f4b
Fix this test to account for a movl $0 being emitted as an xor now,
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and convert it to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 00:28:48 +00:00
Bob Wilson
765cc0b9d5
Revise ARM inline assembly memory operands to require the memory address to
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be in a register. The previous use of ARM address mode 2 was completely
arbitrary and inappropriate for Thumb. Radar 7137468.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13 20:50:28 +00:00
Sandeep Patel
47eedaa8fa
Add ARMv6T2 SBFX/UBFX instructions. Approved by Anton Korobeynikov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84009 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13 18:59:48 +00:00
Dan Gohman
0032681424
Don't forget to mark RAX as live-out of the function when arranging for
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it to hold the address of an sret return value, for x86-64 ABI purposes.
Also, fix the test that was originally intended to test this to actually
test it, using FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83853 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12 16:36:12 +00:00
Benjamin Kramer
90869455b5
Eliminate some redundant llvm-as calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83837 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12 09:31:55 +00:00
Anton Korobeynikov
436604d505
Add missed mem-mem move patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83812 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11 23:03:53 +00:00
Anton Korobeynikov
afac8abfc0
Add MSP430 mem-mem insts support. Patch by Brian Lucas with some my refinements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83811 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11 23:03:28 +00:00
Anton Korobeynikov
aca471f3a5
Add bunch of MSP430 'feature' tests. Patch by Brian Lucas with some my refinements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83809 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11 23:02:38 +00:00
Anton Korobeynikov
95eb470ce1
Implement 'm' memory operand properly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83785 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11 19:14:21 +00:00
Anton Korobeynikov
8f8e9f0830
It seems that OR operation does not affect status reg at all.
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Remove impdef of SRW. This fixes PR4779
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-10 22:17:47 +00:00
Dan Gohman
cda49a0b29
Update this test; the code is the same but it gets counted as one
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fewer remat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83690 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 23:31:04 +00:00
Dan Gohman
11596ed43c
Fix the x86 test-shrink optimization so that it doesn't shrink comparisons
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when one of the bits being tested would end up being the sign bit in the
narrower type, and a signed comparison is being performed, since this would
change the result of the signed comparison. This fixes PR5132.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83670 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 20:35:19 +00:00
Bob Wilson
83815aeb29
Merge a bunch of NEON tests into larger files so they run faster.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83667 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 20:20:54 +00:00
Bob Wilson
e8e72be33a
Convert some ARM tests with lots of greps to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83651 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 17:20:46 +00:00
Evan Cheng
3dc326ba83
Fix a logic error that caused non-rematable loop invariants loads to be licm'ed out of loop.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 06:21:52 +00:00
Bob Wilson
8795070d50
Commit one last NEON test to use FileCheck. That's all of them now!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83617 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 05:31:56 +00:00
Bob Wilson
0305dd745e
Convert more NEON tests to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83616 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 05:14:48 +00:00
Evan Cheng
35ca9203f2
Reset kill markers after live interval is reconstructed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83608 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 01:17:11 +00:00
Bob Wilson
5631139a69
Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 00:01:36 +00:00
Bob Wilson
8cdb269686
Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 23:51:31 +00:00
Bob Wilson
c5c6edb74f
Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83596 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 23:38:24 +00:00
Bob Wilson
4cf0189d5a
Convert more NEON tests to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83595 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 23:33:03 +00:00
Bob Wilson
62e053e5a1
Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.
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Also fix some copy-and-paste errors in previous changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83590 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 22:53:57 +00:00
Bob Wilson
5d78275493
Convert more NEON tests to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83587 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 22:33:53 +00:00
Bob Wilson
0bf7d998b4
Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 22:27:33 +00:00
Anton Korobeynikov
632606c724
Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via movt/movw pair.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 20:43:22 +00:00
Bob Wilson
30aea9d96e
Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 18:56:10 +00:00