Chris Lattner
38abcb500f
Eliminate CMPri, which is a synonym for SUBCCri
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:52:08 +00:00
Chris Lattner
294974bd57
add fneg,fabs,fsqrt instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24803 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:20:27 +00:00
Chris Lattner
b4d5172af9
Add patterns for fround/fextend and the funny fsmuld instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24802 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:14:30 +00:00
Chris Lattner
10c6aed73c
Add FP +,-,*,/
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24801 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:10:46 +00:00
Chris Lattner
558bfe0cf5
Give patterns to F3_3 instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24800 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:05:35 +00:00
Chris Lattner
d19fc65345
Implement 64-bit add/sub, make sure to receive and return 64-bit args with
...
the right halves in the right regs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24799 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:55:57 +00:00
Chris Lattner
7087e57872
implement div and rem
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24798 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:39:19 +00:00
Chris Lattner
ee3d5fba54
implement MULHU/MULHS for 64-bit multiplies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24797 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:30:00 +00:00
Chris Lattner
37949f5c2b
Add patterns for multiply, simplify Y register handling stuff, add RDY instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24796 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:22:53 +00:00
Chris Lattner
9034b883a4
Make the addressing modes smarter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24795 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:25:27 +00:00
Chris Lattner
87a63f812c
remove some unused instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24794 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:13:50 +00:00
Chris Lattner
2cfdbb2716
add andn/orn/xorn patterns. This allows us to compile this:
...
long %test(ubyte, short, long %X, long %Y) {
%A = xor long %X, -1
%B = and long %Y, %A
ret long %B
}
to this:
test:
save -96, %sp, %sp
andn %i4, %i2, %i0
andn %i5, %i3, %i1
restore %g0, %g0, %g0
retl
nop
instead of this:
test:
save -96, %sp, %sp
xor %i2, -1, %l0
xor %i3, -1, %l1
and %i4, %l0, %i0
and %i5, %l1, %i1
restore %g0, %g0, %g0
retl
nop
The simpleisel emits: :(
test:
save -96, %sp, %sp
or %g0, -1, %l0
or %g0, -1, %l0
or %g0, -1, %l0
or %g0, -1, %l1
xor %i2, %l0, %l0
xor %i3, %l1, %l1
and %i4, %l0, %i0
and %i5, %l1, %i1
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24793 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:05:49 +00:00
Chris Lattner
217aabf89e
Add support for 64-bit arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24792 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:59:06 +00:00
Chris Lattner
9a60ff654a
Sparc doesn't have sext_inreg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24791 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:50:42 +00:00
Chris Lattner
53ec2035eb
add patterns for FP stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24790 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:47:16 +00:00
Chris Lattner
d55e1ca5ef
Add [reg+reg] integer stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24789 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:44:36 +00:00
Chris Lattner
d30a630636
Add store patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:42:55 +00:00
Chris Lattner
0b218434cc
add truncstore
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:42:29 +00:00
Chris Lattner
b575baf57d
add fp load patterns, switch rest of loads and stores to use addrmodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:32:47 +00:00
Chris Lattner
1963783fab
Add integer load[r+r] forms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24785 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:26:45 +00:00
Chris Lattner
331355cf7d
Rename load/store instructions to include an RI suffix
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24784 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:18:49 +00:00
Chris Lattner
84e2abf116
Add patterns for the rest of the loads. Add 'ri' suffixes to the load and store insts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24783 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:18:24 +00:00
Chris Lattner
bc83fd9672
Add basic addressing mode support and one load.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24782 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:04:49 +00:00
Chris Lattner
4543251834
eliminate some redundancy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24781 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:47:05 +00:00
Chris Lattner
b71f9f8488
Use a combination of sethi and or to build arbitrary immediates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24780 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:41:43 +00:00
Chris Lattner
57dd3bc460
Use sethi to build large immediates with zeros at the bottom
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24779 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:37:00 +00:00
Chris Lattner
d2cd46676c
Add shift and small immediate support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:07:57 +00:00
Chris Lattner
f83cee6ac1
Add some basic reg-reg instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24777 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 18:53:33 +00:00
Chris Lattner
e33a3ff942
Add empty patterns to all F3_1 instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24776 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 18:49:14 +00:00
Evan Cheng
bdce7b4090
Darwin API issue: indirect load of external and weak symbols.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24775 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 09:13:43 +00:00
Chris Lattner
7b0902dcf8
Add some simple integer patterns. This allows us to compile this:
...
int %test(int %A) {
%B = add int %A, 1
%C = xor int %B, 123
ret int %C
}
into this:
test:
save -96, %sp, %sp
add %i0, 1, %l0
xor %l0, 123, %i0
restore %g0, %g0, %g0
retl
nop
for example. I guess it would make sense to add reg/reg versions too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24774 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:26:38 +00:00
Chris Lattner
4b4863188f
Implement ret with operand, giving us this:
...
int %test(int %A) {
ret int %A
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24773 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:15:09 +00:00
Chris Lattner
bc3d362d5b
Add a pattern for 'ret'. This now compiles:
...
void %test() { ret void }
:)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24772 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:08:42 +00:00
Chris Lattner
f3bf50d2c8
Add empty patterns for F3_2 instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24771 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:06:43 +00:00
Chris Lattner
a01b75758c
Implement LowerArguments, at least for the first 6 integer args
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24770 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:03:24 +00:00
Chris Lattner
6c18b10ad4
Add the framework for a dag-dag isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24769 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:47:01 +00:00
Evan Cheng
433dbdaa63
Remove a few lines of dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24768 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:18:44 +00:00
Chris Lattner
576e46fc67
asmprinter done, added crucial missing step
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24767 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:17:59 +00:00
Chris Lattner
967abf37c5
Use the AsmPrinter for global variable init printing. This eliminates a
...
bunch of code and causes V8 to start using the fancy .asciz directive that
the sun assembler supports.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24766 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:17:08 +00:00
Chris Lattner
b5e9eb6089
Switch constant pool printing over to use the Shared AsmPrinter version
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24765 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:11:43 +00:00
Chris Lattner
1dbed16fec
Use the shared AsmPrinter code for some basic stuff. No functionality
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change except for fewer .section directives emitted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24764 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:04:29 +00:00
Evan Cheng
98abbfb2ef
Added an idea about any_extend for performance tuning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24763 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 06:54:43 +00:00
Chris Lattner
0d8fcd3218
Convert the remaining instructions over, branches and calls. Fix a couple
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minor bugs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24762 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 06:54:41 +00:00
Chris Lattner
dc6938ac23
convert FP instructions to use an asmstring and operand list, allowing FP
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programs to work on V8 again
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24761 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 06:32:52 +00:00
Evan Cheng
45f37bc527
Added truncate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24760 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 02:02:50 +00:00
Evan Cheng
1aabc4ea15
Added anyext, modelled as zext on X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24759 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:47:57 +00:00
Evan Cheng
8dee8cca3a
Added some isel ideas.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24757 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:25:19 +00:00
Evan Cheng
aed7c721df
Added support for cmp, test, and conditional move instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24756 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:24:02 +00:00
Evan Cheng
56323c761a
Only lower SELECT when using DAG based isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24755 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:22:13 +00:00
Evan Cheng
7df96d6672
X86 lowers SELECT to a cmp / test followed by a conditional move.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:21:05 +00:00
Jim Laskey
f5395cee6a
Added source file/line correspondence for dwarf (PowerPC only at this point.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24748 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 22:45:29 +00:00
Chris Lattner
d9e0ba49a4
Weak and linkonce global vars should still have a .globl emitted for them
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24747 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 21:46:14 +00:00
Nate Begeman
f492f9901a
Add a second vector type to the VRRC register class, and fix some patterns
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so that tablegen can infer all types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24746 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 09:19:13 +00:00
Chris Lattner
0647bf6965
add some notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24745 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 07:20:53 +00:00
Chris Lattner
13e1501c91
Add a couple more instrs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24744 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 07:18:48 +00:00
Chris Lattner
3c1c514fae
remove some dead code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24743 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 07:16:02 +00:00
Chris Lattner
17392e026a
asmprint pseudo instrs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24742 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 07:13:26 +00:00
Chris Lattner
d4f2ab5e00
Autogenerate asmprinter for F3_2 instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24741 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 07:10:02 +00:00
Chris Lattner
1c4f435603
Switch F3_1 instructions over to use AsmStrings
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24740 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 06:52:00 +00:00
Chris Lattner
994b735de8
Plug in basic hooks for an autogenerated asm printer to fill in.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24739 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 06:34:17 +00:00
Chris Lattner
96b84beb77
Add operand info for F3_[12] instructions, getting V8 back to basic functionality.
...
With this, Regression/CodeGen/SparcV8/basictest.ll now passes. Lets hear it
for regression tests :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24738 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 06:25:42 +00:00
Chris Lattner
03a83c90da
Remove JIT support, which doesn't work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24736 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 06:06:07 +00:00
Chris Lattner
3ff5751683
add some simple operand info
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24735 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 06:02:58 +00:00
Chris Lattner
a637c32e38
Update the darwin handling of linkonce & weak functions and GV stubs. This
...
should work in all permutations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24728 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 00:22:14 +00:00
Chris Lattner
272f998f6f
Don't globalize internal functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24727 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 00:07:30 +00:00
Evan Cheng
cb17bac3a3
* Promote all 1 bit entities to 8 bit.
...
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24726 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 19:49:23 +00:00
Evan Cheng
502c5bb428
Added frameindex, constpool, globaladdr, and externalsym as root nodes of
...
leaaddr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24724 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 08:31:04 +00:00
Evan Cheng
543b4583d3
Added constpool, frameindex, and externalsym nodes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24723 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 08:29:48 +00:00
Evan Cheng
def941b41f
Handling zero extension of 1 bit value.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24722 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 01:02:48 +00:00
Evan Cheng
f6036a3f1b
Use MOV8rm to load 1 bit value.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24721 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 00:59:17 +00:00
Nate Begeman
b5f8e62d71
Remove a now unused statistic.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24720 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:56:16 +00:00
Nate Begeman
a07da92624
Use the new predicate support that Evan Cheng added to remove some code
...
from the DAGToDAG cpp file. This adds pattern support for vector and
scalar fma, which passes test/Regression/CodeGen/PowerPC/fma.ll, and
does the right thing in the presence of -disable-excess-fp-precision.
Allows us to match:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = mul <4 x float> %tmp1, %tmp1
%tmp3 = add <4 x float> %tmp2, %tmp1
store <4 x float> %tmp3, <4 x float> *%a
ret void
}
As:
_foo:
li r2, 0
lvx v0, r2, r3
vmaddfp v0, v0, v0, v0
stvx v0, r2, r3
blr
Or, with llc -disable-excess-fp-precision,
_foo:
li r2, 0
lvx v0, r2, r3
vxor v1, v1, v1
vmaddfp v1, v0, v0, v1
vaddfp v0, v1, v0
stvx v0, r2, r3
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24719 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:54:33 +00:00
Evan Cheng
74164098ff
Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24717 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:28:18 +00:00
Evan Cheng
8c75ef9228
Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24716 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:07:12 +00:00
Evan Cheng
58e84a69f5
Added support to specify predicates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24715 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:02:59 +00:00
Evan Cheng
2b52426441
Fixed extload type profile. The 4th operand is a ValueType node with type
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OtherVT, it cannot be compare to type of 1st operand which is an integer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24713 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 19:40:54 +00:00
Evan Cheng
7a7e8375a9
Added sext and zext patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24705 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:22:27 +00:00
Evan Cheng
3d2331dba7
Added sextld + zextld DAG nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24703 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:21:01 +00:00
Nate Begeman
3fb6877cb4
Add support for fmul node of type v4f32.
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void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = mul <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
Is selected to:
_foo:
li r2, 0
lvx v0, r2, r3
vxor v1, v1, v1
vmaddfp v0, v0, v0, v1
stvx v0, r2, r3
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24701 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 00:34:09 +00:00
Nate Begeman
993aeb2ed9
Prepare support for AltiVec multiply, divide, and sqrt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24700 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 22:55:22 +00:00
Evan Cheng
85dd889ed6
Add load + store folding srl and sra patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24696 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 07:24:22 +00:00
Chris Lattner
d1239b7c69
Use the shared asmprinter code for printing special llvm globals
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24695 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 06:32:50 +00:00
Chris Lattner
a046e0d79f
Add ELF and darwin support for static ctors and dtors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24693 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 04:53:51 +00:00
Chris Lattner
deea416570
reindent a loop, unswitch a loop. No functionality changes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24692 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 04:33:58 +00:00
Evan Cheng
c937ffafba
Beautify a few patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24690 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 02:40:18 +00:00
Evan Cheng
763b029b28
Some shl patterns which do load + store folding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24689 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 02:34:51 +00:00
Evan Cheng
605c415046
A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24688 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:57:51 +00:00
Evan Cheng
0ef3a77bdf
Add and, or, and xor patterns which fold load + stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24687 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:41:36 +00:00
Evan Cheng
6cad276c90
Add inc + dec patterns which fold load + stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24686 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:02:47 +00:00
Evan Cheng
5ce4edb967
Add neg and not patterns which fold load + stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24685 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:54:44 +00:00
Evan Cheng
5a38e0210d
Missed a couple redundant explicit type casts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24684 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:25:07 +00:00
Evan Cheng
9b6b642647
Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24683 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:14:11 +00:00
Evan Cheng
b3558540b6
* Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands.
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This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24682 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:01:09 +00:00
Evan Cheng
f281e02cbd
Add some integer mul patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 23:47:46 +00:00
Evan Cheng
d160d48a2b
Add some sub patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24675 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 21:54:05 +00:00
Evan Cheng
e5280536a3
When SelectLEAAddr() fails, it shouldn't cause the side effect of having the
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base or index operands being selected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24674 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 21:49:40 +00:00
Evan Cheng
cbd6ed4d6b
For ISD::RET, if # of operands >= 2, try selection the real data dep. operand
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first before the chain.
e.g.
int X;
int foo(int x)
{
x += X + 37;
return x;
}
If chain operand is selected first, we would generate:
movl X, %eax
movl 4(%esp), %ecx
leal 37(%ecx,%eax), %eax
rather than
movl $37, %eax
addl 4(%esp), %eax
addl X, %eax
which does not require %ecx. (Due to ADD32rm not matching.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24673 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:32:18 +00:00
Andrew Lenharth
110f2243fc
fix FP selects
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24672 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:30:09 +00:00
Chris Lattner
a763969837
remove some never-completed and now-obsolete code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24671 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:12:20 +00:00
Evan Cheng
ee93f9db87
Add a few more add / store patterns. e.g. ADD32mi8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24670 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 19:45:23 +00:00
Andrew Lenharth
361f45a557
restore a more restricted select
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24668 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 17:43:52 +00:00
Chris Lattner
d2c339cca7
Fix typo :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24664 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 18:43:13 +00:00
Chris Lattner
3aed79eadb
add selectcc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24662 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 08:35:54 +00:00
Chris Lattner
d717b19933
Remove type casts that are no longer needed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24661 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 07:45:47 +00:00
Chris Lattner
84384546e2
Realize the constant pool & global addrs must always be ptr type
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24660 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 07:45:04 +00:00
Chris Lattner
e54645a6fb
Fix the JIT failures from last night.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24659 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 07:37:41 +00:00
Andrew Lenharth
e41419f51e
FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24658 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 03:54:31 +00:00
Nate Begeman
28a6b02626
Add support for TargetConstantPool nodes to the dag isel emitter, and use
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them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 02:36:00 +00:00
Evan Cheng
b612ff9569
Use SDTCisPtrTy type property for store address.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24656 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 01:59:36 +00:00
Evan Cheng
b51a059b2c
* Added X86 store patterns.
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* Added X86 dec patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 00:48:20 +00:00
Nate Begeman
0976122abc
Add support patterns to many load and store instructions which will
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hopefully use patterns in the near future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24651 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 23:54:18 +00:00
Chris Lattner
d8fe3b3272
Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load
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must be a pointer. This removes a type check out of the code generated by
tblgen for load matching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:58:42 +00:00
Evan Cheng
ab24ed2a32
Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24648 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:48:48 +00:00
Chris Lattner
646f7afb79
Teach the PPC backend about the ctor and dtor list when not using __main and
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linking the entire program into one bc file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24645 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 18:24:29 +00:00
Andrew Lenharth
dd3ccde9ea
it helps if your conditionals are not reversed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24641 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 00:45:42 +00:00
Chris Lattner
62c08dd4a1
Add another important case we miss
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24639 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 07:13:28 +00:00
Evan Cheng
f20da7e1a7
Added support for ComplexPattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24638 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 04:28:48 +00:00
Evan Cheng
670fd8f8dd
Added explicit type field to ComplexPattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:15:07 +00:00
Evan Cheng
ec693f77c0
* Added intelligence to X86 LEA addressing mode matching routine so it returns
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false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:01:35 +00:00
Chris Lattner
e80242a948
X86 doesn't support sextinreg for 8-bit things either.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07 17:59:14 +00:00
Andrew Lenharth
bbe1225bf4
fix divide and remainder
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24628 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 23:27:39 +00:00
Chris Lattner
85961d5ec1
Silence another annoying GCC warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24627 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:56:18 +00:00
Andrew Lenharth
f88471ded7
more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24625 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:43:30 +00:00
Andrew Lenharth
cfb2815695
OK, this does wonders for broken stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24624 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:40:34 +00:00
Chris Lattner
4172b10ca1
Use new PPC-specific nodes to represent shifts which require the 6-bit
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amount handling that PPC provides. These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits. This fixes a miscompilation of crafty with
the new front-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24615 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 02:10:38 +00:00
Andrew Lenharth
eda80a0dec
added instructions with inverted immediates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24614 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 00:33:53 +00:00
Andrew Lenharth
8a3a5fc9ba
yea, it helps to have your path set right when testing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24613 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:41:45 +00:00
Andrew Lenharth
5de36f95da
These never trigger, but whatever
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24612 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:19:44 +00:00
Evan Cheng
8d202230b4
Remove unnecessary let hasCtrlDep=1 now it can be inferred.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24611 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:09:43 +00:00
Andrew Lenharth
7962065fdb
move this over to the dag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24609 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 20:50:53 +00:00
Andrew Lenharth
b457a93123
fix constant pool loads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24607 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 17:51:02 +00:00
Chris Lattner
3d36a9f6f4
Several things:
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1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly. The port number really
*is* a 16-bit value, but the patterns should only match if the number
is 0-255. Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
i8, not an i16 as they were believed to be before. This previous fib
stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:40:25 +00:00
Chris Lattner
68bfd9c1e8
On some targets (e.g. X86), shift amounts are not the same as the value
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being shifted. Don't assume they are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24598 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:37:26 +00:00
Chris Lattner
b5d01436e3
Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24595 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:34:29 +00:00
Chris Lattner
bd05982b48
Add some explicit type casts so that tblgen knows the type of the shift
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amount, which is not necessarily the same as the type being shifted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:34:05 +00:00
Chris Lattner
bead6612a5
The basic fneg cases are already autogen'd
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 19:04:38 +00:00
Chris Lattner
937a79dbe3
Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
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improvements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24591 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 19:01:59 +00:00
Chris Lattner
60a4ab2d5c
Finish moving uncond br over to .td file, remove from .cpp file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24590 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 18:48:01 +00:00
Chris Lattner
1e48478557
Define BR in the .td file now that Evan made tblgen smarter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24589 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 18:42:54 +00:00
Evan Cheng
d35b8c1adb
Added isel patterns for RET, JMP, and WRITEPORT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:19:43 +00:00
Evan Cheng
f8ac814957
* Added instruction property hasCtrlDep for those which r/w control-flow
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chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24586 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:13:17 +00:00
Chris Lattner
df65de42cf
Fix PR672 another way which should be more robust
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 06:03:50 +00:00
Chris Lattner
a027ba885a
Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.
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This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on. Given a clean nightly tester run, we should be able to turn it
on by default!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24578 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-03 07:15:55 +00:00
Chris Lattner
865874c88a
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24572 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-02 00:11:20 +00:00
Chris Lattner
18c778f8be
IA64 doesn't support the LOCATION node, and for some reason the ISelPattern
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stuff isn't using ISelLowering.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24567 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 18:19:53 +00:00
Chris Lattner
05f56a529c
Make sure these get added into the codegenmap when appropriate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24566 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 18:09:22 +00:00
Andrew Lenharth
6251b36d88
major think-o
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24564 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 17:48:51 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Nate Begeman
5dfc55c304
Cosmetic change, better reflects actual values
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24562 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:48:26 +00:00
Chris Lattner
db1cb2b3a1
Fix a regression caused by a patch earlier today
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24561 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 03:50:19 +00:00
Andrew Lenharth
9352622356
Flags where I think I need them, quick, before the nightly tester starts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24560 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 01:53:10 +00:00
Evan Cheng
640f299b44
Proper support for shifts with register shift value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24559 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:43:55 +00:00
Evan Cheng
c121e33e35
Use a getCopyToReg() variant to generate a flaggy CopyToReg node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24558 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:41:50 +00:00
Chris Lattner
d5acfb4153
SelectNodeTo now returns its result, we must pay attention to it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24552 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 23:04:38 +00:00
Chris Lattner
b19b899181
Pay attn to the node returned by SelectNodeTo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24551 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 23:02:08 +00:00
Chris Lattner
350d22e14d
SelectNodeTo now returns its result, we must pay attention to it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24550 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 22:59:19 +00:00
Chris Lattner
71d3d50b4a
SelectNodeTo now returns N. Use it instead of return N directly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24549 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 22:53:06 +00:00
Chris Lattner
80720a9219
Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24547 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 20:40:54 +00:00
Nate Begeman
85a168a734
Fix a typo in my latest change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24542 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:57:39 +00:00
Nate Begeman
391c5d231a
No longer track value types for asm printer operands, and remove them as
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an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:54:35 +00:00
Andrew Lenharth
72d32c222c
remove redundant code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24538 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 17:14:11 +00:00
Andrew Lenharth
b2156f91f5
Make typesafe that which isn't: FCMOVxx
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24536 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 17:11:20 +00:00
Andrew Lenharth
cd80496ccc
FPSelect and more custom lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24535 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 16:10:29 +00:00
Nate Begeman
f43a3ca26d
First chunk of actually generating vector code for packed types. These
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changes allow us to generate the following code:
_foo:
li r2, 0
lvx v0, r2, r3
vaddfp v0, v0, v0
stvx v0, r2, r3
blr
for this llvm:
void %foo(<4 x float>* %a) {
entry:
%tmp1 = load <4 x float>* %a
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float>* %a
ret void
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24534 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 08:22:07 +00:00
Andrew Lenharth
7f0db91f86
All sorts of stuff.
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Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy. They should be custom lowered though.
Lots more stuff compiles now (go go single source!). Of course, none of it
probably works, but that is what the nightly tester can find out :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24533 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 07:19:56 +00:00
Chris Lattner
5b9bbc8792
Fix a bug in a recent patch that broke shifts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24526 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 05:11:18 +00:00
Evan Cheng
bd3d25c6b1
Added support to STORE and shifts to DAG to DAG isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24525 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 02:51:20 +00:00
Evan Cheng
345c3f370d
Fixed a minor bug: - -offset != offset iff offset == MININT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24522 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 01:59:00 +00:00
Nate Begeman
7ac8e6b6a8
Represent the encoding of the SPR instructions as they actually are, so
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that we can use the correct SPR numbers in the InstrInfo.td file. This is
necessary to support VRsave.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24521 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 22:42:50 +00:00
Evan Cheng
f0701842f7
Add more X86 ISel patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24520 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 19:38:52 +00:00
Nate Begeman
425a96971f
Hook up one type, v4f32, to the VR RegisterClass for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24517 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 08:17:20 +00:00
Nate Begeman
9b14f66320
Add the remainder of the AltiVec 4 x float instructions. Further
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enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24516 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 08:04:45 +00:00
Chris Lattner
f73bae1b73
No targets support line number info yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24513 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 06:16:21 +00:00
Nate Begeman
6a648614e8
Add the majority of the vector machien value types we expect to support,
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and make a few changes to the legalization machinery to support more than
16 types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24511 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 05:45:29 +00:00
Evan Cheng
5ee16ea417
Fixed a comment bug:
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createPPCPatternInstructionSelector -> createPPCISelPattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24510 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 04:59:46 +00:00
Chris Lattner
eedf3b57cb
refix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24505 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 00:42:30 +00:00
Chris Lattner
fd5df2b203
don't say this is i128, because it isn't yet. Hopefully nate will change
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this to be something sane, but in the mean time it is unused, so safe to
make something bogus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24504 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 00:41:40 +00:00
Chris Lattner
46ec78646b
revert my change for the time being, which broke the build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24503 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 00:24:08 +00:00
Chris Lattner
0ba7d71213
fix a typo :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24501 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-28 22:42:15 +00:00
Chris Lattner
1e4ed93599
Add a missed optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24495 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-28 04:52:39 +00:00
Nate Begeman
01595c52b3
Small tweaks noticed while on the plane.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24492 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-26 22:39:34 +00:00
Duraid Madina
7b1e154c5a
add support for dynamic_stackalloc to the dag isel (thanks andrew ;)
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next up: support argument passing in memory, not just registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24490 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-25 07:49:25 +00:00
Nate Begeman
e4f17a5f9b
Some first bits of AltiVec stuff: Instruction Formats, Encodings, and
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Registers. Apologies to Jim if the scheduling info so far isn't accurate.
There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24489 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-23 05:29:52 +00:00
Andrew Lenharth
4052f02cdb
Fix warning, the better way. Really, this is what this instruction is for, so use it
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24486 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-22 20:59:00 +00:00
Andrew Lenharth
475d31729d
Fix warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24485 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-22 20:56:05 +00:00
Andrew Lenharth
50b37845ef
massive DAGISel patch. lots and lots more stuff compiles now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24483 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-22 04:20:06 +00:00
Chris Lattner
ac2902bcb5
Use HasDotTypeDotSizeDirective instead of forELF
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24481 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 23:06:54 +00:00
Chris Lattner
9787c6443f
Remove a level of indentation by using a continue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24479 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:48:18 +00:00
Chris Lattner
d460f57d65
Simplify the subtarget info, allow the asmwriter to do some target sensing
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based on TargetType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24478 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:43:58 +00:00
Chris Lattner
a35a8e87fa
Use subtarget information computed by X86Subtarget instead of rolling our own.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24477 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:39:40 +00:00
Chris Lattner
e5600e5509
Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin,
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or native Win32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24476 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:31:58 +00:00
Chris Lattner
5df14ca0a1
Add a forELF flag, allowing the removal of forCygwin and simplification of
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conditionals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24475 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:19:48 +00:00
Chris Lattner
8fccc97b0b
simplify and genericize this code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24473 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 19:50:31 +00:00
Duraid Madina
b6f023ac21
add support for div/rem to the dag->dag isel. yay.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24472 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 14:14:54 +00:00
Chris Lattner
42a76cdb04
Eliminate unneeded intermediate class. Move doFinalizeMethod to bottom of
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file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24470 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:40:17 +00:00
Chris Lattner
3dfbe2ed34
Start using shared asmprinter Constant Pool emitter, use shorter cpi names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24469 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:38:26 +00:00
Chris Lattner
69191f8f05
prune #include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24468 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:33:17 +00:00
Chris Lattner
d939f6c85d
Switch to using the shared constant pool printer, along with using shorter
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CPI ids
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24467 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:32:23 +00:00
Chris Lattner
6053010f9c
Switch to using the generic constant pool emitter impl, use shorter
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CPI names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24466 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:29:17 +00:00
Chris Lattner
c569e6108a
Use generic constant pool emission code in the AsmPrinter class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24465 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:26:15 +00:00
Chris Lattner
0745536c00
Use the FunctionNumber provided by the AsmPrinter class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24462 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:14:07 +00:00
Chris Lattner
6d5a4f6a8e
Use CommentString where possible, fix a bug where aix mode wouldn't assemble
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due to basic blocks being misnamed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24459 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:02:41 +00:00
Chris Lattner
ef65874151
unify the darwin and aix constant pool printers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24458 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:57:37 +00:00
Chris Lattner
8b8b9515d6
Adjust to capitalized AsmPrinter method names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24456 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:51:23 +00:00
Chris Lattner
64965ba8b0
Use PrivateGlobalPrefix for basic block labels. This allows the x86 darwin
...
port to properly use L for the bb prefix instead of .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24454 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:43:59 +00:00
Chris Lattner
7f9ccde91e
use PrivateGlobalPrefix for basic blocks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24453 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:41:05 +00:00
Chris Lattner
2ec30b5e82
Use PrivateGlobalPrefix for basic block labels
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24452 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:39:22 +00:00
Chris Lattner
87744a2dbd
Use PrivateGlobalPrefix for basic blocks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24451 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:38:08 +00:00
Chris Lattner
0a70a49dd6
Switch to the new shared SwitchSection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24450 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:30:28 +00:00
Chris Lattner
4bfa3a3eb0
Start using SwitchSection, allowing globals and functions to be emitted
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to specific sections. Delete some dead functions copied from the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24449 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:26:04 +00:00
Chris Lattner
7b6e53cde7
convert the rest of this over to use SwitchSection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24448 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:16:34 +00:00
Chris Lattner
224cfc2eac
Start using the AsmPrinter shared SwitchSection code. This allows the X86
...
backend to implement global variables in sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24447 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:11:11 +00:00
Chris Lattner
f6163a0079
This is now implemented in common codegen code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24446 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:06:58 +00:00
Chris Lattner
62cbf2aab9
Rename SwitchSection -> switchSection to avoid conflicting with a future
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change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24443 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:55:27 +00:00
Chris Lattner
81a994e42e
Start using PrivateGlobalPrefix correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24442 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:51:52 +00:00
Chris Lattner
f55366e3c2
set PrivateGlobalPrefix on darwin, use it when printing out CP references
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24441 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:47:58 +00:00
Chris Lattner
c41cc83117
Naturally align doubles in the constant pool, set PrivateGlobalPrefix on
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darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24440 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:46:22 +00:00
Chris Lattner
81f803df80
Lower READCYCLECOUNTER correctly, preserving the chain result
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24438 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:57:19 +00:00
Chris Lattner
441b223c9b
encode rdtsc correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24435 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:13:18 +00:00
Chris Lattner
81363c3871
use chain operands to ensure the copies don't wander from the rdtsc instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24434 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:01:40 +00:00
Andrew Lenharth
b873ff322c
The second patch of X86 support for read cycle counter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24430 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 21:41:10 +00:00
Chris Lattner
6adaf79ad7
Teach the x86 backend about the register constraints of its addressing mode.
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Patch by Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24423 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 07:01:30 +00:00
Chris Lattner
be7a2ff2dd
Capture more operand info, patch by Evan Cheng
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24422 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 07:00:10 +00:00
Chris Lattner
f9ce9fb49b
Add load and other support to the dag-dag isel. Patch contributed by Evan
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Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24419 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 02:11:08 +00:00
Andrew Lenharth
f27b6145af
prevent latent switch creation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24413 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-18 13:57:03 +00:00
Chris Lattner
f124d5e500
add more patterns, patch by Evan Cheng.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24406 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-18 01:04:42 +00:00
Nate Begeman
69a2cf421b
Also add the new vector value type here, for completeness.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24405 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-18 00:53:32 +00:00
Chris Lattner
9542f9714e
only use dyld stubs if not in ppc-static mode. This completes support for
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non-static codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24403 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 19:40:30 +00:00
Chris Lattner
9ba13e4aef
refactor call operand handling to eliminate special cases from printOp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24401 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 19:25:59 +00:00
Chris Lattner
3e7f86a037
disentangle call operands from branch operands a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24400 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 19:16:08 +00:00
Chris Lattner
1d05cb47a9
add an option to generate completely non-pic code, corresponding to what
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gcc -static produces on PPC. This is used for building kexts and other things.
With this, materializing the address of a global looks like:
lis r2, ha16(L_H$non_lazy_ptr)
la r3, lo16(L_H$non_lazy_ptr)(r2)
we're still emitting stubs for functions, which is wrong. That is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24399 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:55:48 +00:00
Chris Lattner
1df747867c
Fix a bug that resistor on IRC hit where we tried to create token factor
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nodes of load results, not of their chain results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24398 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:30:17 +00:00
Chris Lattner
3eef4e377c
Enable global address legalization, fixing a todo and allowing the removal
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of some code. This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner. It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24397 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:26:56 +00:00
Chris Lattner
4f0f86de5f
Teach the selector to fold lo(g) into load instruction immediate fields
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24396 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:02:16 +00:00
Chris Lattner
490ad08097
Generate LA and ADDIS when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24395 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 17:52:01 +00:00
Chris Lattner
1566613ca4
Use the right accessor to create this node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24394 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 17:51:38 +00:00
Chris Lattner
860e8862c1
Add an initial hack at legalizing GlobalAddress into the appropriate nodes
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on Darwin to remove smarts from the isel. This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file. However, we can currently emit stuff like
this: :)
li r2, lo16(L_x$non_lazy_ptr)
lis r3, ha16(L_x$non_lazy_ptr)
lwzx r2, r3, r2
The obvious improvements will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24390 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 07:30:41 +00:00
Chris Lattner
db40dc2d63
Add globaladdress and targetglobaladdress nodes for dag patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24389 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 07:20:15 +00:00
Chris Lattner
bae5b3c1c6
LI could theoretically be used for the lo-part of a global address, just like
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lis can be used for the high part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24388 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 07:04:43 +00:00
Chris Lattner
2823b3e70e
When lowering direct calls, lower them to use a targetglobaladress directly
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instead of a globaladdress. This has no effect on the generated code at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24386 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 05:56:14 +00:00
Chris Lattner
78432feff8
Add patterns for some 16-bit immediate instructions, patch contributed by
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Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24384 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 02:01:55 +00:00
Chris Lattner
7a12537843
Add patterns for several simple instructions that take i32 immediates.
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Patch contributed by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24382 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 22:59:19 +00:00
Andrew Lenharth
81b5a3c387
who would have thought you would want to write into globals too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24381 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 21:15:53 +00:00
Chris Lattner
c961eea6cb
initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
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by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24371 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 01:54:32 +00:00
Nate Begeman
422b0cee7a
Patch to clean up function call pseudos and support the BLA instruction,
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which branches to an absolute address. This is required to support objc
direct dispatch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24370 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 00:48:01 +00:00
Chris Lattner
2c3d3d2a59
Make sure to use SwitchSection to switch sections so that we don't accidentally emit
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functions into the .const section. Whoops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24363 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-15 01:45:01 +00:00
Chris Lattner
dbdbf0ce2e
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
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contributed by Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24358 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-15 00:40:23 +00:00
Chris Lattner
ced704ba60
Handle globals with explicit alignment requests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24355 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-14 19:00:30 +00:00
Chris Lattner
ac7fd7fcc6
Teach the PPC asmwriter to honor globals with explicit section requests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24353 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-14 18:52:46 +00:00
Duraid Madina
889649e78e
add FP select. next up - divide!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24346 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-14 01:17:30 +00:00
Chris Lattner
773a959523
unbreak the build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24339 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-13 01:45:23 +00:00
Andrew Lenharth
ea2fdf9380
enable LSR by default on alpha
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24337 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-12 19:21:08 +00:00
Andrew Lenharth
6467dfa40d
fix more regressions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24335 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-12 19:06:28 +00:00
Andrew Lenharth
82a698ce6a
fix READCYCLECOUNTER
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24334 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-12 19:04:09 +00:00
Andrew Lenharth
b921f1b731
fix yet more regressions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24308 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-11 23:08:46 +00:00
Andrew Lenharth
2729e614fa
generate chain result
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24307 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-11 23:02:55 +00:00
Andrew Lenharth
c2c64fd3c6
Fix a bunch more alpha regressions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24304 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-11 19:52:25 +00:00
Andrew Lenharth
51b8d54922
continued readcyclecounter support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24300 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-11 16:47:30 +00:00
Chris Lattner
5684598f3f
Make BB and CPI labels use the function number, not the function name as a
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uniquing id. This makes things happy when the function name is quoted,
preventing labels like LBB"foo"_2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24295 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 21:59:25 +00:00
Chris Lattner
ba9c6434b9
do not allow '.' in symbol names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24292 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 21:39:29 +00:00
Chris Lattner
85eac0d941
Darwin supports quoted labels. This implements:
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test/Regression/CodeGen/PowerPC/darwin-labels.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24287 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 19:33:43 +00:00
Chris Lattner
36c975c023
Call this method with the object we have
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24279 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 18:53:25 +00:00
Chris Lattner
3459bfbc39
Make the aix asm printer interface properly with the parent class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24274 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 18:20:29 +00:00
Andrew Lenharth
7b441dc966
fix a bunch of regressions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24269 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 16:59:55 +00:00
Andrew Lenharth
5cefc5e64d
whatever. Intermediate patch to see what breaks. Seems ok.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24260 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-09 19:17:08 +00:00
Chris Lattner
df2e425f2a
Add a new option to indicate we want the code generator to emit code quickly,
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not spending tons of time microoptimizing it. This is useful for an -O0
style of build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24235 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08 02:12:47 +00:00
Chris Lattner
ce8eb0c16b
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24233 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08 02:11:51 +00:00
Duraid Madina
d525df3c27
add support for storing and returning bools
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24228 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-07 03:11:02 +00:00
Duraid Madina
00873ebc1f
just some random hacking - calls (particularly indirect) need a lot of
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love (especially with -sched=simple)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24225 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 13:43:30 +00:00
Nate Begeman
ae232e7a10
Add the necessary support to the ISel to allow targets to codegen the new
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alignment information appropriately. Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack. Support for
arbitrarily aligned dynamic allocas coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 09:00:38 +00:00
Duraid Madina
21687e8f63
ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and
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a bunch of other things) but is currently ignored by the code
generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24206 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 04:29:30 +00:00
Chris Lattner
ae4664a9f2
add a case Nate sent me
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24195 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 08:57:56 +00:00
Duraid Madina
764fe71e12
oops, forgot to load GP for indirect calls, though the old code now commented
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out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)
would fix this but it's 3am! :O
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24186 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 17:55:53 +00:00
Duraid Madina
b97cc99058
kill redundant SP/GP/RP save/restores across calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24183 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 10:01:10 +00:00
Duraid Madina
9f7290633a
add support for loading bools
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24182 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 09:59:06 +00:00
Duraid Madina
49fcc4006c
fun with predicates! (add TRUNC i64->i1, AND i1 i1, fix XOR i1 i1)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24175 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 00:57:56 +00:00
Duraid Madina
0e5e0d14a8
add pattern to load constant 0 into a predicate reg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24164 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-03 10:09:32 +00:00
Chris Lattner
61bc60fc4f
Fix a bug that prevented this pattern from matching
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24161 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-03 05:45:34 +00:00
Chris Lattner
bad13eb189
Fix a QOI issue noticed by Markus F.X.J. Oberhumer.
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This fixes PR641
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24154 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 17:42:58 +00:00
Duraid Madina
056728f192
"fix" support for FP constants (this code asserts in the scheduler,
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though)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24152 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 07:32:59 +00:00
Duraid Madina
a2df2aee81
add F0 and F1 to the FP register class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24151 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 07:30:39 +00:00
Chris Lattner
cb2583e17d
This works now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24150 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 06:49:37 +00:00
Duraid Madina
5966955445
add support for SELECT to TargetSelectionDAG.td, add support for
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selecting ints to IA64, and a few other ia64 bits and pieces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24147 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 02:37:18 +00:00
Duraid Madina
93856802ae
add support for loading FP constants +0.0 and +1.0 to the dag isel,
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stop pretending -0.0 and -1.0 are machine constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24146 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 02:35:04 +00:00
Jim Laskey
6cee630070
Allow itineraries to be passed through the Target Machine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24139 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 20:06:59 +00:00
Duraid Madina
7a8ef3a0d4
heh, scheduling was easy?
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need to send chris, jim and sampo a box of fish each
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24135 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 05:49:08 +00:00
Duraid Madina
dc9549b52c
FORTRAN!!! :( and other similarly unfortunate things mean that on ia64
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one sometimes needs to pass FP args in both FP *and* integer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24134 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 05:46:16 +00:00
Duraid Madina
aba8457125
so tablegen was thinking I might want to convert FPs to predicates.
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clever little tablegen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24133 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 03:32:15 +00:00
Duraid Madina
e2fd9e2d9d
add support for int->FP and FP->int ops, and add ia64 patterns for these
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24132 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 03:07:25 +00:00
Duraid Madina
d1eda6d155
add zeroextend predicate->integer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24131 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 01:29:55 +00:00
Chris Lattner
5b0ac99c96
Add a flag to enable a darwin linker optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24130 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 00:12:36 +00:00
Chris Lattner
bb69e39b5b
Make constant pool entries use private labels. This is important when you're
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not compiling a whole program at a time :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24129 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-31 22:12:06 +00:00
Duraid Madina
363aff2f3c
add FP compares and implicit register defs to the dag isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24118 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-31 01:42:11 +00:00
Chris Lattner
c1d6f67e8e
If the module has no t-t and the host is an alpha, default to using the Alpha BE
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24110 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 16:44:01 +00:00
Duraid Madina
5c2c64e567
fix some broken comparisons, this affected the Pattern isel too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24109 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 10:14:19 +00:00
Chris Lattner
b685af3e60
This is implemented
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2005-10-30 06:42:12 +00:00
Chris Lattner
f519fe07e0
Make -time-passes output prettier
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24096 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-29 16:45:02 +00:00
Duraid Madina
25d0a88eb8
add some FP stuff, some mix.* stuff, and constant pool support to the
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DAG instruction selector, which should be destroyed one day (in the pattern
isel also) since ia64 can pack any constant in the instruction stream
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2005-10-29 16:08:30 +00:00
Chris Lattner
72fe0af68f
remove reference to this pass
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2005-10-29 05:28:34 +00:00
Duraid Madina
274ecfb782
add shladd
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2005-10-29 04:13:40 +00:00
Nate Begeman
167f1e2651
New case to handle someday
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24075 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 23:26:57 +00:00
Chris Lattner
7d7b96746c
Don't emit "32" for unordered comparison
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2005-10-28 22:58:07 +00:00
Chris Lattner
ed048c067d
add a hack to get code with ordered comparisons working. This hack is
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tracked as PR642
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2005-10-28 20:49:47 +00:00
Chris Lattner
6df2507121
add support for branch on ordered/unordered.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24067 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 20:32:44 +00:00
Chris Lattner
f02a916d82
Do not globalize internal symbols
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2005-10-28 18:44:07 +00:00
Chris Lattner
aee436bcc0
These are autogenerated
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24063 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 18:26:52 +00:00
Duraid Madina
f2db9b88da
DAG->DAG instruction selection for ia64! "hello world" works, not much else.
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use -enable-ia64-dag-isel to turn this on
TODO: delete lowering stuff from the pattern isel
: get operations on predicate bits working
: get other bits of pseudocode going
: use sampo's mulh/mull-using divide-by-constant magic
: *so* many patterns ("extr", "tbit" and "dep" will be fun :)
: add FP
: add a JIT!
: get it working 100%
in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.
OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.
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2005-10-28 17:46:35 +00:00
Chris Lattner
4bd4a54d57
remove dead stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24054 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 04:58:24 +00:00
Chris Lattner
a411bef105
Eliminate getClass, it is not needed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24053 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 04:57:11 +00:00
Chris Lattner
0195910558
a bad case for bitfield insert
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2005-10-28 00:20:45 +00:00
Andrew Lenharth
2012cc013c
int comparison patterns
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2005-10-26 18:44:45 +00:00
Jim Laskey
2cbc207c76
Typo made worse x 2 - take 2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24018 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 18:07:50 +00:00
Chris Lattner
85fd97dc88
Fix an assert compiling MallocBench/gs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24017 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 18:01:11 +00:00
Jim Laskey
ff2fcee846
Typo x 2
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24016 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 17:50:22 +00:00
Andrew Lenharth
641b64aa4b
Simplify instinfo, set random bits on more fp insts, and fix 1 opcode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24014 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 17:41:46 +00:00
Jim Laskey
581a8f79bc
Give full control of subtarget features over to table generated code.
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2005-10-26 17:30:34 +00:00
Jim Laskey
f0c2be4d2b
Add attribute name and type to SubtargetFeatures.
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2005-10-26 17:28:23 +00:00
Chris Lattner
1f426deade
Add nodes for CondCodeSDNode and setcc, and add a bunch of pattern fragments
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to make it easy to use them. This lets you write patterns like:
(set PRRC:$rd, (setne GPRC:$rS, imm:$SH))
and stuff.
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2005-10-26 17:00:25 +00:00
Nate Begeman
5cd61ce1be
Add a note about some bitfield stuff we could be doing better.
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2005-10-25 23:50:02 +00:00
Nate Begeman
ae749a9bb5
Correctly Expand or Promote FP_TO_UINT based on the capabilities of the
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machine. This allows us to generate great code for i32 FP_TO_UINT now on
targets with 64 bit extensions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23993 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 23:48:36 +00:00
Chris Lattner
6e61ca6fa7
autogen undef
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2005-10-25 21:03:41 +00:00
Chris Lattner
978982628a
Add undef
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2005-10-25 21:03:14 +00:00
Chris Lattner
3075a4e94d
Allow pseudos to have patterns, no functionality change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23988 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 20:58:43 +00:00
Chris Lattner
9c73f095bb
Autogen fsel
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2005-10-25 20:55:47 +00:00
Chris Lattner
eb255f2b83
Expose the fextend on the DAG instead of doing it in the matcher
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2005-10-25 20:54:57 +00:00
Chris Lattner
e6115b370a
Autogen a few new ppc-specific nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23985 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 20:41:46 +00:00
Chris Lattner
8ecedbe2c3
The dag isel generator generates this now
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2005-10-25 20:36:10 +00:00
Chris Lattner
99ea9da872
Be a bit more paranoid about calling SelectNodeTo
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2005-10-25 20:26:41 +00:00
Chris Lattner
3393e80a06
Fix a couple of minor bugs. The first fixes povray, the second fixes things
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if the dag combiner isn't run
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2005-10-25 19:32:37 +00:00
Jim Laskey
34bd5d5d87
Preparation of supporting scheduling info. Need to find info based on selected
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CPU.
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2005-10-25 15:15:28 +00:00
Chris Lattner
08a6b3cf7e
do not wrap this whole file in namespace llvm
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2005-10-24 06:38:35 +00:00
Chris Lattner
02d608bd5f
Make this build with GCC 4.1, patch contributed by Vladimir A. Merzliakov!
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2005-10-24 04:51:35 +00:00
Chris Lattner
f36aeedaa3
DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now
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2005-10-24 02:26:13 +00:00
Chris Lattner
aa9b596c5d
only build .a version of this library
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2005-10-24 02:14:49 +00:00
Chris Lattner
635df00b02
There is no need to build an archive version of this library
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2005-10-24 02:09:03 +00:00
Chris Lattner
11686f1c07
This file is hopelessly out of date
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2005-10-24 02:07:08 +00:00
Chris Lattner
2224dcc88c
Simplify this, matching changes in the tblgen emitter
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2005-10-23 22:34:25 +00:00
Chris Lattner
8ec9f331d2
Simplify this due to changes in the tblgen side
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2005-10-23 22:33:22 +00:00
Chris Lattner
aa38be17c8
mark this as beta
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2005-10-23 22:23:45 +00:00
Chris Lattner
3e808a45b3
If a user requests help, give them help on both features and processors
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2005-10-23 22:23:13 +00:00
Chris Lattner
ed465f5407
Autogen subtarget information from .td files.
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2005-10-23 22:15:34 +00:00
Chris Lattner
5882e40ded
Add subtarget feature/processor defns to the .td file
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2005-10-23 22:08:45 +00:00
Chris Lattner
c8d28890f6
rearrange things a bit so that instructions can use subtarget features in the
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future.
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2005-10-23 22:08:13 +00:00
Chris Lattner
f690e6f3f6
add a marker
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2005-10-23 22:07:20 +00:00
Chris Lattner
ffff6175ef
add a note that Nate mentioned last week
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2005-10-23 21:44:59 +00:00
Chris Lattner
1171ff4fd7
Put some of my random notes somewhere public
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2005-10-23 19:52:42 +00:00
Chris Lattner
ba76c21858
Improve help output.
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2005-10-23 05:33:39 +00:00
Chris Lattner
2e1f823aed
improve -help output
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2005-10-23 05:28:51 +00:00
Chris Lattner
54195c1a9d
Move static functions from .h file, reduce #includes, pass strings by const&,
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use LowercaseString from StringExtras.h, remove extraneous space from help
output.
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2005-10-23 05:26:26 +00:00
Andrew Lenharth
8b7f14e970
Add several things.
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loads
branches
setcc
working calls
Global address
External addresses
now I can manage malloc calls.
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2005-10-23 03:43:48 +00:00
Andrew Lenharth
756fbeb905
Well, the Constant matching pattern works. Can't say much about calls or globals yet.
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2005-10-22 22:06:58 +00:00
Chris Lattner
5ef4d8dd6d
This file is entirely ifdef'd out
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2005-10-22 19:37:08 +00:00
Jim Laskey
5476b9bfce
Add g3 back to the mix and reorder to irritate them anal folk. Actually, it's
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to group appropriately and provide cues to maintainers that the lists don't
need to be ordered.
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2005-10-22 08:04:24 +00:00
Chris Lattner
4245f1d790
64-bit reg support should not be enabled by default, as support isn't complete.
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2005-10-21 22:15:43 +00:00
Chris Lattner
dabb8291e8
Instead of aborting if not a case we can handle specially, break out and
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let the generic code handle it. This fixes CodeGen/Generic/2005-10-21-longlonggtu.ll on ppc.
also, reindent this code
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2005-10-21 21:17:10 +00:00
Jim Laskey
f5fc2cbd6b
Plugin new subtarget backend into the build.
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2005-10-21 19:05:19 +00:00
Chris Lattner
d2fc54edc4
silence a release mode warning
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2005-10-21 16:01:26 +00:00
Nate Begeman
ae1641c39f
Match rotate. This does actually match the rotates in an rc5 cipher, but I
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haven't seen it fire on our testsuite.
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2005-10-21 06:36:18 +00:00
Nate Begeman
d5ce204c5f
Don't generate operations that aren't yet supported
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2005-10-21 01:52:45 +00:00
Nate Begeman
0b2973aef2
Kill some now-dead code.
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2005-10-21 01:52:20 +00:00
Andrew Lenharth
fe9234db9b
byte zap not immediate goodness
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2005-10-21 01:24:05 +00:00
Nate Begeman
405e3ecb56
Invert the TargetLowering flag that controls divide by consant expansion.
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Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
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2005-10-21 00:02:42 +00:00
Andrew Lenharth
1f347a318c
Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight
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2005-10-20 23:58:36 +00:00
Chris Lattner
eae6d648da
Use a literal to define ineg instead of immzero
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2005-10-20 23:30:37 +00:00
Andrew Lenharth
964b6aacb4
added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh
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2005-10-20 19:39:24 +00:00
Andrew Lenharth
d684e1a64d
add cttz and ctpop
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2005-10-20 19:38:11 +00:00
Andrew Lenharth
892ade722a
Sounds good, finish the intop conversion.
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2005-10-20 14:42:48 +00:00
Nate Begeman
12a923408c
Add some more patterns for i64 on ppc
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2005-10-20 07:51:08 +00:00
Chris Lattner
ae4be981b1
Add some pattern fragments to simplify the repetitive parts of the patterns
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for some common ops and use them for a few examples. Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.
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2005-10-20 04:21:06 +00:00
Chris Lattner
d7cc4c407d
simplify this a bit by using immediates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23836 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 03:57:03 +00:00
Nate Begeman
6957523b9d
Move the target constant divide optimization up into the dag combiner, so
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that the nodes can be folded with other nodes, and we can not duplicate
code in every backend. Alpha will probably want this too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23835 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 02:15:44 +00:00
Andrew Lenharth
d97591a961
forgot this one
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23833 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 00:29:02 +00:00
Andrew Lenharth
4907d22a90
ret 0; works, not much else
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still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23832 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 00:28:31 +00:00
John Criswell
9811ea4567
This fixes PR638:
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Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23831 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 20:07:15 +00:00
Jim Laskey
538421411a
Added InstrSchedClass to each of the PowerPC Instructions.
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Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23830 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 19:51:16 +00:00
Nate Begeman
2d5aff761d
Write patterns for the various shl and srl patterns that don't involve
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doing something clever.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23824 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 18:42:01 +00:00
Jim Laskey
0de8796e68
Push processor descriptions to the top of target and add command line info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23820 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 13:34:52 +00:00
Chris Lattner
f6cd147471
now that tblgen is smarter, use integers directly. This should help Andrew too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23818 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 04:32:04 +00:00
Chris Lattner
14c09b81ea
teach ppc backend these are copies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23813 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:50:36 +00:00
Chris Lattner
8be1fa5dc5
Convert these cases to patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23811 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:38:02 +00:00
Nate Begeman
8d94832394
Woo, it kinda works. We now generate this atrociously bad, but correct,
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code for long long foo(long long a, long long b) { return a + b; }
_foo:
or r2, r3, r3
or r3, r4, r4
or r4, r5, r5
or r5, r6, r6
rldicr r2, r2, 32, 31
rldicl r3, r3, 0, 32
rldicr r4, r4, 32, 31
rldicl r5, r5, 0, 32
or r2, r3, r2
or r3, r5, r4
add r4, r3, r2
rldicl r2, r4, 32, 32
or r4, r4, r4
or r3, r2, r2
blr
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2005-10-19 01:12:32 +00:00
Chris Lattner
e5468305a0
apply some tblgen majik to simplify the X register definitions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 00:17:55 +00:00
Nate Begeman
da32c9eed6
Make a new reg class for 64 bit regs that aliases the 32 bit regs. This
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will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.
Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG. Something wll have to be
figured out.
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2005-10-19 00:05:37 +00:00
Nate Begeman
4a95945fa5
Add the ability to lower return instructions to TargetLowering. This
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allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23802 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 23:23:37 +00:00
Jim Laskey
21f587ca24
Simple edits; remove unimplimented cases and clarify long haul SLU cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:59:23 +00:00
Chris Lattner
841d12d9ac
Fix the JIT encoding of LWA, LD, STD, and STDU.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:51:22 +00:00
Jim Laskey
076866c50f
Checking in first round of scheduling tablegen files. Not tied in as yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:23:40 +00:00
Chris Lattner
3d8df55fed
add a case
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23785 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 06:30:51 +00:00
Nate Begeman
9d2b817fcb
Do the right thing and enable 64 bit regs under the control of a subtarget
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option. Currently the only way to enable this is to specify the
64bitregs mattr flag. It is never enabled by default on any config yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23779 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:56:42 +00:00
Nate Begeman
1d9d7427c4
First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is
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purely mechanical.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:28:58 +00:00
Nate Begeman
21e463b2bf
More PPC32 -> PPC changes, as well as merging some classes that were
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redundant after the change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23759 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-16 05:39:50 +00:00
Nate Begeman
34f342e36f
Remove some dead code now that the dag combiner exists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:08:02 +00:00
Chris Lattner
4cb5a1b896
Remove some dead code: the ORI/ORIS cases are autogen'd. This makes
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SelectIntImmediateExpr dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23753 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:06:18 +00:00
Chris Lattner
de123822e5
prune #includes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23752 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:58:54 +00:00
Chris Lattner
75c9f67370
These instructions are now autogenerated
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23751 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:56 +00:00
Chris Lattner
e0b2e6372f
Add a pattern for FSQRTS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23750 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:15 +00:00
Chris Lattner
651dea74f6
remove dead code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23749 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:40:12 +00:00
Chris Lattner
d242419e17
remove broken SRA/rlwimi case
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23746 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 19:04:48 +00:00
Chris Lattner
16e71f2f70
Rename PPC32*.h to PPC*.h
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This completes the grand PPC file renaming
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2005-10-14 23:59:06 +00:00
Chris Lattner
b9459b731a
Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfo
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and PPC32JITInfo classes should be merged.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23744 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:53:41 +00:00
Chris Lattner
2668959b88
Rename PowerPC*.h to PPC*.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23743 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:51:18 +00:00
Chris Lattner
26bd0d48a1
Rename PowerPCInstrBuilder.h -> PPC*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23742 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:45:43 +00:00
Chris Lattner
ec4b73cb09
Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine
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still should be merged into the PPC32TargetMachine class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23741 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:44:05 +00:00
Chris Lattner
f379997adc
Rename PowerPC*.td -> PPC*.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23740 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:40:39 +00:00
Chris Lattner
f1ed100bc4
These are dead
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23739 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:38:51 +00:00
Chris Lattner
4c7b43b43f
Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23738 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:37:35 +00:00
Chris Lattner
e87bc1f3a8
Like the comment says...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23737 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:48:24 +00:00
Chris Lattner
617742b1b8
Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions
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from the .td file that correspond to it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23736 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:44:13 +00:00
Nate Begeman
14e2cf62f4
Properly split f32 and f64 into separate register classes for scalar sse fp
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fixing a bunch of nasty hackery
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:06:00 +00:00
Nate Begeman
e0de44adba
Remove an unnecsesary file. PPC32 and PPC64 share architected registers.
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We will decide with subtarget support whether we ever use an i64 register
class.
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2005-10-14 18:58:46 +00:00
Chris Lattner
444215dddc
add the integer truncate/extension operations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23733 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 06:40:20 +00:00
Chris Lattner
3f31d4304c
These are now autogenerated
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23731 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 06:26:29 +00:00
Chris Lattner
7cb6491a0d
Add patterns for FP round/extend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23727 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 04:55:50 +00:00
Chris Lattner
13664a6194
add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend in terms of it
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23726 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 04:55:10 +00:00
Chris Lattner
7b1fe15de0
These definitions have been moved to common code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-10 06:01:00 +00:00
Chris Lattner
17f2cf05b3
Pull DAG ISel generation nodes out of the PowerPC backend to where they
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can be used by other targets. For those targets that want to use it,
have at. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23680 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-10 06:00:30 +00:00
Andrew Lenharth
fa08fb2c78
This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23676 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-09 20:11:35 +00:00
Chris Lattner
65a419a104
Disable formation of rlwinm instructions from SRA bases. This fixes
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the 177.mesa failure from last night, and fixes the
CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added.
If this code cannot be fixed, it should be removed for good, but I'll leave
it to Nate to decide its fate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23670 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-09 05:36:17 +00:00
Nate Begeman
7d47a61496
Remove another unused file. Preparing for the great "enable i64 on ppc32"
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merge, and using subtarget info for ptr size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23668 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-08 01:32:34 +00:00
Nate Begeman
02f77d1e83
Remove a file that is no longer used
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23666 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-08 01:21:27 +00:00
Chris Lattner
cf01a70550
When preselecting, favor things that have low depth to select first. This
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is faster and uses less stack space. This reduces our stack requirement
enough to compile sixtrack, and though it's a hack, should be enough until
we switch to iterative isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23664 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-07 22:10:27 +00:00
Chris Lattner
eb5d47d99d
Fix a CQ regression from my patch to split F32/F64 into seperate register
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classes on PPC. We were emitting fmr instructions to do fp extensions, which
weren't getting coallesced. This fixes Regression/CodeGen/PowerPC/fpcopy.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23654 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-07 05:00:52 +00:00
Chris Lattner
7a7c979ddd
Fix CodeGen/Generic/bool-to-double.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-07 04:50:48 +00:00
Chris Lattner
6a16f6a14f
Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 19:07:45 +00:00
Chris Lattner
222adac30a
Pull out setcc, this reduces stack frame size from 7520 to 6032 bytes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23649 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 19:03:35 +00:00
Chris Lattner
2b63e4c5e2
Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23648 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 18:56:10 +00:00
Chris Lattner
bd937b98f4
Add a recursive-iterative hybrid stage to attempt to reduce stack space, this
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helps but not enough.
Start pulling cases out of PPC32DAGToDAGISel::Select. With GCC 4, this function
required 8512 bytes of stack space for each invocation (GCC 3 required less
than 700 bytes). Pulling this first function out gets us down to 8224. More
to come :(
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2005-10-06 18:45:51 +00:00
Andrew Lenharth
f3fb71bfd7
This is suppose to work now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23644 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 16:54:29 +00:00
Andrew Lenharth
d5613debf9
remove VAX compatibility instruction, we will never use this
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23643 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 16:53:32 +00:00
Chris Lattner
f5c6e6b745
silence some warnings
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-05 17:15:09 +00:00
Chris Lattner
ccc8ed7bb5
Add a forward def
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23621 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-04 05:09:20 +00:00
Chris Lattner
8ca02914e5
Speed up the asm printer a lot by not printing formatted LLVM asm output
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for globals
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2005-10-03 07:08:36 +00:00
Chris Lattner
3cf8760dc5
silence some warnings
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 16:29:36 +00:00
Chris Lattner
123557fcf0
silence a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23593 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 16:27:59 +00:00
Chris Lattner
dff06f4348
add patterns for float binops and fma ops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:46:28 +00:00
Chris Lattner
080a4b1637
Sort the cpu and features table, so that the alpha backend doesn't fail EVERY
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compile with an assertion that the tables are not sorted!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23591 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:13:52 +00:00
Chris Lattner
43f07a4bbc
another solution to the fsel issue. Instead of having 4 variants, just force
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the comparison to be 64-bits. This is fine because extensions from float
to double are free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23589 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:07:49 +00:00
Chris Lattner
867940d1b7
fsel can take a different FP type for the comparison and for the result. As such
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split the FSEL family into 4 things instead of just two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:58:23 +00:00
Chris Lattner
7c0d664c21
fix an f32/f64 type mismatch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23587 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:37:13 +00:00
Chris Lattner
a916dd8888
Adjust to change in ctor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:23:51 +00:00
Chris Lattner
ca0a4778a8
Minor tweak to the branch selector. When emitting a two-way branch, and if
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we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch. For example, emit this:
LBBl29_z__44:
stw r9, 0(r15)
stw r9, 4(r15)
stw r9, 8(r15)
stw r9, 12(r15)
addi r15, r15, 16
addi r8, r8, 1
cmpw cr0, r8, r28
ble cr0, LBBl29_z__44
b LBBl29_z__48 *** NOT PART OF LOOP
Instead of:
LBBl29_z__44:
stw r9, 0(r15)
stw r9, 4(r15)
stw r9, 8(r15)
stw r9, 12(r15)
addi r15, r15, 16
addi r8, r8, 1
cmpw cr0, r8, r28
bgt cr0, LBBl29_z__48 *** PART OF LOOP!
b LBBl29_z__44
The former sequence has one fewer dispatch group for the loop body.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23582 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 23:06:26 +00:00
Chris Lattner
b91956e7f8
like the comment says, enable this
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23581 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 23:02:40 +00:00
Chris Lattner
2c1760f636
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23578 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 02:51:36 +00:00
Chris Lattner
919c032fa4
Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
...
These are used to represent float and double values, and the two regclasses
contain the same physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 01:35:02 +00:00
Jim Laskey
242f2557cc
Should be using flag and not chain.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23572 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 23:43:37 +00:00
Nate Begeman
2b5e66fc6e
Remove some now-dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23571 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 21:28:27 +00:00
Andrew Lenharth
ac35cd207f
subtarget support for CIX and FIX extentions (the only 2 I care about right now)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23569 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 20:24:38 +00:00
Chris Lattner
0f21fd5204
Rename MRegisterDesc -> TargetRegisterDesc for consistency
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23564 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:49:27 +00:00
Chris Lattner
863914feb5
trim down the target info structs now that we have a preferred spill register class for each callee save register
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Why is V9 maintaining these tables manually? ugh!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23561 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:38:36 +00:00
Chris Lattner
5802be13e0
constant fold these calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23558 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:16:59 +00:00